am335x_lcd.c revision 283276
11573Srgrimes/*- 21573Srgrimes * Copyright 2013 Oleksandr Tymoshenko <gonzo@freebsd.org> 31573Srgrimes * All rights reserved. 41573Srgrimes * 51573Srgrimes * Redistribution and use in source and binary forms, with or without 61573Srgrimes * modification, are permitted provided that the following conditions 71573Srgrimes * are met: 81573Srgrimes * 1. Redistributions of source code must retain the above copyright 91573Srgrimes * notice, this list of conditions and the following disclaimer. 101573Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 111573Srgrimes * notice, this list of conditions and the following disclaimer in the 121573Srgrimes * documentation and/or other materials provided with the distribution. 131573Srgrimes * 141573Srgrimes * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 151573Srgrimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 161573Srgrimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 171573Srgrimes * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 181573Srgrimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 191573Srgrimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 201573Srgrimes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 211573Srgrimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 221573Srgrimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 231573Srgrimes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 241573Srgrimes * SUCH DAMAGE. 251573Srgrimes */ 261573Srgrimes 271573Srgrimes#include <sys/cdefs.h> 281573Srgrimes__FBSDID("$FreeBSD: head/sys/arm/ti/am335x/am335x_lcd.c 283276 2015-05-22 03:16:18Z gonzo $"); 291573Srgrimes 301573Srgrimes#include "opt_syscons.h" 311573Srgrimes#include <sys/param.h> 3282496Sbde#include <sys/systm.h> 3390039Sobrien#include <sys/kernel.h> 3490039Sobrien#include <sys/module.h> 351573Srgrimes#include <sys/clock.h> 361573Srgrimes#include <sys/time.h> 371573Srgrimes#include <sys/bus.h> 3882496Sbde#include <sys/lock.h> 3911659Sphk#include <sys/mutex.h> 4082496Sbde#include <sys/resource.h> 41194494Sbrooks#include <sys/rman.h> 42194494Sbrooks#include <sys/sysctl.h> 43194494Sbrooks#include <vm/vm.h> 4417141Sjkh#include <vm/pmap.h> 451573Srgrimes#include <sys/fbio.h> 461573Srgrimes#include <sys/consio.h> 471573Srgrimes 481573Srgrimes#include <machine/bus.h> 4989663Smarkm 501573Srgrimes#include <dev/fdt/fdt_common.h> 51194494Sbrooks#include <dev/ofw/openfirm.h> 52194494Sbrooks#include <dev/ofw/ofw_bus.h> 53194494Sbrooks#include <dev/ofw/ofw_bus_subr.h> 54194494Sbrooks 55122899Sdds#include <dev/fb/fbreg.h> 56194494Sbrooks#ifdef DEV_SC 57122899Sdds#include <dev/syscons/syscons.h> 58122899Sdds#else /* VT */ 59194494Sbrooks#include <dev/vt/vt.h> 60194494Sbrooks#endif 61194494Sbrooks 621573Srgrimes#include <arm/ti/ti_prcm.h> 63194494Sbrooks#include <arm/ti/ti_scm.h> 6487054Stobez 65194494Sbrooks#include "am335x_lcd.h" 66194494Sbrooks#include "am335x_pwm.h" 67194494Sbrooks 681573Srgrimes#include "fb_if.h" 69 70#define LCD_PID 0x00 71#define LCD_CTRL 0x04 72#define CTRL_DIV_MASK 0xff 73#define CTRL_DIV_SHIFT 8 74#define CTRL_AUTO_UFLOW_RESTART (1 << 1) 75#define CTRL_RASTER_MODE 1 76#define CTRL_LIDD_MODE 0 77#define LCD_LIDD_CTRL 0x0C 78#define LCD_LIDD_CS0_CONF 0x10 79#define LCD_LIDD_CS0_ADDR 0x14 80#define LCD_LIDD_CS0_DATA 0x18 81#define LCD_LIDD_CS1_CONF 0x1C 82#define LCD_LIDD_CS1_ADDR 0x20 83#define LCD_LIDD_CS1_DATA 0x24 84#define LCD_RASTER_CTRL 0x28 85#define RASTER_CTRL_TFT24_UNPACKED (1 << 26) 86#define RASTER_CTRL_TFT24 (1 << 25) 87#define RASTER_CTRL_STN565 (1 << 24) 88#define RASTER_CTRL_TFTPMAP (1 << 23) 89#define RASTER_CTRL_NIBMODE (1 << 22) 90#define RASTER_CTRL_PALMODE_SHIFT 20 91#define PALETTE_PALETTE_AND_DATA 0x00 92#define PALETTE_PALETTE_ONLY 0x01 93#define PALETTE_DATA_ONLY 0x02 94#define RASTER_CTRL_REQDLY_SHIFT 12 95#define RASTER_CTRL_MONO8B (1 << 9) 96#define RASTER_CTRL_RBORDER (1 << 8) 97#define RASTER_CTRL_LCDTFT (1 << 7) 98#define RASTER_CTRL_LCDBW (1 << 1) 99#define RASTER_CTRL_LCDEN (1 << 0) 100#define LCD_RASTER_TIMING_0 0x2C 101#define RASTER_TIMING_0_HBP_SHIFT 24 102#define RASTER_TIMING_0_HFP_SHIFT 16 103#define RASTER_TIMING_0_HSW_SHIFT 10 104#define RASTER_TIMING_0_PPLLSB_SHIFT 4 105#define RASTER_TIMING_0_PPLMSB_SHIFT 3 106#define LCD_RASTER_TIMING_1 0x30 107#define RASTER_TIMING_1_VBP_SHIFT 24 108#define RASTER_TIMING_1_VFP_SHIFT 16 109#define RASTER_TIMING_1_VSW_SHIFT 10 110#define RASTER_TIMING_1_LPP_SHIFT 0 111#define LCD_RASTER_TIMING_2 0x34 112#define RASTER_TIMING_2_HSWHI_SHIFT 27 113#define RASTER_TIMING_2_LPP_B10_SHIFT 26 114#define RASTER_TIMING_2_PHSVS (1 << 25) 115#define RASTER_TIMING_2_PHSVS_RISE (1 << 24) 116#define RASTER_TIMING_2_PHSVS_FALL (0 << 24) 117#define RASTER_TIMING_2_IOE (1 << 23) 118#define RASTER_TIMING_2_IPC (1 << 22) 119#define RASTER_TIMING_2_IHS (1 << 21) 120#define RASTER_TIMING_2_IVS (1 << 20) 121#define RASTER_TIMING_2_ACBI_SHIFT 16 122#define RASTER_TIMING_2_ACB_SHIFT 8 123#define RASTER_TIMING_2_HBPHI_SHIFT 4 124#define RASTER_TIMING_2_HFPHI_SHIFT 0 125#define LCD_RASTER_SUBPANEL 0x38 126#define LCD_RASTER_SUBPANEL2 0x3C 127#define LCD_LCDDMA_CTRL 0x40 128#define LCDDMA_CTRL_DMA_MASTER_PRIO_SHIFT 16 129#define LCDDMA_CTRL_TH_FIFO_RDY_SHIFT 8 130#define LCDDMA_CTRL_BURST_SIZE_SHIFT 4 131#define LCDDMA_CTRL_BYTES_SWAP (1 << 3) 132#define LCDDMA_CTRL_BE (1 << 1) 133#define LCDDMA_CTRL_FB0_ONLY 0 134#define LCDDMA_CTRL_FB0_FB1 (1 << 0) 135#define LCD_LCDDMA_FB0_BASE 0x44 136#define LCD_LCDDMA_FB0_CEILING 0x48 137#define LCD_LCDDMA_FB1_BASE 0x4C 138#define LCD_LCDDMA_FB1_CEILING 0x50 139#define LCD_SYSCONFIG 0x54 140#define SYSCONFIG_STANDBY_FORCE (0 << 4) 141#define SYSCONFIG_STANDBY_NONE (1 << 4) 142#define SYSCONFIG_STANDBY_SMART (2 << 4) 143#define SYSCONFIG_IDLE_FORCE (0 << 2) 144#define SYSCONFIG_IDLE_NONE (1 << 2) 145#define SYSCONFIG_IDLE_SMART (2 << 2) 146#define LCD_IRQSTATUS_RAW 0x58 147#define LCD_IRQSTATUS 0x5C 148#define LCD_IRQENABLE_SET 0x60 149#define LCD_IRQENABLE_CLEAR 0x64 150#define IRQ_EOF1 (1 << 9) 151#define IRQ_EOF0 (1 << 8) 152#define IRQ_PL (1 << 6) 153#define IRQ_FUF (1 << 5) 154#define IRQ_ACB (1 << 3) 155#define IRQ_SYNC_LOST (1 << 2) 156#define IRQ_RASTER_DONE (1 << 1) 157#define IRQ_FRAME_DONE (1 << 0) 158#define LCD_END_OF_INT_IND 0x68 159#define LCD_CLKC_ENABLE 0x6C 160#define CLKC_ENABLE_DMA (1 << 2) 161#define CLKC_ENABLE_LDID (1 << 1) 162#define CLKC_ENABLE_CORE (1 << 0) 163#define LCD_CLKC_RESET 0x70 164#define CLKC_RESET_MAIN (1 << 3) 165#define CLKC_RESET_DMA (1 << 2) 166#define CLKC_RESET_LDID (1 << 1) 167#define CLKC_RESET_CORE (1 << 0) 168 169#define LCD_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 170#define LCD_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 171#define LCD_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ 172 device_get_nameunit(_sc->sc_dev), "am335x_lcd", MTX_DEF) 173#define LCD_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 174 175#define LCD_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg); 176#define LCD_WRITE4(_sc, reg, value) \ 177 bus_write_4((_sc)->sc_mem_res, reg, value); 178 179 180/* Backlight is controlled by eCAS interface on PWM unit 0 */ 181#define PWM_UNIT 0 182#define PWM_PERIOD 100 183 184struct am335x_lcd_softc { 185 device_t sc_dev; 186 struct fb_info sc_fb_info; 187 struct resource *sc_mem_res; 188 struct resource *sc_irq_res; 189 void *sc_intr_hl; 190 struct mtx sc_mtx; 191 int sc_backlight; 192 struct sysctl_oid *sc_oid; 193 194 /* Framebuffer */ 195 bus_dma_tag_t sc_dma_tag; 196 bus_dmamap_t sc_dma_map; 197 size_t sc_fb_size; 198 bus_addr_t sc_fb_phys; 199 uint8_t *sc_fb_base; 200}; 201 202static void 203am335x_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err) 204{ 205 bus_addr_t *addr; 206 207 if (err) 208 return; 209 210 addr = (bus_addr_t*)arg; 211 *addr = segs[0].ds_addr; 212} 213 214static uint32_t 215am335x_lcd_calc_divisor(uint32_t reference, uint32_t freq) 216{ 217 uint32_t div; 218 /* Raster mode case: divisors are in range from 2 to 255 */ 219 for (div = 2; div < 255; div++) 220 if (reference/div <= freq) 221 return (div); 222 223 return (255); 224} 225 226static int 227am335x_lcd_sysctl_backlight(SYSCTL_HANDLER_ARGS) 228{ 229 struct am335x_lcd_softc *sc = (struct am335x_lcd_softc*)arg1; 230 int error; 231 int backlight; 232 233 backlight = sc->sc_backlight; 234 error = sysctl_handle_int(oidp, &backlight, 0, req); 235 236 if (error != 0 || req->newptr == NULL) 237 return (error); 238 239 if (backlight < 0) 240 backlight = 0; 241 if (backlight > 100) 242 backlight = 100; 243 244 LCD_LOCK(sc); 245 error = am335x_pwm_config_ecap(PWM_UNIT, PWM_PERIOD, 246 backlight*PWM_PERIOD/100); 247 if (error == 0) 248 sc->sc_backlight = backlight; 249 LCD_UNLOCK(sc); 250 251 return (error); 252} 253 254static int 255am335x_read_property(device_t dev, phandle_t node, const char *name, uint32_t *val) 256{ 257 pcell_t cell; 258 259 if ((OF_getprop(node, name, &cell, sizeof(cell))) <= 0) { 260 device_printf(dev, "missing '%s' attribute in LCD panel info\n", 261 name); 262 return (ENXIO); 263 } 264 265 *val = fdt32_to_cpu(cell); 266 267 return (0); 268} 269 270static int 271am335x_read_timing(device_t dev, phandle_t node, struct panel_info *panel) 272{ 273 int error; 274 phandle_t timings_node, timing_node, native; 275 276 timings_node = fdt_find_child(node, "display-timings"); 277 if (timings_node == 0) { 278 device_printf(dev, "no \"display-timings\" node\n"); 279 return (-1); 280 } 281 282 if (OF_searchencprop(timings_node, "native-mode", &native, 283 sizeof(native)) == -1) { 284 device_printf(dev, "no \"native-mode\" reference in \"timings\" node\n"); 285 return (-1); 286 } 287 288 timing_node = OF_node_from_xref(native); 289 290 error = 0; 291 if ((error = am335x_read_property(dev, timing_node, 292 "hactive", &panel->panel_width))) 293 goto out; 294 295 if ((error = am335x_read_property(dev, timing_node, 296 "vactive", &panel->panel_height))) 297 goto out; 298 299 if ((error = am335x_read_property(dev, timing_node, 300 "hfront-porch", &panel->panel_hfp))) 301 goto out; 302 303 if ((error = am335x_read_property(dev, timing_node, 304 "hback-porch", &panel->panel_hbp))) 305 goto out; 306 307 if ((error = am335x_read_property(dev, timing_node, 308 "hsync-len", &panel->panel_hsw))) 309 goto out; 310 311 if ((error = am335x_read_property(dev, timing_node, 312 "vfront-porch", &panel->panel_vfp))) 313 goto out; 314 315 if ((error = am335x_read_property(dev, timing_node, 316 "vback-porch", &panel->panel_vbp))) 317 goto out; 318 319 if ((error = am335x_read_property(dev, timing_node, 320 "vsync-len", &panel->panel_vsw))) 321 goto out; 322 323 if ((error = am335x_read_property(dev, timing_node, 324 "clock-frequency", &panel->panel_pxl_clk))) 325 goto out; 326 327 if ((error = am335x_read_property(dev, timing_node, 328 "pixelclk-active", &panel->pixelclk_active))) 329 goto out; 330 331 if ((error = am335x_read_property(dev, timing_node, 332 "hsync-active", &panel->hsync_active))) 333 goto out; 334 335 if ((error = am335x_read_property(dev, timing_node, 336 "vsync-active", &panel->vsync_active))) 337 goto out; 338 339out: 340 return (error); 341} 342 343static int 344am335x_read_panel_info(device_t dev, phandle_t node, struct panel_info *panel) 345{ 346 int error; 347 phandle_t panel_info_node; 348 349 panel_info_node = fdt_find_child(node, "panel-info"); 350 if (panel_info_node == 0) 351 return (-1); 352 353 error = 0; 354 355 if ((error = am335x_read_property(dev, panel_info_node, 356 "ac-bias", &panel->ac_bias))) 357 goto out; 358 359 if ((error = am335x_read_property(dev, panel_info_node, 360 "ac-bias-intrpt", &panel->ac_bias_intrpt))) 361 goto out; 362 363 if ((error = am335x_read_property(dev, panel_info_node, 364 "dma-burst-sz", &panel->dma_burst_sz))) 365 goto out; 366 367 if ((error = am335x_read_property(dev, panel_info_node, 368 "bpp", &panel->bpp))) 369 goto out; 370 371 if ((error = am335x_read_property(dev, panel_info_node, 372 "fdd", &panel->fdd))) 373 goto out; 374 375 if ((error = am335x_read_property(dev, panel_info_node, 376 "sync-edge", &panel->sync_edge))) 377 goto out; 378 379 error = am335x_read_property(dev, panel_info_node, 380 "sync-ctrl", &panel->sync_ctrl); 381 382out: 383 return (error); 384} 385 386static void 387am335x_lcd_intr(void *arg) 388{ 389 struct am335x_lcd_softc *sc = arg; 390 uint32_t reg; 391 392 reg = LCD_READ4(sc, LCD_IRQSTATUS); 393 LCD_WRITE4(sc, LCD_IRQSTATUS, reg); 394 /* Read value back to make sure it reached the hardware */ 395 reg = LCD_READ4(sc, LCD_IRQSTATUS); 396 397 if (reg & IRQ_SYNC_LOST) { 398 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 399 reg &= ~RASTER_CTRL_LCDEN; 400 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 401 402 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 403 reg |= RASTER_CTRL_LCDEN; 404 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 405 goto done; 406 } 407 408 if (reg & IRQ_PL) { 409 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 410 reg &= ~RASTER_CTRL_LCDEN; 411 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 412 413 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 414 reg |= RASTER_CTRL_LCDEN; 415 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 416 goto done; 417 } 418 419 if (reg & IRQ_EOF0) { 420 LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 421 LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 422 reg &= ~IRQ_EOF0; 423 } 424 425 if (reg & IRQ_EOF1) { 426 LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 427 LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 428 reg &= ~IRQ_EOF1; 429 } 430 431 if (reg & IRQ_FUF) { 432 /* TODO: Handle FUF */ 433 } 434 435 if (reg & IRQ_ACB) { 436 /* TODO: Handle ACB */ 437 } 438 439done: 440 LCD_WRITE4(sc, LCD_END_OF_INT_IND, 0); 441 /* Read value back to make sure it reached the hardware */ 442 reg = LCD_READ4(sc, LCD_END_OF_INT_IND); 443} 444 445static int 446am335x_lcd_probe(device_t dev) 447{ 448#ifdef DEV_SC 449 int err; 450#endif 451 452 if (!ofw_bus_status_okay(dev)) 453 return (ENXIO); 454 455 if (!ofw_bus_is_compatible(dev, "ti,am33xx-tilcdc")) 456 return (ENXIO); 457 458 device_set_desc(dev, "AM335x LCD controller"); 459 460#ifdef DEV_SC 461 err = sc_probe_unit(device_get_unit(dev), 462 device_get_flags(dev) | SC_AUTODETECT_KBD); 463 if (err != 0) 464 return (err); 465#endif 466 467 return (BUS_PROBE_DEFAULT); 468} 469 470static int 471am335x_lcd_attach(device_t dev) 472{ 473 struct am335x_lcd_softc *sc; 474 int rid; 475 int div; 476 struct panel_info panel; 477 uint32_t reg, timing0, timing1, timing2; 478 struct sysctl_ctx_list *ctx; 479 struct sysctl_oid *tree; 480 uint32_t burst_log; 481 int err; 482 size_t dma_size; 483 uint32_t hbp, hfp, hsw; 484 uint32_t vbp, vfp, vsw; 485 uint32_t width, height; 486 phandle_t root, panel_node; 487 488 sc = device_get_softc(dev); 489 sc->sc_dev = dev; 490 491 root = OF_finddevice("/"); 492 if (root == 0) { 493 device_printf(dev, "failed to get FDT root node\n"); 494 return (ENXIO); 495 } 496 497 panel_node = fdt_find_compatible(root, "ti,tilcdc,panel", 1); 498 if (panel_node == 0) { 499 device_printf(dev, "failed to find compatible panel in FDT blob\n"); 500 return (ENXIO); 501 } 502 503 if (am335x_read_panel_info(dev, panel_node, &panel)) { 504 device_printf(dev, "failed to read panel info\n"); 505 return (ENXIO); 506 } 507 508 if (am335x_read_timing(dev, panel_node, &panel)) { 509 device_printf(dev, "failed to read timings\n"); 510 return (ENXIO); 511 } 512 513 int ref_freq = 0; 514 ti_prcm_clk_enable(LCDC_CLK); 515 if (ti_prcm_clk_get_source_freq(LCDC_CLK, &ref_freq)) { 516 device_printf(dev, "Can't get reference frequency\n"); 517 return (ENXIO); 518 } 519 520 rid = 0; 521 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 522 RF_ACTIVE); 523 if (!sc->sc_mem_res) { 524 device_printf(dev, "cannot allocate memory window\n"); 525 return (ENXIO); 526 } 527 528 rid = 0; 529 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 530 RF_ACTIVE); 531 if (!sc->sc_irq_res) { 532 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 533 device_printf(dev, "cannot allocate interrupt\n"); 534 return (ENXIO); 535 } 536 537 if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 538 NULL, am335x_lcd_intr, sc, 539 &sc->sc_intr_hl) != 0) { 540 bus_release_resource(dev, SYS_RES_IRQ, rid, 541 sc->sc_irq_res); 542 bus_release_resource(dev, SYS_RES_MEMORY, rid, 543 sc->sc_mem_res); 544 device_printf(dev, "Unable to setup the irq handler.\n"); 545 return (ENXIO); 546 } 547 548 LCD_LOCK_INIT(sc); 549 550 /* Panle initialization */ 551 dma_size = round_page(panel.panel_width*panel.panel_height*panel.bpp/8); 552 553 /* 554 * Now allocate framebuffer memory 555 */ 556 err = bus_dma_tag_create( 557 bus_get_dma_tag(dev), 558 4, 0, /* alignment, boundary */ 559 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 560 BUS_SPACE_MAXADDR, /* highaddr */ 561 NULL, NULL, /* filter, filterarg */ 562 dma_size, 1, /* maxsize, nsegments */ 563 dma_size, 0, /* maxsegsize, flags */ 564 NULL, NULL, /* lockfunc, lockarg */ 565 &sc->sc_dma_tag); 566 if (err) 567 goto fail; 568 569 err = bus_dmamem_alloc(sc->sc_dma_tag, (void **)&sc->sc_fb_base, 570 BUS_DMA_COHERENT, &sc->sc_dma_map); 571 572 if (err) { 573 device_printf(dev, "cannot allocate framebuffer\n"); 574 goto fail; 575 } 576 577 err = bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, sc->sc_fb_base, 578 dma_size, am335x_fb_dmamap_cb, &sc->sc_fb_phys, BUS_DMA_NOWAIT); 579 580 if (err) { 581 device_printf(dev, "cannot load DMA map\n"); 582 goto fail; 583 } 584 585 /* Make sure it's blank */ 586 memset(sc->sc_fb_base, 0x00, dma_size); 587 588 /* Calculate actual FB Size */ 589 sc->sc_fb_size = panel.panel_width*panel.panel_height*panel.bpp/8; 590 591 /* Only raster mode is supported */ 592 reg = CTRL_RASTER_MODE; 593 div = am335x_lcd_calc_divisor(ref_freq, panel.panel_pxl_clk); 594 reg |= (div << CTRL_DIV_SHIFT); 595 LCD_WRITE4(sc, LCD_CTRL, reg); 596 597 /* Set timing */ 598 timing0 = timing1 = timing2 = 0; 599 600 hbp = panel.panel_hbp - 1; 601 hfp = panel.panel_hfp - 1; 602 hsw = panel.panel_hsw - 1; 603 604 vbp = panel.panel_vbp; 605 vfp = panel.panel_vfp; 606 vsw = panel.panel_vsw - 1; 607 608 height = panel.panel_height - 1; 609 width = panel.panel_width - 1; 610 611 /* Horizontal back porch */ 612 timing0 |= (hbp & 0xff) << RASTER_TIMING_0_HBP_SHIFT; 613 timing2 |= ((hbp >> 8) & 3) << RASTER_TIMING_2_HBPHI_SHIFT; 614 /* Horizontal front porch */ 615 timing0 |= (hfp & 0xff) << RASTER_TIMING_0_HFP_SHIFT; 616 timing2 |= ((hfp >> 8) & 3) << RASTER_TIMING_2_HFPHI_SHIFT; 617 /* Horizontal sync width */ 618 timing0 |= (hsw & 0x3f) << RASTER_TIMING_0_HSW_SHIFT; 619 timing2 |= ((hsw >> 6) & 0xf) << RASTER_TIMING_2_HSWHI_SHIFT; 620 621 /* Vertical back porch, front porch, sync width */ 622 timing1 |= (vbp & 0xff) << RASTER_TIMING_1_VBP_SHIFT; 623 timing1 |= (vfp & 0xff) << RASTER_TIMING_1_VFP_SHIFT; 624 timing1 |= (vsw & 0x3f) << RASTER_TIMING_1_VSW_SHIFT; 625 626 /* Pixels per line */ 627 timing0 |= ((width >> 10) & 1) 628 << RASTER_TIMING_0_PPLMSB_SHIFT; 629 timing0 |= ((width >> 4) & 0x3f) 630 << RASTER_TIMING_0_PPLLSB_SHIFT; 631 632 /* Lines per panel */ 633 timing1 |= (height & 0x3ff) 634 << RASTER_TIMING_1_LPP_SHIFT; 635 timing2 |= ((height >> 10 ) & 1) 636 << RASTER_TIMING_2_LPP_B10_SHIFT; 637 638 /* clock signal settings */ 639 if (panel.sync_ctrl) 640 timing2 |= RASTER_TIMING_2_PHSVS; 641 if (panel.sync_edge) 642 timing2 |= RASTER_TIMING_2_PHSVS_RISE; 643 else 644 timing2 |= RASTER_TIMING_2_PHSVS_FALL; 645 if (panel.hsync_active == 0) 646 timing2 |= RASTER_TIMING_2_IHS; 647 if (panel.vsync_active == 0) 648 timing2 |= RASTER_TIMING_2_IVS; 649 if (panel.pixelclk_active == 0) 650 timing2 |= RASTER_TIMING_2_IPC; 651 652 /* AC bias */ 653 timing2 |= (panel.ac_bias << RASTER_TIMING_2_ACB_SHIFT); 654 timing2 |= (panel.ac_bias_intrpt << RASTER_TIMING_2_ACBI_SHIFT); 655 656 LCD_WRITE4(sc, LCD_RASTER_TIMING_0, timing0); 657 LCD_WRITE4(sc, LCD_RASTER_TIMING_1, timing1); 658 LCD_WRITE4(sc, LCD_RASTER_TIMING_2, timing2); 659 660 /* DMA settings */ 661 reg = LCDDMA_CTRL_FB0_FB1; 662 /* Find power of 2 for current burst size */ 663 switch (panel.dma_burst_sz) { 664 case 1: 665 burst_log = 0; 666 break; 667 case 2: 668 burst_log = 1; 669 break; 670 case 4: 671 burst_log = 2; 672 break; 673 case 8: 674 burst_log = 3; 675 break; 676 case 16: 677 default: 678 burst_log = 4; 679 break; 680 } 681 reg |= (burst_log << LCDDMA_CTRL_BURST_SIZE_SHIFT); 682 /* XXX: FIFO TH */ 683 reg |= (0 << LCDDMA_CTRL_TH_FIFO_RDY_SHIFT); 684 LCD_WRITE4(sc, LCD_LCDDMA_CTRL, reg); 685 686 LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 687 LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 688 LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 689 LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 690 691 /* Enable LCD */ 692 reg = RASTER_CTRL_LCDTFT; 693 reg |= (panel.fdd << RASTER_CTRL_REQDLY_SHIFT); 694 reg |= (PALETTE_DATA_ONLY << RASTER_CTRL_PALMODE_SHIFT); 695 if (panel.bpp >= 24) 696 reg |= RASTER_CTRL_TFT24; 697 if (panel.bpp == 32) 698 reg |= RASTER_CTRL_TFT24_UNPACKED; 699 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 700 701 LCD_WRITE4(sc, LCD_CLKC_ENABLE, 702 CLKC_ENABLE_DMA | CLKC_ENABLE_LDID | CLKC_ENABLE_CORE); 703 704 LCD_WRITE4(sc, LCD_CLKC_RESET, CLKC_RESET_MAIN); 705 DELAY(100); 706 LCD_WRITE4(sc, LCD_CLKC_RESET, 0); 707 708 reg = IRQ_EOF1 | IRQ_EOF0 | IRQ_FUF | IRQ_PL | 709 IRQ_ACB | IRQ_SYNC_LOST | IRQ_RASTER_DONE | 710 IRQ_FRAME_DONE; 711 LCD_WRITE4(sc, LCD_IRQENABLE_SET, reg); 712 713 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 714 reg |= RASTER_CTRL_LCDEN; 715 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 716 717 LCD_WRITE4(sc, LCD_SYSCONFIG, 718 SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLE_SMART); 719 720 /* Init backlight interface */ 721 ctx = device_get_sysctl_ctx(sc->sc_dev); 722 tree = device_get_sysctl_tree(sc->sc_dev); 723 sc->sc_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 724 "backlight", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 725 am335x_lcd_sysctl_backlight, "I", "LCD backlight"); 726 sc->sc_backlight = 0; 727 /* Check if eCAS interface is available at this point */ 728 if (am335x_pwm_config_ecap(PWM_UNIT, 729 PWM_PERIOD, PWM_PERIOD) == 0) 730 sc->sc_backlight = 100; 731 732 sc->sc_fb_info.fb_name = device_get_nameunit(sc->sc_dev); 733 sc->sc_fb_info.fb_vbase = (intptr_t)sc->sc_fb_base; 734 sc->sc_fb_info.fb_pbase = sc->sc_fb_phys; 735 sc->sc_fb_info.fb_size = sc->sc_fb_size; 736 sc->sc_fb_info.fb_bpp = sc->sc_fb_info.fb_depth = panel.bpp; 737 sc->sc_fb_info.fb_stride = panel.panel_width*panel.bpp / 8; 738 sc->sc_fb_info.fb_width = panel.panel_width; 739 sc->sc_fb_info.fb_height = panel.panel_height; 740 741#ifdef DEV_SC 742 err = (sc_attach_unit(device_get_unit(dev), 743 device_get_flags(dev) | SC_AUTODETECT_KBD)); 744 745 if (err) { 746 device_printf(dev, "failed to attach syscons\n"); 747 goto fail; 748 } 749 750 am335x_lcd_syscons_setup((vm_offset_t)sc->sc_fb_base, sc->sc_fb_phys, &panel); 751#else /* VT */ 752 device_t fbd = device_add_child(dev, "fbd", 753 device_get_unit(dev)); 754 if (fbd == NULL) { 755 device_printf(dev, "Failed to add fbd child\n"); 756 goto fail; 757 } 758 if (device_probe_and_attach(fbd) != 0) { 759 device_printf(dev, "Failed to attach fbd device\n"); 760 goto fail; 761 } 762#endif 763 764 return (0); 765 766fail: 767 return (err); 768} 769 770static int 771am335x_lcd_detach(device_t dev) 772{ 773 /* Do not let unload driver */ 774 return (EBUSY); 775} 776 777static struct fb_info * 778am335x_lcd_fb_getinfo(device_t dev) 779{ 780 struct am335x_lcd_softc *sc; 781 782 sc = device_get_softc(dev); 783 784 return (&sc->sc_fb_info); 785} 786 787static device_method_t am335x_lcd_methods[] = { 788 DEVMETHOD(device_probe, am335x_lcd_probe), 789 DEVMETHOD(device_attach, am335x_lcd_attach), 790 DEVMETHOD(device_detach, am335x_lcd_detach), 791 792 /* Framebuffer service methods */ 793 DEVMETHOD(fb_getinfo, am335x_lcd_fb_getinfo), 794 795 DEVMETHOD_END 796}; 797 798static driver_t am335x_lcd_driver = { 799 "fb", 800 am335x_lcd_methods, 801 sizeof(struct am335x_lcd_softc), 802}; 803 804static devclass_t am335x_lcd_devclass; 805 806DRIVER_MODULE(am335x_lcd, simplebus, am335x_lcd_driver, am335x_lcd_devclass, 0, 0); 807MODULE_VERSION(am335x_lcd, 1); 808MODULE_DEPEND(am335x_lcd, simplebus, 1, 1, 1); 809