am335x_lcd.c revision 277522
1/*- 2 * Copyright 2013 Oleksandr Tymoshenko <gonzo@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/arm/ti/am335x/am335x_lcd.c 277522 2015-01-22 03:32:04Z gonzo $"); 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/kernel.h> 33#include <sys/module.h> 34#include <sys/clock.h> 35#include <sys/time.h> 36#include <sys/bus.h> 37#include <sys/lock.h> 38#include <sys/mutex.h> 39#include <sys/resource.h> 40#include <sys/rman.h> 41#include <sys/sysctl.h> 42#include <vm/vm.h> 43#include <vm/pmap.h> 44 45/* syscons bits */ 46#include <sys/fbio.h> 47#include <sys/consio.h> 48 49#include <machine/bus.h> 50 51#include <dev/fdt/fdt_common.h> 52#include <dev/ofw/openfirm.h> 53#include <dev/ofw/ofw_bus.h> 54#include <dev/ofw/ofw_bus_subr.h> 55 56#include <dev/fb/fbreg.h> 57#include <dev/syscons/syscons.h> 58 59#include <arm/ti/ti_prcm.h> 60#include <arm/ti/ti_scm.h> 61 62#include "am335x_lcd.h" 63#include "am335x_pwm.h" 64 65#define LCD_PID 0x00 66#define LCD_CTRL 0x04 67#define CTRL_DIV_MASK 0xff 68#define CTRL_DIV_SHIFT 8 69#define CTRL_AUTO_UFLOW_RESTART (1 << 1) 70#define CTRL_RASTER_MODE 1 71#define CTRL_LIDD_MODE 0 72#define LCD_LIDD_CTRL 0x0C 73#define LCD_LIDD_CS0_CONF 0x10 74#define LCD_LIDD_CS0_ADDR 0x14 75#define LCD_LIDD_CS0_DATA 0x18 76#define LCD_LIDD_CS1_CONF 0x1C 77#define LCD_LIDD_CS1_ADDR 0x20 78#define LCD_LIDD_CS1_DATA 0x24 79#define LCD_RASTER_CTRL 0x28 80#define RASTER_CTRL_TFT24_UNPACKED (1 << 26) 81#define RASTER_CTRL_TFT24 (1 << 25) 82#define RASTER_CTRL_STN565 (1 << 24) 83#define RASTER_CTRL_TFTPMAP (1 << 23) 84#define RASTER_CTRL_NIBMODE (1 << 22) 85#define RASTER_CTRL_PALMODE_SHIFT 20 86#define PALETTE_PALETTE_AND_DATA 0x00 87#define PALETTE_PALETTE_ONLY 0x01 88#define PALETTE_DATA_ONLY 0x02 89#define RASTER_CTRL_REQDLY_SHIFT 12 90#define RASTER_CTRL_MONO8B (1 << 9) 91#define RASTER_CTRL_RBORDER (1 << 8) 92#define RASTER_CTRL_LCDTFT (1 << 7) 93#define RASTER_CTRL_LCDBW (1 << 1) 94#define RASTER_CTRL_LCDEN (1 << 0) 95#define LCD_RASTER_TIMING_0 0x2C 96#define RASTER_TIMING_0_HBP_SHIFT 24 97#define RASTER_TIMING_0_HFP_SHIFT 16 98#define RASTER_TIMING_0_HSW_SHIFT 10 99#define RASTER_TIMING_0_PPLLSB_SHIFT 4 100#define RASTER_TIMING_0_PPLMSB_SHIFT 3 101#define LCD_RASTER_TIMING_1 0x30 102#define RASTER_TIMING_1_VBP_SHIFT 24 103#define RASTER_TIMING_1_VFP_SHIFT 16 104#define RASTER_TIMING_1_VSW_SHIFT 10 105#define RASTER_TIMING_1_LPP_SHIFT 0 106#define LCD_RASTER_TIMING_2 0x34 107#define RASTER_TIMING_2_HSWHI_SHIFT 27 108#define RASTER_TIMING_2_LPP_B10_SHIFT 26 109#define RASTER_TIMING_2_PHSVS (1 << 25) 110#define RASTER_TIMING_2_PHSVS_RISE (1 << 24) 111#define RASTER_TIMING_2_PHSVS_FALL (0 << 24) 112#define RASTER_TIMING_2_IOE (1 << 23) 113#define RASTER_TIMING_2_IPC (1 << 22) 114#define RASTER_TIMING_2_IHS (1 << 21) 115#define RASTER_TIMING_2_IVS (1 << 20) 116#define RASTER_TIMING_2_ACBI_SHIFT 16 117#define RASTER_TIMING_2_ACB_SHIFT 8 118#define RASTER_TIMING_2_HBPHI_SHIFT 4 119#define RASTER_TIMING_2_HFPHI_SHIFT 0 120#define LCD_RASTER_SUBPANEL 0x38 121#define LCD_RASTER_SUBPANEL2 0x3C 122#define LCD_LCDDMA_CTRL 0x40 123#define LCDDMA_CTRL_DMA_MASTER_PRIO_SHIFT 16 124#define LCDDMA_CTRL_TH_FIFO_RDY_SHIFT 8 125#define LCDDMA_CTRL_BURST_SIZE_SHIFT 4 126#define LCDDMA_CTRL_BYTES_SWAP (1 << 3) 127#define LCDDMA_CTRL_BE (1 << 1) 128#define LCDDMA_CTRL_FB0_ONLY 0 129#define LCDDMA_CTRL_FB0_FB1 (1 << 0) 130#define LCD_LCDDMA_FB0_BASE 0x44 131#define LCD_LCDDMA_FB0_CEILING 0x48 132#define LCD_LCDDMA_FB1_BASE 0x4C 133#define LCD_LCDDMA_FB1_CEILING 0x50 134#define LCD_SYSCONFIG 0x54 135#define SYSCONFIG_STANDBY_FORCE (0 << 4) 136#define SYSCONFIG_STANDBY_NONE (1 << 4) 137#define SYSCONFIG_STANDBY_SMART (2 << 4) 138#define SYSCONFIG_IDLE_FORCE (0 << 2) 139#define SYSCONFIG_IDLE_NONE (1 << 2) 140#define SYSCONFIG_IDLE_SMART (2 << 2) 141#define LCD_IRQSTATUS_RAW 0x58 142#define LCD_IRQSTATUS 0x5C 143#define LCD_IRQENABLE_SET 0x60 144#define LCD_IRQENABLE_CLEAR 0x64 145#define IRQ_EOF1 (1 << 9) 146#define IRQ_EOF0 (1 << 8) 147#define IRQ_PL (1 << 6) 148#define IRQ_FUF (1 << 5) 149#define IRQ_ACB (1 << 3) 150#define IRQ_SYNC_LOST (1 << 2) 151#define IRQ_RASTER_DONE (1 << 1) 152#define IRQ_FRAME_DONE (1 << 0) 153#define LCD_END_OF_INT_IND 0x68 154#define LCD_CLKC_ENABLE 0x6C 155#define CLKC_ENABLE_DMA (1 << 2) 156#define CLKC_ENABLE_LDID (1 << 1) 157#define CLKC_ENABLE_CORE (1 << 0) 158#define LCD_CLKC_RESET 0x70 159#define CLKC_RESET_MAIN (1 << 3) 160#define CLKC_RESET_DMA (1 << 2) 161#define CLKC_RESET_LDID (1 << 1) 162#define CLKC_RESET_CORE (1 << 0) 163 164#define LCD_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 165#define LCD_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 166#define LCD_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ 167 device_get_nameunit(_sc->sc_dev), "am335x_lcd", MTX_DEF) 168#define LCD_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 169 170#define LCD_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg); 171#define LCD_WRITE4(_sc, reg, value) \ 172 bus_write_4((_sc)->sc_mem_res, reg, value); 173 174 175/* Backlight is controlled by eCAS interface on PWM unit 0 */ 176#define PWM_UNIT 0 177#define PWM_PERIOD 100 178 179struct am335x_lcd_softc { 180 device_t sc_dev; 181 struct resource *sc_mem_res; 182 struct resource *sc_irq_res; 183 void *sc_intr_hl; 184 struct mtx sc_mtx; 185 int sc_backlight; 186 struct sysctl_oid *sc_oid; 187 188 /* Framebuffer */ 189 bus_dma_tag_t sc_dma_tag; 190 bus_dmamap_t sc_dma_map; 191 size_t sc_fb_size; 192 bus_addr_t sc_fb_phys; 193 uint8_t *sc_fb_base; 194}; 195 196static void 197am335x_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err) 198{ 199 bus_addr_t *addr; 200 201 if (err) 202 return; 203 204 addr = (bus_addr_t*)arg; 205 *addr = segs[0].ds_addr; 206} 207 208static uint32_t 209am335x_lcd_calc_divisor(uint32_t reference, uint32_t freq) 210{ 211 uint32_t div; 212 /* Raster mode case: divisors are in range from 2 to 255 */ 213 for (div = 2; div < 255; div++) 214 if (reference/div <= freq) 215 return (div); 216 217 return (255); 218} 219 220static int 221am335x_lcd_sysctl_backlight(SYSCTL_HANDLER_ARGS) 222{ 223 struct am335x_lcd_softc *sc = (struct am335x_lcd_softc*)arg1; 224 int error; 225 int backlight; 226 227 backlight = sc->sc_backlight; 228 error = sysctl_handle_int(oidp, &backlight, 0, req); 229 230 if (error != 0 || req->newptr == NULL) 231 return (error); 232 233 if (backlight < 0) 234 backlight = 0; 235 if (backlight > 100) 236 backlight = 100; 237 238 LCD_LOCK(sc); 239 error = am335x_pwm_config_ecas(PWM_UNIT, PWM_PERIOD, 240 backlight*PWM_PERIOD/100); 241 if (error == 0) 242 sc->sc_backlight = backlight; 243 LCD_UNLOCK(sc); 244 245 return (error); 246} 247 248static int 249am335x_read_panel_property(device_t dev, const char *name, uint32_t *val) 250{ 251 phandle_t node; 252 pcell_t cell; 253 254 node = ofw_bus_get_node(dev); 255 if ((OF_getprop(node, name, &cell, sizeof(cell))) <= 0) { 256 device_printf(dev, "missing '%s' attribute in LCD panel info\n", 257 name); 258 return (ENXIO); 259 } 260 261 *val = fdt32_to_cpu(cell); 262 263 return (0); 264} 265 266static int 267am335x_read_panel_info(device_t dev, struct panel_info *panel) 268{ 269 int error; 270 271 error = 0; 272 if ((error = am335x_read_panel_property(dev, 273 "panel_width", &panel->panel_width))) 274 goto out; 275 276 if ((error = am335x_read_panel_property(dev, 277 "panel_height", &panel->panel_height))) 278 goto out; 279 280 if ((error = am335x_read_panel_property(dev, 281 "panel_hfp", &panel->panel_hfp))) 282 goto out; 283 284 if ((error = am335x_read_panel_property(dev, 285 "panel_hbp", &panel->panel_hbp))) 286 goto out; 287 288 if ((error = am335x_read_panel_property(dev, 289 "panel_hsw", &panel->panel_hsw))) 290 goto out; 291 292 if ((error = am335x_read_panel_property(dev, 293 "panel_vfp", &panel->panel_vfp))) 294 goto out; 295 296 if ((error = am335x_read_panel_property(dev, 297 "panel_vbp", &panel->panel_vbp))) 298 goto out; 299 300 if ((error = am335x_read_panel_property(dev, 301 "panel_vsw", &panel->panel_vsw))) 302 goto out; 303 304 if ((error = am335x_read_panel_property(dev, 305 "panel_pxl_clk", &panel->panel_pxl_clk))) 306 goto out; 307 308 if ((error = am335x_read_panel_property(dev, 309 "panel_invert_pxl_clk", &panel->panel_invert_pxl_clk))) 310 goto out; 311 312 if ((error = am335x_read_panel_property(dev, 313 "ac_bias", &panel->ac_bias))) 314 goto out; 315 316 if ((error = am335x_read_panel_property(dev, 317 "ac_bias_intrpt", &panel->ac_bias_intrpt))) 318 goto out; 319 320 if ((error = am335x_read_panel_property(dev, 321 "dma_burst_sz", &panel->dma_burst_sz))) 322 goto out; 323 324 if ((error = am335x_read_panel_property(dev, 325 "bpp", &panel->bpp))) 326 goto out; 327 328 if ((error = am335x_read_panel_property(dev, 329 "fdd", &panel->fdd))) 330 goto out; 331 332 if ((error = am335x_read_panel_property(dev, 333 "invert_line_clock", &panel->invert_line_clock))) 334 goto out; 335 336 if ((error = am335x_read_panel_property(dev, 337 "invert_frm_clock", &panel->invert_frm_clock))) 338 goto out; 339 340 if ((error = am335x_read_panel_property(dev, 341 "sync_edge", &panel->sync_edge))) 342 goto out; 343 344 error = am335x_read_panel_property(dev, 345 "sync_ctrl", &panel->sync_ctrl); 346 347out: 348 return (error); 349} 350 351static void 352am335x_lcd_intr(void *arg) 353{ 354 struct am335x_lcd_softc *sc = arg; 355 uint32_t reg; 356 357 reg = LCD_READ4(sc, LCD_IRQSTATUS); 358 LCD_WRITE4(sc, LCD_IRQSTATUS, reg); 359 360 if (reg & IRQ_SYNC_LOST) { 361 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 362 reg &= ~RASTER_CTRL_LCDEN; 363 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 364 365 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 366 reg |= RASTER_CTRL_LCDEN; 367 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 368 goto done; 369 } 370 371 if (reg & IRQ_PL) { 372 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 373 reg &= ~RASTER_CTRL_LCDEN; 374 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 375 376 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 377 reg |= RASTER_CTRL_LCDEN; 378 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 379 goto done; 380 } 381 382 if (reg & IRQ_EOF0) { 383 LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 384 LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 385 reg &= ~IRQ_EOF0; 386 } 387 388 if (reg & IRQ_EOF1) { 389 LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 390 LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 391 reg &= ~IRQ_EOF1; 392 } 393 394 if (reg & IRQ_FUF) { 395 /* TODO: Handle FUF */ 396 } 397 398 if (reg & IRQ_ACB) { 399 /* TODO: Handle ACB */ 400 } 401 402done: 403 LCD_WRITE4(sc, LCD_END_OF_INT_IND, 0); 404} 405 406static int 407am335x_lcd_probe(device_t dev) 408{ 409 int err; 410 411 if (!ofw_bus_status_okay(dev)) 412 return (ENXIO); 413 414 if (!ofw_bus_is_compatible(dev, "ti,am335x-lcd")) 415 return (ENXIO); 416 417 device_set_desc(dev, "AM335x LCD controller"); 418 419 err = sc_probe_unit(device_get_unit(dev), 420 device_get_flags(dev) | SC_AUTODETECT_KBD); 421 if (err != 0) 422 return (err); 423 424 return (BUS_PROBE_DEFAULT); 425} 426 427static int 428am335x_lcd_attach(device_t dev) 429{ 430 struct am335x_lcd_softc *sc; 431 int rid; 432 int div; 433 struct panel_info panel; 434 uint32_t reg, timing0, timing1, timing2; 435 struct sysctl_ctx_list *ctx; 436 struct sysctl_oid *tree; 437 uint32_t burst_log; 438 int err; 439 size_t dma_size; 440 uint32_t hbp, hfp, hsw; 441 uint32_t vbp, vfp, vsw; 442 uint32_t width, height; 443 444 sc = device_get_softc(dev); 445 sc->sc_dev = dev; 446 447 if (am335x_read_panel_info(dev, &panel)) 448 return (ENXIO); 449 450 int ref_freq = 0; 451 ti_prcm_clk_enable(LCDC_CLK); 452 if (ti_prcm_clk_get_source_freq(LCDC_CLK, &ref_freq)) { 453 device_printf(dev, "Can't get reference frequency\n"); 454 return (ENXIO); 455 } 456 457 rid = 0; 458 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 459 RF_ACTIVE); 460 if (!sc->sc_mem_res) { 461 device_printf(dev, "cannot allocate memory window\n"); 462 return (ENXIO); 463 } 464 465 rid = 0; 466 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 467 RF_ACTIVE); 468 if (!sc->sc_irq_res) { 469 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 470 device_printf(dev, "cannot allocate interrupt\n"); 471 return (ENXIO); 472 } 473 474 if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 475 NULL, am335x_lcd_intr, sc, 476 &sc->sc_intr_hl) != 0) { 477 bus_release_resource(dev, SYS_RES_IRQ, rid, 478 sc->sc_irq_res); 479 bus_release_resource(dev, SYS_RES_MEMORY, rid, 480 sc->sc_mem_res); 481 device_printf(dev, "Unable to setup the irq handler.\n"); 482 return (ENXIO); 483 } 484 485 LCD_LOCK_INIT(sc); 486 487 /* Panle initialization */ 488 dma_size = round_page(panel.panel_width*panel.panel_height*panel.bpp/8); 489 490 /* 491 * Now allocate framebuffer memory 492 */ 493 err = bus_dma_tag_create( 494 bus_get_dma_tag(dev), 495 4, 0, /* alignment, boundary */ 496 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 497 BUS_SPACE_MAXADDR, /* highaddr */ 498 NULL, NULL, /* filter, filterarg */ 499 dma_size, 1, /* maxsize, nsegments */ 500 dma_size, 0, /* maxsegsize, flags */ 501 NULL, NULL, /* lockfunc, lockarg */ 502 &sc->sc_dma_tag); 503 if (err) 504 goto fail; 505 506 err = bus_dmamem_alloc(sc->sc_dma_tag, (void **)&sc->sc_fb_base, 507 BUS_DMA_COHERENT, &sc->sc_dma_map); 508 509 if (err) { 510 device_printf(dev, "cannot allocate framebuffer\n"); 511 goto fail; 512 } 513 514 err = bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, sc->sc_fb_base, 515 dma_size, am335x_fb_dmamap_cb, &sc->sc_fb_phys, BUS_DMA_NOWAIT); 516 517 if (err) { 518 device_printf(dev, "cannot load DMA map\n"); 519 goto fail; 520 } 521 522 /* Make sure it's blank */ 523 memset(sc->sc_fb_base, 0x00, dma_size); 524 525 /* Calculate actual FB Size */ 526 sc->sc_fb_size = panel.panel_width*panel.panel_height*panel.bpp/8; 527 528 /* Only raster mode is supported */ 529 reg = CTRL_RASTER_MODE; 530 div = am335x_lcd_calc_divisor(ref_freq, panel.panel_pxl_clk); 531 reg |= (div << CTRL_DIV_SHIFT); 532 LCD_WRITE4(sc, LCD_CTRL, reg); 533 534 /* Set timing */ 535 timing0 = timing1 = timing2 = 0; 536 537 hbp = panel.panel_hbp - 1; 538 hfp = panel.panel_hfp - 1; 539 hsw = panel.panel_hsw - 1; 540 541 vbp = panel.panel_vbp; 542 vfp = panel.panel_vfp; 543 vsw = panel.panel_vsw - 1; 544 545 height = panel.panel_height - 1; 546 width = panel.panel_width - 1; 547 548 /* Horizontal back porch */ 549 timing0 |= (hbp & 0xff) << RASTER_TIMING_0_HBP_SHIFT; 550 timing2 |= ((hbp >> 8) & 3) << RASTER_TIMING_2_HBPHI_SHIFT; 551 /* Horizontal front porch */ 552 timing0 |= (hfp & 0xff) << RASTER_TIMING_0_HFP_SHIFT; 553 timing2 |= ((hfp >> 8) & 3) << RASTER_TIMING_2_HFPHI_SHIFT; 554 /* Horizontal sync width */ 555 timing0 |= (hsw & 0x3f) << RASTER_TIMING_0_HSW_SHIFT; 556 timing2 |= ((hsw >> 6) & 0xf) << RASTER_TIMING_2_HSWHI_SHIFT; 557 558 /* Vertical back porch, front porch, sync width */ 559 timing1 |= (vbp & 0xff) << RASTER_TIMING_1_VBP_SHIFT; 560 timing1 |= (vfp & 0xff) << RASTER_TIMING_1_VFP_SHIFT; 561 timing1 |= (vsw & 0x3f) << RASTER_TIMING_1_VSW_SHIFT; 562 563 /* Pixels per line */ 564 timing0 |= ((width >> 10) & 1) 565 << RASTER_TIMING_0_PPLMSB_SHIFT; 566 timing0 |= ((width >> 4) & 0x3f) 567 << RASTER_TIMING_0_PPLLSB_SHIFT; 568 569 /* Lines per panel */ 570 timing1 |= (height & 0x3ff) 571 << RASTER_TIMING_1_LPP_SHIFT; 572 timing2 |= ((height >> 10 ) & 1) 573 << RASTER_TIMING_2_LPP_B10_SHIFT; 574 575 /* clock signal settings */ 576 if (panel.sync_ctrl) 577 timing2 |= RASTER_TIMING_2_PHSVS; 578 if (panel.sync_edge) 579 timing2 |= RASTER_TIMING_2_PHSVS_RISE; 580 else 581 timing2 |= RASTER_TIMING_2_PHSVS_FALL; 582 if (panel.invert_line_clock) 583 timing2 |= RASTER_TIMING_2_IHS; 584 if (panel.invert_frm_clock) 585 timing2 |= RASTER_TIMING_2_IVS; 586 if (panel.panel_invert_pxl_clk) 587 timing2 |= RASTER_TIMING_2_IPC; 588 589 /* AC bias */ 590 timing2 |= (panel.ac_bias << RASTER_TIMING_2_ACB_SHIFT); 591 timing2 |= (panel.ac_bias_intrpt << RASTER_TIMING_2_ACBI_SHIFT); 592 593 LCD_WRITE4(sc, LCD_RASTER_TIMING_0, timing0); 594 LCD_WRITE4(sc, LCD_RASTER_TIMING_1, timing1); 595 LCD_WRITE4(sc, LCD_RASTER_TIMING_2, timing2); 596 597 /* DMA settings */ 598 reg = LCDDMA_CTRL_FB0_FB1; 599 /* Find power of 2 for current burst size */ 600 switch (panel.dma_burst_sz) { 601 case 1: 602 burst_log = 0; 603 break; 604 case 2: 605 burst_log = 1; 606 break; 607 case 4: 608 burst_log = 2; 609 break; 610 case 8: 611 burst_log = 3; 612 break; 613 case 16: 614 default: 615 burst_log = 4; 616 break; 617 } 618 reg |= (burst_log << LCDDMA_CTRL_BURST_SIZE_SHIFT); 619 /* XXX: FIFO TH */ 620 reg |= (0 << LCDDMA_CTRL_TH_FIFO_RDY_SHIFT); 621 LCD_WRITE4(sc, LCD_LCDDMA_CTRL, reg); 622 623 LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 624 LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 625 LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 626 LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 627 628 /* Enable LCD */ 629 reg = RASTER_CTRL_LCDTFT; 630 reg |= (panel.fdd << RASTER_CTRL_REQDLY_SHIFT); 631 reg |= (PALETTE_DATA_ONLY << RASTER_CTRL_PALMODE_SHIFT); 632 if (panel.bpp >= 24) 633 reg |= RASTER_CTRL_TFT24; 634 if (panel.bpp == 32) 635 reg |= RASTER_CTRL_TFT24_UNPACKED; 636 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 637 638 LCD_WRITE4(sc, LCD_CLKC_ENABLE, 639 CLKC_ENABLE_DMA | CLKC_ENABLE_LDID | CLKC_ENABLE_CORE); 640 641 LCD_WRITE4(sc, LCD_CLKC_RESET, CLKC_RESET_MAIN); 642 DELAY(100); 643 LCD_WRITE4(sc, LCD_CLKC_RESET, 0); 644 645 reg = IRQ_EOF1 | IRQ_EOF0 | IRQ_FUF | IRQ_PL | 646 IRQ_ACB | IRQ_SYNC_LOST | IRQ_RASTER_DONE | 647 IRQ_FRAME_DONE; 648 LCD_WRITE4(sc, LCD_IRQENABLE_SET, reg); 649 650 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 651 reg |= RASTER_CTRL_LCDEN; 652 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 653 654 LCD_WRITE4(sc, LCD_SYSCONFIG, 655 SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLE_SMART); 656 657 /* Init backlight interface */ 658 ctx = device_get_sysctl_ctx(sc->sc_dev); 659 tree = device_get_sysctl_tree(sc->sc_dev); 660 sc->sc_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 661 "backlight", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 662 am335x_lcd_sysctl_backlight, "I", "LCD backlight"); 663 sc->sc_backlight = 0; 664 /* Check if eCAS interface is available at this point */ 665 if (am335x_pwm_config_ecas(PWM_UNIT, 666 PWM_PERIOD, PWM_PERIOD) == 0) 667 sc->sc_backlight = 100; 668 669 err = (sc_attach_unit(device_get_unit(dev), 670 device_get_flags(dev) | SC_AUTODETECT_KBD)); 671 672 if (err) { 673 device_printf(dev, "failed to attach syscons\n"); 674 goto fail; 675 } 676 677 am335x_lcd_syscons_setup((vm_offset_t)sc->sc_fb_base, sc->sc_fb_phys, &panel); 678 679 return (0); 680 681fail: 682 return (err); 683} 684 685static int 686am335x_lcd_detach(device_t dev) 687{ 688 /* Do not let unload driver */ 689 return (EBUSY); 690} 691 692static device_method_t am335x_lcd_methods[] = { 693 DEVMETHOD(device_probe, am335x_lcd_probe), 694 DEVMETHOD(device_attach, am335x_lcd_attach), 695 DEVMETHOD(device_detach, am335x_lcd_detach), 696 697 DEVMETHOD_END 698}; 699 700static driver_t am335x_lcd_driver = { 701 "am335x_lcd", 702 am335x_lcd_methods, 703 sizeof(struct am335x_lcd_softc), 704}; 705 706static devclass_t am335x_lcd_devclass; 707 708DRIVER_MODULE(am335x_lcd, simplebus, am335x_lcd_driver, am335x_lcd_devclass, 0, 0); 709MODULE_VERSION(am335x_lcd, 1); 710MODULE_DEPEND(am335x_lcd, simplebus, 1, 1, 1); 711