am335x_lcd.c revision 283503
1251018Sgonzo/*- 2251018Sgonzo * Copyright 2013 Oleksandr Tymoshenko <gonzo@freebsd.org> 3251018Sgonzo * All rights reserved. 4251018Sgonzo * 5251018Sgonzo * Redistribution and use in source and binary forms, with or without 6251018Sgonzo * modification, are permitted provided that the following conditions 7251018Sgonzo * are met: 8251018Sgonzo * 1. Redistributions of source code must retain the above copyright 9251018Sgonzo * notice, this list of conditions and the following disclaimer. 10251018Sgonzo * 2. Redistributions in binary form must reproduce the above copyright 11251018Sgonzo * notice, this list of conditions and the following disclaimer in the 12251018Sgonzo * documentation and/or other materials provided with the distribution. 13251018Sgonzo * 14251018Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15251018Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16251018Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17251018Sgonzo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18251018Sgonzo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19251018Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20251018Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21251018Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22251018Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23251018Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24251018Sgonzo * SUCH DAMAGE. 25251018Sgonzo */ 26251018Sgonzo 27251018Sgonzo#include <sys/cdefs.h> 28251018Sgonzo__FBSDID("$FreeBSD: head/sys/arm/ti/am335x/am335x_lcd.c 283503 2015-05-24 23:53:10Z gonzo $"); 29251018Sgonzo 30277716Sgonzo#include "opt_syscons.h" 31251018Sgonzo#include <sys/param.h> 32251018Sgonzo#include <sys/systm.h> 33251018Sgonzo#include <sys/kernel.h> 34251018Sgonzo#include <sys/module.h> 35251018Sgonzo#include <sys/clock.h> 36251018Sgonzo#include <sys/time.h> 37251018Sgonzo#include <sys/bus.h> 38251018Sgonzo#include <sys/lock.h> 39251018Sgonzo#include <sys/mutex.h> 40251018Sgonzo#include <sys/resource.h> 41251018Sgonzo#include <sys/rman.h> 42251018Sgonzo#include <sys/sysctl.h> 43251018Sgonzo#include <vm/vm.h> 44251018Sgonzo#include <vm/pmap.h> 45252282Sgonzo#include <sys/fbio.h> 46252282Sgonzo#include <sys/consio.h> 47252282Sgonzo 48251018Sgonzo#include <machine/bus.h> 49251018Sgonzo 50251018Sgonzo#include <dev/fdt/fdt_common.h> 51251018Sgonzo#include <dev/ofw/openfirm.h> 52251018Sgonzo#include <dev/ofw/ofw_bus.h> 53251018Sgonzo#include <dev/ofw/ofw_bus_subr.h> 54251018Sgonzo 55252282Sgonzo#include <dev/fb/fbreg.h> 56277716Sgonzo#ifdef DEV_SC 57252282Sgonzo#include <dev/syscons/syscons.h> 58277716Sgonzo#else /* VT */ 59277716Sgonzo#include <dev/vt/vt.h> 60277716Sgonzo#endif 61252282Sgonzo 62251018Sgonzo#include <arm/ti/ti_prcm.h> 63251018Sgonzo#include <arm/ti/ti_scm.h> 64251018Sgonzo 65251018Sgonzo#include "am335x_lcd.h" 66251018Sgonzo#include "am335x_pwm.h" 67251018Sgonzo 68277716Sgonzo#include "fb_if.h" 69277716Sgonzo 70251018Sgonzo#define LCD_PID 0x00 71251018Sgonzo#define LCD_CTRL 0x04 72251018Sgonzo#define CTRL_DIV_MASK 0xff 73251018Sgonzo#define CTRL_DIV_SHIFT 8 74251018Sgonzo#define CTRL_AUTO_UFLOW_RESTART (1 << 1) 75251018Sgonzo#define CTRL_RASTER_MODE 1 76251018Sgonzo#define CTRL_LIDD_MODE 0 77251018Sgonzo#define LCD_LIDD_CTRL 0x0C 78251018Sgonzo#define LCD_LIDD_CS0_CONF 0x10 79251018Sgonzo#define LCD_LIDD_CS0_ADDR 0x14 80251018Sgonzo#define LCD_LIDD_CS0_DATA 0x18 81251018Sgonzo#define LCD_LIDD_CS1_CONF 0x1C 82251018Sgonzo#define LCD_LIDD_CS1_ADDR 0x20 83251018Sgonzo#define LCD_LIDD_CS1_DATA 0x24 84251018Sgonzo#define LCD_RASTER_CTRL 0x28 85251018Sgonzo#define RASTER_CTRL_TFT24_UNPACKED (1 << 26) 86251018Sgonzo#define RASTER_CTRL_TFT24 (1 << 25) 87251018Sgonzo#define RASTER_CTRL_STN565 (1 << 24) 88251018Sgonzo#define RASTER_CTRL_TFTPMAP (1 << 23) 89251018Sgonzo#define RASTER_CTRL_NIBMODE (1 << 22) 90251018Sgonzo#define RASTER_CTRL_PALMODE_SHIFT 20 91251018Sgonzo#define PALETTE_PALETTE_AND_DATA 0x00 92251018Sgonzo#define PALETTE_PALETTE_ONLY 0x01 93251018Sgonzo#define PALETTE_DATA_ONLY 0x02 94251018Sgonzo#define RASTER_CTRL_REQDLY_SHIFT 12 95251018Sgonzo#define RASTER_CTRL_MONO8B (1 << 9) 96251018Sgonzo#define RASTER_CTRL_RBORDER (1 << 8) 97251018Sgonzo#define RASTER_CTRL_LCDTFT (1 << 7) 98251018Sgonzo#define RASTER_CTRL_LCDBW (1 << 1) 99251018Sgonzo#define RASTER_CTRL_LCDEN (1 << 0) 100251018Sgonzo#define LCD_RASTER_TIMING_0 0x2C 101251018Sgonzo#define RASTER_TIMING_0_HBP_SHIFT 24 102251018Sgonzo#define RASTER_TIMING_0_HFP_SHIFT 16 103251018Sgonzo#define RASTER_TIMING_0_HSW_SHIFT 10 104251018Sgonzo#define RASTER_TIMING_0_PPLLSB_SHIFT 4 105251018Sgonzo#define RASTER_TIMING_0_PPLMSB_SHIFT 3 106251018Sgonzo#define LCD_RASTER_TIMING_1 0x30 107251018Sgonzo#define RASTER_TIMING_1_VBP_SHIFT 24 108251018Sgonzo#define RASTER_TIMING_1_VFP_SHIFT 16 109251018Sgonzo#define RASTER_TIMING_1_VSW_SHIFT 10 110251018Sgonzo#define RASTER_TIMING_1_LPP_SHIFT 0 111251018Sgonzo#define LCD_RASTER_TIMING_2 0x34 112251018Sgonzo#define RASTER_TIMING_2_HSWHI_SHIFT 27 113251018Sgonzo#define RASTER_TIMING_2_LPP_B10_SHIFT 26 114251018Sgonzo#define RASTER_TIMING_2_PHSVS (1 << 25) 115251018Sgonzo#define RASTER_TIMING_2_PHSVS_RISE (1 << 24) 116251018Sgonzo#define RASTER_TIMING_2_PHSVS_FALL (0 << 24) 117251018Sgonzo#define RASTER_TIMING_2_IOE (1 << 23) 118251018Sgonzo#define RASTER_TIMING_2_IPC (1 << 22) 119251018Sgonzo#define RASTER_TIMING_2_IHS (1 << 21) 120251018Sgonzo#define RASTER_TIMING_2_IVS (1 << 20) 121251018Sgonzo#define RASTER_TIMING_2_ACBI_SHIFT 16 122251018Sgonzo#define RASTER_TIMING_2_ACB_SHIFT 8 123251018Sgonzo#define RASTER_TIMING_2_HBPHI_SHIFT 4 124251018Sgonzo#define RASTER_TIMING_2_HFPHI_SHIFT 0 125251018Sgonzo#define LCD_RASTER_SUBPANEL 0x38 126251018Sgonzo#define LCD_RASTER_SUBPANEL2 0x3C 127251018Sgonzo#define LCD_LCDDMA_CTRL 0x40 128251018Sgonzo#define LCDDMA_CTRL_DMA_MASTER_PRIO_SHIFT 16 129251018Sgonzo#define LCDDMA_CTRL_TH_FIFO_RDY_SHIFT 8 130251018Sgonzo#define LCDDMA_CTRL_BURST_SIZE_SHIFT 4 131251018Sgonzo#define LCDDMA_CTRL_BYTES_SWAP (1 << 3) 132251018Sgonzo#define LCDDMA_CTRL_BE (1 << 1) 133251018Sgonzo#define LCDDMA_CTRL_FB0_ONLY 0 134251018Sgonzo#define LCDDMA_CTRL_FB0_FB1 (1 << 0) 135251018Sgonzo#define LCD_LCDDMA_FB0_BASE 0x44 136251018Sgonzo#define LCD_LCDDMA_FB0_CEILING 0x48 137251018Sgonzo#define LCD_LCDDMA_FB1_BASE 0x4C 138251018Sgonzo#define LCD_LCDDMA_FB1_CEILING 0x50 139251018Sgonzo#define LCD_SYSCONFIG 0x54 140251018Sgonzo#define SYSCONFIG_STANDBY_FORCE (0 << 4) 141251018Sgonzo#define SYSCONFIG_STANDBY_NONE (1 << 4) 142251018Sgonzo#define SYSCONFIG_STANDBY_SMART (2 << 4) 143251018Sgonzo#define SYSCONFIG_IDLE_FORCE (0 << 2) 144251018Sgonzo#define SYSCONFIG_IDLE_NONE (1 << 2) 145251018Sgonzo#define SYSCONFIG_IDLE_SMART (2 << 2) 146251018Sgonzo#define LCD_IRQSTATUS_RAW 0x58 147251018Sgonzo#define LCD_IRQSTATUS 0x5C 148251018Sgonzo#define LCD_IRQENABLE_SET 0x60 149251018Sgonzo#define LCD_IRQENABLE_CLEAR 0x64 150251018Sgonzo#define IRQ_EOF1 (1 << 9) 151251018Sgonzo#define IRQ_EOF0 (1 << 8) 152251018Sgonzo#define IRQ_PL (1 << 6) 153251018Sgonzo#define IRQ_FUF (1 << 5) 154251018Sgonzo#define IRQ_ACB (1 << 3) 155251018Sgonzo#define IRQ_SYNC_LOST (1 << 2) 156251018Sgonzo#define IRQ_RASTER_DONE (1 << 1) 157251018Sgonzo#define IRQ_FRAME_DONE (1 << 0) 158277405Sgonzo#define LCD_END_OF_INT_IND 0x68 159251018Sgonzo#define LCD_CLKC_ENABLE 0x6C 160251018Sgonzo#define CLKC_ENABLE_DMA (1 << 2) 161251018Sgonzo#define CLKC_ENABLE_LDID (1 << 1) 162251018Sgonzo#define CLKC_ENABLE_CORE (1 << 0) 163251018Sgonzo#define LCD_CLKC_RESET 0x70 164251018Sgonzo#define CLKC_RESET_MAIN (1 << 3) 165251018Sgonzo#define CLKC_RESET_DMA (1 << 2) 166251018Sgonzo#define CLKC_RESET_LDID (1 << 1) 167251018Sgonzo#define CLKC_RESET_CORE (1 << 0) 168251018Sgonzo 169251018Sgonzo#define LCD_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 170251018Sgonzo#define LCD_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 171251018Sgonzo#define LCD_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ 172251018Sgonzo device_get_nameunit(_sc->sc_dev), "am335x_lcd", MTX_DEF) 173251018Sgonzo#define LCD_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 174251018Sgonzo 175251018Sgonzo#define LCD_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg); 176251018Sgonzo#define LCD_WRITE4(_sc, reg, value) \ 177251018Sgonzo bus_write_4((_sc)->sc_mem_res, reg, value); 178251018Sgonzo 179251018Sgonzo 180251018Sgonzo/* Backlight is controlled by eCAS interface on PWM unit 0 */ 181251018Sgonzo#define PWM_UNIT 0 182251018Sgonzo#define PWM_PERIOD 100 183251018Sgonzo 184251018Sgonzostruct am335x_lcd_softc { 185251018Sgonzo device_t sc_dev; 186277716Sgonzo struct fb_info sc_fb_info; 187251018Sgonzo struct resource *sc_mem_res; 188251018Sgonzo struct resource *sc_irq_res; 189251018Sgonzo void *sc_intr_hl; 190251018Sgonzo struct mtx sc_mtx; 191251018Sgonzo int sc_backlight; 192251018Sgonzo struct sysctl_oid *sc_oid; 193251018Sgonzo 194251018Sgonzo /* Framebuffer */ 195251018Sgonzo bus_dma_tag_t sc_dma_tag; 196251018Sgonzo bus_dmamap_t sc_dma_map; 197251018Sgonzo size_t sc_fb_size; 198251018Sgonzo bus_addr_t sc_fb_phys; 199251018Sgonzo uint8_t *sc_fb_base; 200251018Sgonzo}; 201251018Sgonzo 202251018Sgonzostatic void 203251018Sgonzoam335x_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err) 204251018Sgonzo{ 205251018Sgonzo bus_addr_t *addr; 206251018Sgonzo 207251018Sgonzo if (err) 208251018Sgonzo return; 209251018Sgonzo 210251018Sgonzo addr = (bus_addr_t*)arg; 211251018Sgonzo *addr = segs[0].ds_addr; 212251018Sgonzo} 213251018Sgonzo 214251018Sgonzostatic uint32_t 215251018Sgonzoam335x_lcd_calc_divisor(uint32_t reference, uint32_t freq) 216251018Sgonzo{ 217251018Sgonzo uint32_t div; 218251018Sgonzo /* Raster mode case: divisors are in range from 2 to 255 */ 219251018Sgonzo for (div = 2; div < 255; div++) 220251018Sgonzo if (reference/div <= freq) 221251018Sgonzo return (div); 222251018Sgonzo 223251018Sgonzo return (255); 224251018Sgonzo} 225251018Sgonzo 226251018Sgonzostatic int 227251018Sgonzoam335x_lcd_sysctl_backlight(SYSCTL_HANDLER_ARGS) 228251018Sgonzo{ 229251018Sgonzo struct am335x_lcd_softc *sc = (struct am335x_lcd_softc*)arg1; 230251018Sgonzo int error; 231251018Sgonzo int backlight; 232251018Sgonzo 233267171Skevlo backlight = sc->sc_backlight; 234251018Sgonzo error = sysctl_handle_int(oidp, &backlight, 0, req); 235251018Sgonzo 236251018Sgonzo if (error != 0 || req->newptr == NULL) 237251018Sgonzo return (error); 238251018Sgonzo 239251018Sgonzo if (backlight < 0) 240251018Sgonzo backlight = 0; 241251018Sgonzo if (backlight > 100) 242251018Sgonzo backlight = 100; 243251018Sgonzo 244251018Sgonzo LCD_LOCK(sc); 245283276Sgonzo error = am335x_pwm_config_ecap(PWM_UNIT, PWM_PERIOD, 246251018Sgonzo backlight*PWM_PERIOD/100); 247251018Sgonzo if (error == 0) 248251018Sgonzo sc->sc_backlight = backlight; 249251018Sgonzo LCD_UNLOCK(sc); 250251018Sgonzo 251251018Sgonzo return (error); 252251018Sgonzo} 253251018Sgonzo 254251018Sgonzostatic int 255283276Sgonzoam335x_read_property(device_t dev, phandle_t node, const char *name, uint32_t *val) 256251018Sgonzo{ 257251018Sgonzo pcell_t cell; 258251018Sgonzo 259251018Sgonzo if ((OF_getprop(node, name, &cell, sizeof(cell))) <= 0) { 260251018Sgonzo device_printf(dev, "missing '%s' attribute in LCD panel info\n", 261251018Sgonzo name); 262251018Sgonzo return (ENXIO); 263251018Sgonzo } 264251018Sgonzo 265251018Sgonzo *val = fdt32_to_cpu(cell); 266251018Sgonzo 267251018Sgonzo return (0); 268251018Sgonzo} 269251018Sgonzo 270251018Sgonzostatic int 271283276Sgonzoam335x_read_timing(device_t dev, phandle_t node, struct panel_info *panel) 272251018Sgonzo{ 273251018Sgonzo int error; 274283276Sgonzo phandle_t timings_node, timing_node, native; 275251018Sgonzo 276283503Sgonzo timings_node = ofw_bus_find_child(node, "display-timings"); 277283276Sgonzo if (timings_node == 0) { 278283276Sgonzo device_printf(dev, "no \"display-timings\" node\n"); 279283276Sgonzo return (-1); 280283276Sgonzo } 281283276Sgonzo 282283276Sgonzo if (OF_searchencprop(timings_node, "native-mode", &native, 283283276Sgonzo sizeof(native)) == -1) { 284283276Sgonzo device_printf(dev, "no \"native-mode\" reference in \"timings\" node\n"); 285283276Sgonzo return (-1); 286283276Sgonzo } 287283276Sgonzo 288283276Sgonzo timing_node = OF_node_from_xref(native); 289283276Sgonzo 290251018Sgonzo error = 0; 291283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 292283276Sgonzo "hactive", &panel->panel_width))) 293251018Sgonzo goto out; 294251018Sgonzo 295283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 296283276Sgonzo "vactive", &panel->panel_height))) 297251018Sgonzo goto out; 298251018Sgonzo 299283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 300283276Sgonzo "hfront-porch", &panel->panel_hfp))) 301251018Sgonzo goto out; 302251018Sgonzo 303283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 304283276Sgonzo "hback-porch", &panel->panel_hbp))) 305251018Sgonzo goto out; 306251018Sgonzo 307283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 308283276Sgonzo "hsync-len", &panel->panel_hsw))) 309251018Sgonzo goto out; 310251018Sgonzo 311283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 312283276Sgonzo "vfront-porch", &panel->panel_vfp))) 313251018Sgonzo goto out; 314251018Sgonzo 315283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 316283276Sgonzo "vback-porch", &panel->panel_vbp))) 317251018Sgonzo goto out; 318251018Sgonzo 319283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 320283276Sgonzo "vsync-len", &panel->panel_vsw))) 321251018Sgonzo goto out; 322251018Sgonzo 323283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 324283276Sgonzo "clock-frequency", &panel->panel_pxl_clk))) 325251018Sgonzo goto out; 326251018Sgonzo 327283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 328283276Sgonzo "pixelclk-active", &panel->pixelclk_active))) 329251018Sgonzo goto out; 330251018Sgonzo 331283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 332283276Sgonzo "hsync-active", &panel->hsync_active))) 333251018Sgonzo goto out; 334251018Sgonzo 335283276Sgonzo if ((error = am335x_read_property(dev, timing_node, 336283276Sgonzo "vsync-active", &panel->vsync_active))) 337251018Sgonzo goto out; 338251018Sgonzo 339283276Sgonzoout: 340283276Sgonzo return (error); 341283276Sgonzo} 342283276Sgonzo 343283276Sgonzostatic int 344283276Sgonzoam335x_read_panel_info(device_t dev, phandle_t node, struct panel_info *panel) 345283276Sgonzo{ 346283276Sgonzo int error; 347283276Sgonzo phandle_t panel_info_node; 348283276Sgonzo 349283503Sgonzo panel_info_node = ofw_bus_find_child(node, "panel-info"); 350283276Sgonzo if (panel_info_node == 0) 351283276Sgonzo return (-1); 352283276Sgonzo 353283276Sgonzo error = 0; 354283276Sgonzo 355283276Sgonzo if ((error = am335x_read_property(dev, panel_info_node, 356283276Sgonzo "ac-bias", &panel->ac_bias))) 357251018Sgonzo goto out; 358251018Sgonzo 359283276Sgonzo if ((error = am335x_read_property(dev, panel_info_node, 360283276Sgonzo "ac-bias-intrpt", &panel->ac_bias_intrpt))) 361251018Sgonzo goto out; 362251018Sgonzo 363283276Sgonzo if ((error = am335x_read_property(dev, panel_info_node, 364283276Sgonzo "dma-burst-sz", &panel->dma_burst_sz))) 365251018Sgonzo goto out; 366251018Sgonzo 367283276Sgonzo if ((error = am335x_read_property(dev, panel_info_node, 368283276Sgonzo "bpp", &panel->bpp))) 369251018Sgonzo goto out; 370251018Sgonzo 371283276Sgonzo if ((error = am335x_read_property(dev, panel_info_node, 372283276Sgonzo "fdd", &panel->fdd))) 373251018Sgonzo goto out; 374251018Sgonzo 375283276Sgonzo if ((error = am335x_read_property(dev, panel_info_node, 376283276Sgonzo "sync-edge", &panel->sync_edge))) 377251018Sgonzo goto out; 378251018Sgonzo 379283276Sgonzo error = am335x_read_property(dev, panel_info_node, 380283276Sgonzo "sync-ctrl", &panel->sync_ctrl); 381251018Sgonzo 382251018Sgonzoout: 383251018Sgonzo return (error); 384251018Sgonzo} 385251018Sgonzo 386251018Sgonzostatic void 387251018Sgonzoam335x_lcd_intr(void *arg) 388251018Sgonzo{ 389251018Sgonzo struct am335x_lcd_softc *sc = arg; 390251018Sgonzo uint32_t reg; 391251018Sgonzo 392251018Sgonzo reg = LCD_READ4(sc, LCD_IRQSTATUS); 393251018Sgonzo LCD_WRITE4(sc, LCD_IRQSTATUS, reg); 394277632Sgonzo /* Read value back to make sure it reached the hardware */ 395277632Sgonzo reg = LCD_READ4(sc, LCD_IRQSTATUS); 396251018Sgonzo 397251018Sgonzo if (reg & IRQ_SYNC_LOST) { 398251018Sgonzo reg = LCD_READ4(sc, LCD_RASTER_CTRL); 399251018Sgonzo reg &= ~RASTER_CTRL_LCDEN; 400251018Sgonzo LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 401251018Sgonzo 402251018Sgonzo reg = LCD_READ4(sc, LCD_RASTER_CTRL); 403251018Sgonzo reg |= RASTER_CTRL_LCDEN; 404251018Sgonzo LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 405277522Sgonzo goto done; 406251018Sgonzo } 407251018Sgonzo 408251018Sgonzo if (reg & IRQ_PL) { 409251018Sgonzo reg = LCD_READ4(sc, LCD_RASTER_CTRL); 410251018Sgonzo reg &= ~RASTER_CTRL_LCDEN; 411251018Sgonzo LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 412251018Sgonzo 413251018Sgonzo reg = LCD_READ4(sc, LCD_RASTER_CTRL); 414251018Sgonzo reg |= RASTER_CTRL_LCDEN; 415251018Sgonzo LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 416277522Sgonzo goto done; 417251018Sgonzo } 418251018Sgonzo 419251018Sgonzo if (reg & IRQ_EOF0) { 420251018Sgonzo LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 421251018Sgonzo LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 422251018Sgonzo reg &= ~IRQ_EOF0; 423251018Sgonzo } 424251018Sgonzo 425251018Sgonzo if (reg & IRQ_EOF1) { 426251018Sgonzo LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 427251018Sgonzo LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 428251018Sgonzo reg &= ~IRQ_EOF1; 429251018Sgonzo } 430251018Sgonzo 431251018Sgonzo if (reg & IRQ_FUF) { 432251018Sgonzo /* TODO: Handle FUF */ 433251018Sgonzo } 434251018Sgonzo 435251018Sgonzo if (reg & IRQ_ACB) { 436251018Sgonzo /* TODO: Handle ACB */ 437251018Sgonzo } 438277405Sgonzo 439277522Sgonzodone: 440277405Sgonzo LCD_WRITE4(sc, LCD_END_OF_INT_IND, 0); 441277632Sgonzo /* Read value back to make sure it reached the hardware */ 442277632Sgonzo reg = LCD_READ4(sc, LCD_END_OF_INT_IND); 443251018Sgonzo} 444251018Sgonzo 445251018Sgonzostatic int 446251018Sgonzoam335x_lcd_probe(device_t dev) 447251018Sgonzo{ 448277716Sgonzo#ifdef DEV_SC 449252282Sgonzo int err; 450277716Sgonzo#endif 451252282Sgonzo 452261410Sian if (!ofw_bus_status_okay(dev)) 453261410Sian return (ENXIO); 454261410Sian 455283276Sgonzo if (!ofw_bus_is_compatible(dev, "ti,am33xx-tilcdc")) 456251018Sgonzo return (ENXIO); 457251018Sgonzo 458251018Sgonzo device_set_desc(dev, "AM335x LCD controller"); 459251018Sgonzo 460277716Sgonzo#ifdef DEV_SC 461252282Sgonzo err = sc_probe_unit(device_get_unit(dev), 462252282Sgonzo device_get_flags(dev) | SC_AUTODETECT_KBD); 463252282Sgonzo if (err != 0) 464252282Sgonzo return (err); 465277716Sgonzo#endif 466252282Sgonzo 467252282Sgonzo return (BUS_PROBE_DEFAULT); 468251018Sgonzo} 469251018Sgonzo 470251018Sgonzostatic int 471251018Sgonzoam335x_lcd_attach(device_t dev) 472251018Sgonzo{ 473251018Sgonzo struct am335x_lcd_softc *sc; 474251018Sgonzo int rid; 475251018Sgonzo int div; 476251018Sgonzo struct panel_info panel; 477251018Sgonzo uint32_t reg, timing0, timing1, timing2; 478251018Sgonzo struct sysctl_ctx_list *ctx; 479251018Sgonzo struct sysctl_oid *tree; 480251018Sgonzo uint32_t burst_log; 481251018Sgonzo int err; 482251018Sgonzo size_t dma_size; 483277313Sgonzo uint32_t hbp, hfp, hsw; 484277313Sgonzo uint32_t vbp, vfp, vsw; 485277313Sgonzo uint32_t width, height; 486283276Sgonzo phandle_t root, panel_node; 487251018Sgonzo 488251018Sgonzo sc = device_get_softc(dev); 489251018Sgonzo sc->sc_dev = dev; 490251018Sgonzo 491283276Sgonzo root = OF_finddevice("/"); 492283276Sgonzo if (root == 0) { 493283276Sgonzo device_printf(dev, "failed to get FDT root node\n"); 494251018Sgonzo return (ENXIO); 495283276Sgonzo } 496251018Sgonzo 497283276Sgonzo panel_node = fdt_find_compatible(root, "ti,tilcdc,panel", 1); 498283276Sgonzo if (panel_node == 0) { 499283276Sgonzo device_printf(dev, "failed to find compatible panel in FDT blob\n"); 500283276Sgonzo return (ENXIO); 501283276Sgonzo } 502283276Sgonzo 503283276Sgonzo if (am335x_read_panel_info(dev, panel_node, &panel)) { 504283276Sgonzo device_printf(dev, "failed to read panel info\n"); 505283276Sgonzo return (ENXIO); 506283276Sgonzo } 507283276Sgonzo 508283276Sgonzo if (am335x_read_timing(dev, panel_node, &panel)) { 509283276Sgonzo device_printf(dev, "failed to read timings\n"); 510283276Sgonzo return (ENXIO); 511283276Sgonzo } 512283276Sgonzo 513251018Sgonzo int ref_freq = 0; 514251018Sgonzo ti_prcm_clk_enable(LCDC_CLK); 515251018Sgonzo if (ti_prcm_clk_get_source_freq(LCDC_CLK, &ref_freq)) { 516251018Sgonzo device_printf(dev, "Can't get reference frequency\n"); 517251018Sgonzo return (ENXIO); 518251018Sgonzo } 519251018Sgonzo 520251018Sgonzo rid = 0; 521251018Sgonzo sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 522251018Sgonzo RF_ACTIVE); 523251018Sgonzo if (!sc->sc_mem_res) { 524251018Sgonzo device_printf(dev, "cannot allocate memory window\n"); 525251018Sgonzo return (ENXIO); 526251018Sgonzo } 527251018Sgonzo 528251018Sgonzo rid = 0; 529251018Sgonzo sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 530251018Sgonzo RF_ACTIVE); 531251018Sgonzo if (!sc->sc_irq_res) { 532251018Sgonzo bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 533251018Sgonzo device_printf(dev, "cannot allocate interrupt\n"); 534251018Sgonzo return (ENXIO); 535251018Sgonzo } 536251018Sgonzo 537251018Sgonzo if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 538251018Sgonzo NULL, am335x_lcd_intr, sc, 539251018Sgonzo &sc->sc_intr_hl) != 0) { 540251018Sgonzo bus_release_resource(dev, SYS_RES_IRQ, rid, 541251018Sgonzo sc->sc_irq_res); 542251018Sgonzo bus_release_resource(dev, SYS_RES_MEMORY, rid, 543251018Sgonzo sc->sc_mem_res); 544251018Sgonzo device_printf(dev, "Unable to setup the irq handler.\n"); 545251018Sgonzo return (ENXIO); 546251018Sgonzo } 547251018Sgonzo 548251018Sgonzo LCD_LOCK_INIT(sc); 549251018Sgonzo 550251018Sgonzo /* Panle initialization */ 551251018Sgonzo dma_size = round_page(panel.panel_width*panel.panel_height*panel.bpp/8); 552251018Sgonzo 553251018Sgonzo /* 554251018Sgonzo * Now allocate framebuffer memory 555251018Sgonzo */ 556251018Sgonzo err = bus_dma_tag_create( 557251018Sgonzo bus_get_dma_tag(dev), 558251018Sgonzo 4, 0, /* alignment, boundary */ 559251018Sgonzo BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 560251018Sgonzo BUS_SPACE_MAXADDR, /* highaddr */ 561251018Sgonzo NULL, NULL, /* filter, filterarg */ 562251018Sgonzo dma_size, 1, /* maxsize, nsegments */ 563251018Sgonzo dma_size, 0, /* maxsegsize, flags */ 564251018Sgonzo NULL, NULL, /* lockfunc, lockarg */ 565251018Sgonzo &sc->sc_dma_tag); 566251018Sgonzo if (err) 567251018Sgonzo goto fail; 568251018Sgonzo 569251018Sgonzo err = bus_dmamem_alloc(sc->sc_dma_tag, (void **)&sc->sc_fb_base, 570252282Sgonzo BUS_DMA_COHERENT, &sc->sc_dma_map); 571251018Sgonzo 572251018Sgonzo if (err) { 573251018Sgonzo device_printf(dev, "cannot allocate framebuffer\n"); 574251018Sgonzo goto fail; 575251018Sgonzo } 576251018Sgonzo 577251018Sgonzo err = bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, sc->sc_fb_base, 578251018Sgonzo dma_size, am335x_fb_dmamap_cb, &sc->sc_fb_phys, BUS_DMA_NOWAIT); 579251018Sgonzo 580251018Sgonzo if (err) { 581251018Sgonzo device_printf(dev, "cannot load DMA map\n"); 582251018Sgonzo goto fail; 583251018Sgonzo } 584251018Sgonzo 585251018Sgonzo /* Make sure it's blank */ 586251018Sgonzo memset(sc->sc_fb_base, 0x00, dma_size); 587251018Sgonzo 588251018Sgonzo /* Calculate actual FB Size */ 589251018Sgonzo sc->sc_fb_size = panel.panel_width*panel.panel_height*panel.bpp/8; 590251018Sgonzo 591251018Sgonzo /* Only raster mode is supported */ 592251018Sgonzo reg = CTRL_RASTER_MODE; 593251018Sgonzo div = am335x_lcd_calc_divisor(ref_freq, panel.panel_pxl_clk); 594251018Sgonzo reg |= (div << CTRL_DIV_SHIFT); 595251018Sgonzo LCD_WRITE4(sc, LCD_CTRL, reg); 596251018Sgonzo 597251018Sgonzo /* Set timing */ 598251018Sgonzo timing0 = timing1 = timing2 = 0; 599251018Sgonzo 600277313Sgonzo hbp = panel.panel_hbp - 1; 601277313Sgonzo hfp = panel.panel_hfp - 1; 602277313Sgonzo hsw = panel.panel_hsw - 1; 603277313Sgonzo 604277313Sgonzo vbp = panel.panel_vbp; 605277313Sgonzo vfp = panel.panel_vfp; 606277313Sgonzo vsw = panel.panel_vsw - 1; 607277313Sgonzo 608277313Sgonzo height = panel.panel_height - 1; 609277313Sgonzo width = panel.panel_width - 1; 610277313Sgonzo 611251018Sgonzo /* Horizontal back porch */ 612277313Sgonzo timing0 |= (hbp & 0xff) << RASTER_TIMING_0_HBP_SHIFT; 613277313Sgonzo timing2 |= ((hbp >> 8) & 3) << RASTER_TIMING_2_HBPHI_SHIFT; 614251018Sgonzo /* Horizontal front porch */ 615277313Sgonzo timing0 |= (hfp & 0xff) << RASTER_TIMING_0_HFP_SHIFT; 616277313Sgonzo timing2 |= ((hfp >> 8) & 3) << RASTER_TIMING_2_HFPHI_SHIFT; 617251018Sgonzo /* Horizontal sync width */ 618277313Sgonzo timing0 |= (hsw & 0x3f) << RASTER_TIMING_0_HSW_SHIFT; 619277313Sgonzo timing2 |= ((hsw >> 6) & 0xf) << RASTER_TIMING_2_HSWHI_SHIFT; 620251018Sgonzo 621251018Sgonzo /* Vertical back porch, front porch, sync width */ 622277313Sgonzo timing1 |= (vbp & 0xff) << RASTER_TIMING_1_VBP_SHIFT; 623277313Sgonzo timing1 |= (vfp & 0xff) << RASTER_TIMING_1_VFP_SHIFT; 624277313Sgonzo timing1 |= (vsw & 0x3f) << RASTER_TIMING_1_VSW_SHIFT; 625251018Sgonzo 626251018Sgonzo /* Pixels per line */ 627277313Sgonzo timing0 |= ((width >> 10) & 1) 628251018Sgonzo << RASTER_TIMING_0_PPLMSB_SHIFT; 629277313Sgonzo timing0 |= ((width >> 4) & 0x3f) 630251018Sgonzo << RASTER_TIMING_0_PPLLSB_SHIFT; 631251018Sgonzo 632251018Sgonzo /* Lines per panel */ 633277313Sgonzo timing1 |= (height & 0x3ff) 634251018Sgonzo << RASTER_TIMING_1_LPP_SHIFT; 635277313Sgonzo timing2 |= ((height >> 10 ) & 1) 636251018Sgonzo << RASTER_TIMING_2_LPP_B10_SHIFT; 637251018Sgonzo 638251018Sgonzo /* clock signal settings */ 639251018Sgonzo if (panel.sync_ctrl) 640251018Sgonzo timing2 |= RASTER_TIMING_2_PHSVS; 641251018Sgonzo if (panel.sync_edge) 642251018Sgonzo timing2 |= RASTER_TIMING_2_PHSVS_RISE; 643251018Sgonzo else 644251018Sgonzo timing2 |= RASTER_TIMING_2_PHSVS_FALL; 645283276Sgonzo if (panel.hsync_active == 0) 646251018Sgonzo timing2 |= RASTER_TIMING_2_IHS; 647283276Sgonzo if (panel.vsync_active == 0) 648251018Sgonzo timing2 |= RASTER_TIMING_2_IVS; 649283276Sgonzo if (panel.pixelclk_active == 0) 650251018Sgonzo timing2 |= RASTER_TIMING_2_IPC; 651251018Sgonzo 652251018Sgonzo /* AC bias */ 653251018Sgonzo timing2 |= (panel.ac_bias << RASTER_TIMING_2_ACB_SHIFT); 654251018Sgonzo timing2 |= (panel.ac_bias_intrpt << RASTER_TIMING_2_ACBI_SHIFT); 655251018Sgonzo 656251018Sgonzo LCD_WRITE4(sc, LCD_RASTER_TIMING_0, timing0); 657251018Sgonzo LCD_WRITE4(sc, LCD_RASTER_TIMING_1, timing1); 658251018Sgonzo LCD_WRITE4(sc, LCD_RASTER_TIMING_2, timing2); 659251018Sgonzo 660251018Sgonzo /* DMA settings */ 661251018Sgonzo reg = LCDDMA_CTRL_FB0_FB1; 662251018Sgonzo /* Find power of 2 for current burst size */ 663251018Sgonzo switch (panel.dma_burst_sz) { 664251018Sgonzo case 1: 665251018Sgonzo burst_log = 0; 666251018Sgonzo break; 667251018Sgonzo case 2: 668251018Sgonzo burst_log = 1; 669251018Sgonzo break; 670251018Sgonzo case 4: 671251018Sgonzo burst_log = 2; 672251018Sgonzo break; 673251018Sgonzo case 8: 674251018Sgonzo burst_log = 3; 675251018Sgonzo break; 676251018Sgonzo case 16: 677251018Sgonzo default: 678251018Sgonzo burst_log = 4; 679251018Sgonzo break; 680251018Sgonzo } 681251018Sgonzo reg |= (burst_log << LCDDMA_CTRL_BURST_SIZE_SHIFT); 682251018Sgonzo /* XXX: FIFO TH */ 683251018Sgonzo reg |= (0 << LCDDMA_CTRL_TH_FIFO_RDY_SHIFT); 684251018Sgonzo LCD_WRITE4(sc, LCD_LCDDMA_CTRL, reg); 685251018Sgonzo 686251018Sgonzo LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 687251018Sgonzo LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 688251018Sgonzo LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 689251018Sgonzo LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 690251018Sgonzo 691251018Sgonzo /* Enable LCD */ 692251018Sgonzo reg = RASTER_CTRL_LCDTFT; 693251018Sgonzo reg |= (panel.fdd << RASTER_CTRL_REQDLY_SHIFT); 694251018Sgonzo reg |= (PALETTE_DATA_ONLY << RASTER_CTRL_PALMODE_SHIFT); 695251018Sgonzo if (panel.bpp >= 24) 696251018Sgonzo reg |= RASTER_CTRL_TFT24; 697251018Sgonzo if (panel.bpp == 32) 698251018Sgonzo reg |= RASTER_CTRL_TFT24_UNPACKED; 699251018Sgonzo LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 700251018Sgonzo 701251018Sgonzo LCD_WRITE4(sc, LCD_CLKC_ENABLE, 702251018Sgonzo CLKC_ENABLE_DMA | CLKC_ENABLE_LDID | CLKC_ENABLE_CORE); 703251018Sgonzo 704251018Sgonzo LCD_WRITE4(sc, LCD_CLKC_RESET, CLKC_RESET_MAIN); 705251018Sgonzo DELAY(100); 706251018Sgonzo LCD_WRITE4(sc, LCD_CLKC_RESET, 0); 707251018Sgonzo 708251018Sgonzo reg = IRQ_EOF1 | IRQ_EOF0 | IRQ_FUF | IRQ_PL | 709251018Sgonzo IRQ_ACB | IRQ_SYNC_LOST | IRQ_RASTER_DONE | 710251018Sgonzo IRQ_FRAME_DONE; 711251018Sgonzo LCD_WRITE4(sc, LCD_IRQENABLE_SET, reg); 712251018Sgonzo 713251018Sgonzo reg = LCD_READ4(sc, LCD_RASTER_CTRL); 714251018Sgonzo reg |= RASTER_CTRL_LCDEN; 715251018Sgonzo LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 716251018Sgonzo 717251018Sgonzo LCD_WRITE4(sc, LCD_SYSCONFIG, 718251018Sgonzo SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLE_SMART); 719251018Sgonzo 720251018Sgonzo /* Init backlight interface */ 721251018Sgonzo ctx = device_get_sysctl_ctx(sc->sc_dev); 722251018Sgonzo tree = device_get_sysctl_tree(sc->sc_dev); 723251018Sgonzo sc->sc_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 724251018Sgonzo "backlight", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 725251018Sgonzo am335x_lcd_sysctl_backlight, "I", "LCD backlight"); 726251018Sgonzo sc->sc_backlight = 0; 727251018Sgonzo /* Check if eCAS interface is available at this point */ 728283276Sgonzo if (am335x_pwm_config_ecap(PWM_UNIT, 729251018Sgonzo PWM_PERIOD, PWM_PERIOD) == 0) 730251018Sgonzo sc->sc_backlight = 100; 731251018Sgonzo 732277716Sgonzo sc->sc_fb_info.fb_name = device_get_nameunit(sc->sc_dev); 733277716Sgonzo sc->sc_fb_info.fb_vbase = (intptr_t)sc->sc_fb_base; 734277716Sgonzo sc->sc_fb_info.fb_pbase = sc->sc_fb_phys; 735277716Sgonzo sc->sc_fb_info.fb_size = sc->sc_fb_size; 736277716Sgonzo sc->sc_fb_info.fb_bpp = sc->sc_fb_info.fb_depth = panel.bpp; 737277716Sgonzo sc->sc_fb_info.fb_stride = panel.panel_width*panel.bpp / 8; 738277716Sgonzo sc->sc_fb_info.fb_width = panel.panel_width; 739277716Sgonzo sc->sc_fb_info.fb_height = panel.panel_height; 740277716Sgonzo 741277716Sgonzo#ifdef DEV_SC 742252282Sgonzo err = (sc_attach_unit(device_get_unit(dev), 743252282Sgonzo device_get_flags(dev) | SC_AUTODETECT_KBD)); 744252282Sgonzo 745252282Sgonzo if (err) { 746252282Sgonzo device_printf(dev, "failed to attach syscons\n"); 747252282Sgonzo goto fail; 748252282Sgonzo } 749252282Sgonzo 750251018Sgonzo am335x_lcd_syscons_setup((vm_offset_t)sc->sc_fb_base, sc->sc_fb_phys, &panel); 751277716Sgonzo#else /* VT */ 752277716Sgonzo device_t fbd = device_add_child(dev, "fbd", 753277716Sgonzo device_get_unit(dev)); 754277716Sgonzo if (fbd == NULL) { 755277716Sgonzo device_printf(dev, "Failed to add fbd child\n"); 756277716Sgonzo goto fail; 757277716Sgonzo } 758277716Sgonzo if (device_probe_and_attach(fbd) != 0) { 759277716Sgonzo device_printf(dev, "Failed to attach fbd device\n"); 760277716Sgonzo goto fail; 761277716Sgonzo } 762277716Sgonzo#endif 763251018Sgonzo 764251018Sgonzo return (0); 765251018Sgonzo 766251018Sgonzofail: 767251018Sgonzo return (err); 768251018Sgonzo} 769251018Sgonzo 770251018Sgonzostatic int 771251018Sgonzoam335x_lcd_detach(device_t dev) 772251018Sgonzo{ 773251018Sgonzo /* Do not let unload driver */ 774251018Sgonzo return (EBUSY); 775251018Sgonzo} 776251018Sgonzo 777277716Sgonzostatic struct fb_info * 778277716Sgonzoam335x_lcd_fb_getinfo(device_t dev) 779277716Sgonzo{ 780277716Sgonzo struct am335x_lcd_softc *sc; 781277716Sgonzo 782277716Sgonzo sc = device_get_softc(dev); 783277716Sgonzo 784277716Sgonzo return (&sc->sc_fb_info); 785277716Sgonzo} 786277716Sgonzo 787251018Sgonzostatic device_method_t am335x_lcd_methods[] = { 788251018Sgonzo DEVMETHOD(device_probe, am335x_lcd_probe), 789251018Sgonzo DEVMETHOD(device_attach, am335x_lcd_attach), 790251018Sgonzo DEVMETHOD(device_detach, am335x_lcd_detach), 791251018Sgonzo 792277716Sgonzo /* Framebuffer service methods */ 793277716Sgonzo DEVMETHOD(fb_getinfo, am335x_lcd_fb_getinfo), 794277716Sgonzo 795251018Sgonzo DEVMETHOD_END 796251018Sgonzo}; 797251018Sgonzo 798251018Sgonzostatic driver_t am335x_lcd_driver = { 799277716Sgonzo "fb", 800251018Sgonzo am335x_lcd_methods, 801251018Sgonzo sizeof(struct am335x_lcd_softc), 802251018Sgonzo}; 803251018Sgonzo 804251018Sgonzostatic devclass_t am335x_lcd_devclass; 805251018Sgonzo 806251018SgonzoDRIVER_MODULE(am335x_lcd, simplebus, am335x_lcd_driver, am335x_lcd_devclass, 0, 0); 807251018SgonzoMODULE_VERSION(am335x_lcd, 1); 808251018SgonzoMODULE_DEPEND(am335x_lcd, simplebus, 1, 1, 1); 809