1/*- 2 * Copyright (c) 2015 Ian lepore <ian@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * AM335x PPS driver using DMTimer capture. 29 * 30 * Note that this PPS driver does not use an interrupt. Instead it uses the 31 * hardware's ability to latch the timer's count register in response to a 32 * signal on an IO pin. Each of timers 4-7 have an associated pin, and this 33 * code allows any one of those to be used. 34 * 35 * The timecounter routines in kern_tc.c call the pps poll routine periodically 36 * to see if a new counter value has been latched. When a new value has been 37 * latched, the only processing done in the poll routine is to capture the 38 * current set of timecounter timehands (done with pps_capture()) and the 39 * latched value from the timer. The remaining work (done by pps_event() while 40 * holding a mutex) is scheduled to be done later in a non-interrupt context. 41 */ 42 43#include <sys/cdefs.h> 44__FBSDID("$FreeBSD: stable/11/sys/arm/ti/am335x/am335x_dmtpps.c 314512 2017-03-01 21:11:36Z ian $"); 45 46#include <sys/param.h> 47#include <sys/systm.h> 48#include <sys/bus.h> 49#include <sys/conf.h> 50#include <sys/kernel.h> 51#include <sys/module.h> 52#include <sys/malloc.h> 53#include <sys/rman.h> 54#include <sys/taskqueue.h> 55#include <sys/timepps.h> 56#include <sys/timetc.h> 57#include <machine/bus.h> 58 59#include <dev/ofw/openfirm.h> 60#include <dev/ofw/ofw_bus.h> 61#include <dev/ofw/ofw_bus_subr.h> 62 63#include <arm/ti/ti_prcm.h> 64#include <arm/ti/ti_hwmods.h> 65#include <arm/ti/ti_pinmux.h> 66#include <arm/ti/am335x/am335x_scm_padconf.h> 67 68#include "am335x_dmtreg.h" 69 70#define PPS_CDEV_NAME "dmtpps" 71 72struct dmtpps_softc { 73 device_t dev; 74 int mem_rid; 75 struct resource * mem_res; 76 int tmr_num; /* N from hwmod str "timerN" */ 77 char tmr_name[12]; /* "DMTimerN" */ 78 uint32_t tclr; /* Cached TCLR register. */ 79 struct timecounter tc; 80 int pps_curmode; /* Edge mode now set in hw. */ 81 struct task pps_task; /* For pps_event handling. */ 82 struct cdev * pps_cdev; 83 struct pps_state pps_state; 84 struct mtx pps_mtx; 85}; 86 87static int dmtpps_tmr_num; /* Set by probe() */ 88 89/* List of compatible strings for FDT tree */ 90static struct ofw_compat_data compat_data[] = { 91 {"ti,am335x-timer", 1}, 92 {"ti,am335x-timer-1ms", 1}, 93 {NULL, 0}, 94}; 95 96/* 97 * A table relating pad names to the hardware timer number they can be mux'd to. 98 */ 99struct padinfo { 100 char * ballname; 101 int tmr_num; 102}; 103static struct padinfo dmtpps_padinfo[] = { 104 {"GPMC_ADVn_ALE", 4}, 105 {"I2C0_SDA", 4}, 106 {"MII1_TX_EN", 4}, 107 {"XDMA_EVENT_INTR0", 4}, 108 {"GPMC_BEn0_CLE", 5}, 109 {"MDC", 5}, 110 {"MMC0_DAT3", 5}, 111 {"UART1_RTSn", 5}, 112 {"GPMC_WEn", 6}, 113 {"MDIO", 6}, 114 {"MMC0_DAT2", 6}, 115 {"UART1_CTSn", 6}, 116 {"GPMC_OEn_REn", 7}, 117 {"I2C0_SCL", 7}, 118 {"UART0_CTSn", 7}, 119 {"XDMA_EVENT_INTR1", 7}, 120 {NULL, 0} 121}; 122 123/* 124 * This is either brilliantly user-friendly, or utterly lame... 125 * 126 * The am335x chip is used on the popular Beaglebone boards. Those boards have 127 * pins for all four capture-capable timers available on the P8 header. Allow 128 * users to configure the input pin by giving the name of the header pin. 129 */ 130struct nicknames { 131 const char * nick; 132 const char * name; 133}; 134static struct nicknames dmtpps_pin_nicks[] = { 135 {"P8-7", "GPMC_ADVn_ALE"}, 136 {"P8-9", "GPMC_BEn0_CLE"}, 137 {"P8-10", "GPMC_WEn"}, 138 {"P8-8", "GPMC_OEn_REn",}, 139 {NULL, NULL} 140}; 141 142#define DMTIMER_READ4(sc, reg) bus_read_4((sc)->mem_res, (reg)) 143#define DMTIMER_WRITE4(sc, reg, val) bus_write_4((sc)->mem_res, (reg), (val)) 144 145/* 146 * Translate a short friendly case-insensitive name to its canonical name. 147 */ 148static const char * 149dmtpps_translate_nickname(const char *nick) 150{ 151 struct nicknames *nn; 152 153 for (nn = dmtpps_pin_nicks; nn->nick != NULL; nn++) 154 if (strcasecmp(nick, nn->nick) == 0) 155 return nn->name; 156 return (nick); 157} 158 159/* 160 * See if our tunable is set to the name of the input pin. If not, that's NOT 161 * an error, return 0. If so, try to configure that pin as a timer capture 162 * input pin, and if that works, then we have our timer unit number and if it 163 * fails that IS an error, return -1. 164 */ 165static int 166dmtpps_find_tmr_num_by_tunable(void) 167{ 168 struct padinfo *pi; 169 char iname[20]; 170 char muxmode[12]; 171 const char * ballname; 172 int err; 173 174 if (!TUNABLE_STR_FETCH("hw.am335x_dmtpps.input", iname, sizeof(iname))) 175 return (0); 176 ballname = dmtpps_translate_nickname(iname); 177 for (pi = dmtpps_padinfo; pi->ballname != NULL; pi++) { 178 if (strcmp(ballname, pi->ballname) != 0) 179 continue; 180 snprintf(muxmode, sizeof(muxmode), "timer%d", pi->tmr_num); 181 err = ti_pinmux_padconf_set(pi->ballname, muxmode, 182 PADCONF_INPUT); 183 if (err != 0) { 184 printf("am335x_dmtpps: unable to configure capture pin " 185 "for %s to input mode\n", muxmode); 186 return (-1); 187 } else if (bootverbose) { 188 printf("am335x_dmtpps: configured pin %s as input " 189 "for %s\n", iname, muxmode); 190 } 191 return (pi->tmr_num); 192 } 193 194 /* Invalid name in the tunable, that's an error. */ 195 printf("am335x_dmtpps: unknown pin name '%s'\n", iname); 196 return (-1); 197} 198 199/* 200 * Ask the pinmux driver whether any pin has been configured as a TIMER4..TIMER7 201 * input pin. If so, return the timer number, if not return 0. 202 */ 203static int 204dmtpps_find_tmr_num_by_padconf(void) 205{ 206 int err; 207 unsigned int padstate; 208 const char * padmux; 209 struct padinfo *pi; 210 char muxmode[12]; 211 212 for (pi = dmtpps_padinfo; pi->ballname != NULL; pi++) { 213 err = ti_pinmux_padconf_get(pi->ballname, &padmux, &padstate); 214 snprintf(muxmode, sizeof(muxmode), "timer%d", pi->tmr_num); 215 if (err == 0 && (padstate & RXACTIVE) != 0 && 216 strcmp(muxmode, padmux) == 0) 217 return (pi->tmr_num); 218 } 219 /* Nothing found, not an error. */ 220 return (0); 221} 222 223/* 224 * Figure out which hardware timer number to use based on input pin 225 * configuration. This is done just once, the first time probe() runs. 226 */ 227static int 228dmtpps_find_tmr_num(void) 229{ 230 int tmr_num; 231 232 if ((tmr_num = dmtpps_find_tmr_num_by_tunable()) == 0) 233 tmr_num = dmtpps_find_tmr_num_by_padconf(); 234 235 if (tmr_num <= 0) { 236 printf("am335x_dmtpps: PPS driver not enabled: unable to find " 237 "or configure a capture input pin\n"); 238 tmr_num = -1; /* Must return non-zero to prevent re-probing. */ 239 } 240 return (tmr_num); 241} 242 243static void 244dmtpps_set_hw_capture(struct dmtpps_softc *sc, bool force_off) 245{ 246 int newmode; 247 248 if (force_off) 249 newmode = 0; 250 else 251 newmode = sc->pps_state.ppsparam.mode & PPS_CAPTUREASSERT; 252 253 if (newmode == sc->pps_curmode) 254 return; 255 sc->pps_curmode = newmode; 256 257 if (newmode == PPS_CAPTUREASSERT) 258 sc->tclr |= DMT_TCLR_CAPTRAN_LOHI; 259 else 260 sc->tclr &= ~DMT_TCLR_CAPTRAN_MASK; 261 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 262} 263 264static unsigned 265dmtpps_get_timecount(struct timecounter *tc) 266{ 267 struct dmtpps_softc *sc; 268 269 sc = tc->tc_priv; 270 271 return (DMTIMER_READ4(sc, DMT_TCRR)); 272} 273 274static void 275dmtpps_poll(struct timecounter *tc) 276{ 277 struct dmtpps_softc *sc; 278 279 sc = tc->tc_priv; 280 281 /* 282 * If a new value has been latched we've got a PPS event. Capture the 283 * timecounter data, then override the capcount field (pps_capture() 284 * populates it from the current DMT_TCRR register) with the latched 285 * value from the TCAR1 register. 286 * 287 * There is no locking here, by design. pps_capture() writes into an 288 * area of struct pps_state which is read only by pps_event(). The 289 * synchronization of access to that area is temporal rather than 290 * interlock based... we write in this routine and trigger the task that 291 * will read the data, so no simultaneous access can occur. 292 * 293 * Note that we don't have the TCAR interrupt enabled, but the hardware 294 * still provides the status bits in the "RAW" status register even when 295 * they're masked from generating an irq. However, when clearing the 296 * TCAR status to re-arm the capture for the next second, we have to 297 * write to the IRQ status register, not the RAW register. Quirky. 298 */ 299 if (DMTIMER_READ4(sc, DMT_IRQSTATUS_RAW) & DMT_IRQ_TCAR) { 300 pps_capture(&sc->pps_state); 301 sc->pps_state.capcount = DMTIMER_READ4(sc, DMT_TCAR1); 302 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_TCAR); 303 taskqueue_enqueue(taskqueue_fast, &sc->pps_task); 304 } 305} 306 307static void 308dmtpps_event(void *arg, int pending) 309{ 310 struct dmtpps_softc *sc; 311 312 sc = arg; 313 314 /* This is the task function that gets enqueued by poll_pps. Once the 315 * time has been captured by the timecounter polling code which runs in 316 * primary interrupt context, the remaining (more expensive) work to 317 * process the event is done later in a threaded context. 318 * 319 * Here there is an interlock that protects the event data in struct 320 * pps_state. That data can be accessed at any time from userland via 321 * ioctl() calls so we must ensure that there is no read access to 322 * partially updated data while pps_event() does its work. 323 */ 324 mtx_lock(&sc->pps_mtx); 325 pps_event(&sc->pps_state, PPS_CAPTUREASSERT); 326 mtx_unlock(&sc->pps_mtx); 327} 328 329static int 330dmtpps_open(struct cdev *dev, int flags, int fmt, 331 struct thread *td) 332{ 333 struct dmtpps_softc *sc; 334 335 sc = dev->si_drv1; 336 337 /* 338 * Begin polling for pps and enable capture in the hardware whenever the 339 * device is open. Doing this stuff again is harmless if this isn't the 340 * first open. 341 */ 342 sc->tc.tc_poll_pps = dmtpps_poll; 343 dmtpps_set_hw_capture(sc, false); 344 345 return 0; 346} 347 348static int 349dmtpps_close(struct cdev *dev, int flags, int fmt, 350 struct thread *td) 351{ 352 struct dmtpps_softc *sc; 353 354 sc = dev->si_drv1; 355 356 /* 357 * Stop polling and disable capture on last close. Use the force-off 358 * flag to override the configured mode and turn off the hardware. 359 */ 360 sc->tc.tc_poll_pps = NULL; 361 dmtpps_set_hw_capture(sc, true); 362 363 return 0; 364} 365 366static int 367dmtpps_ioctl(struct cdev *dev, u_long cmd, caddr_t data, 368 int flags, struct thread *td) 369{ 370 struct dmtpps_softc *sc; 371 int err; 372 373 sc = dev->si_drv1; 374 375 /* Let the kernel do the heavy lifting for ioctl. */ 376 mtx_lock(&sc->pps_mtx); 377 err = pps_ioctl(cmd, data, &sc->pps_state); 378 mtx_unlock(&sc->pps_mtx); 379 if (err != 0) 380 return (err); 381 382 /* 383 * The capture mode could have changed, set the hardware to whatever 384 * mode is now current. Effectively a no-op if nothing changed. 385 */ 386 dmtpps_set_hw_capture(sc, false); 387 388 return (err); 389} 390 391static struct cdevsw dmtpps_cdevsw = { 392 .d_version = D_VERSION, 393 .d_open = dmtpps_open, 394 .d_close = dmtpps_close, 395 .d_ioctl = dmtpps_ioctl, 396 .d_name = PPS_CDEV_NAME, 397}; 398 399static int 400dmtpps_probe(device_t dev) 401{ 402 char strbuf[64]; 403 int tmr_num; 404 405 if (!ofw_bus_status_okay(dev)) 406 return (ENXIO); 407 408 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 409 return (ENXIO); 410 411 /* 412 * If we haven't chosen which hardware timer to use yet, go do that now. 413 * We need to know that to decide whether to return success for this 414 * hardware timer instance or not. 415 */ 416 if (dmtpps_tmr_num == 0) 417 dmtpps_tmr_num = dmtpps_find_tmr_num(); 418 419 /* 420 * Figure out which hardware timer is being probed and see if it matches 421 * the configured timer number determined earlier. 422 */ 423 tmr_num = ti_hwmods_get_unit(dev, "timer"); 424 if (dmtpps_tmr_num != tmr_num) 425 return (ENXIO); 426 427 snprintf(strbuf, sizeof(strbuf), "AM335x PPS-Capture DMTimer%d", 428 tmr_num); 429 device_set_desc_copy(dev, strbuf); 430 431 return(BUS_PROBE_DEFAULT); 432} 433 434static int 435dmtpps_attach(device_t dev) 436{ 437 struct dmtpps_softc *sc; 438 clk_ident_t timer_id; 439 int err, sysclk_freq; 440 441 sc = device_get_softc(dev); 442 sc->dev = dev; 443 444 /* Get the base clock frequency. */ 445 err = ti_prcm_clk_get_source_freq(SYS_CLK, &sysclk_freq); 446 447 /* Enable clocks and power on the device. */ 448 if ((timer_id = ti_hwmods_get_clock(dev)) == INVALID_CLK_IDENT) 449 return (ENXIO); 450 if ((err = ti_prcm_clk_set_source(timer_id, SYSCLK_CLK)) != 0) 451 return (err); 452 if ((err = ti_prcm_clk_enable(timer_id)) != 0) 453 return (err); 454 455 /* Request the memory resources. */ 456 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 457 &sc->mem_rid, RF_ACTIVE); 458 if (sc->mem_res == NULL) { 459 return (ENXIO); 460 } 461 462 /* Figure out which hardware timer this is and set the name string. */ 463 sc->tmr_num = ti_hwmods_get_unit(dev, "timer"); 464 snprintf(sc->tmr_name, sizeof(sc->tmr_name), "DMTimer%d", sc->tmr_num); 465 466 /* 467 * Configure the timer pulse/capture pin to input/capture mode. This is 468 * required in addition to configuring the pin as input with the pinmux 469 * controller (which was done via fdt data or tunable at probe time). 470 */ 471 sc->tclr = DMT_TCLR_GPO_CFG; 472 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 473 474 /* Set up timecounter hardware, start it. */ 475 DMTIMER_WRITE4(sc, DMT_TSICR, DMT_TSICR_RESET); 476 while (DMTIMER_READ4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET) 477 continue; 478 479 sc->tclr |= DMT_TCLR_START | DMT_TCLR_AUTOLOAD; 480 DMTIMER_WRITE4(sc, DMT_TLDR, 0); 481 DMTIMER_WRITE4(sc, DMT_TCRR, 0); 482 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 483 484 /* Register the timecounter. */ 485 sc->tc.tc_name = sc->tmr_name; 486 sc->tc.tc_get_timecount = dmtpps_get_timecount; 487 sc->tc.tc_counter_mask = ~0u; 488 sc->tc.tc_frequency = sysclk_freq; 489 sc->tc.tc_quality = 1000; 490 sc->tc.tc_priv = sc; 491 492 tc_init(&sc->tc); 493 494 /* 495 * Indicate our PPS capabilities. Have the kernel init its part of the 496 * pps_state struct and add its capabilities. 497 * 498 * While the hardware has a mode to capture each edge, it's not clear we 499 * can use it that way, because there's only a single interrupt/status 500 * bit to say something was captured, but not which edge it was. For 501 * now, just say we can only capture assert events (the positive-going 502 * edge of the pulse). 503 */ 504 mtx_init(&sc->pps_mtx, "dmtpps", NULL, MTX_DEF); 505 sc->pps_state.ppscap = PPS_CAPTUREASSERT; 506 sc->pps_state.driver_abi = PPS_ABI_VERSION; 507 sc->pps_state.driver_mtx = &sc->pps_mtx; 508 pps_init_abi(&sc->pps_state); 509 510 /* 511 * Init the task that does deferred pps_event() processing after 512 * the polling routine has captured a pps pulse time. 513 */ 514 TASK_INIT(&sc->pps_task, 0, dmtpps_event, sc); 515 516 /* Create the PPS cdev. */ 517 sc->pps_cdev = make_dev(&dmtpps_cdevsw, 0, UID_ROOT, GID_WHEEL, 0600, 518 PPS_CDEV_NAME); 519 sc->pps_cdev->si_drv1 = sc; 520 521 if (bootverbose) 522 device_printf(sc->dev, "Using %s for PPS device /dev/%s\n", 523 sc->tmr_name, PPS_CDEV_NAME); 524 525 return (0); 526} 527 528static int 529dmtpps_detach(device_t dev) 530{ 531 532 /* 533 * There is no way to remove a timecounter once it has been registered, 534 * even if it's not in use, so we can never detach. If we were 535 * dynamically loaded as a module this will prevent unloading. 536 */ 537 return (EBUSY); 538} 539 540static device_method_t dmtpps_methods[] = { 541 DEVMETHOD(device_probe, dmtpps_probe), 542 DEVMETHOD(device_attach, dmtpps_attach), 543 DEVMETHOD(device_detach, dmtpps_detach), 544 { 0, 0 } 545}; 546 547static driver_t dmtpps_driver = { 548 "am335x_dmtpps", 549 dmtpps_methods, 550 sizeof(struct dmtpps_softc), 551}; 552 553static devclass_t dmtpps_devclass; 554 555DRIVER_MODULE(am335x_dmtpps, simplebus, dmtpps_driver, dmtpps_devclass, 0, 0); 556MODULE_DEPEND(am335x_dmtpps, am335x_prcm, 1, 1, 1); 557 558