1310600Smmel#- 2310600Smmel# Copyright (c) 2015 Michal Meloun 3310600Smmel# All rights reserved. 4310600Smmel# 5310600Smmel# Redistribution and use in source and binary forms, with or without 6310600Smmel# modification, are permitted provided that the following conditions 7310600Smmel# are met: 8310600Smmel# 1. Redistributions of source code must retain the above copyright 9310600Smmel# notice, this list of conditions and the following disclaimer. 10310600Smmel# 2. Redistributions in binary form must reproduce the above copyright 11310600Smmel# notice, this list of conditions and the following disclaimer in the 12310600Smmel# documentation and/or other materials provided with the distribution. 13310600Smmel# 14310600Smmel# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15310600Smmel# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16310600Smmel# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17310600Smmel# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18310600Smmel# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19310600Smmel# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20310600Smmel# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21310600Smmel# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22310600Smmel# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23310600Smmel# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24310600Smmel# SUCH DAMAGE. 25310600Smmel# 26310600Smmel# $FreeBSD: stable/11/sys/arm/nvidia/drm2/tegra_dc_if.m 310600 2016-12-26 14:36:05Z mmel $ 27310600Smmel# 28310600Smmel 29310600Smmel#include <machine/bus.h> 30310600Smmel 31310600SmmelINTERFACE tegra_dc; 32310600Smmel 33310600Smmel 34310600SmmelMETHOD void write_4{ 35310600Smmel device_t dev; 36310600Smmel bus_size_t offset; 37310600Smmel uint32_t val; 38310600Smmel}; 39310600SmmelMETHOD uint32_t read_4{ 40310600Smmel device_t dev; 41310600Smmel bus_size_t offset; 42310600Smmel}; 43310600Smmel 44310600SmmelMETHOD void display_enable{ 45310600Smmel device_t dev; 46310600Smmel bool enable; 47310600Smmel}; 48310600Smmel 49310600SmmelMETHOD void hdmi_enable{ 50310600Smmel device_t dev; 51310600Smmel bool enable; 52310600Smmel}; 53310600Smmel 54310600SmmelMETHOD void setup_timing{ 55310600Smmel device_t dev; 56310600Smmel int h_pulse_start; 57310600Smmel}; 58