1183840Sraj/*-
2183840Sraj * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
3183840Sraj * All rights reserved.
4183840Sraj *
5183840Sraj * Developed by Semihalf.
6183840Sraj *
7183840Sraj * Redistribution and use in source and binary forms, with or without
8183840Sraj * modification, are permitted provided that the following conditions
9183840Sraj * are met:
10183840Sraj * 1. Redistributions of source code must retain the above copyright
11183840Sraj *    notice, this list of conditions and the following disclaimer.
12183840Sraj * 2. Redistributions in binary form must reproduce the above copyright
13183840Sraj *    notice, this list of conditions and the following disclaimer in the
14183840Sraj *    documentation and/or other materials provided with the distribution.
15183840Sraj * 3. Neither the name of MARVELL nor the names of contributors
16183840Sraj *    may be used to endorse or promote products derived from this software
17183840Sraj *    without specific prior written permission.
18183840Sraj *
19183840Sraj * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20183840Sraj * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21183840Sraj * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22183840Sraj * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23183840Sraj * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24183840Sraj * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25183840Sraj * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26183840Sraj * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27183840Sraj * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28183840Sraj * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29183840Sraj * SUCH DAMAGE.
30183840Sraj */
31183840Sraj
32183840Sraj#include <sys/cdefs.h>
33183840Sraj__FBSDID("$FreeBSD$");
34183840Sraj
35183840Sraj#include <sys/param.h>
36183840Sraj#include <sys/systm.h>
37183840Sraj#include <sys/bus.h>
38183840Sraj
39183840Sraj#include <machine/bus.h>
40209131Sraj#include <machine/fdt.h>
41183840Sraj
42183840Sraj#include <arm/mv/mvreg.h>
43183840Sraj#include <arm/mv/mvvar.h>
44194072Smarcel#include <arm/mv/mvwin.h>
45183840Sraj
46235609Sgber/*
47235609Sgber * Virtual address space layout:
48235609Sgber * -----------------------------
49235609Sgber * 0x0000_0000 - 0xBFFF_FFFF	: User Process (3 GB)
50235609Sgber * 0xC000_0000 - virtual_avail	: Kernel Reserved (text, data, page tables,
51235609Sgber * 				: stack etc.)
52235609Sgber * virtual-avail - 0xEFFF_FFFF	: KVA (virtual_avail is typically < 0xc0a0_0000)
53235609Sgber * 0xF000_0000 - 0xF0FF_FFFF	: No-Cache allocation area (16 MB)
54235609Sgber * 0xF100_0000 - 0xF10F_FFFF	: SoC Integrated devices registers range (1 MB)
55235609Sgber * 0xF110_0000 - 0xF11F_FFFF	: PCI-Express I/O space (1MB)
56235609Sgber * 0xF120_0000 - 0xF12F_FFFF	: PCI I/O space (1MB)
57235609Sgber * 0xF130_0000 - 0xF52F_FFFF	: PCI-Express memory space (64MB)
58235609Sgber * 0xF530_0000 - 0xF92F_FFFF	: PCI memory space (64MB)
59235609Sgber * 0xF930_0000 - 0xF93F_FFFF	: Device Bus: BOOT (1 MB)
60235609Sgber * 0xF940_0000 - 0xF94F_FFFF	: Device Bus: CS0 (1 MB)
61235609Sgber * 0xF950_0000 - 0xFB4F_FFFF	: Device Bus: CS1 (32 MB)
62235609Sgber * 0xFB50_0000 - 0xFB5F_FFFF	: Device Bus: CS2 (1 MB)
63235609Sgber * 0xFB60_0000 - 0xFFFE_FFFF	: Unused (~74MB)
64235609Sgber * 0xFFFF_0000 - 0xFFFF_0FFF	: 'High' vectors page (4 kB)
65235609Sgber * 0xFFFF_1000 - 0xFFFF_1FFF	: ARM_TP_ADDRESS/RAS page (4 kB)
66235609Sgber * 0xFFFF_2000 - 0xFFFF_FFFF	: Unused (56 kB)
67235609Sgber */
68235609Sgber
69235609Sgber
70186909Srajstruct resource_spec mv_gpio_res[] = {
71183840Sraj	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
72183840Sraj	{ SYS_RES_IRQ,		0,	RF_ACTIVE },
73183840Sraj	{ SYS_RES_IRQ,		1,	RF_ACTIVE },
74183840Sraj	{ SYS_RES_IRQ,		2,	RF_ACTIVE },
75183840Sraj	{ SYS_RES_IRQ,		3,	RF_ACTIVE },
76183840Sraj	{ -1, 0 }
77183840Sraj};
78183840Sraj
79183840Srajconst struct decode_win idma_win_tbl[] = {
80209131Sraj	{ 0 },
81183840Sraj};
82183840Srajconst struct decode_win *idma_wins = idma_win_tbl;
83209131Srajint idma_wins_no = 0;
84186899Sraj
85186909Srajconst struct decode_win xor_win_tbl[] = {
86209131Sraj	{ 0 },
87186909Sraj};
88186909Srajconst struct decode_win *xor_wins = xor_win_tbl;
89209131Srajint xor_wins_no = 0;
90186909Sraj
91186899Srajuint32_t
92186899Srajget_tclk(void)
93186899Sraj{
94186899Sraj	uint32_t sar;
95186899Sraj
96186899Sraj	/*
97186899Sraj	 * On Discovery TCLK is can be configured to 166 MHz or 200 MHz.
98186899Sraj	 * Current setting is read from Sample At Reset register.
99186899Sraj	 */
100209131Sraj	sar = bus_space_read_4(fdtbus_bs_tag, MV_MPP_BASE, SAMPLE_AT_RESET_HI);
101186899Sraj	sar = (sar & TCLK_MASK) >> TCLK_SHIFT;
102186899Sraj
103186899Sraj	switch (sar) {
104186899Sraj	case 0:
105186899Sraj		return (TCLK_166MHZ);
106186899Sraj	case 1:
107186899Sraj		return (TCLK_200MHZ);
108186899Sraj	default:
109186899Sraj		panic("Unknown TCLK settings!");
110186899Sraj	}
111186899Sraj}
112