1294441Szbb/*- 2294441Szbb * Copyright (c) 2015 Semihalf. 3294441Szbb * Copyright (c) 2015 Stormshield. 4294441Szbb * All rights reserved. 5294441Szbb * 6294441Szbb * Redistribution and use in source and binary forms, with or without 7294441Szbb * modification, are permitted provided that the following conditions 8294441Szbb * are met: 9294441Szbb * 1. Redistributions of source code must retain the above copyright 10294441Szbb * notice, this list of conditions and the following disclaimer. 11294441Szbb * 2. Redistributions in binary form must reproduce the above copyright 12294441Szbb * notice, this list of conditions and the following disclaimer in the 13294441Szbb * documentation and/or other materials provided with the distribution. 14294441Szbb * 15294441Szbb * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16294441Szbb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17294441Szbb * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18294441Szbb * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19294441Szbb * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20294441Szbb * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21294441Szbb * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22294441Szbb * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23294441Szbb * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24294441Szbb * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25294441Szbb * SUCH DAMAGE. 26294441Szbb */ 27294441Szbb 28294441Szbb#include <sys/cdefs.h> 29294441Szbb__FBSDID("$FreeBSD: stable/11/sys/arm/mv/armada38x/pmsu.c 307344 2016-10-15 08:27:54Z mmel $"); 30294441Szbb 31294441Szbb#include <sys/param.h> 32294441Szbb#include <sys/bus.h> 33294441Szbb#include <sys/conf.h> 34294441Szbb#include <sys/rman.h> 35294441Szbb#include <sys/types.h> 36294441Szbb#include <sys/kernel.h> 37294441Szbb#include <sys/module.h> 38294441Szbb#include <sys/resource.h> 39295319Smmel#include <sys/systm.h> 40294441Szbb 41294441Szbb#include <vm/vm.h> 42294441Szbb#include <vm/pmap.h> 43294441Szbb 44295319Smmel#include <machine/cpu.h> 45294441Szbb#include <machine/fdt.h> 46294441Szbb#include <machine/smp.h> 47294441Szbb 48294441Szbb#include <dev/ofw/ofw_bus_subr.h> 49294441Szbb 50294441Szbb#include <arm/mv/mvreg.h> 51294441Szbb 52294441Szbb#include "pmsu.h" 53294441Szbb 54294441Szbbstatic struct resource_spec pmsu_spec[] = { 55294441Szbb { SYS_RES_MEMORY, 0, RF_ACTIVE }, 56294441Szbb { -1, 0 } 57294441Szbb}; 58294441Szbb 59294441Szbbstruct pmsu_softc { 60294441Szbb device_t dev; 61294441Szbb struct resource *res; 62294441Szbb}; 63294441Szbb 64294441Szbbstatic int pmsu_probe(device_t dev); 65294441Szbbstatic int pmsu_attach(device_t dev); 66294441Szbbstatic int pmsu_detach(device_t dev); 67294441Szbb 68294441Szbbstatic device_method_t pmsu_methods[] = { 69294441Szbb DEVMETHOD(device_probe, pmsu_probe), 70294441Szbb DEVMETHOD(device_attach, pmsu_attach), 71294441Szbb DEVMETHOD(device_detach, pmsu_detach), 72294441Szbb 73294441Szbb { 0, 0 } 74294441Szbb}; 75294441Szbb 76294441Szbbstatic driver_t pmsu_driver = { 77294441Szbb "pmsu", 78294441Szbb pmsu_methods, 79294441Szbb sizeof(struct pmsu_softc) 80294441Szbb}; 81294441Szbb 82294441Szbbstatic devclass_t pmsu_devclass; 83294441Szbb 84294441SzbbDRIVER_MODULE(pmsu, simplebus, pmsu_driver, pmsu_devclass, 0, 0); 85294441SzbbDRIVER_MODULE(pmsu, ofwbus, pmsu_driver, pmsu_devclass, 0, 0); 86294441Szbb 87294441Szbbstatic int 88294441Szbbpmsu_probe(device_t dev) 89294441Szbb{ 90294441Szbb 91294441Szbb if (!ofw_bus_status_okay(dev)) 92294441Szbb return (ENXIO); 93294441Szbb 94294441Szbb if (!ofw_bus_is_compatible(dev, "marvell,armada-380-pmsu")) 95294441Szbb return (ENXIO); 96294441Szbb 97294441Szbb device_set_desc(dev, "Power Management Service Unit"); 98294441Szbb 99294441Szbb return (BUS_PROBE_DEFAULT); 100294441Szbb} 101294441Szbb 102294441Szbbstatic int 103294441Szbbpmsu_attach(device_t dev) 104294441Szbb{ 105294441Szbb struct pmsu_softc *sc; 106294441Szbb int err; 107294441Szbb 108294441Szbb sc = device_get_softc(dev); 109294441Szbb sc->dev = dev; 110294441Szbb 111294441Szbb err = bus_alloc_resources(dev, pmsu_spec, &sc->res); 112294441Szbb if (err != 0) { 113294441Szbb device_printf(dev, "could not allocate resources\n"); 114294441Szbb return (ENXIO); 115294441Szbb } 116294441Szbb 117294441Szbb return (0); 118294441Szbb} 119294441Szbb 120294441Szbbstatic int 121294441Szbbpmsu_detach(device_t dev) 122294441Szbb{ 123294441Szbb struct pmsu_softc *sc; 124294441Szbb 125294441Szbb sc = device_get_softc(dev); 126294441Szbb 127294441Szbb bus_release_resources(dev, pmsu_spec, &sc->res); 128294441Szbb 129294441Szbb return (0); 130294441Szbb} 131294441Szbb 132294441Szbb#ifdef SMP 133294441Szbbint 134294441Szbbpmsu_boot_secondary_cpu(void) 135294441Szbb{ 136294441Szbb bus_space_handle_t vaddr; 137294441Szbb int rv; 138294441Szbb 139294441Szbb rv = bus_space_map(fdtbus_bs_tag, (bus_addr_t)MV_PMSU_BASE, MV_PMSU_REGS_LEN, 140294441Szbb 0, &vaddr); 141294441Szbb if (rv != 0) 142294441Szbb return (rv); 143294441Szbb 144294441Szbb /* Boot cpu1 */ 145294441Szbb bus_space_write_4(fdtbus_bs_tag, vaddr, PMSU_BOOT_ADDR_REDIRECT_OFFSET(1), 146294441Szbb pmap_kextract((vm_offset_t)mpentry)); 147294441Szbb 148295319Smmel dcache_wbinv_poc_all(); 149307344Smmel dsb(); 150307344Smmel sev(); 151294441Szbb 152294441Szbb bus_space_unmap(fdtbus_bs_tag, vaddr, MV_PMSU_REGS_LEN); 153294441Szbb 154294441Szbb return (0); 155294441Szbb} 156294441Szbb#endif 157