lpc_machdep.c revision 242343
1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Brini. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45 36 */ 37 38#include "opt_ddb.h" 39#include "opt_platform.h" 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: head/sys/arm/lpc/lpc_machdep.c 242343 2012-10-30 06:11:09Z andrew $"); 43 44#define _ARM32_BUS_DMA_PRIVATE 45#include <sys/param.h> 46#include <sys/systm.h> 47#include <sys/sysproto.h> 48#include <sys/signalvar.h> 49#include <sys/imgact.h> 50#include <sys/kernel.h> 51#include <sys/ktr.h> 52#include <sys/linker.h> 53#include <sys/lock.h> 54#include <sys/malloc.h> 55#include <sys/mutex.h> 56#include <sys/pcpu.h> 57#include <sys/proc.h> 58#include <sys/ptrace.h> 59#include <sys/cons.h> 60#include <sys/bio.h> 61#include <sys/bus.h> 62#include <sys/buf.h> 63#include <sys/exec.h> 64#include <sys/kdb.h> 65#include <sys/msgbuf.h> 66#include <machine/reg.h> 67#include <machine/cpu.h> 68#include <machine/fdt.h> 69 70#include <dev/fdt/fdt_common.h> 71#include <dev/ofw/openfirm.h> 72 73#include <arm/lpc/lpcreg.h> 74#include <arm/lpc/lpcvar.h> 75 76#include <dev/ic/ns16550.h> 77 78#include <vm/vm.h> 79#include <vm/pmap.h> 80#include <vm/vm_object.h> 81#include <vm/vm_page.h> 82#include <vm/vm_pager.h> 83#include <vm/vm_map.h> 84#include <machine/bus.h> 85#include <machine/pte.h> 86#include <machine/pmap.h> 87#include <machine/vmparam.h> 88#include <machine/pcb.h> 89#include <machine/undefined.h> 90#include <machine/machdep.h> 91#include <machine/metadata.h> 92#include <machine/armreg.h> 93#include <machine/bus.h> 94#include <sys/reboot.h> 95 96#define DEBUG 97#undef DEBUG 98 99#ifdef DEBUG 100#define debugf(fmt, args...) printf(fmt, ##args) 101#else 102#define debugf(fmt, args...) 103#endif 104 105/* 106 * This is the number of L2 page tables required for covering max 107 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 108 * stacks etc.), uprounded to be divisible by 4. 109 */ 110#define KERNEL_PT_MAX 78 111 112extern unsigned char kernbase[]; 113extern unsigned char _etext[]; 114extern unsigned char _edata[]; 115extern unsigned char __bss_start[]; 116extern unsigned char _end[]; 117 118#ifdef DDB 119extern vm_offset_t ksym_start, ksym_end; 120#endif 121 122extern u_int data_abort_handler_address; 123extern u_int prefetch_abort_handler_address; 124extern u_int undefined_handler_address; 125 126extern vm_offset_t pmap_bootstrap_lastaddr; 127extern int *end; 128 129struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 130 131/* Physical and virtual addresses for some global pages */ 132vm_paddr_t phys_avail[10]; 133vm_paddr_t dump_avail[4]; 134vm_offset_t physical_pages; 135vm_offset_t pmap_bootstrap_lastaddr; 136vm_paddr_t pmap_pa; 137 138const struct pmap_devmap *pmap_devmap_bootstrap_table; 139struct pv_addr systempage; 140struct pv_addr msgbufpv; 141struct pv_addr irqstack; 142struct pv_addr undstack; 143struct pv_addr abtstack; 144struct pv_addr kernelstack; 145 146static struct mem_region availmem_regions[FDT_MEM_REGIONS]; 147static int availmem_regions_sz; 148 149static void print_kenv(void); 150static void print_kernel_section_addr(void); 151 152static void physmap_init(void); 153static int platform_devmap_init(void); 154 155static char * 156kenv_next(char *cp) 157{ 158 159 if (cp != NULL) { 160 while (*cp != 0) 161 cp++; 162 cp++; 163 if (*cp == 0) 164 cp = NULL; 165 } 166 return (cp); 167} 168 169static void 170print_kenv(void) 171{ 172 int len; 173 char *cp; 174 175 debugf("loader passed (static) kenv:\n"); 176 if (kern_envp == NULL) { 177 debugf(" no env, null ptr\n"); 178 return; 179 } 180 debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp); 181 182 len = 0; 183 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp)) 184 debugf(" %x %s\n", (uint32_t)cp, cp); 185} 186 187static void 188print_kernel_section_addr(void) 189{ 190 191 debugf("kernel image addresses:\n"); 192 debugf(" kernbase = 0x%08x\n", (uint32_t)kernbase); 193 debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext); 194 debugf(" _edata = 0x%08x\n", (uint32_t)_edata); 195 debugf(" __bss_start = 0x%08x\n", (uint32_t)__bss_start); 196 debugf(" _end = 0x%08x\n", (uint32_t)_end); 197} 198 199static void 200physmap_init(void) 201{ 202 int i, j, cnt; 203 vm_offset_t phys_kernelend, kernload; 204 uint32_t s, e, sz; 205 struct mem_region *mp, *mp1; 206 207 phys_kernelend = KERNPHYSADDR + (virtual_avail - KERNVIRTADDR); 208 kernload = KERNPHYSADDR; 209 210 /* 211 * Remove kernel physical address range from avail 212 * regions list. Page align all regions. 213 * Non-page aligned memory isn't very interesting to us. 214 * Also, sort the entries for ascending addresses. 215 */ 216 sz = 0; 217 cnt = availmem_regions_sz; 218 debugf("processing avail regions:\n"); 219 for (mp = availmem_regions; mp->mr_size; mp++) { 220 s = mp->mr_start; 221 e = mp->mr_start + mp->mr_size; 222 debugf(" %08x-%08x -> ", s, e); 223 /* Check whether this region holds all of the kernel. */ 224 if (s < kernload && e > phys_kernelend) { 225 availmem_regions[cnt].mr_start = phys_kernelend; 226 availmem_regions[cnt++].mr_size = e - phys_kernelend; 227 e = kernload; 228 } 229 /* Look whether this regions starts within the kernel. */ 230 if (s >= kernload && s < phys_kernelend) { 231 if (e <= phys_kernelend) 232 goto empty; 233 s = phys_kernelend; 234 } 235 /* Now look whether this region ends within the kernel. */ 236 if (e > kernload && e <= phys_kernelend) { 237 if (s >= kernload) { 238 goto empty; 239 } 240 e = kernload; 241 } 242 /* Now page align the start and size of the region. */ 243 s = round_page(s); 244 e = trunc_page(e); 245 if (e < s) 246 e = s; 247 sz = e - s; 248 debugf("%08x-%08x = %x\n", s, e, sz); 249 250 /* Check whether some memory is left here. */ 251 if (sz == 0) { 252 empty: 253 printf("skipping\n"); 254 bcopy(mp + 1, mp, 255 (cnt - (mp - availmem_regions)) * sizeof(*mp)); 256 cnt--; 257 mp--; 258 continue; 259 } 260 261 /* Do an insertion sort. */ 262 for (mp1 = availmem_regions; mp1 < mp; mp1++) 263 if (s < mp1->mr_start) 264 break; 265 if (mp1 < mp) { 266 bcopy(mp1, mp1 + 1, (char *)mp - (char *)mp1); 267 mp1->mr_start = s; 268 mp1->mr_size = sz; 269 } else { 270 mp->mr_start = s; 271 mp->mr_size = sz; 272 } 273 } 274 availmem_regions_sz = cnt; 275 276 /* Fill in phys_avail table, based on availmem_regions */ 277 debugf("fill in phys_avail:\n"); 278 for (i = 0, j = 0; i < availmem_regions_sz; i++, j += 2) { 279 280 debugf(" region: 0x%08x - 0x%08x (0x%08x)\n", 281 availmem_regions[i].mr_start, 282 availmem_regions[i].mr_start + availmem_regions[i].mr_size, 283 availmem_regions[i].mr_size); 284 285 /* 286 * We should not map the page at PA 0x0000000, the VM can't 287 * handle it, as pmap_extract() == 0 means failure. 288 */ 289 if (availmem_regions[i].mr_start > 0 || 290 availmem_regions[i].mr_size > PAGE_SIZE) { 291 phys_avail[j] = availmem_regions[i].mr_start; 292 if (phys_avail[j] == 0) 293 phys_avail[j] += PAGE_SIZE; 294 phys_avail[j + 1] = availmem_regions[i].mr_start + 295 availmem_regions[i].mr_size; 296 } else 297 j -= 2; 298 } 299 phys_avail[j] = 0; 300 phys_avail[j + 1] = 0; 301} 302 303void * 304initarm(struct arm_boot_params *abp) 305{ 306 struct pv_addr kernel_l1pt; 307 struct pv_addr dpcpu; 308 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 309 uint32_t memsize, l2size; 310 void *kmdp; 311 u_int l1pagetable; 312 int i = 0, j = 0, err_devmap = 0; 313 314 lastaddr = parse_boot_param(abp); 315 memsize = 0; 316 set_cpufuncs(); 317 318 /* 319 * Find the dtb passed in by the boot loader. 320 */ 321 kmdp = preload_search_by_type("elf kernel"); 322 if (kmdp != NULL) 323 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 324 else 325 dtbp = (vm_offset_t)NULL; 326 327#if defined(FDT_DTB_STATIC) 328 /* 329 * In case the device tree blob was not retrieved (from metadata) try 330 * to use the statically embedded one. 331 */ 332 if (dtbp == (vm_offset_t)NULL) 333 dtbp = (vm_offset_t)&fdt_static_dtb; 334#endif 335 336 if (OF_install(OFW_FDT, 0) == FALSE) 337 while (1); 338 339 if (OF_init((void *)dtbp) != 0) 340 while (1); 341 342 /* Grab physical memory regions information from device tree. */ 343 if (fdt_get_mem_regions(availmem_regions, &availmem_regions_sz, 344 &memsize) != 0) 345 while(1); 346 347 /* Platform-specific initialisation */ 348 pmap_bootstrap_lastaddr = initarm_lastaddr(); 349 350 pcpu0_init(); 351 352 /* Calculate number of L2 tables needed for mapping vm_page_array */ 353 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 354 l2size = (l2size >> L1_S_SHIFT) + 1; 355 356 /* 357 * Add one table for end of kernel map, one for stacks, msgbuf and 358 * L1 and L2 tables map and one for vectors map. 359 */ 360 l2size += 3; 361 362 /* Make it divisible by 4 */ 363 l2size = (l2size + 3) & ~3; 364 365#define KERNEL_TEXT_BASE (KERNBASE) 366 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 367 368 /* Define a macro to simplify memory allocation */ 369#define valloc_pages(var, np) \ 370 alloc_pages((var).pv_va, (np)); \ 371 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 372 373#define alloc_pages(var, np) \ 374 (var) = freemempos; \ 375 freemempos += (np * PAGE_SIZE); \ 376 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 377 378 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 379 freemempos += PAGE_SIZE; 380 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 381 382 for (i = 0; i < l2size; ++i) { 383 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 384 valloc_pages(kernel_pt_table[i], 385 L2_TABLE_SIZE / PAGE_SIZE); 386 j = i; 387 } else { 388 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 389 L2_TABLE_SIZE_REAL * (i - j); 390 kernel_pt_table[i].pv_pa = 391 kernel_pt_table[i].pv_va - KERNVIRTADDR + 392 KERNPHYSADDR; 393 394 } 395 } 396 /* 397 * Allocate a page for the system page mapped to 0x00000000 398 * or 0xffff0000. This page will just contain the system vectors 399 * and can be shared by all processes. 400 */ 401 valloc_pages(systempage, 1); 402 403 /* Allocate dynamic per-cpu area. */ 404 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 405 dpcpu_init((void *)dpcpu.pv_va, 0); 406 407 /* Allocate stacks for all modes */ 408 valloc_pages(irqstack, (IRQ_STACK_SIZE * MAXCPU)); 409 valloc_pages(abtstack, (ABT_STACK_SIZE * MAXCPU)); 410 valloc_pages(undstack, (UND_STACK_SIZE * MAXCPU)); 411 valloc_pages(kernelstack, (KSTACK_PAGES * MAXCPU)); 412 413 init_param1(); 414 415 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 416 417 /* 418 * Now we start construction of the L1 page table 419 * We start by mapping the L2 page tables into the L1. 420 * This means that we can replace L1 mappings later on if necessary 421 */ 422 l1pagetable = kernel_l1pt.pv_va; 423 424 /* 425 * Try to map as much as possible of kernel text and data using 426 * 1MB section mapping and for the rest of initial kernel address 427 * space use L2 coarse tables. 428 * 429 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 430 * and kernel structures 431 */ 432 l2_start = lastaddr & ~(L1_S_OFFSET); 433 for (i = 0 ; i < l2size - 1; i++) 434 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 435 &kernel_pt_table[i]); 436 437 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 438 439 /* Map kernel code and data */ 440 pmap_map_chunk(l1pagetable, KERNVIRTADDR, KERNPHYSADDR, 441 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 442 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 443 444 445 /* Map L1 directory and allocated L2 page tables */ 446 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 447 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 448 449 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 450 kernel_pt_table[0].pv_pa, 451 L2_TABLE_SIZE_REAL * l2size, 452 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 453 454 /* Map allocated DPCPU, stacks and msgbuf */ 455 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 456 freemempos - dpcpu.pv_va, 457 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 458 459 /* Link and map the vector page */ 460 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 461 &kernel_pt_table[l2size - 1]); 462 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 463 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 464 465 /* Map pmap_devmap[] entries */ 466 err_devmap = platform_devmap_init(); 467 pmap_devmap_bootstrap(l1pagetable, pmap_devmap_bootstrap_table); 468 469 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | 470 DOMAIN_CLIENT); 471 pmap_pa = kernel_l1pt.pv_pa; 472 setttb(kernel_l1pt.pv_pa); 473 cpu_tlb_flushID(); 474 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 475 476 /* 477 * Only after the SOC registers block is mapped we can perform device 478 * tree fixups, as they may attempt to read parameters from hardware. 479 */ 480 OF_interpret("perform-fixup", 0); 481 482 initarm_gpio_init(); 483 484 cninit(); 485 486 physmem = memsize / PAGE_SIZE; 487 488 debugf("initarm: console initialized\n"); 489 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 490 debugf(" boothowto = 0x%08x\n", boothowto); 491 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 492 print_kernel_section_addr(); 493 print_kenv(); 494 495 if (err_devmap != 0) 496 printf("WARNING: could not fully configure devmap, error=%d\n", 497 err_devmap); 498 499 initarm_late_init(); 500 501 /* 502 * Pages were allocated during the secondary bootstrap for the 503 * stacks for different CPU modes. 504 * We must now set the r13 registers in the different CPU modes to 505 * point to these stacks. 506 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 507 * of the stack memory. 508 */ 509 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 510 511 set_stackptrs(0); 512 513 /* 514 * We must now clean the cache again.... 515 * Cleaning may be done by reading new data to displace any 516 * dirty data in the cache. This will have happened in setttb() 517 * but since we are boot strapping the addresses used for the read 518 * may have just been remapped and thus the cache could be out 519 * of sync. A re-clean after the switch will cure this. 520 * After booting there are no gross relocations of the kernel thus 521 * this problem will not occur after initarm(). 522 */ 523 cpu_idcache_wbinv_all(); 524 525 /* Set stack for exception handlers */ 526 data_abort_handler_address = (u_int)data_abort_handler; 527 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 528 undefined_handler_address = (u_int)undefinedinstruction_bounce; 529 undefined_init(); 530 531 init_proc0(kernelstack.pv_va); 532 533 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 534 arm_dump_avail_init(memsize, sizeof(dump_avail) / sizeof(dump_avail[0])); 535 pmap_bootstrap(freemempos, pmap_bootstrap_lastaddr, &kernel_l1pt); 536 msgbufp = (void *)msgbufpv.pv_va; 537 msgbufinit(msgbufp, msgbufsize); 538 mutex_init(); 539 540 /* 541 * Prepare map of physical memory regions available to vm subsystem. 542 */ 543 physmap_init(); 544 545 /* Do basic tuning, hz etc */ 546 init_param2(physmem); 547 kdb_init(); 548 549 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 550 sizeof(struct pcb))); 551} 552 553vm_offset_t 554initarm_lastaddr(void) 555{ 556 557 if (fdt_immr_addr(LPC_DEV_BASE) != 0) 558 while (1); 559 560 /* Platform-specific initialisation */ 561 return (fdt_immr_va - ARM_NOCACHE_KVA_SIZE); 562} 563 564void 565initarm_gpio_init(void) 566{ 567 568 /* 569 * Set initial values of GPIO output ports 570 */ 571 platform_gpio_init(); 572} 573 574void 575initarm_late_init(void) 576{ 577} 578 579#define FDT_DEVMAP_MAX (1 + 2 + 1 + 1) 580static struct pmap_devmap fdt_devmap[FDT_DEVMAP_MAX] = { 581 { 0, 0, 0, 0, 0, } 582}; 583 584/* 585 * Construct pmap_devmap[] with DT-derived config data. 586 */ 587static int 588platform_devmap_init(void) 589{ 590 591 /* 592 * IMMR range. 593 */ 594 fdt_devmap[0].pd_va = fdt_immr_va; 595 fdt_devmap[0].pd_pa = fdt_immr_pa; 596 fdt_devmap[0].pd_size = fdt_immr_size; 597 fdt_devmap[0].pd_prot = VM_PROT_READ | VM_PROT_WRITE; 598 fdt_devmap[0].pd_cache = PTE_NOCACHE; 599 600 pmap_devmap_bootstrap_table = &fdt_devmap[0]; 601 return (0); 602} 603 604struct arm32_dma_range * 605bus_dma_get_range(void) 606{ 607 608 return (NULL); 609} 610 611int 612bus_dma_get_range_nb(void) 613{ 614 615 return (0); 616} 617 618void 619cpu_reset(void) 620{ 621 /* Enable WDT */ 622 bus_space_write_4(fdtbus_bs_tag, 623 LPC_CLKPWR_BASE, LPC_CLKPWR_TIMCLK_CTRL, 624 LPC_CLKPWR_TIMCLK_CTRL_WATCHDOG); 625 626 /* Instant assert of RESETOUT_N with pulse length 1ms */ 627 bus_space_write_4(fdtbus_bs_tag, LPC_WDTIM_BASE, LPC_WDTIM_PULSE, 13000); 628 bus_space_write_4(fdtbus_bs_tag, LPC_WDTIM_BASE, LPC_WDTIM_MCTRL, 0x70); 629 630 for (;;); 631} 632