sysarch.h revision 302408 
1/*	$NetBSD: sysarch.h,v 1.5 2003/09/11 09:40:12 kleink Exp $	*/
2
3/*-
4 * Copyright (c) 1996-1997 Mark Brinicombe.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *	This product includes software developed by Mark Brinicombe.
18 * 4. The name of the company nor the name of the author may be used to
19 *    endorse or promote products derived from this software without specific
20 *    prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35/* $FreeBSD: stable/11/sys/arm/include/sysarch.h 300694 2016-05-25 19:44:26Z ian $ */
36
37#ifndef _ARM_SYSARCH_H_
38#define _ARM_SYSARCH_H_
39
40#include <machine/armreg.h>
41
42/*
43 * The ARM_TP_ADDRESS points to a special purpose page, which is used as local
44 * store for the ARM per-thread data and Restartable Atomic Sequences support.
45 * Put it just above the "high" vectors' page.
46 * The cpu_switch() code assumes ARM_RAS_START is ARM_TP_ADDRESS + 4, and
47 * ARM_RAS_END is ARM_TP_ADDRESS + 8, so if that ever changes, be sure to
48 * update the cpu_switch() (and cpu_throw()) code as well.
49 * In addition, code in arm/include/atomic.h and arm/arm/exception.S
50 * assumes that ARM_RAS_END is at ARM_RAS_START+4, so be sure to update those
51 * if ARM_RAS_END moves in relation to ARM_RAS_START (look for occurrences
52 * of ldr/str rm,[rn, #4]).
53 */
54
55/* ARM_TP_ADDRESS is needed for processors that don't support
56 * the exclusive-access opcodes introduced with ARMv6K. */
57#if __ARM_ARCH <= 5
58#define ARM_TP_ADDRESS		(ARM_VECTORS_HIGH + 0x1000)
59#define ARM_RAS_START		(ARM_TP_ADDRESS + 4)
60#define ARM_RAS_END		(ARM_TP_ADDRESS + 8)
61#endif
62
63#ifndef LOCORE
64#ifndef __ASSEMBLER__
65
66#include <sys/cdefs.h>
67
68/*
69 * Pickup definition of uintptr_t
70 */
71#include <sys/stdint.h>
72
73/*
74 * Architecture specific syscalls (arm)
75 */
76
77#define ARM_SYNC_ICACHE		0
78#define ARM_DRAIN_WRITEBUF	1
79#define ARM_SET_TP		2
80#define ARM_GET_TP		3
81
82struct arm_sync_icache_args {
83	uintptr_t	addr;		/* Virtual start address */
84	size_t		len;		/* Region size */
85};
86
87#ifndef _KERNEL
88__BEGIN_DECLS
89int	arm_sync_icache (u_int addr, int len);
90int	arm_drain_writebuf (void);
91int	sysarch(int, void *);
92__END_DECLS
93#endif
94
95#endif /* __ASSEMBLER__ */
96#endif /* LOCORE */
97
98#endif /* !_ARM_SYSARCH_H_ */
99