bus.h revision 135645
1/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40/* 41 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 42 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Christopher G. Demetriou 55 * for the NetBSD Project. 56 * 4. The name of the author may not be used to endorse or promote products 57 * derived from this software without specific prior written permission 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 * 70 * $FreeBSD: head/sys/arm/include/bus.h 135645 2004-09-23 21:59:14Z cognet $ 71 */ 72 73#ifndef _MACHINE_BUS_H_ 74#define _MACHINE_BUS_H_ 75 76/* 77 * Addresses (in bus space). 78 */ 79typedef u_long bus_addr_t; 80typedef u_long bus_size_t; 81 82/* 83 * Access methods for bus space. 84 */ 85typedef struct bus_space *bus_space_tag_t; 86typedef u_long bus_space_handle_t; 87 88/* 89 * int bus_space_map (bus_space_tag_t t, bus_addr_t addr, 90 * bus_size_t size, int flags, bus_space_handle_t *bshp); 91 * 92 * Map a region of bus space. 93 */ 94 95#define BUS_SPACE_MAP_CACHEABLE 0x01 96#define BUS_SPACE_MAP_LINEAR 0x02 97#define BUS_SPACE_MAP_PREFETCHABLE 0x04 98 99struct bus_space { 100 /* cookie */ 101 void *bs_cookie; 102 103 /* mapping/unmapping */ 104 int (*bs_map) (void *, bus_addr_t, bus_size_t, 105 int, bus_space_handle_t *); 106 void (*bs_unmap) (void *, bus_size_t); 107 int (*bs_subregion) (void *, bus_space_handle_t, 108 bus_size_t, bus_size_t, bus_space_handle_t *); 109 110 /* allocation/deallocation */ 111 int (*bs_alloc) (void *, bus_addr_t, bus_addr_t, 112 bus_size_t, bus_size_t, bus_size_t, int, 113 bus_addr_t *, bus_space_handle_t *); 114 void (*bs_free) (void *, bus_space_handle_t, 115 bus_size_t); 116 117 /* get kernel virtual address */ 118 /* barrier */ 119 void (*bs_barrier) (void *, bus_space_handle_t, 120 bus_size_t, bus_size_t, int); 121 122 /* read (single) */ 123 u_int8_t (*bs_r_1) (void *, bus_space_handle_t, bus_size_t); 124 u_int16_t (*bs_r_2) (void *, bus_space_handle_t, bus_size_t); 125 u_int32_t (*bs_r_4) (void *, bus_space_handle_t, bus_size_t); 126 u_int64_t (*bs_r_8) (void *, bus_space_handle_t, bus_size_t); 127 128 /* read multiple */ 129 void (*bs_rm_1) (void *, bus_space_handle_t, bus_size_t, 130 u_int8_t *, bus_size_t); 131 void (*bs_rm_2) (void *, bus_space_handle_t, bus_size_t, 132 u_int16_t *, bus_size_t); 133 void (*bs_rm_4) (void *, bus_space_handle_t, 134 bus_size_t, u_int32_t *, bus_size_t); 135 void (*bs_rm_8) (void *, bus_space_handle_t, 136 bus_size_t, u_int64_t *, bus_size_t); 137 138 /* read region */ 139 void (*bs_rr_1) (void *, bus_space_handle_t, 140 bus_size_t, u_int8_t *, bus_size_t); 141 void (*bs_rr_2) (void *, bus_space_handle_t, 142 bus_size_t, u_int16_t *, bus_size_t); 143 void (*bs_rr_4) (void *, bus_space_handle_t, 144 bus_size_t, u_int32_t *, bus_size_t); 145 void (*bs_rr_8) (void *, bus_space_handle_t, 146 bus_size_t, u_int64_t *, bus_size_t); 147 148 /* write (single) */ 149 void (*bs_w_1) (void *, bus_space_handle_t, 150 bus_size_t, u_int8_t); 151 void (*bs_w_2) (void *, bus_space_handle_t, 152 bus_size_t, u_int16_t); 153 void (*bs_w_4) (void *, bus_space_handle_t, 154 bus_size_t, u_int32_t); 155 void (*bs_w_8) (void *, bus_space_handle_t, 156 bus_size_t, u_int64_t); 157 158 /* write multiple */ 159 void (*bs_wm_1) (void *, bus_space_handle_t, 160 bus_size_t, const u_int8_t *, bus_size_t); 161 void (*bs_wm_2) (void *, bus_space_handle_t, 162 bus_size_t, const u_int16_t *, bus_size_t); 163 void (*bs_wm_4) (void *, bus_space_handle_t, 164 bus_size_t, const u_int32_t *, bus_size_t); 165 void (*bs_wm_8) (void *, bus_space_handle_t, 166 bus_size_t, const u_int64_t *, bus_size_t); 167 168 /* write region */ 169 void (*bs_wr_1) (void *, bus_space_handle_t, 170 bus_size_t, const u_int8_t *, bus_size_t); 171 void (*bs_wr_2) (void *, bus_space_handle_t, 172 bus_size_t, const u_int16_t *, bus_size_t); 173 void (*bs_wr_4) (void *, bus_space_handle_t, 174 bus_size_t, const u_int32_t *, bus_size_t); 175 void (*bs_wr_8) (void *, bus_space_handle_t, 176 bus_size_t, const u_int64_t *, bus_size_t); 177 178 /* set multiple */ 179 void (*bs_sm_1) (void *, bus_space_handle_t, 180 bus_size_t, u_int8_t, bus_size_t); 181 void (*bs_sm_2) (void *, bus_space_handle_t, 182 bus_size_t, u_int16_t, bus_size_t); 183 void (*bs_sm_4) (void *, bus_space_handle_t, 184 bus_size_t, u_int32_t, bus_size_t); 185 void (*bs_sm_8) (void *, bus_space_handle_t, 186 bus_size_t, u_int64_t, bus_size_t); 187 188 /* set region */ 189 void (*bs_sr_1) (void *, bus_space_handle_t, 190 bus_size_t, u_int8_t, bus_size_t); 191 void (*bs_sr_2) (void *, bus_space_handle_t, 192 bus_size_t, u_int16_t, bus_size_t); 193 void (*bs_sr_4) (void *, bus_space_handle_t, 194 bus_size_t, u_int32_t, bus_size_t); 195 void (*bs_sr_8) (void *, bus_space_handle_t, 196 bus_size_t, u_int64_t, bus_size_t); 197 198 /* copy */ 199 void (*bs_c_1) (void *, bus_space_handle_t, bus_size_t, 200 bus_space_handle_t, bus_size_t, bus_size_t); 201 void (*bs_c_2) (void *, bus_space_handle_t, bus_size_t, 202 bus_space_handle_t, bus_size_t, bus_size_t); 203 void (*bs_c_4) (void *, bus_space_handle_t, bus_size_t, 204 bus_space_handle_t, bus_size_t, bus_size_t); 205 void (*bs_c_8) (void *, bus_space_handle_t, bus_size_t, 206 bus_space_handle_t, bus_size_t, bus_size_t); 207 208}; 209 210 211/* 212 * Utility macros; INTERNAL USE ONLY. 213 */ 214#define __bs_c(a,b) __CONCAT(a,b) 215#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size) 216 217#define __bs_rs(sz, t, h, o) \ 218 (*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o) 219#define __bs_ws(sz, t, h, o, v) \ 220 (*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v) 221#define __bs_nonsingle(type, sz, t, h, o, a, c) \ 222 (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c) 223#define __bs_set(type, sz, t, h, o, v, c) \ 224 (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c) 225#define __bs_copy(sz, t, h1, o1, h2, o2, cnt) \ 226 (*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt) 227 228 229/* 230 * Mapping and unmapping operations. 231 */ 232#define bus_space_map(t, a, s, c, hp) \ 233 (*(t)->bs_map)((t)->bs_cookie, (a), (s), (c), (hp)) 234#define bus_space_unmap(t, h, s) \ 235 (*(t)->bs_unmap)((t)->bs_cookie, (h), (s)) 236#define bus_space_subregion(t, h, o, s, hp) \ 237 (*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp)) 238 239 240/* 241 * Allocation and deallocation operations. 242 */ 243#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) \ 244 (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \ 245 (c), (ap), (hp)) 246#define bus_space_free(t, h, s) \ 247 (*(t)->bs_free)((t)->bs_cookie, (h), (s)) 248 249/* 250 * Bus barrier operations. 251 */ 252#define bus_space_barrier(t, h, o, l, f) \ 253 (*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f)) 254 255#define BUS_SPACE_BARRIER_READ 0x01 256#define BUS_SPACE_BARRIER_WRITE 0x02 257 258/* 259 * Bus read (single) operations. 260 */ 261#define bus_space_read_1(t, h, o) __bs_rs(1,(t),(h),(o)) 262#define bus_space_read_2(t, h, o) __bs_rs(2,(t),(h),(o)) 263#define bus_space_read_4(t, h, o) __bs_rs(4,(t),(h),(o)) 264#define bus_space_read_8(t, h, o) __bs_rs(8,(t),(h),(o)) 265 266 267/* 268 * Bus read multiple operations. 269 */ 270#define bus_space_read_multi_1(t, h, o, a, c) \ 271 __bs_nonsingle(rm,1,(t),(h),(o),(a),(c)) 272#define bus_space_read_multi_2(t, h, o, a, c) \ 273 __bs_nonsingle(rm,2,(t),(h),(o),(a),(c)) 274#define bus_space_read_multi_4(t, h, o, a, c) \ 275 __bs_nonsingle(rm,4,(t),(h),(o),(a),(c)) 276#define bus_space_read_multi_8(t, h, o, a, c) \ 277 __bs_nonsingle(rm,8,(t),(h),(o),(a),(c)) 278 279 280/* 281 * Bus read region operations. 282 */ 283#define bus_space_read_region_1(t, h, o, a, c) \ 284 __bs_nonsingle(rr,1,(t),(h),(o),(a),(c)) 285#define bus_space_read_region_2(t, h, o, a, c) \ 286 __bs_nonsingle(rr,2,(t),(h),(o),(a),(c)) 287#define bus_space_read_region_4(t, h, o, a, c) \ 288 __bs_nonsingle(rr,4,(t),(h),(o),(a),(c)) 289#define bus_space_read_region_8(t, h, o, a, c) \ 290 __bs_nonsingle(rr,8,(t),(h),(o),(a),(c)) 291 292 293/* 294 * Bus write (single) operations. 295 */ 296#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v)) 297#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v)) 298#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v)) 299#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v)) 300 301 302/* 303 * Bus write multiple operations. 304 */ 305#define bus_space_write_multi_1(t, h, o, a, c) \ 306 __bs_nonsingle(wm,1,(t),(h),(o),(a),(c)) 307#define bus_space_write_multi_2(t, h, o, a, c) \ 308 __bs_nonsingle(wm,2,(t),(h),(o),(a),(c)) 309#define bus_space_write_multi_4(t, h, o, a, c) \ 310 __bs_nonsingle(wm,4,(t),(h),(o),(a),(c)) 311#define bus_space_write_multi_8(t, h, o, a, c) \ 312 __bs_nonsingle(wm,8,(t),(h),(o),(a),(c)) 313 314 315/* 316 * Bus write region operations. 317 */ 318#define bus_space_write_region_1(t, h, o, a, c) \ 319 __bs_nonsingle(wr,1,(t),(h),(o),(a),(c)) 320#define bus_space_write_region_2(t, h, o, a, c) \ 321 __bs_nonsingle(wr,2,(t),(h),(o),(a),(c)) 322#define bus_space_write_region_4(t, h, o, a, c) \ 323 __bs_nonsingle(wr,4,(t),(h),(o),(a),(c)) 324#define bus_space_write_region_8(t, h, o, a, c) \ 325 __bs_nonsingle(wr,8,(t),(h),(o),(a),(c)) 326 327 328/* 329 * Set multiple operations. 330 */ 331#define bus_space_set_multi_1(t, h, o, v, c) \ 332 __bs_set(sm,1,(t),(h),(o),(v),(c)) 333#define bus_space_set_multi_2(t, h, o, v, c) \ 334 __bs_set(sm,2,(t),(h),(o),(v),(c)) 335#define bus_space_set_multi_4(t, h, o, v, c) \ 336 __bs_set(sm,4,(t),(h),(o),(v),(c)) 337#define bus_space_set_multi_8(t, h, o, v, c) \ 338 __bs_set(sm,8,(t),(h),(o),(v),(c)) 339 340 341/* 342 * Set region operations. 343 */ 344#define bus_space_set_region_1(t, h, o, v, c) \ 345 __bs_set(sr,1,(t),(h),(o),(v),(c)) 346#define bus_space_set_region_2(t, h, o, v, c) \ 347 __bs_set(sr,2,(t),(h),(o),(v),(c)) 348#define bus_space_set_region_4(t, h, o, v, c) \ 349 __bs_set(sr,4,(t),(h),(o),(v),(c)) 350#define bus_space_set_region_8(t, h, o, v, c) \ 351 __bs_set(sr,8,(t),(h),(o),(v),(c)) 352 353 354/* 355 * Copy operations. 356 */ 357#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \ 358 __bs_copy(1, t, h1, o1, h2, o2, c) 359#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \ 360 __bs_copy(2, t, h1, o1, h2, o2, c) 361#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \ 362 __bs_copy(4, t, h1, o1, h2, o2, c) 363#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \ 364 __bs_copy(8, t, h1, o1, h2, o2, c) 365 366/* 367 * Macros to provide prototypes for all the functions used in the 368 * bus_space structure 369 */ 370 371#define bs_map_proto(f) \ 372int __bs_c(f,_bs_map) (void *t, bus_addr_t addr, \ 373 bus_size_t size, int cacheable, bus_space_handle_t *bshp); 374 375#define bs_unmap_proto(f) \ 376void __bs_c(f,_bs_unmap) (void *t, bus_size_t size); 377 378#define bs_subregion_proto(f) \ 379int __bs_c(f,_bs_subregion) (void *t, bus_space_handle_t bsh, \ 380 bus_size_t offset, bus_size_t size, \ 381 bus_space_handle_t *nbshp); 382 383#define bs_alloc_proto(f) \ 384int __bs_c(f,_bs_alloc) (void *t, bus_addr_t rstart, \ 385 bus_addr_t rend, bus_size_t size, bus_size_t align, \ 386 bus_size_t boundary, int cacheable, bus_addr_t *addrp, \ 387 bus_space_handle_t *bshp); 388 389#define bs_free_proto(f) \ 390void __bs_c(f,_bs_free) (void *t, bus_space_handle_t bsh, \ 391 bus_size_t size); 392 393#define bs_mmap_proto(f) \ 394int __bs_c(f,_bs_mmap) (struct cdev *, vm_offset_t, vm_paddr_t *, int); 395 396#define bs_barrier_proto(f) \ 397void __bs_c(f,_bs_barrier) (void *t, bus_space_handle_t bsh, \ 398 bus_size_t offset, bus_size_t len, int flags); 399 400#define bs_r_1_proto(f) \ 401u_int8_t __bs_c(f,_bs_r_1) (void *t, bus_space_handle_t bsh, \ 402 bus_size_t offset); 403 404#define bs_r_2_proto(f) \ 405u_int16_t __bs_c(f,_bs_r_2) (void *t, bus_space_handle_t bsh, \ 406 bus_size_t offset); 407 408#define bs_r_4_proto(f) \ 409u_int32_t __bs_c(f,_bs_r_4) (void *t, bus_space_handle_t bsh, \ 410 bus_size_t offset); 411 412#define bs_r_8_proto(f) \ 413u_int64_t __bs_c(f,_bs_r_8) (void *t, bus_space_handle_t bsh, \ 414 bus_size_t offset); 415 416#define bs_w_1_proto(f) \ 417void __bs_c(f,_bs_w_1) (void *t, bus_space_handle_t bsh, \ 418 bus_size_t offset, u_int8_t value); 419 420#define bs_w_2_proto(f) \ 421void __bs_c(f,_bs_w_2) (void *t, bus_space_handle_t bsh, \ 422 bus_size_t offset, u_int16_t value); 423 424#define bs_w_4_proto(f) \ 425void __bs_c(f,_bs_w_4) (void *t, bus_space_handle_t bsh, \ 426 bus_size_t offset, u_int32_t value); 427 428#define bs_w_8_proto(f) \ 429void __bs_c(f,_bs_w_8) (void *t, bus_space_handle_t bsh, \ 430 bus_size_t offset, u_int64_t value); 431 432#define bs_rm_1_proto(f) \ 433void __bs_c(f,_bs_rm_1) (void *t, bus_space_handle_t bsh, \ 434 bus_size_t offset, u_int8_t *addr, bus_size_t count); 435 436#define bs_rm_2_proto(f) \ 437void __bs_c(f,_bs_rm_2) (void *t, bus_space_handle_t bsh, \ 438 bus_size_t offset, u_int16_t *addr, bus_size_t count); 439 440#define bs_rm_4_proto(f) \ 441void __bs_c(f,_bs_rm_4) (void *t, bus_space_handle_t bsh, \ 442 bus_size_t offset, u_int32_t *addr, bus_size_t count); 443 444#define bs_rm_8_proto(f) \ 445void __bs_c(f,_bs_rm_8) (void *t, bus_space_handle_t bsh, \ 446 bus_size_t offset, u_int64_t *addr, bus_size_t count); 447 448#define bs_wm_1_proto(f) \ 449void __bs_c(f,_bs_wm_1) (void *t, bus_space_handle_t bsh, \ 450 bus_size_t offset, const u_int8_t *addr, bus_size_t count); 451 452#define bs_wm_2_proto(f) \ 453void __bs_c(f,_bs_wm_2) (void *t, bus_space_handle_t bsh, \ 454 bus_size_t offset, const u_int16_t *addr, bus_size_t count); 455 456#define bs_wm_4_proto(f) \ 457void __bs_c(f,_bs_wm_4) (void *t, bus_space_handle_t bsh, \ 458 bus_size_t offset, const u_int32_t *addr, bus_size_t count); 459 460#define bs_wm_8_proto(f) \ 461void __bs_c(f,_bs_wm_8) (void *t, bus_space_handle_t bsh, \ 462 bus_size_t offset, const u_int64_t *addr, bus_size_t count); 463 464#define bs_rr_1_proto(f) \ 465void __bs_c(f, _bs_rr_1) (void *t, bus_space_handle_t bsh, \ 466 bus_size_t offset, u_int8_t *addr, bus_size_t count); 467 468#define bs_rr_2_proto(f) \ 469void __bs_c(f, _bs_rr_2) (void *t, bus_space_handle_t bsh, \ 470 bus_size_t offset, u_int16_t *addr, bus_size_t count); 471 472#define bs_rr_4_proto(f) \ 473void __bs_c(f, _bs_rr_4) (void *t, bus_space_handle_t bsh, \ 474 bus_size_t offset, u_int32_t *addr, bus_size_t count); 475 476#define bs_rr_8_proto(f) \ 477void __bs_c(f, _bs_rr_8) (void *t, bus_space_handle_t bsh, \ 478 bus_size_t offset, u_int64_t *addr, bus_size_t count); 479 480#define bs_wr_1_proto(f) \ 481void __bs_c(f, _bs_wr_1) (void *t, bus_space_handle_t bsh, \ 482 bus_size_t offset, const u_int8_t *addr, bus_size_t count); 483 484#define bs_wr_2_proto(f) \ 485void __bs_c(f, _bs_wr_2) (void *t, bus_space_handle_t bsh, \ 486 bus_size_t offset, const u_int16_t *addr, bus_size_t count); 487 488#define bs_wr_4_proto(f) \ 489void __bs_c(f, _bs_wr_4) (void *t, bus_space_handle_t bsh, \ 490 bus_size_t offset, const u_int32_t *addr, bus_size_t count); 491 492#define bs_wr_8_proto(f) \ 493void __bs_c(f, _bs_wr_8) (void *t, bus_space_handle_t bsh, \ 494 bus_size_t offset, const u_int64_t *addr, bus_size_t count); 495 496#define bs_sm_1_proto(f) \ 497void __bs_c(f,_bs_sm_1) (void *t, bus_space_handle_t bsh, \ 498 bus_size_t offset, u_int8_t value, bus_size_t count); 499 500#define bs_sm_2_proto(f) \ 501void __bs_c(f,_bs_sm_2) (void *t, bus_space_handle_t bsh, \ 502 bus_size_t offset, u_int16_t value, bus_size_t count); 503 504#define bs_sm_4_proto(f) \ 505void __bs_c(f,_bs_sm_4) (void *t, bus_space_handle_t bsh, \ 506 bus_size_t offset, u_int32_t value, bus_size_t count); 507 508#define bs_sm_8_proto(f) \ 509void __bs_c(f,_bs_sm_8) (void *t, bus_space_handle_t bsh, \ 510 bus_size_t offset, u_int64_t value, bus_size_t count); 511 512#define bs_sr_1_proto(f) \ 513void __bs_c(f,_bs_sr_1) (void *t, bus_space_handle_t bsh, \ 514 bus_size_t offset, u_int8_t value, bus_size_t count); 515 516#define bs_sr_2_proto(f) \ 517void __bs_c(f,_bs_sr_2) (void *t, bus_space_handle_t bsh, \ 518 bus_size_t offset, u_int16_t value, bus_size_t count); 519 520#define bs_sr_4_proto(f) \ 521void __bs_c(f,_bs_sr_4) (void *t, bus_space_handle_t bsh, \ 522 bus_size_t offset, u_int32_t value, bus_size_t count); 523 524#define bs_sr_8_proto(f) \ 525void __bs_c(f,_bs_sr_8) (void *t, bus_space_handle_t bsh, \ 526 bus_size_t offset, u_int64_t value, bus_size_t count); 527 528#define bs_c_1_proto(f) \ 529void __bs_c(f,_bs_c_1) (void *t, bus_space_handle_t bsh1, \ 530 bus_size_t offset1, bus_space_handle_t bsh2, \ 531 bus_size_t offset2, bus_size_t count); 532 533#define bs_c_2_proto(f) \ 534void __bs_c(f,_bs_c_2) (void *t, bus_space_handle_t bsh1, \ 535 bus_size_t offset1, bus_space_handle_t bsh2, \ 536 bus_size_t offset2, bus_size_t count); 537 538#define bs_c_4_proto(f) \ 539void __bs_c(f,_bs_c_4) (void *t, bus_space_handle_t bsh1, \ 540 bus_size_t offset1, bus_space_handle_t bsh2, \ 541 bus_size_t offset2, bus_size_t count); 542 543#define bs_c_8_proto(f) \ 544void __bs_c(f,_bs_c_8) (void *t, bus_space_handle_t bsh1, \ 545 bus_size_t offset1, bus_space_handle_t bsh2, \ 546 bus_size_t offset2, bus_size_t count); 547 548#define bs_protos(f) \ 549bs_map_proto(f); \ 550bs_unmap_proto(f); \ 551bs_subregion_proto(f); \ 552bs_alloc_proto(f); \ 553bs_free_proto(f); \ 554bs_mmap_proto(f); \ 555bs_barrier_proto(f); \ 556bs_r_1_proto(f); \ 557bs_r_2_proto(f); \ 558bs_r_4_proto(f); \ 559bs_r_8_proto(f); \ 560bs_w_1_proto(f); \ 561bs_w_2_proto(f); \ 562bs_w_4_proto(f); \ 563bs_w_8_proto(f); \ 564bs_rm_1_proto(f); \ 565bs_rm_2_proto(f); \ 566bs_rm_4_proto(f); \ 567bs_rm_8_proto(f); \ 568bs_wm_1_proto(f); \ 569bs_wm_2_proto(f); \ 570bs_wm_4_proto(f); \ 571bs_wm_8_proto(f); \ 572bs_rr_1_proto(f); \ 573bs_rr_2_proto(f); \ 574bs_rr_4_proto(f); \ 575bs_rr_8_proto(f); \ 576bs_wr_1_proto(f); \ 577bs_wr_2_proto(f); \ 578bs_wr_4_proto(f); \ 579bs_wr_8_proto(f); \ 580bs_sm_1_proto(f); \ 581bs_sm_2_proto(f); \ 582bs_sm_4_proto(f); \ 583bs_sm_8_proto(f); \ 584bs_sr_1_proto(f); \ 585bs_sr_2_proto(f); \ 586bs_sr_4_proto(f); \ 587bs_sr_8_proto(f); \ 588bs_c_1_proto(f); \ 589bs_c_2_proto(f); \ 590bs_c_4_proto(f); \ 591bs_c_8_proto(f); 592 593#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 594 595/* Bus Space DMA macros */ 596 597/* 598 * Flags used in various bus DMA methods. 599 */ 600#define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 601#define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 602#define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 603#define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 604#define BUS_DMA_ZERO 0x008 /* hint: sequential, unidirectional */ 605#define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 606#define BUS_DMA_BUS2 0x020 607#define BUS_DMA_BUS3 0x040 608#define BUS_DMA_BUS4 0x080 609 610/* Forwards needed by prototypes below. */ 611struct mbuf; 612struct uio; 613 614/* 615 * Operations performed by bus_dmamap_sync(). 616 */ 617#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 618#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 619#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 620#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 621 622typedef struct bus_dma_tag *bus_dma_tag_t; 623typedef struct bus_dmamap *bus_dmamap_t; 624 625#define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 626 627/* 628 * bus_dma_segment_t 629 * 630 * Describes a single contiguous DMA transaction. Values 631 * are suitable for programming into DMA registers. 632 */ 633struct bus_dma_segment { 634 /* 635 * PUBLIC MEMBERS: these are used by machine-independent code. 636 */ 637 bus_addr_t ds_addr; /* DMA address */ 638 bus_size_t ds_len; /* length of transfer */ 639}; 640typedef struct bus_dma_segment bus_dma_segment_t; 641 642/* 643 * arm32_dma_range 644 * 645 * This structure describes a valid DMA range. 646 */ 647struct arm32_dma_range { 648 bus_addr_t dr_sysbase; /* system base address */ 649 bus_addr_t dr_busbase; /* appears here on bus */ 650 bus_size_t dr_len; /* length of range */ 651}; 652 653/* 654 * bus_dma_tag_t 655 * 656 * A machine-dependent opaque type describing the implementation of 657 * DMA for a given bus. 658 */ 659 660typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int); 661typedef int bus_dmasync_op_t; 662typedef void bus_dmamap_callback2_t(void *, bus_dma_segment_t *, int, bus_size_t, int); 663 664 665#ifdef _ARM32_BUS_DMA_PRIVATE 666 667/* _dm_buftype */ 668#define ARM32_BUFTYPE_INVALID 0 669#define ARM32_BUFTYPE_LINEAR 1 670#define ARM32_BUFTYPE_MBUF 2 671#define ARM32_BUFTYPE_UIO 3 672#define ARM32_BUFTYPE_RAW 4 673 674struct arm32_dma_range *bus_dma_get_range(void); 675int bus_dma_get_range_nb(void); 676#endif /* _ARM32_BUS_DMA_PRIVATE */ 677 678/* 679 * A function that returns 1 if the address cannot be accessed by 680 * a device and 0 if it can be. 681 */ 682typedef int bus_dma_filter_t(void *, bus_addr_t); 683 684/* 685 * A function that performs driver-specific syncronization on behalf of 686 * busdma. 687 */ 688typedef enum { 689 BUS_DMA_LOCK = 0x01, 690 BUS_DMA_UNLOCK = 0x02, 691} bus_dma_lock_op_t; 692 693typedef void bus_dma_lock_t(void *, bus_dma_lock_op_t); 694 695/* 696 * Allocate a device specific dma_tag encapsulating the constraints of 697 * the parent tag in addition to other restrictions specified: 698 * 699 * alignment: alignment for segments. 700 * boundary: Boundary that segments cannot cross. 701 * lowaddr: Low restricted address that cannot appear in a mapping. 702 * highaddr: High restricted address that cannot appear in a mapping. 703 * filtfunc: An optional function to further test if an address 704 * within the range of lowaddr and highaddr cannot appear 705 * in a mapping. 706 * filtfuncarg: An argument that will be passed to filtfunc in addition 707 * to the address to test. 708 * maxsize: Maximum mapping size supported by this tag. 709 * nsegments: Number of discontinuities allowed in maps. 710 * maxsegsz: Maximum size of a segment in the map. 711 * flags: Bus DMA flags. 712 * dmat: A pointer to set to a valid dma tag should the return 713 * value of this function indicate success. 714 */ 715int bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, 716 bus_size_t boundary, bus_addr_t lowaddr, 717 bus_addr_t highaddr, bus_dma_filter_t *filtfunc, 718 void *filtfuncarg, bus_size_t maxsize, int nsegments, 719 bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, 720 void *lockfuncarg, bus_dma_tag_t *dmat); 721 722int bus_dma_tag_destroy(bus_dma_tag_t dmat); 723 724int bus_dmamap_create (bus_dma_tag_t, int, bus_dmamap_t *); 725int bus_dmamap_destroy (bus_dma_tag_t, bus_dmamap_t); 726int bus_dmamap_load (bus_dma_tag_t, bus_dmamap_t, void *, 727 bus_size_t, bus_dmamap_callback_t *, void *, int); 728int bus_dmamap_load_mbuf (bus_dma_tag_t, bus_dmamap_t, 729 struct mbuf *, bus_dmamap_callback2_t *, void *, int); 730int bus_dmamap_load_uio (bus_dma_tag_t, bus_dmamap_t, 731 struct uio *, bus_dmamap_callback2_t *, void *, int); 732void bus_dmamap_unload (bus_dma_tag_t, bus_dmamap_t); 733void bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t); 734 735int bus_dmamem_alloc (bus_dma_tag_t tag, void **vaddr, int flag, 736 bus_dmamap_t *mapp); 737void bus_dmamem_free (bus_dma_tag_t tag, void *vaddr, bus_dmamap_t map); 738 739/* 740 * Generic helper function for manipulating mutexes. 741 */ 742void busdma_lock_mutex(void *arg, bus_dma_lock_op_t op); 743 744#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF 745#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF 746#define BUS_SPACE_MAXADDR 0xFFFFFFFF 747#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF 748#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF 749#define BUS_SPACE_MAXSIZE 0xFFFFFFFF 750 751/* XXX: is this right ? */ 752#define bus_space_read_stream_1(t, h, o) bus_space_read_1((t), (h), (o)) 753#define bus_space_read_stream_2(t, h, o) bus_space_read_2((t), (h), (o)) 754#define bus_space_read_stream_4(t, h, o) bus_space_read_4((t), (h), (o)) 755 756#define bus_space_read_multi_stream_1(t, h, o, a, c) \ 757 bus_space_read_multi_1((t), (h), (o), (a), (c)) 758#define bus_space_read_multi_stream_2(t, h, o, a, c) \ 759 bus_space_read_multi_2((t), (h), (o), (a), (c)) 760#define bus_space_read_multi_stream_4(t, h, o, a, c) \ 761 bus_space_read_multi_4((t), (h), (o), (a), (c)) 762 763#define bus_space_write_stream_1(t, h, o, v) \ 764 bus_space_write_1((t), (h), (o), (v)) 765#define bus_space_write_stream_2(t, h, o, v) \ 766 bus_space_write_2((t), (h), (o), (v)) 767#define bus_space_write_stream_4(t, h, o, v) \ 768 bus_space_write_4((t), (h), (o), (v)) 769 770#define bus_space_write_multi_stream_1(t, h, o, a, c) \ 771 bus_space_write_multi_1((t), (h), (o), (a), (c)) 772#define bus_space_write_multi_stream_2(t, h, o, a, c) \ 773 bus_space_write_multi_2((t), (h), (o), (a), (c)) 774#define bus_space_write_multi_stream_4(t, h, o, a, c) \ 775 bus_space_write_multi_4((t), (h), (o), (a), (c)) 776 777 778#endif /* _MACHINE_BUS_H_ */ 779