atomic.h revision 147555
1/* $NetBSD: atomic.h,v 1.1 2002/10/19 12:22:34 bsh Exp $ */
2
3/*-
4 * Copyright (C) 2003-2004 Olivier Houchard
5 * Copyright (C) 1994-1997 Mark Brinicombe
6 * Copyright (C) 1994 Brini
7 * All rights reserved.
8 *
9 * This code is derived from software written for Brini by Mark Brinicombe
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *	This product includes software developed by Brini.
22 * 4. The name of Brini may not be used to endorse or promote products
23 *    derived from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR
26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
31 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
33 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
34 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * $FreeBSD: head/sys/arm/include/atomic.h 147555 2005-06-23 21:54:17Z jhb $
37 */
38
39#ifndef	_MACHINE_ATOMIC_H_
40#define	_MACHINE_ATOMIC_H_
41
42
43
44#ifndef _LOCORE
45
46#include <sys/types.h>
47
48#ifndef I32_bit
49#define I32_bit (1 << 7)        /* IRQ disable */
50#endif
51#ifndef F32_bit
52#define F32_bit (1 << 6)        /* FIQ disable */
53#endif
54
55#define __with_interrupts_disabled(expr) \
56	do {						\
57		u_int cpsr_save, tmp;			\
58							\
59		__asm __volatile(			\
60			"mrs  %0, cpsr;"		\
61			"orr  %1, %0, %2;"		\
62			"msr  cpsr_all, %1;"		\
63			: "=r" (cpsr_save), "=r" (tmp)	\
64			: "I" (I32_bit)		\
65		        : "cc" );		\
66		(expr);				\
67		 __asm __volatile(		\
68			"msr  cpsr_all, %0"	\
69			: /* no output */	\
70			: "r" (cpsr_save)	\
71			: "cc" );		\
72	} while(0)
73
74#define ARM_RAS_START	0xe0000004
75#define ARM_RAS_END	0xe0000008
76
77static __inline uint32_t
78__swp(uint32_t val, volatile uint32_t *ptr)
79{
80	__asm __volatile("swp	%0, %1, [%2]"
81	    : "=&r" (val) : "r" (val) , "r" (ptr) : "memory");
82	return (val);
83}
84
85
86#ifdef _KERNEL
87static __inline void
88atomic_set_32(volatile uint32_t *address, uint32_t setmask)
89{
90	__with_interrupts_disabled(*address |= setmask);
91}
92
93static __inline void
94atomic_clear_32(volatile uint32_t *address, uint32_t clearmask)
95{
96	__with_interrupts_disabled(*address &= ~clearmask);
97}
98
99static __inline u_int32_t
100atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval)
101{
102	int ret;
103
104	__with_interrupts_disabled(
105	 {
106	    	if (*p == cmpval) {
107			*p = newval;
108			ret = 1;
109		} else {
110			ret = 0;
111		}
112	});
113	return (ret);
114}
115
116static __inline void
117atomic_add_32(volatile u_int32_t *p, u_int32_t val)
118{
119	__with_interrupts_disabled(*p += val);
120}
121
122static __inline void
123atomic_subtract_32(volatile u_int32_t *p, u_int32_t val)
124{
125	__with_interrupts_disabled(*p -= val);
126}
127
128#else /* !_KERNEL */
129
130static __inline u_int32_t
131atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval)
132{
133	register int done, ras_start;
134
135	__asm __volatile("1:\n"
136	    "mov	%0, #0xe0000008\n"
137	    "adr	%1, 2f\n"
138	    "str	%1, [%0]\n"
139	    "adr	%1, 1b\n"
140	    "mov	%0, #0xe0000004\n"
141	    "str	%1, [%0]\n"
142	    "ldr	%1, [%2]\n"
143	    "cmp	%1, %3\n"
144	    "streq	%4, [%2]\n"
145	    "2:\n"
146	    "mov	%1, #0\n"
147	    "str	%1, [%0]\n"
148	    "moveq	%1, #1\n"
149	    "movne	%1, #0\n"
150	    : "=r" (ras_start), "=r" (done)
151	    ,"+r" (p), "+r" (cmpval), "+r" (newval));
152	return (done);
153}
154
155static __inline void
156atomic_add_32(volatile u_int32_t *p, u_int32_t val)
157{
158	int ras_start, start;
159
160	__asm __volatile("1:\n"
161	    "mov	%0, #0xe0000008\n"
162	    "adr	%1, 2f\n"
163	    "str	%1, [%0]\n"
164	    "adr	%1, 1b\n"
165	    "mov	%0, #0xe0000004\n"
166	    "str	%1, [%0]\n"
167	    "ldr	%1, [%2]\n"
168	    "add	%1, %1, %3\n"
169	    "str	%1, [%2]\n"
170	    "2:\n"
171	    "mov	%1, #0\n"
172	    "str	%1, [%0]\n"
173	    : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (val));
174}
175
176static __inline void
177atomic_subtract_32(volatile u_int32_t *p, u_int32_t val)
178{
179	int ras_start, start;
180
181	__asm __volatile("1:\n"
182	    "mov	%0, #0xe0000008\n"
183	    "adr	%1, 2f\n"
184	    "str	%1, [%0]\n"
185	    "adr	%1, 1b\n"
186	    "mov	%0, #0xe0000004\n"
187	    "str	%1, [%0]\n"
188	    "ldr	%1, [%2]\n"
189	    "sub	%1, %1, %3\n"
190	    "str	%1, [%2]\n"
191	    "2:\n"
192	    "mov	%1, #0\n"
193	    "str	%1, [%0]\n"
194
195	    : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (val));
196}
197
198static __inline void
199atomic_set_32(volatile uint32_t *address, uint32_t setmask)
200{
201	int ras_start, start;
202
203	__asm __volatile("1:\n"
204	    "mov	%0, #0xe0000008\n"
205	    "adr	%1, 2f\n"
206	    "str	%1, [%0]\n"
207	    "adr	%1, 1b\n"
208	    "mov	%0, #0xe0000004\n"
209	    "str	%1, [%0]\n"
210	    "ldr	%1, [%2]\n"
211	    "orr	%1, %1, %3\n"
212	    "str	%1, [%2]\n"
213	    "2:\n"
214	    "mov	%1, #0\n"
215	    "str	%1, [%0]\n"
216
217	    : "=r" (ras_start), "=r" (start), "+r" (address), "+r" (setmask));
218}
219
220static __inline void
221atomic_clear_32(volatile uint32_t *address, uint32_t clearmask)
222{
223	int ras_start, start;
224
225	__asm __volatile("1:\n"
226	    "mov	%0, #0xe0000008\n"
227	    "adr	%1, 2f\n"
228	    "str	%1, [%0]\n"
229	    "adr	%1, 1b\n"
230	    "mov	%0, #0xe0000004\n"
231	    "str	%1, [%0]\n"
232	    "ldr	%1, [%2]\n"
233	    "bic	%1, %1, %3\n"
234	    "str	%1, [%2]\n"
235	    "2:\n"
236	    "mov	%1, #0\n"
237	    "str	%1, [%0]\n"
238	    : "=r" (ras_start), "=r" (start), "+r" (address), "+r" (clearmask));
239
240}
241#endif /* _KERNEL */
242
243static __inline int
244atomic_load_32(volatile uint32_t *v)
245{
246
247	return (*v);
248}
249
250static __inline void
251atomic_store_32(volatile uint32_t *dst, uint32_t src)
252{
253	*dst = src;
254}
255
256static __inline uint32_t
257atomic_readandclear_32(volatile u_int32_t *p)
258{
259
260	return (__swp(0, p));
261}
262
263#undef __with_interrupts_disabled
264
265#endif /* _LOCORE */
266
267
268#define atomic_set_rel_int		atomic_set_32
269#define atomic_set_int			atomic_set_32
270#define atomic_readandclear_int		atomic_readandclear_32
271#define atomic_clear_int		atomic_clear_32
272#define atomic_subtract_int		atomic_subtract_32
273#define atomic_subtract_rel_int		atomic_subtract_32
274#define atomic_subtract_acq_int		atomic_subtract_32
275#define atomic_add_int			atomic_add_32
276#define atomic_add_rel_int		atomic_add_32
277#define atomic_add_acq_int		atomic_add_32
278#define atomic_cmpset_int		atomic_cmpset_32
279#define atomic_cmpset_rel_int		atomic_cmpset_32
280#define atomic_cmpset_rel_ptr		atomic_cmpset_ptr
281#define atomic_cmpset_acq_int		atomic_cmpset_32
282#define atomic_cmpset_acq_ptr		atomic_cmpset_ptr
283#define atomic_store_rel_ptr		atomic_store_ptr
284#define atomic_store_rel_int		atomic_store_32
285#define atomic_cmpset_rel_32		atomic_cmpset_32
286#define atomic_cmpset_rel_ptr		atomic_cmpset_ptr
287#define atomic_load_acq_int		atomic_load_32
288#define atomic_clear_ptr(ptr, bit)	atomic_clear_32( \
289    (volatile uint32_t *)ptr, (uint32_t)bit)
290#define atomic_store_ptr(ptr, bit)	atomic_store_32( \
291    (volatile uint32_t *)ptr, (uint32_t)bit)
292#define atomic_cmpset_ptr(dst, exp, s)	atomic_cmpset_32( \
293    (volatile uint32_t *)dst, (uint32_t)exp, (uint32_t)s)
294#define atomic_set_ptr(ptr, src)	atomic_set_32( \
295    (volatile uint32_t *)ptr,  (uint32_t)src)
296
297#endif /* _MACHINE_ATOMIC_H_ */
298