atomic.h revision 137282
1/* $NetBSD: atomic.h,v 1.1 2002/10/19 12:22:34 bsh Exp $ */ 2 3/* 4 * Copyright (C) 2003-2004 Olivier Houchard 5 * Copyright (C) 1994-1997 Mark Brinicombe 6 * Copyright (C) 1994 Brini 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Brini. 22 * 4. The name of Brini may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 31 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 33 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 34 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * $FreeBSD: head/sys/arm/include/atomic.h 137282 2004-11-05 23:48:12Z cognet $ 37 */ 38 39#ifndef _MACHINE_ATOMIC_H_ 40#define _MACHINE_ATOMIC_H_ 41 42 43 44#ifndef _LOCORE 45 46#include <sys/types.h> 47 48#ifndef I32_bit 49#define I32_bit (1 << 7) /* IRQ disable */ 50#endif 51#ifndef F32_bit 52#define F32_bit (1 << 6) /* FIQ disable */ 53#endif 54 55#define __with_interrupts_disabled(expr) \ 56 do { \ 57 u_int cpsr_save, tmp; \ 58 \ 59 __asm __volatile( \ 60 "mrs %0, cpsr;" \ 61 "orr %1, %0, %2;" \ 62 "msr cpsr_all, %1;" \ 63 : "=r" (cpsr_save), "=r" (tmp) \ 64 : "I" (I32_bit) \ 65 : "cc" ); \ 66 (expr); \ 67 __asm __volatile( \ 68 "msr cpsr_all, %0" \ 69 : /* no output */ \ 70 : "r" (cpsr_save) \ 71 : "cc" ); \ 72 } while(0) 73 74static __inline uint32_t 75__swp(uint32_t val, volatile uint32_t *ptr) 76{ 77 __asm __volatile("swp %0, %1, [%2]" 78 : "=r" (val) : "r" (val) , "r" (ptr) : "memory"); 79 return (val); 80} 81 82 83#define atomic_op(v, op, p) ({ \ 84 uint32_t e, r, s; \ 85 for (e = *(volatile uint32_t *)p;; e = r) { \ 86 s = e op v; \ 87 r = __swp(s, p); \ 88 if (r == e) \ 89 break; \ 90 } \ 91 e; \ 92}) 93static __inline void 94atomic_set_32(volatile uint32_t *address, uint32_t setmask) 95{ 96 atomic_op(setmask, |, address); 97} 98 99static __inline void 100atomic_clear_32(volatile uint32_t *address, uint32_t clearmask) 101{ 102 atomic_op(clearmask, &~, address); 103} 104 105static __inline int 106atomic_load_32(volatile uint32_t *v) 107{ 108 109 return (atomic_op(0, +, v)); 110} 111 112static __inline void 113atomic_store_32(volatile uint32_t *dst, uint32_t src) 114{ 115 __swp(src, dst); 116} 117 118static __inline uint32_t 119atomic_readandclear_32(volatile u_int32_t *p) 120{ 121 122 return (__swp(0, p)); 123} 124 125#ifdef _KERNEL 126static __inline u_int32_t 127atomic_cmpset_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval) 128{ 129 int done; 130 131 __with_interrupts_disabled( 132 { 133 if (*p == cmpval) { 134 *p = newval; 135 done = 1; 136 } else 137 done = 0; 138 }); 139 return (done); 140} 141#endif 142 143static __inline void 144atomic_add_32(volatile u_int32_t *p, u_int32_t val) 145{ 146 atomic_op(val, +, p); 147} 148 149static __inline void 150atomic_subtract_32(volatile u_int32_t *p, u_int32_t val) 151{ 152 atomic_op(val, -, p); 153} 154 155#undef __with_interrupts_disabled 156 157#endif /* _LOCORE */ 158 159 160#define atomic_set_rel_int atomic_set_32 161#define atomic_set_int atomic_set_32 162#define atomic_readandclear_int atomic_readandclear_32 163#define atomic_clear_int atomic_clear_32 164#define atomic_subtract_int atomic_subtract_32 165#define atomic_subtract_rel_int atomic_subtract_32 166#define atomic_subtract_acq_int atomic_subtract_32 167#define atomic_add_int atomic_add_32 168#define atomic_add_rel_int atomic_add_32 169#define atomic_add_acq_int atomic_add_32 170#define atomic_cmpset_int atomic_cmpset_32 171#define atomic_cmpset_rel_int atomic_cmpset_32 172#define atomic_cmpset_rel_ptr atomic_cmpset_ptr 173#define atomic_cmpset_acq_int atomic_cmpset_32 174#define atomic_cmpset_acq_ptr atomic_cmpset_ptr 175#define atomic_store_rel_ptr atomic_store_ptr 176#define atomic_store_rel_int atomic_store_32 177#define atomic_cmpset_rel_32 atomic_cmpset_32 178#define atomic_smpset_rel_ptr atomic_cmpset_ptr 179#define atomic_load_acq_int atomic_load_32 180#define atomic_clear_ptr(ptr, bit) atomic_clear_32( \ 181 (volatile uint32_t *)ptr, (uint32_t)bit) 182#define atomic_store_ptr(ptr, bit) atomic_store_32( \ 183 (volatile uint32_t *)ptr, (uint32_t)bit) 184#define atomic_cmpset_ptr(dst, exp, s) atomic_cmpset_32( \ 185 (volatile uint32_t *)dst, (uint32_t)exp, (uint32_t)s) 186#define atomic_set_ptr(ptr, src) atomic_set_32( \ 187 (volatile uint32_t *)ptr, (uint32_t)src) 188 189#endif /* _MACHINE_ATOMIC_H_ */ 190