atomic-v6.h revision 236992
1/* $NetBSD: atomic.h,v 1.1 2002/10/19 12:22:34 bsh Exp $ */ 2 3/*- 4 * Copyright (C) 2003-2004 Olivier Houchard 5 * Copyright (C) 1994-1997 Mark Brinicombe 6 * Copyright (C) 1994 Brini 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Brini. 22 * 4. The name of Brini may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 31 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 33 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 34 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * $FreeBSD: head/sys/arm/include/atomic.h 236992 2012-06-13 05:02:51Z imp $ 37 */ 38 39#ifndef _MACHINE_ATOMIC_H_ 40#define _MACHINE_ATOMIC_H_ 41 42#ifndef _LOCORE 43 44#include <sys/types.h> 45 46#ifndef _KERNEL 47#include <machine/sysarch.h> 48#endif 49 50#define mb() 51#define wmb() 52#define rmb() 53 54#ifndef I32_bit 55#define I32_bit (1 << 7) /* IRQ disable */ 56#endif 57#ifndef F32_bit 58#define F32_bit (1 << 6) /* FIQ disable */ 59#endif 60 61#define __with_interrupts_disabled(expr) \ 62 do { \ 63 u_int cpsr_save, tmp; \ 64 \ 65 __asm __volatile( \ 66 "mrs %0, cpsr;" \ 67 "orr %1, %0, %2;" \ 68 "msr cpsr_all, %1;" \ 69 : "=r" (cpsr_save), "=r" (tmp) \ 70 : "I" (I32_bit | F32_bit) \ 71 : "cc" ); \ 72 (expr); \ 73 __asm __volatile( \ 74 "msr cpsr_all, %0" \ 75 : /* no output */ \ 76 : "r" (cpsr_save) \ 77 : "cc" ); \ 78 } while(0) 79 80static __inline uint32_t 81__swp(uint32_t val, volatile uint32_t *ptr) 82{ 83 __asm __volatile("swp %0, %2, [%3]" 84 : "=&r" (val), "=m" (*ptr) 85 : "r" (val), "r" (ptr), "m" (*ptr) 86 : "memory"); 87 return (val); 88} 89 90 91#ifdef _KERNEL 92static __inline void 93atomic_set_32(volatile uint32_t *address, uint32_t setmask) 94{ 95 __with_interrupts_disabled(*address |= setmask); 96} 97 98static __inline void 99atomic_clear_32(volatile uint32_t *address, uint32_t clearmask) 100{ 101 __with_interrupts_disabled(*address &= ~clearmask); 102} 103 104static __inline u_int32_t 105atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval) 106{ 107 int ret; 108 109 __with_interrupts_disabled( 110 { 111 if (*p == cmpval) { 112 *p = newval; 113 ret = 1; 114 } else { 115 ret = 0; 116 } 117 }); 118 return (ret); 119} 120 121static __inline void 122atomic_add_32(volatile u_int32_t *p, u_int32_t val) 123{ 124 __with_interrupts_disabled(*p += val); 125} 126 127static __inline void 128atomic_subtract_32(volatile u_int32_t *p, u_int32_t val) 129{ 130 __with_interrupts_disabled(*p -= val); 131} 132 133static __inline uint32_t 134atomic_fetchadd_32(volatile uint32_t *p, uint32_t v) 135{ 136 uint32_t value; 137 138 __with_interrupts_disabled( 139 { 140 value = *p; 141 *p += v; 142 }); 143 return (value); 144} 145 146#else /* !_KERNEL */ 147 148static __inline u_int32_t 149atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval) 150{ 151 register int done, ras_start = ARM_RAS_START; 152 153 __asm __volatile("1:\n" 154 "adr %1, 1b\n" 155 "str %1, [%0]\n" 156 "adr %1, 2f\n" 157 "str %1, [%0, #4]\n" 158 "ldr %1, [%2]\n" 159 "cmp %1, %3\n" 160 "streq %4, [%2]\n" 161 "2:\n" 162 "mov %1, #0\n" 163 "str %1, [%0]\n" 164 "mov %1, #0xffffffff\n" 165 "str %1, [%0, #4]\n" 166 "moveq %1, #1\n" 167 "movne %1, #0\n" 168 : "+r" (ras_start), "=r" (done) 169 ,"+r" (p), "+r" (cmpval), "+r" (newval) : : "memory"); 170 return (done); 171} 172 173static __inline void 174atomic_add_32(volatile u_int32_t *p, u_int32_t val) 175{ 176 int start, ras_start = ARM_RAS_START; 177 178 __asm __volatile("1:\n" 179 "adr %1, 1b\n" 180 "str %1, [%0]\n" 181 "adr %1, 2f\n" 182 "str %1, [%0, #4]\n" 183 "ldr %1, [%2]\n" 184 "add %1, %1, %3\n" 185 "str %1, [%2]\n" 186 "2:\n" 187 "mov %1, #0\n" 188 "str %1, [%0]\n" 189 "mov %1, #0xffffffff\n" 190 "str %1, [%0, #4]\n" 191 : "+r" (ras_start), "=r" (start), "+r" (p), "+r" (val) 192 : : "memory"); 193} 194 195static __inline void 196atomic_subtract_32(volatile u_int32_t *p, u_int32_t val) 197{ 198 int start, ras_start = ARM_RAS_START; 199 200 __asm __volatile("1:\n" 201 "adr %1, 1b\n" 202 "str %1, [%0]\n" 203 "adr %1, 2f\n" 204 "str %1, [%0, #4]\n" 205 "ldr %1, [%2]\n" 206 "sub %1, %1, %3\n" 207 "str %1, [%2]\n" 208 "2:\n" 209 "mov %1, #0\n" 210 "str %1, [%0]\n" 211 "mov %1, #0xffffffff\n" 212 "str %1, [%0, #4]\n" 213 214 : "+r" (ras_start), "=r" (start), "+r" (p), "+r" (val) 215 : : "memory"); 216} 217 218static __inline void 219atomic_set_32(volatile uint32_t *address, uint32_t setmask) 220{ 221 int start, ras_start = ARM_RAS_START; 222 223 __asm __volatile("1:\n" 224 "adr %1, 1b\n" 225 "str %1, [%0]\n" 226 "adr %1, 2f\n" 227 "str %1, [%0, #4]\n" 228 "ldr %1, [%2]\n" 229 "orr %1, %1, %3\n" 230 "str %1, [%2]\n" 231 "2:\n" 232 "mov %1, #0\n" 233 "str %1, [%0]\n" 234 "mov %1, #0xffffffff\n" 235 "str %1, [%0, #4]\n" 236 237 : "+r" (ras_start), "=r" (start), "+r" (address), "+r" (setmask) 238 : : "memory"); 239} 240 241static __inline void 242atomic_clear_32(volatile uint32_t *address, uint32_t clearmask) 243{ 244 int start, ras_start = ARM_RAS_START; 245 246 __asm __volatile("1:\n" 247 "adr %1, 1b\n" 248 "str %1, [%0]\n" 249 "adr %1, 2f\n" 250 "str %1, [%0, #4]\n" 251 "ldr %1, [%2]\n" 252 "bic %1, %1, %3\n" 253 "str %1, [%2]\n" 254 "2:\n" 255 "mov %1, #0\n" 256 "str %1, [%0]\n" 257 "mov %1, #0xffffffff\n" 258 "str %1, [%0, #4]\n" 259 : "+r" (ras_start), "=r" (start), "+r" (address), "+r" (clearmask) 260 : : "memory"); 261 262} 263 264static __inline uint32_t 265atomic_fetchadd_32(volatile uint32_t *p, uint32_t v) 266{ 267 uint32_t start, tmp, ras_start = ARM_RAS_START; 268 269 __asm __volatile("1:\n" 270 "adr %1, 1b\n" 271 "str %1, [%0]\n" 272 "adr %1, 2f\n" 273 "str %1, [%0, #4]\n" 274 "ldr %1, [%3]\n" 275 "mov %2, %1\n" 276 "add %2, %2, %4\n" 277 "str %2, [%3]\n" 278 "2:\n" 279 "mov %2, #0\n" 280 "str %2, [%0]\n" 281 "mov %2, #0xffffffff\n" 282 "str %2, [%0, #4]\n" 283 : "+r" (ras_start), "=r" (start), "=r" (tmp), "+r" (p), "+r" (v) 284 : : "memory"); 285 return (start); 286} 287 288#endif /* _KERNEL */ 289 290static __inline int 291atomic_load_32(volatile uint32_t *v) 292{ 293 294 return (*v); 295} 296 297static __inline void 298atomic_store_32(volatile uint32_t *dst, uint32_t src) 299{ 300 *dst = src; 301} 302 303static __inline uint32_t 304atomic_readandclear_32(volatile u_int32_t *p) 305{ 306 307 return (__swp(0, p)); 308} 309 310#undef __with_interrupts_disabled 311 312#endif /* _LOCORE */ 313 314#define atomic_add_long(p, v) \ 315 atomic_add_32((volatile u_int *)(p), (u_int)(v)) 316#define atomic_add_acq_long atomic_add_long 317#define atomic_add_rel_long atomic_add_long 318#define atomic_subtract_long(p, v) \ 319 atomic_subtract_32((volatile u_int *)(p), (u_int)(v)) 320#define atomic_subtract_acq_long atomic_subtract_long 321#define atomic_subtract_rel_long atomic_subtract_long 322#define atomic_clear_long(p, v) \ 323 atomic_clear_32((volatile u_int *)(p), (u_int)(v)) 324#define atomic_clear_acq_long atomic_clear_long 325#define atomic_clear_rel_long atomic_clear_long 326#define atomic_set_long(p, v) \ 327 atomic_set_32((volatile u_int *)(p), (u_int)(v)) 328#define atomic_set_acq_long atomic_set_long 329#define atomic_set_rel_long atomic_set_long 330#define atomic_cmpset_long(dst, old, new) \ 331 atomic_cmpset_32((volatile u_int *)(dst), (u_int)(old), (u_int)(new)) 332#define atomic_cmpset_acq_long atomic_cmpset_long 333#define atomic_cmpset_rel_long atomic_cmpset_long 334#define atomic_fetchadd_long(p, v) \ 335 atomic_fetchadd_32((volatile u_int *)(p), (u_int)(v)) 336#define atomic_readandclear_long(p) \ 337 atomic_readandclear_long((volatile u_int *)(p)) 338#define atomic_load_long(p) \ 339 atomic_load_32((volatile u_int *)(p)) 340#define atomic_load_acq_long atomic_load_long 341#define atomic_store_rel_long(p, v) \ 342 atomic_store_rel_32((volatile u_int *)(p), (u_int)(v)) 343 344 345#define atomic_clear_ptr atomic_clear_32 346#define atomic_set_ptr atomic_set_32 347#define atomic_cmpset_ptr(dst, old, new) \ 348 atomic_cmpset_32((volatile u_int *)(dst), (u_int)(old), (u_int)(new)) 349#define atomic_cmpset_rel_ptr atomic_cmpset_ptr 350#define atomic_cmpset_acq_ptr atomic_cmpset_ptr 351#define atomic_store_ptr atomic_store_32 352#define atomic_store_rel_ptr atomic_store_ptr 353 354#define atomic_add_int atomic_add_32 355#define atomic_add_acq_int atomic_add_int 356#define atomic_add_rel_int atomic_add_int 357#define atomic_subtract_int atomic_subtract_32 358#define atomic_subtract_acq_int atomic_subtract_int 359#define atomic_subtract_rel_int atomic_subtract_int 360#define atomic_clear_int atomic_clear_32 361#define atomic_clear_acq_int atomic_clear_int 362#define atomic_clear_rel_int atomic_clear_int 363#define atomic_set_int atomic_set_32 364#define atomic_set_acq_int atomic_set_int 365#define atomic_set_rel_int atomic_set_int 366#define atomic_cmpset_int atomic_cmpset_32 367#define atomic_cmpset_acq_int atomic_cmpset_int 368#define atomic_cmpset_rel_int atomic_cmpset_int 369#define atomic_fetchadd_int atomic_fetchadd_32 370#define atomic_readandclear_int atomic_readandclear_32 371#define atomic_load_acq_int atomic_load_32 372#define atomic_store_rel_int atomic_store_32 373 374#define atomic_add_acq_32 atomic_add_32 375#define atomic_add_rel_32 atomic_add_32 376#define atomic_subtract_acq_32 atomic_subtract_32 377#define atomic_subtract_rel_32 atomic_subtract_32 378#define atomic_clear_acq_32 atomic_clear_32 379#define atomic_clear_rel_32 atomic_clear_32 380#define atomic_set_acq_32 atomic_set_32 381#define atomic_set_rel_32 atomic_set_32 382#define atomic_cmpset_acq_32 atomic_cmpset_32 383#define atomic_cmpset_rel_32 atomic_cmpset_32 384#define atomic_load_acq_32 atomic_load_32 385#define atomic_store_rel_32 atomic_store_32 386 387#endif /* _MACHINE_ATOMIC_H_ */ 388