if_ecereg.h revision 201468
1201468Srpaulo/*- 2201468Srpaulo * Copyright (c) 2009, Yohanes Nugroho <yohanes@gmail.com> 3201468Srpaulo * All rights reserved. 4201468Srpaulo * 5201468Srpaulo * Redistribution and use in source and binary forms, with or without 6201468Srpaulo * modification, are permitted provided that the following conditions 7201468Srpaulo * are met: 8201468Srpaulo * 1. Redistributions of source code must retain the above copyright 9201468Srpaulo * notice unmodified, this list of conditions, and the following 10201468Srpaulo * disclaimer. 11201468Srpaulo * 2. Redistributions in binary form must reproduce the above copyright 12201468Srpaulo * notice, this list of conditions and the following disclaimer in the 13201468Srpaulo * documentation and/or other materials provided with the distribution. 14201468Srpaulo * 15201468Srpaulo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16201468Srpaulo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17201468Srpaulo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18201468Srpaulo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19201468Srpaulo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20201468Srpaulo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21201468Srpaulo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22201468Srpaulo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23201468Srpaulo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24201468Srpaulo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25201468Srpaulo * SUCH DAMAGE. 26201468Srpaulo * 27201468Srpaulo * $FreeBSD: head/sys/arm/econa/if_ecereg.h 201468 2010-01-04 03:35:45Z rpaulo $ 28201468Srpaulo */ 29201468Srpaulo 30201468Srpaulo#ifndef _IF_ECEREG_H 31201468Srpaulo#define _IF_ECEREG_H 32201468Srpaulo 33201468Srpaulo#define ETH_CFG 0x08 34201468Srpaulo#define ETH_CFG_RMII (1 << 15) 35201468Srpaulo#define PHY_CONTROL 0x00 36201468Srpaulo#define PHY_RW_OK (1<<15) 37201468Srpaulo 38201468Srpaulo#define PHY_ADDRESS(x) ((x) & 0x1) 39201468Srpaulo#define PHY_REGISTER(r) (((r) & 0x1F) << 8) 40201468Srpaulo#define PHY_WRITE_COMMAND (1<<13) 41201468Srpaulo#define PHY_READ_COMMAND (1<<14) 42201468Srpaulo#define PHY_GET_DATA(d) (((d) >> 16) & 0xFFFF) 43201468Srpaulo#define PHY_DATA(d) (((d) & 0xFFFF) << 16) 44201468Srpaulo 45201468Srpaulo#define PORT_0_CONFIG 0x08 46201468Srpaulo 47201468Srpaulo#define ARL_TABLE_ACCESS_CONTROL_0 0x050 48201468Srpaulo#define ARL_TABLE_ACCESS_CONTROL_1 0x054 49201468Srpaulo#define ARL_TABLE_ACCESS_CONTROL_2 0x058 50201468Srpaulo 51201468Srpaulo#define ARL_WRITE_COMMAND (1<<3) 52201468Srpaulo#define ARL_LOOKUP_COMMAND (1<<2) 53201468Srpaulo#define ARL_COMMAND_COMPLETE (1) 54201468Srpaulo 55201468Srpaulo 56201468Srpaulo#define PORT0 (1 << 0) 57201468Srpaulo#define PORT1 (1 << 1) 58201468Srpaulo#define CPU_PORT (1 << 2) 59201468Srpaulo 60201468Srpaulo 61201468Srpaulo#define VLAN0_GROUP_ID (0) 62201468Srpaulo#define VLAN1_GROUP_ID (1) 63201468Srpaulo#define VLAN2_GROUP_ID (2) 64201468Srpaulo#define VLAN3_GROUP_ID (3) 65201468Srpaulo#define VLAN4_GROUP_ID (4) 66201468Srpaulo#define VLAN5_GROUP_ID (5) 67201468Srpaulo#define VLAN6_GROUP_ID (6) 68201468Srpaulo#define VLAN7_GROUP_ID (7) 69201468Srpaulo 70201468Srpaulo#define PORT0_PVID (VLAN1_GROUP_ID) 71201468Srpaulo#define PORT1_PVID (VLAN2_GROUP_ID) 72201468Srpaulo#define CPU_PORT_PVID (VLAN0_GROUP_ID) 73201468Srpaulo 74201468Srpaulo#define VLAN0_VID (0x111) 75201468Srpaulo#define VLAN1_VID (0x222) 76201468Srpaulo#define VLAN2_VID (0x333) 77201468Srpaulo#define VLAN3_VID (0x444) 78201468Srpaulo#define VLAN4_VID (0x555) 79201468Srpaulo#define VLAN5_VID (0x666) 80201468Srpaulo#define VLAN6_VID (0x777) 81201468Srpaulo#define VLAN7_VID (0x888) 82201468Srpaulo 83201468Srpaulo#define VLAN0_GROUP (PORT0 | PORT1 | CPU_PORT) 84201468Srpaulo#define VLAN1_GROUP (PORT0 | CPU_PORT) 85201468Srpaulo#define VLAN2_GROUP (PORT1 | CPU_PORT) 86201468Srpaulo#define VLAN3_GROUP (0) 87201468Srpaulo#define VLAN4_GROUP (0) 88201468Srpaulo#define VLAN5_GROUP (0) 89201468Srpaulo#define VLAN6_GROUP (0) 90201468Srpaulo#define VLAN7_GROUP (0) 91201468Srpaulo 92201468Srpaulo#define SWITCH_CONFIG 0x004 93201468Srpaulo#define MAC_PORT_0_CONFIG 0x008 94201468Srpaulo#define MAC_PORT_1_CONFIG 0x00C 95201468Srpaulo#define CPU_PORT_CONFIG 0x010 96201468Srpaulo#define BIST_RESULT_TEST_0 0x094 97201468Srpaulo 98201468Srpaulo#define FS_DMA_CONTROL 0x104 99201468Srpaulo#define TS_DMA_CONTROL 0x100 100201468Srpaulo 101201468Srpaulo#define INTERRUPT_MASK 0x08C 102201468Srpaulo#define INTERRUPT_STATUS 0x088 103201468Srpaulo 104201468Srpaulo#define TS_DESCRIPTOR_POINTER 0x108 105201468Srpaulo#define TS_DESCRIPTOR_BASE_ADDR 0x110 106201468Srpaulo#define FS_DESCRIPTOR_POINTER 0x10C 107201468Srpaulo#define FS_DESCRIPTOR_BASE_ADDR 0x114 108201468Srpaulo 109201468Srpaulo 110201468Srpaulo#define VLAN_VID_0_1 0x060 111201468Srpaulo#define VLAN_VID_2_3 0x064 112201468Srpaulo#define VLAN_VID_4_5 0x068 113201468Srpaulo#define VLAN_VID_6_7 0x06C 114201468Srpaulo 115201468Srpaulo#define VLAN_PORT_PVID 0x05C 116201468Srpaulo#define VLAN_MEMBER_PORT_MAP 0x070 117201468Srpaulo#define VLAN_TAG_PORT_MAP 0x074 118201468Srpaulo 119201468Srpaulo 120201468Srpaulo#define ASIX_GIGA_PHY 1 121201468Srpaulo#define TWO_SINGLE_PHY 2 122201468Srpaulo#define AGERE_GIGA_PHY 3 123201468Srpaulo#define VSC8601_GIGA_PHY 4 124201468Srpaulo#define IC_PLUS_PHY 5 125201468Srpaulo#define NOT_FOUND_PHY (-1) 126201468Srpaulo 127201468Srpaulo#define MAX_PACKET_LEN (1536) 128201468Srpaulo 129201468Srpaulo#define INVALID_ENTRY 0 130201468Srpaulo#define NEW_ENTRY 0x1 131201468Srpaulo#define STATIC_ENTRY 0x7 132201468Srpaulo 133201468Srpaulo/*mask status except for link change*/ 134201468Srpaulo#define ERROR_MASK 0xFFFFFF7F 135201468Srpaulo 136201468Srpaulo/*hardware interface flags*/ 137201468Srpaulo 138201468Srpaulo#define FAST_AGING (0xf) 139201468Srpaulo#define IVL_LEARNING (0x1 << 22) 140201468Srpaulo/*hardware NAT accelerator*/ 141201468Srpaulo#define HARDWARE_NAT (0x1 << 23) 142201468Srpaulo/*aging time setting*/ 143201468Srpaulo 144201468Srpaulo/*skip lookup*/ 145201468Srpaulo#define SKIP_L2_LOOKUP_PORT_1 (1 << 29) 146201468Srpaulo#define SKIP_L2_LOOKUP_PORT_0 (1 << 28) 147201468Srpaulo 148201468Srpaulo#define NIC_MODE (1 << 30) 149201468Srpaulo#define PORT_DISABLE (1 << 18) 150201468Srpaulo#define SA_LEARNING_DISABLE (1 << 19) 151201468Srpaulo#define DISABLE_BROADCAST_PACKET (1 << 27) 152201468Srpaulo#define DISABLE_MULTICAST_PACKET ( 1 << 26) 153201468Srpaulo 154201468Srpaulo#endif 155