board_bwct.c revision 185288
1356290Sjkim/*- 2110010Smarkm * Copyright (c) 1994-1998 Mark Brinicombe. 3110010Smarkm * Copyright (c) 1994 Brini. 4142429Snectar * All rights reserved. 5110010Smarkm * 6110010Smarkm * This code is derived from software written for Brini by Mark Brinicombe 7110010Smarkm * 8110010Smarkm * Redistribution and use in source and binary forms, with or without 9110010Smarkm * modification, are permitted provided that the following conditions 10110010Smarkm * are met: 11110010Smarkm * 1. Redistributions of source code must retain the above copyright 12110010Smarkm * notice, this list of conditions and the following disclaimer. 13110010Smarkm * 2. Redistributions in binary form must reproduce the above copyright 14110010Smarkm * notice, this list of conditions and the following disclaimer in the 15110010Smarkm * documentation and/or other materials provided with the distribution. 16110010Smarkm * 3. All advertising materials mentioning features or use of this software 17110010Smarkm * must display the following acknowledgement: 18110010Smarkm * This product includes software developed by Brini. 19110010Smarkm * 4. The name of the company nor the name of the author may be used to 20215698Ssimon * endorse or promote products derived from this software without specific 21215698Ssimon * prior written permission. 22215698Ssimon * 23215698Ssimon * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 24215698Ssimon * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25110010Smarkm * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26110010Smarkm * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27110010Smarkm * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28110010Smarkm * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29110010Smarkm * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30110010Smarkm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31110010Smarkm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32110010Smarkm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33110010Smarkm * SUCH DAMAGE. 34110010Smarkm * 35110010Smarkm * RiscBSD kernel project 36110010Smarkm * 37110010Smarkm * machdep.c 38110010Smarkm * 39110010Smarkm * Machine dependant functions for kernel setup 40110010Smarkm * 41276861Sjkim * This file needs a lot of work. 42276861Sjkim * 43110010Smarkm * Created : 17/09/94 44110010Smarkm */ 45215698Ssimon 46215698Ssimon#include "opt_msgbuf.h" 47215698Ssimon#include "opt_at91.h" 48215698Ssimon 49312826Sjkim#include <sys/cdefs.h> 50215698Ssimon__FBSDID("$FreeBSD: head/sys/arm/at91/kb920x_machdep.c 185288 2008-11-25 05:17:39Z imp $"); 51142429Snectar 52142429Snectar#define _ARM32_BUS_DMA_PRIVATE 53276861Sjkim#include <sys/param.h> 54276861Sjkim#include <sys/systm.h> 55276861Sjkim#include <sys/sysproto.h> 56110010Smarkm#include <sys/signalvar.h> 57344604Sjkim#include <sys/imgact.h> 58344604Sjkim#include <sys/kernel.h> 59344604Sjkim#include <sys/ktr.h> 60344604Sjkim#include <sys/linker.h> 61344604Sjkim#include <sys/lock.h> 62344604Sjkim#include <sys/malloc.h> 63215698Ssimon#include <sys/mutex.h> 64344604Sjkim#include <sys/pcpu.h> 65344604Sjkim#include <sys/proc.h> 66344604Sjkim#include <sys/ptrace.h> 67344604Sjkim#include <sys/cons.h> 68276861Sjkim#include <sys/bio.h> 69215698Ssimon#include <sys/bus.h> 70344604Sjkim#include <sys/buf.h> 71110010Smarkm#include <sys/exec.h> 72110010Smarkm#include <sys/kdb.h> 73110010Smarkm#include <sys/msgbuf.h> 74110010Smarkm#include <machine/reg.h> 75110010Smarkm#include <machine/cpu.h> 76110010Smarkm 77110010Smarkm#include <vm/vm.h> 78110010Smarkm#include <vm/pmap.h> 79110010Smarkm#include <vm/vm_object.h> 80110010Smarkm#include <vm/vm_page.h> 81110010Smarkm#include <vm/vm_pager.h> 82110010Smarkm#include <vm/vm_map.h> 83110010Smarkm#include <vm/vnode_pager.h> 84110010Smarkm#include <machine/pmap.h> 85110010Smarkm#include <machine/vmparam.h> 86110010Smarkm#include <machine/pcb.h> 87110010Smarkm#include <machine/undefined.h> 88110010Smarkm#include <machine/machdep.h> 89110010Smarkm#include <machine/metadata.h> 90110010Smarkm#include <machine/armreg.h> 91110010Smarkm#include <machine/bus.h> 92110010Smarkm#include <sys/reboot.h> 93110010Smarkm 94110010Smarkm#include <arm/at91/at91rm92reg.h> 95110010Smarkm#include <arm/at91/at91_piovar.h> 96110010Smarkm#include <arm/at91/at91_pio_rm9200.h> 97110010Smarkm 98110010Smarkm#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 99110010Smarkm#define KERNEL_PT_KERN 1 100110010Smarkm#define KERNEL_PT_KERN_NUM 22 101110010Smarkm#define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM /* L2 table for mapping after kernel */ 102110010Smarkm#define KERNEL_PT_AFKERNEL_NUM 5 103110010Smarkm 104110010Smarkm/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 105110010Smarkm#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 106110010Smarkm 107110010Smarkm/* Define various stack sizes in pages */ 108110010Smarkm#define IRQ_STACK_SIZE 1 109110010Smarkm#define ABT_STACK_SIZE 1 110110010Smarkm#define UND_STACK_SIZE 1 111110010Smarkm 112110010Smarkmextern u_int data_abort_handler_address; 113110010Smarkmextern u_int prefetch_abort_handler_address; 114110010Smarkmextern u_int undefined_handler_address; 115110010Smarkm 116110010Smarkmstruct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 117110010Smarkm 118110010Smarkmextern void *_end; 119110010Smarkm 120110010Smarkmextern int *end; 121110010Smarkm 122110010Smarkmstruct pcpu __pcpu; 123110010Smarkmstruct pcpu *pcpup = &__pcpu; 124110010Smarkm 125110010Smarkm/* Physical and virtual addresses for some global pages */ 126110010Smarkm 127110010Smarkmvm_paddr_t phys_avail[10]; 128110010Smarkmvm_paddr_t dump_avail[4]; 129110010Smarkmvm_offset_t physical_pages; 130110010Smarkm 131110010Smarkmstruct pv_addr systempage; 132110010Smarkmstruct pv_addr msgbufpv; 133142429Snectarstruct pv_addr irqstack; 134110010Smarkmstruct pv_addr undstack; 135110655Snectarstruct pv_addr abtstack; 136356290Sjkimstruct pv_addr kernelstack; 137215698Ssimon 138215698Ssimonstatic void *boot_arg1; 139215698Ssimonstatic void *boot_arg2; 140215698Ssimon 141110010Smarkmstatic struct trapframe proc0_tf; 142325337Sjkim 143273144Sjkim/* Static device mappings. */ 144110010Smarkmstatic const struct pmap_devmap kb920x_devmap[] = { 145110010Smarkm /* 146110010Smarkm * Map the on-board devices VA == PA so that we can access them 147273144Sjkim * with the MMU on or off. 148110010Smarkm */ 149110010Smarkm { 150110010Smarkm /* 151110010Smarkm * This at least maps the interrupt controller, the UART 152273144Sjkim * and the timer. Other devices should use newbus to 153276861Sjkim * map their memory anyway. 154110010Smarkm */ 155110010Smarkm 0xdff00000, 156238405Sjkim 0xfff00000, 157160819Ssimon 0x100000, 158110010Smarkm VM_PROT_READ|VM_PROT_WRITE, 159110010Smarkm PTE_NOCACHE, 160110010Smarkm }, 161194208Ssimon /* 162273144Sjkim * We can't just map the OHCI registers VA == PA, because 163273144Sjkim * AT91RM92_OHCI_BASE belongs to the userland address space. 164110010Smarkm * We could just choose a different virtual address, but a better 165110010Smarkm * solution would probably be to just use pmap_mapdev() to allocate 166273144Sjkim * KVA, as we don't need the OHCI controller before the vm 167273144Sjkim * initialization is done. However, the AT91 resource allocation 168273144Sjkim * system doesn't know how to use pmap_mapdev() yet. 169110010Smarkm */ 170110010Smarkm { 171110010Smarkm /* 172273144Sjkim * Add the ohci controller, and anything else that might be 173273144Sjkim * on this chip select for a VA/PA mapping. 174110010Smarkm */ 175110010Smarkm AT91RM92_OHCI_BASE, 176142429Snectar AT91RM92_OHCI_PA_BASE, 177110010Smarkm AT91RM92_OHCI_SIZE, 178110010Smarkm VM_PROT_READ|VM_PROT_WRITE, 179110010Smarkm PTE_NOCACHE, 180142429Snectar }, 181110010Smarkm { 182110010Smarkm 0, 183142429Snectar 0, 184110010Smarkm 0, 185110010Smarkm 0, 186273144Sjkim 0, 187273144Sjkim } 188142429Snectar}; 189110010Smarkm 190110010Smarkmstatic long 191273144Sjkimramsize(void) 192273144Sjkim{ 193273144Sjkim uint32_t *SDRAMC = (uint32_t *)(AT91RM92_BASE + AT91RM92_SDRAMC_BASE); 194276861Sjkim uint32_t cr, mr; 195276861Sjkim int banks, rows, cols, bw; 196276861Sjkim 197276861Sjkim cr = SDRAMC[AT91RM92_SDRAMC_CR / 4]; 198142429Snectar mr = SDRAMC[AT91RM92_SDRAMC_MR / 4]; 199110010Smarkm bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2; 200110010Smarkm banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1; 201142429Snectar rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11; 202110010Smarkm cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8; 203110010Smarkm return (1 << (cols + rows + banks + bw)); 204238405Sjkim} 205238405Sjkim 206276861Sjkimstatic long 207273144Sjkimboard_init(void) 208238405Sjkim{ 209238405Sjkim /* 210238405Sjkim * Since the USART supports RS-485 multidrop mode, it allows the 211238405Sjkim * TX pins to float. However, for RS-232 operations, we don't want 212238405Sjkim * these pins to float. Instead, they should be pulled up to avoid 213238405Sjkim * mismatches. Linux does something similar when it configures the 214238405Sjkim * TX lines. This implies that we also allow the RX lines to float 215238405Sjkim * rather than be in the state they are left in by the boot loader. 216238405Sjkim * Since they are input pins, I think that this is the right thing 217160819Ssimon * to do. 218160819Ssimon */ 219160819Ssimon 220344604Sjkim /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */ 221142429Snectar at91_pio_use_periph_a(AT91RM92_PIOA_BASE, 222110010Smarkm AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0); 223226436Seadler at91_pio_use_periph_a(AT91RM92_PIOA_BASE, 224276861Sjkim AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1); 225142429Snectar /* PIOA's B periph: Turn USART 3's TX/RX pins */ 226110010Smarkm at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0); 227246772Sjkim at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1); 228142429Snectar#ifdef AT91_TSC 229110010Smarkm /* We're using TC0's A1 and A2 input */ 230110010Smarkm at91_pio_use_periph_b(AT91RM92_PIOA_BASE, 231194208Ssimon AT91C_PA19_TIOA1 | AT91C_PA21_TIOA2, 0); 232194208Ssimon#endif 233194208Ssimon /* PIOB's A periph: Turn USART 1's TX/RX pins */ 234238405Sjkim at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0); 235238405Sjkim at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1); 236337982Sjkim 237337982Sjkim /* Pin assignment */ 238238405Sjkim#ifdef AT91_TSC 239238405Sjkim /* Assert PA24 low -- talk to rubidium */ 240238405Sjkim at91_pio_use_gpio(AT91RM92_PIOA_BASE, AT91C_PIO_PA24); 241238405Sjkim at91_pio_gpio_output(AT91RM92_PIOA_BASE, AT91C_PIO_PA24, 0); 242238405Sjkim at91_pio_gpio_clear(AT91RM92_PIOA_BASE, AT91C_PIO_PA24); 243238405Sjkim at91_pio_use_gpio(AT91RM92_PIOB_BASE, 244238405Sjkim AT91C_PIO_PB16 | AT91C_PIO_PB17 | AT91C_PIO_PB18 | AT91C_PIO_PB19); 245238405Sjkim#endif 246238405Sjkim 247238405Sjkim return (ramsize()); 248238405Sjkim} 249238405Sjkim 250238405Sjkimvoid * 251238405Sjkiminitarm(void *arg, void *arg2) 252238405Sjkim{ 253238405Sjkim struct pv_addr kernel_l1pt; 254238405Sjkim int loop, i; 255238405Sjkim u_int l1pagetable; 256238405Sjkim vm_offset_t freemempos; 257238405Sjkim vm_offset_t afterkern; 258238405Sjkim uint32_t memsize; 259142429Snectar vm_offset_t lastaddr; 260142429Snectar 261110010Smarkm boot_arg1 = arg; 262344604Sjkim boot_arg2 = arg2; 263110010Smarkm set_cpufuncs(); 264215698Ssimon lastaddr = fake_preload_metadata(); 265215698Ssimon pcpu_init(pcpup, 0, sizeof(struct pcpu)); 266273144Sjkim PCPU_SET(curthread, &thread0); 267273144Sjkim 268273144Sjkim freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 269273144Sjkim /* Define a macro to simplify memory allocation */ 270273144Sjkim#define valloc_pages(var, np) \ 271273144Sjkim alloc_pages((var).pv_va, (np)); \ 272273144Sjkim (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 273142429Snectar 274110010Smarkm#define alloc_pages(var, np) \ 275110010Smarkm (var) = freemempos; \ 276110010Smarkm freemempos += (np * PAGE_SIZE); \ 277273144Sjkim memset((char *)(var), 0, ((np) * PAGE_SIZE)); 278273144Sjkim 279273144Sjkim while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 280273144Sjkim freemempos += PAGE_SIZE; 281273144Sjkim valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 282273144Sjkim for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 283273144Sjkim if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 284273144Sjkim valloc_pages(kernel_pt_table[loop], 285273144Sjkim L2_TABLE_SIZE / PAGE_SIZE); 286273144Sjkim } else { 287273144Sjkim kernel_pt_table[loop].pv_va = freemempos - 288273144Sjkim (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 289110010Smarkm L2_TABLE_SIZE_REAL; 290110010Smarkm kernel_pt_table[loop].pv_pa = 291276861Sjkim kernel_pt_table[loop].pv_va - KERNVIRTADDR + 292110010Smarkm KERNPHYSADDR; 293110010Smarkm } 294273144Sjkim i++; 295276861Sjkim } 296276861Sjkim /* 297273144Sjkim * Allocate a page for the system page mapped to V0x00000000 298276861Sjkim * This page will just contain the system vectors and can be 299110010Smarkm * shared by all processes. 300110010Smarkm */ 301276861Sjkim valloc_pages(systempage, 1); 302110010Smarkm 303110010Smarkm /* Allocate stacks for all modes */ 304110010Smarkm valloc_pages(irqstack, IRQ_STACK_SIZE); 305273144Sjkim valloc_pages(abtstack, ABT_STACK_SIZE); 306273144Sjkim valloc_pages(undstack, UND_STACK_SIZE); 307273144Sjkim valloc_pages(kernelstack, KSTACK_PAGES); 308273144Sjkim valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE); 309 310 /* 311 * Now we start construction of the L1 page table 312 * We start by mapping the L2 page tables into the L1. 313 * This means that we can replace L1 mappings later on if necessary 314 */ 315 l1pagetable = kernel_l1pt.pv_va; 316 317 /* Map the L2 pages tables in the L1 page table */ 318 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 319 &kernel_pt_table[KERNEL_PT_SYS]); 320 for (i = 0; i < KERNEL_PT_KERN_NUM; i++) 321 pmap_link_l2pt(l1pagetable, KERNBASE + i * L1_S_SIZE, 322 &kernel_pt_table[KERNEL_PT_KERN + i]); 323 pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR, 324 (((uint32_t)lastaddr - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1), 325 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 326 afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE - 1)); 327 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 328 pmap_link_l2pt(l1pagetable, afterkern + i * L1_S_SIZE, 329 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 330 } 331 332 /* Map the vector page. */ 333 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 334 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 335 /* Map the stack pages */ 336 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 337 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 338 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 339 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 340 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 341 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 342 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 343 KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 344 345 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 346 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 347 pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa, 348 MSGBUF_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 349 350 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 351 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 352 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 353 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 354 } 355 356 pmap_devmap_bootstrap(l1pagetable, kb920x_devmap); 357 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 358 setttb(kernel_l1pt.pv_pa); 359 cpu_tlb_flushID(); 360 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 361 cninit(); 362 memsize = board_init(); 363 physmem = memsize / PAGE_SIZE; 364 365 /* 366 * Pages were allocated during the secondary bootstrap for the 367 * stacks for different CPU modes. 368 * We must now set the r13 registers in the different CPU modes to 369 * point to these stacks. 370 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 371 * of the stack memory. 372 */ 373 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 374 set_stackptr(PSR_IRQ32_MODE, 375 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 376 set_stackptr(PSR_ABT32_MODE, 377 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 378 set_stackptr(PSR_UND32_MODE, 379 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 380 381 /* 382 * We must now clean the cache again.... 383 * Cleaning may be done by reading new data to displace any 384 * dirty data in the cache. This will have happened in setttb() 385 * but since we are boot strapping the addresses used for the read 386 * may have just been remapped and thus the cache could be out 387 * of sync. A re-clean after the switch will cure this. 388 * After booting there are no gross reloations of the kernel thus 389 * this problem will not occur after initarm(). 390 */ 391 cpu_idcache_wbinv_all(); 392 393 /* Set stack for exception handlers */ 394 395 data_abort_handler_address = (u_int)data_abort_handler; 396 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 397 undefined_handler_address = (u_int)undefinedinstruction_bounce; 398 undefined_init(); 399 400 proc_linkup0(&proc0, &thread0); 401 thread0.td_kstack = kernelstack.pv_va; 402 thread0.td_pcb = (struct pcb *) 403 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 404 thread0.td_pcb->pcb_flags = 0; 405 thread0.td_frame = &proc0_tf; 406 pcpup->pc_curpcb = thread0.td_pcb; 407 408 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 409 410 pmap_curmaxkvaddr = afterkern + L1_S_SIZE * (KERNEL_PT_KERN_NUM - 1); 411 412 /* 413 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before 414 * calling pmap_bootstrap. 415 */ 416 dump_avail[0] = PHYSADDR; 417 dump_avail[1] = PHYSADDR + memsize; 418 dump_avail[2] = 0; 419 dump_avail[3] = 0; 420 421 pmap_bootstrap(freemempos, 422 KERNVIRTADDR + 3 * memsize, 423 &kernel_l1pt); 424 msgbufp = (void*)msgbufpv.pv_va; 425 msgbufinit(msgbufp, MSGBUF_SIZE); 426 mutex_init(); 427 428 i = 0; 429#if PHYSADDR != KERNPHYSADDR 430 phys_avail[i++] = PHYSADDR; 431 phys_avail[i++] = KERNPHYSADDR; 432#endif 433 phys_avail[i++] = virtual_avail - KERNVIRTADDR + KERNPHYSADDR; 434 phys_avail[i++] = PHYSADDR + memsize; 435 phys_avail[i++] = 0; 436 phys_avail[i++] = 0; 437 /* Do basic tuning, hz etc */ 438 init_param1(); 439 init_param2(physmem); 440 kdb_init(); 441 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 442 sizeof(struct pcb))); 443} 444