board_bwct.c revision 177883
1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Brini. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * RiscBSD kernel project 36 * 37 * machdep.c 38 * 39 * Machine dependant functions for kernel setup 40 * 41 * This file needs a lot of work. 42 * 43 * Created : 17/09/94 44 */ 45 46#include "opt_msgbuf.h" 47#include "opt_at91.h" 48 49#include <sys/cdefs.h> 50__FBSDID("$FreeBSD: head/sys/arm/at91/kb920x_machdep.c 177883 2008-04-03 16:44:50Z imp $"); 51 52#define _ARM32_BUS_DMA_PRIVATE 53#include <sys/param.h> 54#include <sys/systm.h> 55#include <sys/sysproto.h> 56#include <sys/signalvar.h> 57#include <sys/imgact.h> 58#include <sys/kernel.h> 59#include <sys/ktr.h> 60#include <sys/linker.h> 61#include <sys/lock.h> 62#include <sys/malloc.h> 63#include <sys/mutex.h> 64#include <sys/pcpu.h> 65#include <sys/proc.h> 66#include <sys/ptrace.h> 67#include <sys/cons.h> 68#include <sys/bio.h> 69#include <sys/bus.h> 70#include <sys/buf.h> 71#include <sys/exec.h> 72#include <sys/kdb.h> 73#include <sys/msgbuf.h> 74#include <machine/reg.h> 75#include <machine/cpu.h> 76 77#include <vm/vm.h> 78#include <vm/pmap.h> 79#include <vm/vm_object.h> 80#include <vm/vm_page.h> 81#include <vm/vm_pager.h> 82#include <vm/vm_map.h> 83#include <vm/vnode_pager.h> 84#include <machine/pmap.h> 85#include <machine/vmparam.h> 86#include <machine/pcb.h> 87#include <machine/undefined.h> 88#include <machine/machdep.h> 89#include <machine/metadata.h> 90#include <machine/armreg.h> 91#include <machine/bus.h> 92#include <sys/reboot.h> 93 94#include <arm/at91/at91rm92reg.h> 95#include <arm/at91/at91_piovar.h> 96#include <arm/at91/at91_pio_rm9200.h> 97 98#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 99#define KERNEL_PT_KERN 1 100#define KERNEL_PT_KERN_NUM 22 101#define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM /* L2 table for mapping after kernel */ 102#define KERNEL_PT_AFKERNEL_NUM 5 103 104/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 105#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 106 107/* Define various stack sizes in pages */ 108#define IRQ_STACK_SIZE 1 109#define ABT_STACK_SIZE 1 110#define UND_STACK_SIZE 1 111 112extern u_int data_abort_handler_address; 113extern u_int prefetch_abort_handler_address; 114extern u_int undefined_handler_address; 115 116struct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 117 118extern void *_end; 119 120extern int *end; 121 122struct pcpu __pcpu; 123struct pcpu *pcpup = &__pcpu; 124 125/* Physical and virtual addresses for some global pages */ 126 127vm_paddr_t phys_avail[10]; 128vm_paddr_t dump_avail[4]; 129vm_offset_t physical_pages; 130 131struct pv_addr systempage; 132struct pv_addr msgbufpv; 133struct pv_addr irqstack; 134struct pv_addr undstack; 135struct pv_addr abtstack; 136struct pv_addr kernelstack; 137 138static struct trapframe proc0_tf; 139 140/* Static device mappings. */ 141static const struct pmap_devmap kb920x_devmap[] = { 142 /* 143 * Map the on-board devices VA == PA so that we can access them 144 * with the MMU on or off. 145 */ 146 { 147 /* 148 * This at least maps the interrupt controller, the UART 149 * and the timer. Other devices should use newbus to 150 * map their memory anyway. 151 */ 152 0xdff00000, 153 0xfff00000, 154 0x100000, 155 VM_PROT_READ|VM_PROT_WRITE, 156 PTE_NOCACHE, 157 }, 158 /* 159 * We can't just map the OHCI registers VA == PA, because 160 * AT91RM92_OHCI_BASE belongs to the userland address space. 161 * We could just choose a different virtual address, but a better 162 * solution would probably be to just use pmap_mapdev() to allocate 163 * KVA, as we don't need the OHCI controller before the vm 164 * initialization is done. However, the AT91 resource allocation 165 * system doesn't know how to use pmap_mapdev() yet. 166 */ 167#if 1 168 { 169 /* 170 * Add the ohci controller, and anything else that might be 171 * on this chip select for a VA/PA mapping. 172 */ 173 AT91RM92_OHCI_BASE, 174 AT91RM92_OHCI_PA_BASE, 175 AT91RM92_OHCI_SIZE, 176 VM_PROT_READ|VM_PROT_WRITE, 177 PTE_NOCACHE, 178 }, 179#endif 180 { 181 0, 182 0, 183 0, 184 0, 185 0, 186 } 187}; 188 189static long 190ramsize(void) 191{ 192 uint32_t *SDRAMC = (uint32_t *)(AT91RM92_BASE + AT91RM92_SDRAMC_BASE); 193 uint32_t cr, mr; 194 int banks, rows, cols, bw; 195 196 cr = SDRAMC[AT91RM92_SDRAMC_CR / 4]; 197 mr = SDRAMC[AT91RM92_SDRAMC_MR / 4]; 198 bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2; 199 banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1; 200 rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11; 201 cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8; 202 return (1 << (cols + rows + banks + bw)); 203} 204 205static long 206board_init(void) 207{ 208 /* 209 * Since the USART supports RS-485 multidrop mode, it allows the 210 * TX pins to float. However, for RS-232 operations, we don't want 211 * these pins to float. Instead, they should be pulled up to avoid 212 * mismatches. Linux does something similar when it configures the 213 * TX lines. This implies that we also allow the RX lines to float 214 * rather than be in the state they are left in by the boot loader. 215 * Since they are input pins, I think that this is the right thing 216 * to do. 217 */ 218 219 /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */ 220 at91_pio_use_periph_a(AT91RM92_PIOA_BASE, 221 AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0); 222 at91_pio_use_periph_a(AT91RM92_PIOA_BASE, 223 AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1); 224 /* PIOA's B periph: Turn USART 3's TX/RX pins */ 225 at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0); 226 at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1); 227#ifdef AT91_TSC 228 /* We're using TC0's A1 and A2 input */ 229 at91_pio_use_periph_b(AT91RM92_PIOA_BASE, 230 AT91C_PA19_TIOA1 | AT91C_PA21_TIOA2, 0); 231#endif 232 /* PIOB's A periph: Turn USART 1's TX/RX pins */ 233 at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0); 234 at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1); 235 236 /* Pin assignment */ 237#ifdef AT91_TSC 238 /* Assert PA24 low -- talk to rubidium */ 239 at91_pio_use_gpio(AT91RM92_PIOA_BASE, AT91C_PIO_PA24); 240 at91_pio_gpio_output(AT91RM92_PIOA_BASE, AT91C_PIO_PA24, 0); 241 at91_pio_gpio_clear(AT91RM92_PIOA_BASE, AT91C_PIO_PA24); 242 at91_pio_use_gpio(AT91RM92_PIOB_BASE, 243 AT91C_PIO_PB16 | AT91C_PIO_PB17 | AT91C_PIO_PB18 | AT91C_PIO_PB19); 244#endif 245 246 return (ramsize()); 247} 248 249void * 250initarm(void *arg, void *arg2) 251{ 252 struct pv_addr kernel_l1pt; 253 int loop, i; 254 u_int l1pagetable; 255 vm_offset_t freemempos; 256 vm_offset_t afterkern; 257 uint32_t memsize; 258 vm_offset_t lastaddr; 259 260 set_cpufuncs(); 261 lastaddr = fake_preload_metadata(); 262 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 263 PCPU_SET(curthread, &thread0); 264 265 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 266 /* Define a macro to simplify memory allocation */ 267#define valloc_pages(var, np) \ 268 alloc_pages((var).pv_va, (np)); \ 269 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 270 271#define alloc_pages(var, np) \ 272 (var) = freemempos; \ 273 freemempos += (np * PAGE_SIZE); \ 274 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 275 276 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 277 freemempos += PAGE_SIZE; 278 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 279 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 280 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 281 valloc_pages(kernel_pt_table[loop], 282 L2_TABLE_SIZE / PAGE_SIZE); 283 } else { 284 kernel_pt_table[loop].pv_va = freemempos - 285 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 286 L2_TABLE_SIZE_REAL; 287 kernel_pt_table[loop].pv_pa = 288 kernel_pt_table[loop].pv_va - KERNVIRTADDR + 289 KERNPHYSADDR; 290 } 291 i++; 292 } 293 /* 294 * Allocate a page for the system page mapped to V0x00000000 295 * This page will just contain the system vectors and can be 296 * shared by all processes. 297 */ 298 valloc_pages(systempage, 1); 299 300 /* Allocate stacks for all modes */ 301 valloc_pages(irqstack, IRQ_STACK_SIZE); 302 valloc_pages(abtstack, ABT_STACK_SIZE); 303 valloc_pages(undstack, UND_STACK_SIZE); 304 valloc_pages(kernelstack, KSTACK_PAGES); 305 valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE); 306 /* 307 * Now we start construction of the L1 page table 308 * We start by mapping the L2 page tables into the L1. 309 * This means that we can replace L1 mappings later on if necessary 310 */ 311 l1pagetable = kernel_l1pt.pv_va; 312 313 /* Map the L2 pages tables in the L1 page table */ 314 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 315 &kernel_pt_table[KERNEL_PT_SYS]); 316 for (i = 0; i < KERNEL_PT_KERN_NUM; i++) 317 pmap_link_l2pt(l1pagetable, KERNBASE + i * 0x100000, 318 &kernel_pt_table[KERNEL_PT_KERN + i]); 319 pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR, 320 (((uint32_t)lastaddr - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1), 321 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 322 afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE 323 - 1)); 324 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 325 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000, 326 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 327 } 328 329 /* Map the vector page. */ 330 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 331 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 332 /* Map the stack pages */ 333 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 334 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 335 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 336 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 337 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 338 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 339 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 340 KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 341 342 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 343 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 344 pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa, 345 MSGBUF_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 346 347 348 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 349 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 350 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 351 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 352 } 353 354 pmap_devmap_bootstrap(l1pagetable, kb920x_devmap); 355 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 356 setttb(kernel_l1pt.pv_pa); 357 cpu_tlb_flushID(); 358 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 359 cninit(); 360 memsize = board_init(); 361 physmem = memsize / PAGE_SIZE; 362 363 /* 364 * Pages were allocated during the secondary bootstrap for the 365 * stacks for different CPU modes. 366 * We must now set the r13 registers in the different CPU modes to 367 * point to these stacks. 368 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 369 * of the stack memory. 370 */ 371 372 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 373 set_stackptr(PSR_IRQ32_MODE, 374 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 375 set_stackptr(PSR_ABT32_MODE, 376 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 377 set_stackptr(PSR_UND32_MODE, 378 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 379 380 381 382 /* 383 * We must now clean the cache again.... 384 * Cleaning may be done by reading new data to displace any 385 * dirty data in the cache. This will have happened in setttb() 386 * but since we are boot strapping the addresses used for the read 387 * may have just been remapped and thus the cache could be out 388 * of sync. A re-clean after the switch will cure this. 389 * After booting there are no gross reloations of the kernel thus 390 * this problem will not occur after initarm(). 391 */ 392 cpu_idcache_wbinv_all(); 393 394 /* Set stack for exception handlers */ 395 396 data_abort_handler_address = (u_int)data_abort_handler; 397 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 398 undefined_handler_address = (u_int)undefinedinstruction_bounce; 399 undefined_init(); 400 401 proc_linkup0(&proc0, &thread0); 402 thread0.td_kstack = kernelstack.pv_va; 403 thread0.td_pcb = (struct pcb *) 404 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 405 thread0.td_pcb->pcb_flags = 0; 406 thread0.td_frame = &proc0_tf; 407 pcpup->pc_curpcb = thread0.td_pcb; 408 409 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 410 411 pmap_curmaxkvaddr = afterkern + 0x100000 * (KERNEL_PT_KERN_NUM - 1); 412 /* 413 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before 414 * calling pmap_bootstrap. 415 */ 416 dump_avail[0] = PHYSADDR; 417 dump_avail[1] = PHYSADDR + memsize; 418 dump_avail[2] = 0; 419 dump_avail[3] = 0; 420 421 pmap_bootstrap(freemempos, 422 KERNVIRTADDR + 3 * memsize, 423 &kernel_l1pt); 424 msgbufp = (void*)msgbufpv.pv_va; 425 msgbufinit(msgbufp, MSGBUF_SIZE); 426 mutex_init(); 427 428 i = 0; 429 430#if PHYSADDR != KERNPHYSADDR 431 phys_avail[i++] = PHYSADDR; 432 phys_avail[i++] = KERNPHYSADDR; 433#endif 434 phys_avail[i++] = virtual_avail - KERNVIRTADDR + KERNPHYSADDR; 435 phys_avail[i++] = PHYSADDR + memsize; 436 phys_avail[i++] = 0; 437 phys_avail[i++] = 0; 438 /* Do basic tuning, hz etc */ 439 init_param1(); 440 init_param2(physmem); 441 kdb_init(); 442 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 443 sizeof(struct pcb))); 444} 445