board_bwct.c revision 160683
1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Brini. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * RiscBSD kernel project 36 * 37 * machdep.c 38 * 39 * Machine dependant functions for kernel setup 40 * 41 * This file needs a lot of work. 42 * 43 * Created : 17/09/94 44 */ 45 46#include "opt_msgbuf.h" 47#include "opt_ddb.h" 48#include "opt_at91.h" 49 50#include <sys/cdefs.h> 51__FBSDID("$FreeBSD: head/sys/arm/at91/kb920x_machdep.c 160683 2006-07-25 23:07:35Z cognet $"); 52 53#define _ARM32_BUS_DMA_PRIVATE 54#include <sys/param.h> 55#include <sys/systm.h> 56#include <sys/sysproto.h> 57#include <sys/signalvar.h> 58#include <sys/imgact.h> 59#include <sys/kernel.h> 60#include <sys/ktr.h> 61#include <sys/linker.h> 62#include <sys/lock.h> 63#include <sys/malloc.h> 64#include <sys/mutex.h> 65#include <sys/pcpu.h> 66#include <sys/proc.h> 67#include <sys/ptrace.h> 68#include <sys/cons.h> 69#include <sys/bio.h> 70#include <sys/bus.h> 71#include <sys/buf.h> 72#include <sys/exec.h> 73#include <sys/kdb.h> 74#include <sys/msgbuf.h> 75#include <machine/reg.h> 76#include <machine/cpu.h> 77 78#include <vm/vm.h> 79#include <vm/pmap.h> 80#include <vm/vm.h> 81#include <vm/vm_object.h> 82#include <vm/vm_page.h> 83#include <vm/vm_pager.h> 84#include <vm/vm_map.h> 85#include <vm/vnode_pager.h> 86#include <machine/pmap.h> 87#include <machine/vmparam.h> 88#include <machine/pcb.h> 89#include <machine/undefined.h> 90#include <machine/machdep.h> 91#include <machine/metadata.h> 92#include <machine/armreg.h> 93#include <machine/bus.h> 94#include <sys/reboot.h> 95 96#include <arm/at91/at91rm92reg.h> 97#include <arm/at91/at91_piovar.h> 98#include <arm/at91/at91_pio_rm9200.h> 99 100#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 101#define KERNEL_PT_KERN 1 102#define KERNEL_PT_KERN_NUM 22 103#define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM /* L2 table for mapping after kernel */ 104#define KERNEL_PT_AFKERNEL_NUM 5 105 106/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 107#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 108 109/* Define various stack sizes in pages */ 110#define IRQ_STACK_SIZE 1 111#define ABT_STACK_SIZE 1 112#define UND_STACK_SIZE 1 113 114extern u_int data_abort_handler_address; 115extern u_int prefetch_abort_handler_address; 116extern u_int undefined_handler_address; 117 118struct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 119 120extern void *_end; 121 122extern int *end; 123 124struct pcpu __pcpu; 125struct pcpu *pcpup = &__pcpu; 126 127/* Physical and virtual addresses for some global pages */ 128 129vm_paddr_t phys_avail[10]; 130vm_paddr_t dump_avail[4]; 131vm_offset_t physical_pages; 132vm_offset_t clean_sva, clean_eva; 133 134struct pv_addr systempage; 135struct pv_addr msgbufpv; 136struct pv_addr irqstack; 137struct pv_addr undstack; 138struct pv_addr abtstack; 139struct pv_addr kernelstack; 140struct pv_addr minidataclean; 141 142static struct trapframe proc0_tf; 143 144/* Static device mappings. */ 145static const struct pmap_devmap kb920x_devmap[] = { 146 /* 147 * Map the on-board devices VA == PA so that we can access them 148 * with the MMU on or off. 149 */ 150 { 151 /* 152 * This at least maps the interrupt controller, the UART 153 * and the timer. Other devices should use newbus to 154 * map their memory anyway. 155 */ 156 0xfff00000, 157 0xfff00000, 158 0x100000, 159 VM_PROT_READ|VM_PROT_WRITE, 160 PTE_NOCACHE, 161 }, 162 /* 163 * We can't just map the OHCI registers VA == PA, because 164 * AT91RM92_OHCI_BASE belongs to the userland address space. 165 * We could just choose a different virtual address, but a better 166 * solution would probably be to just use pmap_mapdev() to allocate 167 * KVA, as we don't need the OHCI controller before the vm 168 * initialization is done. However, the AT91 resource allocation 169 * system doesn't know how to use pmap_mapdev() yet. 170 */ 171#if 0 172 { 173 /* 174 * Add the ohci controller, and anything else that might be 175 * on this chip select for a VA/PA mapping. 176 */ 177 AT91RM92_OHCI_BASE, 178 AT91RM92_OHCI_BASE, 179 AT91RM92_OHCI_SIZE, 180 VM_PROT_READ|VM_PROT_WRITE, 181 PTE_NOCACHE, 182 }, 183#endif 184 { 185 0, 186 0, 187 0, 188 0, 189 0, 190 } 191}; 192 193#define SDRAM_START 0xa0000000 194 195#ifdef DDB 196extern vm_offset_t ksym_start, ksym_end; 197#endif 198 199static long 200ramsize(void) 201{ 202 uint32_t *SDRAMC = (uint32_t *)(AT91RM92_BASE + AT91RM92_SDRAMC_BASE); 203 uint32_t cr, mr; 204 int banks, rows, cols, bw; 205 206 cr = SDRAMC[AT91RM92_SDRAMC_CR / 4]; 207 mr = SDRAMC[AT91RM92_SDRAMC_MR / 4]; 208 bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2; 209 banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1; 210 rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11; 211 cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8; 212 return (1 << (cols + rows + banks + bw)); 213} 214 215static long 216board_init(void) 217{ 218 /* 219 * Since the USART supprots RS-485 multidrop mode, it allows the 220 * TX pins to float. However, for RS-232 operations, we don't want 221 * these pins to float. Instead, they should be pulled up to avoid 222 * mismatches. Linux does something similar when it configures the 223 * TX lines. This implies that we also allow the RX lines to float 224 * rather than be in the state they are left in by the boot loader. 225 * Since they are input pins, I think that this is the right thing 226 * to do. 227 */ 228 229 /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */ 230 at91_pio_use_periph_a(AT91RM92_PIOA_BASE, 231 AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0); 232 at91_pio_use_periph_a(AT91RM92_PIOA_BASE, 233 AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1); 234 /* PIOA's B periph: Turn USART 3's TX/RX pins */ 235 at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0); 236 at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1); 237#ifdef AT91_TSC 238 /* We're using TC0's A1 and A2 input */ 239 at91_pio_use_periph_b(AT91RM92_PIOA_BASE, 240 AT91C_PA19_TIOA1 | AT91C_PA21_TIOA2, 0); 241#endif 242 /* PIOB's A periph: Turn USART 1's TX/RX pins */ 243 at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0); 244 at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1); 245 246 /* Pin assignment */ 247#ifdef AT91_TSC 248 /* Assert PA24 low -- talk to rubidium */ 249 at91_pio_use_gpio(AT91RM92_PIOA_BASE, AT91C_PIO_PA24); 250 at91_pio_gpio_output(AT91RM92_PIOA_BASE, AT91C_PIO_PA24, 0); 251 at91_pio_gpio_clear(AT91RM92_PIOA_BASE, AT91C_PIO_PA24); 252#endif 253 254 return (ramsize()); 255} 256 257void * 258initarm(void *arg, void *arg2) 259{ 260 struct pv_addr kernel_l1pt; 261 int loop; 262 u_int l1pagetable; 263 vm_offset_t freemempos; 264 vm_offset_t afterkern; 265 int i = 0; 266 uint32_t fake_preload[35]; 267 uint32_t memsize; 268 vm_offset_t lastaddr; 269#ifdef DDB 270 vm_offset_t zstart = 0, zend = 0; 271#endif 272 273 i = 0; 274 275 set_cpufuncs(); 276 277 fake_preload[i++] = MODINFO_NAME; 278 fake_preload[i++] = strlen("elf kernel") + 1; 279 strcpy((char*)&fake_preload[i++], "elf kernel"); 280 i += 2; 281 fake_preload[i++] = MODINFO_TYPE; 282 fake_preload[i++] = strlen("elf kernel") + 1; 283 strcpy((char*)&fake_preload[i++], "elf kernel"); 284 i += 2; 285 fake_preload[i++] = MODINFO_ADDR; 286 fake_preload[i++] = sizeof(vm_offset_t); 287 fake_preload[i++] = KERNBASE; 288 fake_preload[i++] = MODINFO_SIZE; 289 fake_preload[i++] = sizeof(uint32_t); 290 fake_preload[i++] = (uint32_t)&end - KERNBASE; 291#ifdef DDB 292 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) { 293 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM; 294 fake_preload[i++] = sizeof(vm_offset_t); 295 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4); 296 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM; 297 fake_preload[i++] = sizeof(vm_offset_t); 298 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8); 299 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8); 300 zend = lastaddr; 301 zstart = *(uint32_t *)(KERNVIRTADDR + 4); 302 ksym_start = zstart; 303 ksym_end = zend; 304 } else 305#endif 306 lastaddr = (vm_offset_t)&end; 307 308 fake_preload[i++] = 0; 309 fake_preload[i] = 0; 310 preload_metadata = (void *)fake_preload; 311 312 313 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 314 PCPU_SET(curthread, &thread0); 315 316#define KERNEL_TEXT_BASE (KERNBASE) 317 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 318 /* Define a macro to simplify memory allocation */ 319#define valloc_pages(var, np) \ 320 alloc_pages((var).pv_va, (np)); \ 321 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 322 323#define alloc_pages(var, np) \ 324 (var) = freemempos; \ 325 freemempos += (np * PAGE_SIZE); \ 326 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 327 328 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 329 freemempos += PAGE_SIZE; 330 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 331 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 332 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 333 valloc_pages(kernel_pt_table[loop], 334 L2_TABLE_SIZE / PAGE_SIZE); 335 } else { 336 kernel_pt_table[loop].pv_va = freemempos - 337 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 338 L2_TABLE_SIZE_REAL; 339 kernel_pt_table[loop].pv_pa = 340 kernel_pt_table[loop].pv_va - KERNVIRTADDR + 341 KERNPHYSADDR; 342 } 343 i++; 344 } 345 /* 346 * Allocate a page for the system page mapped to V0x00000000 347 * This page will just contain the system vectors and can be 348 * shared by all processes. 349 */ 350 valloc_pages(systempage, 1); 351 352 /* Allocate stacks for all modes */ 353 valloc_pages(irqstack, IRQ_STACK_SIZE); 354 valloc_pages(abtstack, ABT_STACK_SIZE); 355 valloc_pages(undstack, UND_STACK_SIZE); 356 valloc_pages(kernelstack, KSTACK_PAGES); 357 alloc_pages(minidataclean.pv_pa, 1); 358 valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE); 359 /* 360 * Now we start construction of the L1 page table 361 * We start by mapping the L2 page tables into the L1. 362 * This means that we can replace L1 mappings later on if necessary 363 */ 364 l1pagetable = kernel_l1pt.pv_va; 365 366 /* Map the L2 pages tables in the L1 page table */ 367 pmap_link_l2pt(l1pagetable, ARM_VECTORS_LOW, 368 &kernel_pt_table[KERNEL_PT_SYS]); 369 for (i = 0; i < KERNEL_PT_KERN_NUM; i++) 370 pmap_link_l2pt(l1pagetable, KERNBASE + i * 0x100000, 371 &kernel_pt_table[KERNEL_PT_KERN + i]); 372 pmap_map_chunk(l1pagetable, KERNBASE, KERNPHYSADDR, 373 (((uint32_t)(lastaddr) - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1), 374 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 375 afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE 376 - 1)); 377 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 378 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000, 379 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 380 } 381 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa, 382 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 383 384 385 /* Map the vector page. */ 386 pmap_map_entry(l1pagetable, ARM_VECTORS_LOW, systempage.pv_pa, 387 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 388 /* Map the stack pages */ 389 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 390 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 391 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 392 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 393 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 394 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 395 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 396 KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 397 398 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 399 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 400 pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa, 401 MSGBUF_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 402 403 404 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 405 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 406 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 407 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 408 } 409 410 pmap_devmap_bootstrap(l1pagetable, kb920x_devmap); 411 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 412 setttb(kernel_l1pt.pv_pa); 413 cpu_tlb_flushID(); 414 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 415 cninit(); 416 memsize = board_init(); 417 physmem = memsize / PAGE_SIZE; 418 419 /* 420 * Pages were allocated during the secondary bootstrap for the 421 * stacks for different CPU modes. 422 * We must now set the r13 registers in the different CPU modes to 423 * point to these stacks. 424 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 425 * of the stack memory. 426 */ 427 428 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 429 set_stackptr(PSR_IRQ32_MODE, 430 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 431 set_stackptr(PSR_ABT32_MODE, 432 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 433 set_stackptr(PSR_UND32_MODE, 434 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 435 436 437 438 /* 439 * We must now clean the cache again.... 440 * Cleaning may be done by reading new data to displace any 441 * dirty data in the cache. This will have happened in setttb() 442 * but since we are boot strapping the addresses used for the read 443 * may have just been remapped and thus the cache could be out 444 * of sync. A re-clean after the switch will cure this. 445 * After booting there are no gross reloations of the kernel thus 446 * this problem will not occur after initarm(). 447 */ 448 cpu_idcache_wbinv_all(); 449 450 /* Set stack for exception handlers */ 451 452 data_abort_handler_address = (u_int)data_abort_handler; 453 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 454 undefined_handler_address = (u_int)undefinedinstruction_bounce; 455 undefined_init(); 456 457 proc_linkup(&proc0, &ksegrp0, &thread0); 458 thread0.td_kstack = kernelstack.pv_va; 459 thread0.td_pcb = (struct pcb *) 460 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 461 thread0.td_pcb->pcb_flags = 0; 462 thread0.td_frame = &proc0_tf; 463 pcpup->pc_curpcb = thread0.td_pcb; 464 465 arm_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 466 467 pmap_curmaxkvaddr = afterkern + 0x100000 * (KERNEL_PT_KERN_NUM - 1); 468 pmap_bootstrap(freemempos, 469 KERNVIRTADDR + 3 * memsize, 470 &kernel_l1pt); 471 msgbufp = (void*)msgbufpv.pv_va; 472 msgbufinit(msgbufp, MSGBUF_SIZE); 473 mutex_init(); 474 475 i = 0; 476 dump_avail[0] = KERNPHYSADDR; 477 dump_avail[1] = KERNPHYSADDR + memsize; 478 dump_avail[2] = 0; 479 dump_avail[3] = 0; 480 481 phys_avail[0] = virtual_avail - KERNVIRTADDR + KERNPHYSADDR; 482 phys_avail[1] = KERNPHYSADDR + memsize; 483 phys_avail[2] = 0; 484 phys_avail[3] = 0; 485 /* Do basic tuning, hz etc */ 486 init_param1(); 487 init_param2(physmem); 488 avail_end = KERNPHYSADDR + memsize - 1; 489 kdb_init(); 490 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 491 sizeof(struct pcb))); 492} 493