board_bwct.c revision 159365
1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Brini. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * RiscBSD kernel project 36 * 37 * machdep.c 38 * 39 * Machine dependant functions for kernel setup 40 * 41 * This file needs a lot of work. 42 * 43 * Created : 17/09/94 44 */ 45 46#include "opt_msgbuf.h" 47#include "opt_ddb.h" 48 49#include <sys/cdefs.h> 50__FBSDID("$FreeBSD: head/sys/arm/at91/kb920x_machdep.c 159365 2006-06-07 05:36:10Z imp $"); 51 52#define _ARM32_BUS_DMA_PRIVATE 53#include <sys/param.h> 54#include <sys/systm.h> 55#include <sys/sysproto.h> 56#include <sys/signalvar.h> 57#include <sys/imgact.h> 58#include <sys/kernel.h> 59#include <sys/ktr.h> 60#include <sys/linker.h> 61#include <sys/lock.h> 62#include <sys/malloc.h> 63#include <sys/mutex.h> 64#include <sys/pcpu.h> 65#include <sys/proc.h> 66#include <sys/ptrace.h> 67#include <sys/cons.h> 68#include <sys/bio.h> 69#include <sys/bus.h> 70#include <sys/buf.h> 71#include <sys/exec.h> 72#include <sys/kdb.h> 73#include <sys/msgbuf.h> 74#include <machine/reg.h> 75#include <machine/cpu.h> 76 77#include <vm/vm.h> 78#include <vm/pmap.h> 79#include <vm/vm.h> 80#include <vm/vm_object.h> 81#include <vm/vm_page.h> 82#include <vm/vm_pager.h> 83#include <vm/vm_map.h> 84#include <vm/vnode_pager.h> 85#include <machine/pmap.h> 86#include <machine/vmparam.h> 87#include <machine/pcb.h> 88#include <machine/undefined.h> 89#include <machine/machdep.h> 90#include <machine/metadata.h> 91#include <machine/armreg.h> 92#include <machine/bus.h> 93#include <sys/reboot.h> 94 95#include <arm/at91/at91rm92reg.h> 96 97#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 98#define KERNEL_PT_KERN 1 99#define KERNEL_PT_KERN_NUM 8 100#define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM /* L2 table for mapping after kernel */ 101#define KERNEL_PT_AFKERNEL_NUM 5 102 103/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 104#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 105 106/* Define various stack sizes in pages */ 107#define IRQ_STACK_SIZE 1 108#define ABT_STACK_SIZE 1 109#define UND_STACK_SIZE 1 110 111extern u_int data_abort_handler_address; 112extern u_int prefetch_abort_handler_address; 113extern u_int undefined_handler_address; 114 115struct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 116 117extern void *_end; 118 119extern int *end; 120 121struct pcpu __pcpu; 122struct pcpu *pcpup = &__pcpu; 123 124/* Physical and virtual addresses for some global pages */ 125 126vm_paddr_t phys_avail[10]; 127vm_paddr_t dump_avail[4]; 128vm_offset_t physical_pages; 129vm_offset_t clean_sva, clean_eva; 130 131struct pv_addr systempage; 132struct pv_addr msgbufpv; 133struct pv_addr irqstack; 134struct pv_addr undstack; 135struct pv_addr abtstack; 136struct pv_addr kernelstack; 137struct pv_addr minidataclean; 138 139static struct trapframe proc0_tf; 140 141/* Static device mappings. */ 142static const struct pmap_devmap kb920x_devmap[] = { 143 /* 144 * Map the on-board devices VA == PA so that we can access them 145 * with the MMU on or off. 146 */ 147 { 148 /* 149 * This at least maps the interrupt controller, the UART 150 * and the timer. Other devices should use newbus to 151 * map their memory anyway. 152 */ 153 0xfff00000, 154 0xfff00000, 155 0x100000, 156 VM_PROT_READ|VM_PROT_WRITE, 157 PTE_NOCACHE, 158 }, 159 { 160 /* 161 * Add the ohci controller, and anything else that might be 162 * on this chip select for a VA/PA mapping. 163 */ 164 AT91RM92_OHCI_BASE, 165 AT91RM92_OHCI_BASE, 166 AT91RM92_OHCI_SIZE, 167 VM_PROT_READ|VM_PROT_WRITE, 168 PTE_NOCACHE, 169 }, 170 { 171 0, 172 0, 173 0, 174 0, 175 0, 176 } 177}; 178 179#define SDRAM_START 0xa0000000 180 181#ifdef DDB 182extern vm_offset_t ksym_start, ksym_end; 183#endif 184 185void * 186initarm(void *arg, void *arg2) 187{ 188 struct pv_addr kernel_l1pt; 189 int loop; 190 u_int l1pagetable; 191 vm_offset_t freemempos; 192 vm_offset_t afterkern; 193 int i = 0; 194 uint32_t fake_preload[35]; 195 uint32_t memsize = 32 * 1024 * 1024; 196 vm_offset_t lastaddr; 197#ifdef DDB 198 vm_offset_t zstart = 0, zend = 0; 199#endif 200 201 i = 0; 202 203 set_cpufuncs(); 204 205 fake_preload[i++] = MODINFO_NAME; 206 fake_preload[i++] = strlen("elf kernel") + 1; 207 strcpy((char*)&fake_preload[i++], "elf kernel"); 208 i += 2; 209 fake_preload[i++] = MODINFO_TYPE; 210 fake_preload[i++] = strlen("elf kernel") + 1; 211 strcpy((char*)&fake_preload[i++], "elf kernel"); 212 i += 2; 213 fake_preload[i++] = MODINFO_ADDR; 214 fake_preload[i++] = sizeof(vm_offset_t); 215 fake_preload[i++] = KERNBASE; 216 fake_preload[i++] = MODINFO_SIZE; 217 fake_preload[i++] = sizeof(uint32_t); 218 fake_preload[i++] = (uint32_t)&end - KERNBASE; 219#ifdef DDB 220 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) { 221 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM; 222 fake_preload[i++] = sizeof(vm_offset_t); 223 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4); 224 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM; 225 fake_preload[i++] = sizeof(vm_offset_t); 226 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8); 227 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8); 228 zend = lastaddr; 229 zstart = *(uint32_t *)(KERNVIRTADDR + 4); 230 ksym_start = zstart; 231 ksym_end = zend; 232 } else 233#endif 234 lastaddr = (vm_offset_t)&end; 235 236 fake_preload[i++] = 0; 237 fake_preload[i] = 0; 238 preload_metadata = (void *)fake_preload; 239 240 241 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 242 PCPU_SET(curthread, &thread0); 243 244#define KERNEL_TEXT_BASE (KERNBASE) 245 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 246 /* Define a macro to simplify memory allocation */ 247#define valloc_pages(var, np) \ 248 alloc_pages((var).pv_va, (np)); \ 249 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 250 251#define alloc_pages(var, np) \ 252 (var) = freemempos; \ 253 freemempos += (np * PAGE_SIZE); \ 254 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 255 256 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 257 freemempos += PAGE_SIZE; 258 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 259 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 260 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 261 valloc_pages(kernel_pt_table[loop], 262 L2_TABLE_SIZE / PAGE_SIZE); 263 } else { 264 kernel_pt_table[loop].pv_va = freemempos - 265 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 266 L2_TABLE_SIZE_REAL; 267 kernel_pt_table[loop].pv_pa = 268 kernel_pt_table[loop].pv_va - KERNVIRTADDR + 269 KERNPHYSADDR; 270 } 271 i++; 272 } 273 /* 274 * Allocate a page for the system page mapped to V0x00000000 275 * This page will just contain the system vectors and can be 276 * shared by all processes. 277 */ 278 valloc_pages(systempage, 1); 279 280 /* Allocate stacks for all modes */ 281 valloc_pages(irqstack, IRQ_STACK_SIZE); 282 valloc_pages(abtstack, ABT_STACK_SIZE); 283 valloc_pages(undstack, UND_STACK_SIZE); 284 valloc_pages(kernelstack, KSTACK_PAGES); 285 alloc_pages(minidataclean.pv_pa, 1); 286 valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE); 287 /* 288 * Now we start construction of the L1 page table 289 * We start by mapping the L2 page tables into the L1. 290 * This means that we can replace L1 mappings later on if necessary 291 */ 292 l1pagetable = kernel_l1pt.pv_va; 293 294 /* Map the L2 pages tables in the L1 page table */ 295 pmap_link_l2pt(l1pagetable, ARM_VECTORS_LOW, 296 &kernel_pt_table[KERNEL_PT_SYS]); 297 for (i = 0; i < KERNEL_PT_KERN_NUM; i++) 298 pmap_link_l2pt(l1pagetable, KERNBASE + i * 0x100000, 299 &kernel_pt_table[KERNEL_PT_KERN + i]); 300 pmap_map_chunk(l1pagetable, KERNBASE, KERNPHYSADDR, 301 (((uint32_t)(lastaddr) - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1), 302 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 303 afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE 304 - 1)); 305 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 306 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000, 307 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 308 } 309 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa, 310 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 311 312 313 /* Map the vector page. */ 314 pmap_map_entry(l1pagetable, ARM_VECTORS_LOW, systempage.pv_pa, 315 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 316 /* Map the stack pages */ 317 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 318 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 319 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 320 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 321 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 322 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 323 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 324 KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 325 326 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 327 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 328 pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa, 329 MSGBUF_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 330 331 332 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 333 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 334 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 335 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 336 } 337 338 pmap_devmap_bootstrap(l1pagetable, kb920x_devmap); 339 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 340 setttb(kernel_l1pt.pv_pa); 341 cpu_tlb_flushID(); 342 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 343 cninit(); 344 345 /* 346 * Pages were allocated during the secondary bootstrap for the 347 * stacks for different CPU modes. 348 * We must now set the r13 registers in the different CPU modes to 349 * point to these stacks. 350 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 351 * of the stack memory. 352 */ 353 354 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 355 set_stackptr(PSR_IRQ32_MODE, 356 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 357 set_stackptr(PSR_ABT32_MODE, 358 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 359 set_stackptr(PSR_UND32_MODE, 360 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 361 362 363 364 /* 365 * We must now clean the cache again.... 366 * Cleaning may be done by reading new data to displace any 367 * dirty data in the cache. This will have happened in setttb() 368 * but since we are boot strapping the addresses used for the read 369 * may have just been remapped and thus the cache could be out 370 * of sync. A re-clean after the switch will cure this. 371 * After booting there are no gross reloations of the kernel thus 372 * this problem will not occur after initarm(). 373 */ 374 cpu_idcache_wbinv_all(); 375 376 /* Set stack for exception handlers */ 377 378 data_abort_handler_address = (u_int)data_abort_handler; 379 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 380 undefined_handler_address = (u_int)undefinedinstruction_bounce; 381 undefined_init(); 382 383 proc_linkup(&proc0, &ksegrp0, &thread0); 384 thread0.td_kstack = kernelstack.pv_va; 385 thread0.td_pcb = (struct pcb *) 386 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 387 thread0.td_pcb->pcb_flags = 0; 388 thread0.td_frame = &proc0_tf; 389 pcpup->pc_curpcb = thread0.td_pcb; 390 391 arm_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 392 393 pmap_curmaxkvaddr = afterkern + 0x100000 * (KERNEL_PT_KERN_NUM - 1); 394 pmap_bootstrap(freemempos, 395 KERNVIRTADDR + 3 * memsize, 396 &kernel_l1pt); 397 msgbufp = (void*)msgbufpv.pv_va; 398 msgbufinit(msgbufp, MSGBUF_SIZE); 399 mutex_init(); 400 401 i = 0; 402 dump_avail[0] = KERNPHYSADDR; 403 dump_avail[1] = KERNPHYSADDR + memsize; 404 dump_avail[2] = 0; 405 dump_avail[3] = 0; 406 407 phys_avail[0] = freemempos - KERNVIRTADDR + KERNPHYSADDR; 408 phys_avail[1] = KERNPHYSADDR + memsize; 409 phys_avail[2] = 0; 410 phys_avail[3] = 0; 411 /* Do basic tuning, hz etc */ 412 init_param1(); 413 init_param2(memsize / PAGE_SIZE); 414 avail_end = KERNPHYSADDR + memsize - 1; 415 kdb_init(); 416 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 417 sizeof(struct pcb))); 418} 419