at91var.h revision 236658 
1/*-
2 * Copyright (c) 2005 Olivier Houchard.  All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26/* $FreeBSD: head/sys/arm/at91/at91var.h 236658 2012-06-06 06:19:52Z imp $ */
27
28#ifndef _AT91VAR_H_
29#define _AT91VAR_H_
30
31#include <sys/bus.h>
32#include <sys/rman.h>
33
34#include <arm/at91/at91reg.h>
35
36struct at91_softc {
37	device_t dev;
38	bus_space_tag_t sc_st;
39	bus_space_handle_t sc_sh;
40	bus_space_handle_t sc_aic_sh;
41	struct rman sc_irq_rman;
42	struct rman sc_mem_rman;
43	uint32_t sc_irq_system;
44};
45
46struct at91_ivar {
47	struct resource_list resources;
48};
49
50struct cpu_devs
51{
52	const char *name;
53	int unit;
54	bus_addr_t mem_base;
55	bus_size_t mem_len;
56	int irq0;
57	int irq1;
58	int irq2;
59	const char *parent_clk;
60};
61
62enum at91_soc_type {
63	AT91_T_NONE = 0,
64	AT91_T_CAP9,
65	AT91_T_RM9200,
66	AT91_T_SAM9260,
67	AT91_T_SAM9261,
68	AT91_T_SAM9263,
69	AT91_T_SAM9G10,
70	AT91_T_SAM9G20,
71	AT91_T_SAM9G45,
72	AT91_T_SAM9N12,
73	AT91_T_SAM9RL,
74	AT91_T_SAM9X5,
75};
76
77enum at91_soc_subtype {
78	AT91_ST_NONE = 0,
79	/* AT91RM9200 */
80	AT91_ST_RM9200_BGA,
81	AT91_ST_RM9200_PQFP,
82	/* AT91SAM9260 */
83	AT91_ST_SAM9XE,
84	/* AT91SAM9G45 */
85	AT91_ST_SAM9G45,
86	AT91_ST_SAM9M10,
87	AT91_ST_SAM9G46,
88	AT91_ST_SAM9M11,
89	/* AT91SAM9X5 */
90	AT91_ST_SAM9G15,
91	AT91_ST_SAM9G25,
92	AT91_ST_SAM9G35,
93	AT91_ST_SAM9X25,
94	AT91_ST_SAM9X35,
95};
96
97enum at91_soc_family {
98	AT91_FAMILY_SAM9 = 0x19,
99	AT91_FAMILY_SAM9XE = 0x29,
100	AT91_FAMILY_RM92 = 0x92,
101};
102
103#define AT91_SOC_NAME_MAX 50
104
105struct at91_soc_info {
106	enum at91_soc_type type;
107	enum at91_soc_subtype subtype;
108	enum at91_soc_family family;
109	uint32_t cidr;
110	uint32_t exid;
111	char name[AT91_SOC_NAME_MAX];
112};
113
114extern struct at91_soc_info soc_data;
115
116static inline int at91_is_rm92(void);
117static inline int at91_is_sam9(void);
118static inline int at91_is_sam9xe(void);
119static inline int at91_cpu_is(u_int cpu);
120
121static inline int
122at91_is_rm92(void)
123{
124
125	return (soc_data.type == AT91_T_RM9200);
126}
127
128static inline int
129at91_is_sam9(void)
130{
131
132	return (soc_data.family == AT91_FAMILY_SAM9);
133}
134
135static inline int
136at91_is_sam9xe(void)
137{
138
139	return (soc_data.family == AT91_FAMILY_SAM9XE);
140}
141
142static inline int
143at91_cpu_is(u_int cpu)
144{
145
146	return (soc_data.type == cpu);
147}
148
149extern uint32_t at91_irq_system;
150extern uint32_t at91_master_clock;
151void at91_pmc_init_clock(void);
152
153#endif /* _AT91VAR_H_ */
154