at91sam9x5reg.h revision 238922
1254885Sdumbbell/*-
2254885Sdumbbell * Copyright (c) 2009 Sylvestre Gallon.  All rights reserved.
3254885Sdumbbell * Copyright (c) 2010 Greg Ansley.  All rights reserved.
4254885Sdumbbell * Copyright (c) 2012 M. Warener Losh.  All rights reserved.
5254885Sdumbbell *
6254885Sdumbbell * Redistribution and use in source and binary forms, with or without
7254885Sdumbbell * modification, are permitted provided that the following conditions
8254885Sdumbbell * are met:
9254885Sdumbbell * 1. Redistributions of source code must retain the above copyright
10254885Sdumbbell *    notice, this list of conditions and the following disclaimer.
11254885Sdumbbell * 2. Redistributions in binary form must reproduce the above copyright
12254885Sdumbbell *    notice, this list of conditions and the following disclaimer in the
13254885Sdumbbell *    documentation and/or other materials provided with the distribution.
14254885Sdumbbell *
15254885Sdumbbell * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16254885Sdumbbell * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17254885Sdumbbell * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18254885Sdumbbell * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
19254885Sdumbbell * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20254885Sdumbbell * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21254885Sdumbbell * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22254885Sdumbbell * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23254885Sdumbbell * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24254885Sdumbbell * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25254885Sdumbbell * SUCH DAMAGE.
26254885Sdumbbell */
27254885Sdumbbell
28254885Sdumbbell/* $FreeBSD: head/sys/arm/at91/at91sam9x5reg.h 238922 2012-07-30 21:30:43Z imp $ */
29254885Sdumbbell
30254885Sdumbbell#ifndef AT91SAM9X5REG_H_
31254885Sdumbbell#define AT91SAM9X5REG_H_
32254885Sdumbbell
33254885Sdumbbell#ifndef AT91SAM9X25_MASTER_CLOCK
34254885Sdumbbell#define AT91SAM9X25_MASTER_CLOCK ((18432000 * 43)/6)
35254885Sdumbbell#endif
36254885Sdumbbell
37254885Sdumbbell/* Chip Specific limits */
38254885Sdumbbell#define SAM9X25_PLL_A_MIN_IN_FREQ	  2000000 /*   2 Mhz */
39254885Sdumbbell#define SAM9X25_PLL_A_MAX_IN_FREQ	 32000000 /*  32 Mhz */
40254885Sdumbbell#define SAM9X25_PLL_A_MIN_OUT_FREQ	400000000 /* 400 Mhz */
41254885Sdumbbell#define SAM9X25_PLL_A_MAX_OUT_FREQ	800000000 /* 800 Mhz */
42254885Sdumbbell#define SAM9X25_PLL_A_MUL_SHIFT 16
43254885Sdumbbell#define SAM9X25_PLL_A_MUL_MASK 0xFF
44254885Sdumbbell#define SAM9X25_PLL_A_DIV_SHIFT 0
45254885Sdumbbell#define SAM9X25_PLL_A_DIV_MASK 0xFF
46254885Sdumbbell
47254885Sdumbbell#define SAM9X25_PLL_B_MIN_IN_FREQ	  2000000 /*   2 Mhz */
48254885Sdumbbell#define SAM9X25_PLL_B_MAX_IN_FREQ	 32000000 /*  32 Mhz */
49254885Sdumbbell#define SAM9X25_PLL_B_MIN_OUT_FREQ	 30000000 /*  30 Mhz */
50254885Sdumbbell#define SAM9X25_PLL_B_MAX_OUT_FREQ	100000000 /* 100 Mhz */
51254885Sdumbbell#define SAM9X25_PLL_B_MUL_SHIFT 16
52254885Sdumbbell#define SAM9X25_PLL_B_MUL_MASK 0x3F
53254885Sdumbbell#define SAM9X25_PLL_B_DIV_SHIFT 0
54254885Sdumbbell#define SAM9X25_PLL_B_DIV_MASK 0xFF
55254885Sdumbbell
56254885Sdumbbell/*
57254885Sdumbbell * Memory map, from datasheet :
58254885Sdumbbell * 0x00000000 - 0x0ffffffff : Internal Memories
59254885Sdumbbell * 0x10000000 - 0x1ffffffff : Chip Select 0
60254885Sdumbbell * 0x20000000 - 0x2ffffffff : Chip Select 1 DDR2/LPDDR/SDR/LPSDR
61254885Sdumbbell * 0x30000000 - 0x3ffffffff : Chip Select 2
62254885Sdumbbell * 0x40000000 - 0x4ffffffff : Chip Select 3 NAND Flash
63254885Sdumbbell * 0x50000000 - 0x5ffffffff : Chip Select 4
64254885Sdumbbell * 0x60000000 - 0x6ffffffff : Chip Select 5
65254885Sdumbbell * 0x70000000 - 0xeffffffff : Undefined (Abort)
66254885Sdumbbell * 0xf0000000 - 0xfffffffff : Peripherals
67254885Sdumbbell */
68254885Sdumbbell
69254885Sdumbbell#define AT91_CHIPSELECT_0 0x10000000
70254885Sdumbbell#define AT91_CHIPSELECT_1 0x20000000
71254885Sdumbbell#define AT91_CHIPSELECT_2 0x30000000
72254885Sdumbbell#define AT91_CHIPSELECT_3 0x40000000
73254885Sdumbbell#define AT91_CHIPSELECT_4 0x50000000
74254885Sdumbbell#define AT91_CHIPSELECT_5 0x60000000
75254885Sdumbbell
76254885Sdumbbell#define AT91SAM9X25_EMAC_SIZE  0x4000
77254885Sdumbbell#define AT91SAM9X25_EMAC0_BASE 0x802c000
78254885Sdumbbell#define AT91SAM9X25_EMAC0_SIZE AT91SAM9X25_EMAC_SIZE
79254885Sdumbbell#define AT91SAM9X25_EMAC1_BASE 0x8030000
80254885Sdumbbell#define AT91SAM9X25_EMAC1_SIZE AT91SAM9X25_EMAC_SIZE
81254885Sdumbbell
82254885Sdumbbell#define AT91SAM9X25_RSTC_BASE	0xffffe00
83254885Sdumbbell#define AT91SAM9X25_RSTC_SIZE	0x10
84254885Sdumbbell
85254885Sdumbbell/* USART*/
86254885Sdumbbell
87254885Sdumbbell#define AT91SAM9X25_USART_SIZE	0x4000
88254885Sdumbbell#define AT91SAM9X25_USART0_BASE	0x801c000
89254885Sdumbbell#define AT91SAM9X25_USART0_PDC	0x801c100
90254885Sdumbbell#define AT91SAM9X25_USART0_SIZE	AT91SAM9X25_USART_SIZE
91254885Sdumbbell#define AT91SAM9X25_USART1_BASE	0x8020000
92254885Sdumbbell#define AT91SAM9X25_USART1_PDC	0x8020100
93254885Sdumbbell#define AT91SAM9X25_USART1_SIZE	AT91SAM9X25_USART_SIZE
94254885Sdumbbell#define AT91SAM9X25_USART2_BASE	0x8024000
95254885Sdumbbell#define AT91SAM9X25_USART2_PDC	0x8024100
96254885Sdumbbell#define AT91SAM9X25_USART2_SIZE	AT91SAM9X25_USART_SIZE
97254885Sdumbbell#define AT91SAM9X25_USART3_BASE	0x8028000
98254885Sdumbbell#define AT91SAM9X25_USART3_PDC	0x8028100
99254885Sdumbbell#define AT91SAM9X25_USART3_SIZE	AT91SAM9X25_USART_SIZE
100254885Sdumbbell
101254885Sdumbbell/*TC*/
102254885Sdumbbell#define AT91SAM9X25_TC0_BASE	0x8008000
103254885Sdumbbell#define AT91SAM9X25_TC0_SIZE	0x4000
104254885Sdumbbell#define AT91SAM9X25_TC0C0_BASE	0x8008000
105254885Sdumbbell#define AT91SAM9X25_TC0C1_BASE	0x8008040
106254885Sdumbbell#define AT91SAM9X25_TC0C2_BASE	0x8008080
107254885Sdumbbell
108254885Sdumbbell#define AT91SAM9X25_TC1_BASE	0x800c000
109254885Sdumbbell#define AT91SAM9X25_TC1_SIZE	0x4000
110254885Sdumbbell
111254885Sdumbbell/*SPI*/
112254885Sdumbbell
113254885Sdumbbell#define AT91SAM9X25_SPI0_BASE	0x0000000
114254885Sdumbbell
115254885Sdumbbell#define AT91SAM9X25_SPI0_SIZE	0x4000
116254885Sdumbbell
117254885Sdumbbell#define AT91SAM9X25_SPI1_BASE	0x0004000
118254885Sdumbbell#define AT91SAM9X25_SPI1_SIZE	0x4000
119254885Sdumbbell
120254885Sdumbbell/* System Registers */
121254885Sdumbbell#define AT91SAM9X25_SYS_BASE	0xffff000
122254885Sdumbbell#define AT91SAM9X25_SYS_SIZE	0x1000
123254885Sdumbbell
124254885Sdumbbell#define AT91SAM9X25_MATRIX_BASE	0xfffde00
125254885Sdumbbell#define AT91SAM9X25_MATRIX_SIZE	0x200
126254885Sdumbbell
127254885Sdumbbell#define AT91SAM9X25_DBGU_BASE	0xffff200
128254885Sdumbbell#define AT91SAM9X25_DBGU_SIZE	0x200
129254885Sdumbbell
130254885Sdumbbell/*
131254885Sdumbbell * PIO
132254885Sdumbbell */
133254885Sdumbbell#define AT91SAM9X25_PIOA_BASE	0xffff400
134254885Sdumbbell#define AT91SAM9X25_PIOA_SIZE	0x200
135254885Sdumbbell#define AT91SAM9X25_PIOB_BASE	0xffff600
136254885Sdumbbell#define AT91SAM9X25_PIOB_SIZE	0x200
137254885Sdumbbell#define AT91SAM9X25_PIOC_BASE	0xffff800
138254885Sdumbbell#define AT91SAM9X25_PIOC_SIZE	0x200
139254885Sdumbbell#define AT91SAM9X25_PIOD_BASE	0xffffa00
140254885Sdumbbell#define AT91SAM9X25_PIOD_SIZE	0x200
141254885Sdumbbell
142254885Sdumbbell#define AT91RM92_PMC_BASE	0xffffc00
143254885Sdumbbell#define AT91RM92_PMC_SIZE	0x100
144254885Sdumbbell/* IRQs :
145254885Sdumbbell * 0: AIC
146254885Sdumbbell * 1: System peripheral (System timer, RTC, DBGU)
147254885Sdumbbell * 2: PIO Controller A,B
148254885Sdumbbell * 3: PIO Controller C,D
149254885Sdumbbell * 4: SMD Soft Modem
150254885Sdumbbell * 5: USART 0
151254885Sdumbbell * 6: USART 1
152254885Sdumbbell * 7: USART 2
153254885Sdumbbell * 8: USART 3
154254885Sdumbbell * 9: Two-wirte interface
155254885Sdumbbell * 10: Two-wirte interface
156254885Sdumbbell * 11: Two-wirte interface
157254885Sdumbbell * 12: HSMCI Interface
158254885Sdumbbell * 13: SPI 0
159254885Sdumbbell * 14: SPI 1
160254885Sdumbbell * 15: UART0
161254885Sdumbbell * 16: UART1
162254885Sdumbbell * 17: Timer Counter 0,1
163254885Sdumbbell * 18: PWM
164254885Sdumbbell * 19: ADC
165254885Sdumbbell * 20: DMAC 0
166254885Sdumbbell * 21: DMAC 1
167254885Sdumbbell * 22: UHPHS - USB Host controller
168254885Sdumbbell * 23: UDPHS - USB Device Controller
169254885Sdumbbell * 24: EMAC0
170254885Sdumbbell * 25: LCD controller or Image Sensor Interface
171254885Sdumbbell * 26: HSMCI1
172254885Sdumbbell * 27: EMAC1
173254885Sdumbbell * 28: SSC
174254885Sdumbbell * 29: CAN0
175254885Sdumbbell * 30: CAN1
176254885Sdumbbell * 31: AIC IRQ0
177254885Sdumbbell */
178254885Sdumbbell
179254885Sdumbbell#define AT91SAM9X25_IRQ_AIC	0
180254885Sdumbbell#define AT91SAM9X25_IRQ_SYSTEM	1
181254885Sdumbbell#define AT91SAM9X25_IRQ_PIOAB	2
182254885Sdumbbell#define AT91SAM9X25_IRQ_PIOCD	3
183254885Sdumbbell#define AT91SAM9X25_IRQ_SMD	4
184254885Sdumbbell#define AT91SAM9X25_IRQ_USART0	5
185254885Sdumbbell#define AT91SAM9X25_IRQ_USART1	6
186254885Sdumbbell#define AT91SAM9X25_IRQ_USART2	7
187254885Sdumbbell#define AT91SAM9X25_IRQ_USART3	8
188254885Sdumbbell#define AT91SAM9X25_IRQ_TWI0	9
189254885Sdumbbell#define AT91SAM9X25_IRQ_TWI1	10
190254885Sdumbbell#define AT91SAM9X25_IRQ_TWI2	11
191254885Sdumbbell#define AT91SAM9X25_IRQ_HSMCI0	12
192254885Sdumbbell#define AT91SAM9X25_IRQ_SPI0	13
193254885Sdumbbell#define AT91SAM9X25_IRQ_SPI1	14
194254885Sdumbbell#define AT91SAM9X25_IRQ_UART0	15
195254885Sdumbbell#define AT91SAM9X25_IRQ_UART1	16
196254885Sdumbbell#define AT91SAM9X25_IRQ_TC01	17
197254885Sdumbbell#define AT91SAM9X25_IRQ_PWM	18
198254885Sdumbbell#define AT91SAM9X25_IRQ_ADC	19
199254885Sdumbbell#define AT91SAM9X25_IRQ_DMAC0	20
200254885Sdumbbell#define AT91SAM9X25_IRQ_DMAC1	21
201254885Sdumbbell#define AT91SAM9X25_IRQ_UHPHS	22
202254885Sdumbbell#define AT91SAM9X25_IRQ_UDPHS	23
203254885Sdumbbell#define AT91SAM9X25_IRQ_EMAC0	24
204254885Sdumbbell#define AT91SAM9X25_IRQ_HSMCI1	26
205254885Sdumbbell#define AT91SAM9X25_IRQ_EMAC1	27
206254885Sdumbbell#define AT91SAM9X25_IRQ_SSC	28
207254885Sdumbbell#define AT91SAM9X25_IRQ_CAN0	29
208254885Sdumbbell#define AT91SAM9X25_IRQ_CAN1	30
209254885Sdumbbell#define AT91SAM9X25_IRQ_AICBASE	31
210254885Sdumbbell
211254885Sdumbbell/* Alias */
212254885Sdumbbell#define AT91SAM9X25_IRQ_DBGU 	AT91SAM9X25_IRQ_SYSTEM
213254885Sdumbbell#define AT91SAM9X25_IRQ_PMC 	AT91SAM9X25_IRQ_SYSTEM
214254885Sdumbbell#define AT91SAM9X25_IRQ_WDT 	AT91SAM9X25_IRQ_SYSTEM
215254885Sdumbbell#define AT91SAM9X25_IRQ_PIT 	AT91SAM9X25_IRQ_SYSTEM
216254885Sdumbbell#define AT91SAM9X25_IRQ_RSTC 	AT91SAM9X25_IRQ_SYSTEM
217254885Sdumbbell#define AT91SAM9X25_IRQ_OHCI 	AT91SAM9X25_IRQ_UHPHS
218254885Sdumbbell#define AT91SAM9X25_IRQ_EHCI 	AT91SAM9X25_IRQ_UHPHS
219254885Sdumbbell#define AT91SAM9X25_IRQ_PIOA    AT91SAM9X25_IRQ_PIOAB
220254885Sdumbbell#define AT91SAM9X25_IRQ_PIOB    AT91SAM9X25_IRQ_PIOAB
221254885Sdumbbell#define AT91SAM9X25_IRQ_PIOC    AT91SAM9X25_IRQ_PIOCD
222254885Sdumbbell#define AT91SAM9X25_IRQ_PIOD    AT91SAM9X25_IRQ_PIOCD
223254885Sdumbbell#define AT91SAM9X25_IRQ_NAND 	(-1)
224254885Sdumbbell
225254885Sdumbbell#define AT91SAM9X25_AIC_BASE	0xffff000
226254885Sdumbbell#define AT91SAM9X25_AIC_SIZE	0x200
227254885Sdumbbell
228254885Sdumbbell/* Timer */
229254885Sdumbbell
230254885Sdumbbell#define AT91SAM9X25_WDT_BASE	0xffffd40
231254885Sdumbbell#define AT91SAM9X25_WDT_SIZE	0x10
232254885Sdumbbell
233254885Sdumbbell#define AT91SAM9X25_PIT_BASE	0xffffd30
234254885Sdumbbell#define AT91SAM9X25_PIT_SIZE	0x10
235254885Sdumbbell
236254885Sdumbbell#define AT91SAM9X25_SMC_BASE	0xfffea00
237254885Sdumbbell#define AT91SAM9X25_SMC_SIZE	0x200
238254885Sdumbbell
239254885Sdumbbell#define AT91SAM9X25_PMC_BASE	0xffffc00
240254885Sdumbbell#define AT91SAM9X25_PMC_SIZE	0x100
241254885Sdumbbell
242254885Sdumbbell#define AT91SAM9X25_UDPHS_BASE	0x803c000
243254885Sdumbbell#define AT91SAM9X25_UDPHS_SIZE	0x4000
244261455Seadler
245254885Sdumbbell#define AT91SAM9X25_HSMCI_SIZE	0x4000
246254885Sdumbbell#define AT91SAM9X25_HSMCI0_BASE	0x0008000
247254885Sdumbbell#define AT91SAM9X25_HSMCI0_SIZE AT91SAM9X25_HSMCI_SIZE
248254885Sdumbbell#define AT91SAM9X25_HSMCI1_BASE	0x000c000
249261455Seadler#define AT91SAM9X25_HSMCI1_SIZE AT91SAM9X25_HSMCI_SIZE
250254885Sdumbbell
251254885Sdumbbell#define AT91SAM9X25_TWI_SIZE	0x4000
252254885Sdumbbell#define AT91SAM9X25_TWI0_BASE	0xffaC000
253254885Sdumbbell#define AT91SAM9X25_TWI0_SIZE	AT91SAM9X25_TWI_SIZE
254254885Sdumbbell#define AT91SAM9X25_TWI1_BASE	0xffaC000
255254885Sdumbbell#define AT91SAM9X25_TWI1_SIZE	AT91SAM9X25_TWI_SIZE
256254885Sdumbbell#define AT91SAM9X25_TWI2_BASE	0xffaC000
257254885Sdumbbell#define AT91SAM9X25_TWI2_SIZE	AT91SAM9X25_TWI_SIZE
258254885Sdumbbell
259254885Sdumbbell/* XXX Needs to be carfully coordinated with
260254885Sdumbbell * other * soc's so phyical and vm address
261254885Sdumbbell * mapping are unique. XXX
262254885Sdumbbell */
263254885Sdumbbell#define AT91SAM9X25_OHCI_BASE	  0xdfc00000 /* SAME as 9c40 */
264254885Sdumbbell#define AT91SAM9X25_OHCI_PA_BASE  0x00600000
265254885Sdumbbell#define AT91SAM9X25_OHCI_SIZE	  0x00100000
266254885Sdumbbell
267254885Sdumbbell#define AT91SAM9X25_EHCI_BASE	  0xdfd00000
268254885Sdumbbell#define AT91SAM9X25_EHCI_PA_BASE  0x00700000
269254885Sdumbbell#define AT91SAM9X25_EHCI_SIZE	  0x00100000
270254885Sdumbbell
271254885Sdumbbell#define AT91SAM9X25_NAND_BASE     0xe0000000
272254885Sdumbbell#define AT91SAM9X25_NAND_PA_BASE  0x40000000
273254885Sdumbbell#define AT91SAM9X25_NAND_SIZE     0x10000000
274254885Sdumbbell
275254885Sdumbbell
276254885Sdumbbell/* SDRAMC */
277254885Sdumbbell#define AT91SAM9X25_SDRAMC_BASE	0xfffea00               /* SAME as SMC? */
278254885Sdumbbell#define AT91SAM9X25_SDRAMC_MR	0x00
279254885Sdumbbell#define AT91SAM9X25_SDRAMC_MR_MODE_NORMAL	0
280254885Sdumbbell#define AT91SAM9X25_SDRAMC_MR_MODE_NOP	1
281254885Sdumbbell#define AT91SAM9X25_SDRAMC_MR_MODE_PRECHARGE 2
282254885Sdumbbell#define AT91SAM9X25_SDRAMC_MR_MODE_LOAD_MODE_REGISTER 3
283254885Sdumbbell#define AT91SAM9X25_SDRAMC_MR_MODE_REFRESH	4
284254885Sdumbbell#define AT91SAM9X25_SDRAMC_TR	0x04
285254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR	0x08
286254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NC_8		0x0
287254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NC_9		0x1
288254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NC_10	0x2
289254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NC_11	0x3
290254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NC_MASK	0x00000003
291254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NR_11	0x0
292254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NR_12	0x4
293254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NR_13	0x8
294254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NR_RES	0xc
295254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NR_MASK	0x0000000c
296254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NB_2		0x00
297254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NB_4		0x10
298254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_DBW_16		0x80
299254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NB_MASK	0x00000010
300254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_NCAS_MASK	0x00000060
301254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_TWR_MASK	0x00000780
302254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_TRC_MASK	0x00007800
303254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_TRP_MASK	0x00078000
304254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_TRCD_MASK	0x00780000
305254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_TRAS_MASK	0x07800000
306254885Sdumbbell#define AT91SAM9X25_SDRAMC_CR_TXSR_MASK	0x78000000
307254885Sdumbbell#define AT91SAM9X25_SDRAMC_HSR	0x0c
308254885Sdumbbell#define AT91SAM9X25_SDRAMC_LPR	0x10
309254885Sdumbbell#define AT91SAM9X25_SDRAMC_IER	0x14
310254885Sdumbbell#define AT91SAM9X25_SDRAMC_IDR	0x18
311254885Sdumbbell#define AT91SAM9X25_SDRAMC_IMR	0x1c
312254885Sdumbbell#define AT91SAM9X25_SDRAMC_ISR	0x20
313254885Sdumbbell#define AT91SAM9X25_SDRAMC_MDR	0x24
314254885Sdumbbell
315254885Sdumbbell#endif /* AT91SAM9X5REG_H_*/
316254885Sdumbbell