at91_twi.c revision 261687 
1/*-
2 * Copyright (c) 2006 M. Warner Losh.  All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26#include "opt_platform.h"
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/arm/at91/at91_twi.c 261687 2014-02-09 21:01:10Z imp $");
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/bus.h>
34#include <sys/conf.h>
35#include <sys/kernel.h>
36#include <sys/lock.h>
37#include <sys/mbuf.h>
38#include <sys/malloc.h>
39#include <sys/module.h>
40#include <sys/mutex.h>
41#include <sys/rman.h>
42#include <machine/bus.h>
43
44#include <arm/at91/at91_twireg.h>
45#include <arm/at91/at91var.h>
46
47#include <dev/iicbus/iiconf.h>
48#include <dev/iicbus/iicbus.h>
49#include "iicbus_if.h"
50
51#ifdef FDT
52#include <dev/fdt/fdt_common.h>
53#include <dev/ofw/ofw_bus.h>
54#include <dev/ofw/ofw_bus_subr.h>
55#endif
56
57#define	TWI_SLOW_CLOCK		 1500
58#define	TWI_FAST_CLOCK		45000
59#define	TWI_FASTEST_CLOCK	90000
60
61struct at91_twi_softc
62{
63	device_t dev;			/* Myself */
64	void *intrhand;			/* Interrupt handle */
65	struct resource *irq_res;	/* IRQ resource */
66	struct resource	*mem_res;	/* Memory resource */
67	struct mtx sc_mtx;		/* basically a perimeter lock */
68	volatile uint32_t flags;
69	uint32_t cwgr;
70	int	sc_started;
71	int	twi_addr;
72	device_t iicbus;
73};
74
75static inline uint32_t
76RD4(struct at91_twi_softc *sc, bus_size_t off)
77{
78
79	return bus_read_4(sc->mem_res, off);
80}
81
82static inline void
83WR4(struct at91_twi_softc *sc, bus_size_t off, uint32_t val)
84{
85
86	bus_write_4(sc->mem_res, off, val);
87}
88
89#define	AT91_TWI_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
90#define	AT91_TWI_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
91#define	AT91_TWI_LOCK_INIT(_sc) \
92	mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
93	    "twi", MTX_DEF)
94#define	AT91_TWI_LOCK_DESTROY(_sc)	mtx_destroy(&_sc->sc_mtx);
95#define	AT91_TWI_ASSERT_LOCKED(_sc)	mtx_assert(&_sc->sc_mtx, MA_OWNED);
96#define	AT91_TWI_ASSERT_UNLOCKED(_sc)	mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
97#define	TWI_DEF_CLK	100000
98
99static devclass_t at91_twi_devclass;
100
101/* bus entry points */
102
103static int at91_twi_probe(device_t dev);
104static int at91_twi_attach(device_t dev);
105static int at91_twi_detach(device_t dev);
106static void at91_twi_intr(void *);
107
108/* helper routines */
109static int at91_twi_activate(device_t dev);
110static void at91_twi_deactivate(device_t dev);
111
112static int
113at91_twi_probe(device_t dev)
114{
115#ifdef FDT
116	/* XXXX need a whole list, since there's at least 4 different ones */
117	if (!ofw_bus_is_compatible(dev, "atmel,at91sam9g20-i2c"))
118		return (ENXIO);
119#endif
120	device_set_desc(dev, "TWI");
121	return (0);
122}
123
124static int
125at91_twi_attach(device_t dev)
126{
127	struct at91_twi_softc *sc = device_get_softc(dev);
128	int err;
129
130	sc->dev = dev;
131	err = at91_twi_activate(dev);
132	if (err)
133		goto out;
134
135	AT91_TWI_LOCK_INIT(sc);
136
137	/*
138	 * Activate the interrupt
139	 */
140	err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
141	    NULL, at91_twi_intr, sc, &sc->intrhand);
142	if (err) {
143		AT91_TWI_LOCK_DESTROY(sc);
144		goto out;
145	}
146	sc->cwgr = TWI_CWGR_CKDIV(8 * at91_master_clock / TWI_FASTEST_CLOCK) |
147	    TWI_CWGR_CHDIV(TWI_CWGR_DIV(TWI_DEF_CLK)) |
148	    TWI_CWGR_CLDIV(TWI_CWGR_DIV(TWI_DEF_CLK));
149	WR4(sc, TWI_CR, TWI_CR_SWRST);
150	WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
151	WR4(sc, TWI_CWGR, sc->cwgr);
152
153	if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL)
154		device_printf(dev, "could not allocate iicbus instance\n");
155	/* probe and attach the iicbus */
156	bus_generic_attach(dev);
157out:
158	if (err)
159		at91_twi_deactivate(dev);
160	return (err);
161}
162
163static int
164at91_twi_detach(device_t dev)
165{
166	struct at91_twi_softc *sc;
167	int rv;
168
169	sc = device_get_softc(dev);
170	at91_twi_deactivate(dev);
171	if (sc->iicbus && (rv = device_delete_child(dev, sc->iicbus)) != 0)
172		return (rv);
173
174	AT91_TWI_LOCK_DESTROY(sc);
175
176	return (0);
177}
178
179static int
180at91_twi_activate(device_t dev)
181{
182	struct at91_twi_softc *sc;
183	int rid;
184
185	sc = device_get_softc(dev);
186	rid = 0;
187	sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
188	    RF_ACTIVE);
189	if (sc->mem_res == NULL)
190		goto errout;
191	rid = 0;
192	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
193	    RF_ACTIVE);
194	if (sc->irq_res == NULL)
195		goto errout;
196	return (0);
197errout:
198	at91_twi_deactivate(dev);
199	return (ENOMEM);
200}
201
202static void
203at91_twi_deactivate(device_t dev)
204{
205	struct at91_twi_softc *sc;
206
207	sc = device_get_softc(dev);
208	if (sc->intrhand)
209		bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
210	sc->intrhand = 0;
211	bus_generic_detach(sc->dev);
212	if (sc->mem_res)
213		bus_release_resource(dev, SYS_RES_MEMORY,
214		    rman_get_rid(sc->mem_res), sc->mem_res);
215	sc->mem_res = 0;
216	if (sc->irq_res)
217		bus_release_resource(dev, SYS_RES_IRQ,
218		    rman_get_rid(sc->irq_res), sc->irq_res);
219	sc->irq_res = 0;
220	return;
221}
222
223static void
224at91_twi_intr(void *xsc)
225{
226	struct at91_twi_softc *sc = xsc;
227	uint32_t status;
228
229	status = RD4(sc, TWI_SR);
230	if (status == 0)
231		return;
232	AT91_TWI_LOCK(sc);
233	sc->flags |= status & (TWI_SR_OVRE | TWI_SR_UNRE | TWI_SR_NACK);
234	if (status & TWI_SR_RXRDY)
235		sc->flags |= TWI_SR_RXRDY;
236	if (status & TWI_SR_TXRDY)
237		sc->flags |= TWI_SR_TXRDY;
238	if (status & TWI_SR_TXCOMP)
239		sc->flags |= TWI_SR_TXCOMP;
240	WR4(sc, TWI_IDR, status);
241	wakeup(sc);
242	AT91_TWI_UNLOCK(sc);
243	return;
244}
245
246static int
247at91_twi_wait(struct at91_twi_softc *sc, uint32_t bit)
248{
249	int err = 0;
250	int counter = 100000;
251	uint32_t sr;
252
253	AT91_TWI_ASSERT_LOCKED(sc);
254	while (!((sr = RD4(sc, TWI_SR)) & bit) && counter-- > 0 &&
255	    !(sr & TWI_SR_NACK))
256		continue;
257	if (counter <= 0)
258		err = EBUSY;
259	else if (sr & TWI_SR_NACK)
260		err = ENXIO;		// iic nack convention
261	return (err);
262}
263
264static int
265at91_twi_rst_card(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
266{
267	struct at91_twi_softc *sc;
268	int clk;
269
270	sc = device_get_softc(dev);
271	AT91_TWI_LOCK(sc);
272	if (oldaddr)
273		*oldaddr = sc->twi_addr;
274	sc->twi_addr = addr;
275
276	/*
277	 * speeds are for 1.5kb/s, 45kb/s and 90kb/s.
278	 */
279	switch (speed) {
280	case IIC_SLOW:
281		clk = TWI_SLOW_CLOCK;
282		break;
283
284	case IIC_FAST:
285		clk = TWI_FAST_CLOCK;
286		break;
287
288	case IIC_UNKNOWN:
289	case IIC_FASTEST:
290	default:
291		clk = TWI_FASTEST_CLOCK;
292		break;
293	}
294	sc->cwgr = TWI_CWGR_CKDIV(1) | TWI_CWGR_CHDIV(TWI_CWGR_DIV(clk)) |
295	    TWI_CWGR_CLDIV(TWI_CWGR_DIV(clk));
296	WR4(sc, TWI_CR, TWI_CR_SWRST);
297	WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
298	WR4(sc, TWI_CWGR, sc->cwgr);
299	AT91_TWI_UNLOCK(sc);
300
301	return 0;
302}
303
304static int
305at91_twi_callback(device_t dev, int index, caddr_t data)
306{
307	int error = 0;
308
309	switch (index) {
310	case IIC_REQUEST_BUS:
311		break;
312
313	case IIC_RELEASE_BUS:
314		break;
315
316	default:
317		error = EINVAL;
318	}
319
320	return (error);
321}
322
323static int
324at91_twi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
325{
326	struct at91_twi_softc *sc;
327	int i, len, err;
328	uint32_t rdwr;
329	uint8_t *buf;
330	uint32_t sr;
331
332	sc = device_get_softc(dev);
333	err = 0;
334	AT91_TWI_LOCK(sc);
335	for (i = 0; i < nmsgs; i++) {
336		/*
337		 * The linux atmel driver doesn't use the internal device
338		 * address feature of twi.  A separate i2c message needs to
339		 * be written to use this.
340		 * See http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
341		 * for details.  Upon reflection, we could use this as an
342		 * optimization, but it is unclear the code bloat will
343		 * result in faster/better operations.
344		 */
345		rdwr = (msgs[i].flags & IIC_M_RD) ? TWI_MMR_MREAD : 0;
346		WR4(sc, TWI_MMR, TWI_MMR_DADR(msgs[i].slave) | rdwr);
347		len = msgs[i].len;
348		buf = msgs[i].buf;
349		/* zero byte transfers aren't allowed */
350		if (len == 0 || buf == NULL) {
351			err = EINVAL;
352			goto out;
353		}
354		if (len == 1 && msgs[i].flags & IIC_M_RD)
355			WR4(sc, TWI_CR, TWI_CR_START | TWI_CR_STOP);
356		else
357			WR4(sc, TWI_CR, TWI_CR_START);
358		if (msgs[i].flags & IIC_M_RD) {
359			sr = RD4(sc, TWI_SR);
360			while (!(sr & TWI_SR_TXCOMP)) {
361				if ((sr = RD4(sc, TWI_SR)) & TWI_SR_RXRDY) {
362					len--;
363					*buf++ = RD4(sc, TWI_RHR) & 0xff;
364					if (len == 1)
365						WR4(sc, TWI_CR, TWI_CR_STOP);
366				}
367			}
368			if (len > 0 || (sr & TWI_SR_NACK)) {
369				err = ENXIO;		// iic nack convention
370				goto out;
371			}
372		} else {
373			while (len--) {
374				if ((err = at91_twi_wait(sc, TWI_SR_TXRDY)))
375					goto out;
376				WR4(sc, TWI_THR, *buf++);
377			}
378			WR4(sc, TWI_CR, TWI_CR_STOP);
379		}
380		if ((err = at91_twi_wait(sc, TWI_SR_TXCOMP)))
381			break;
382	}
383out:
384	if (err) {
385		WR4(sc, TWI_CR, TWI_CR_SWRST);
386		WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
387		WR4(sc, TWI_CWGR, sc->cwgr);
388	}
389	AT91_TWI_UNLOCK(sc);
390	return (err);
391}
392
393static device_method_t at91_twi_methods[] = {
394	/* Device interface */
395	DEVMETHOD(device_probe,		at91_twi_probe),
396	DEVMETHOD(device_attach,	at91_twi_attach),
397	DEVMETHOD(device_detach,	at91_twi_detach),
398
399	/* iicbus interface */
400	DEVMETHOD(iicbus_callback,	at91_twi_callback),
401	DEVMETHOD(iicbus_reset,		at91_twi_rst_card),
402	DEVMETHOD(iicbus_transfer,	at91_twi_transfer),
403	DEVMETHOD_END
404};
405
406static driver_t at91_twi_driver = {
407	"at91_twi",
408	at91_twi_methods,
409	sizeof(struct at91_twi_softc),
410};
411
412#ifdef FDT
413DRIVER_MODULE(at91_twi, simplebus, at91_twi_driver, at91_twi_devclass, NULL,
414    NULL);
415#else
416DRIVER_MODULE(at91_twi, atmelarm, at91_twi_driver, at91_twi_devclass, NULL,
417    NULL);
418#endif
419DRIVER_MODULE(iicbus, at91_twi, iicbus_driver, iicbus_devclass, NULL, NULL);
420MODULE_DEPEND(at91_twi, iicbus, 1, 1, 1);
421