at91_ohci.c revision 187172
1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25#include <sys/cdefs.h> 26__FBSDID("$FreeBSD: head/sys/dev/usb2/controller/ohci2_atmelarm.c 187172 2009-01-13 19:03:01Z thompsa $"); 27 28#include <dev/usb2/include/usb2_mfunc.h> 29#include <dev/usb2/include/usb2_defs.h> 30#include <dev/usb2/include/usb2_standard.h> 31 32#include <dev/usb2/core/usb2_core.h> 33#include <dev/usb2/core/usb2_busdma.h> 34#include <dev/usb2/core/usb2_process.h> 35#include <dev/usb2/core/usb2_sw_transfer.h> 36#include <dev/usb2/core/usb2_util.h> 37 38#include <dev/usb2/controller/usb2_controller.h> 39#include <dev/usb2/controller/usb2_bus.h> 40#include <dev/usb2/controller/ohci2.h> 41 42#include <sys/rman.h> 43 44#include <arm/at91/at91_pmcvar.h> 45 46#define MEM_RID 0 47 48static device_probe_t ohci_atmelarm_probe; 49static device_attach_t ohci_atmelarm_attach; 50static device_detach_t ohci_atmelarm_detach; 51 52struct at91_ohci_softc { 53 struct ohci_softc sc_ohci; /* must be first */ 54 struct at91_pmc_clock *iclk; 55 struct at91_pmc_clock *fclk; 56}; 57 58static int 59ohci_atmelarm_probe(device_t dev) 60{ 61 device_set_desc(dev, "AT91 integrated OHCI controller"); 62 return (BUS_PROBE_DEFAULT); 63} 64 65static int 66ohci_atmelarm_attach(device_t dev) 67{ 68 struct at91_ohci_softc *sc = device_get_softc(dev); 69 int err; 70 int rid; 71 72 if (sc == NULL) { 73 return (ENXIO); 74 } 75 /* initialise some bus fields */ 76 sc->sc_ohci.sc_bus.parent = dev; 77 sc->sc_ohci.sc_bus.devices = sc->sc_ohci.sc_devices; 78 sc->sc_ohci.sc_bus.devices_max = OHCI_MAX_DEVICES; 79 80 /* get all DMA memory */ 81 if (usb2_bus_mem_alloc_all(&sc->sc_ohci.sc_bus, 82 USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) { 83 return (ENOMEM); 84 } 85 sc->iclk = at91_pmc_clock_ref("ohci_clk"); 86 sc->fclk = at91_pmc_clock_ref("uhpck"); 87 88 sc->sc_ohci.sc_dev = dev; 89 90 rid = MEM_RID; 91 sc->sc_ohci.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 92 &rid, RF_ACTIVE); 93 94 if (!(sc->sc_ohci.sc_io_res)) { 95 err = ENOMEM; 96 goto error; 97 } 98 sc->sc_ohci.sc_io_tag = rman_get_bustag(sc->sc_ohci.sc_io_res); 99 sc->sc_ohci.sc_io_hdl = rman_get_bushandle(sc->sc_ohci.sc_io_res); 100 sc->sc_ohci.sc_io_size = rman_get_size(sc->sc_ohci.sc_io_res); 101 102 rid = 0; 103 sc->sc_ohci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 104 RF_ACTIVE); 105 if (!(sc->sc_ohci.sc_irq_res)) { 106 goto error; 107 } 108 sc->sc_ohci.sc_bus.bdev = device_add_child(dev, "usbus", -1); 109 if (!(sc->sc_ohci.sc_bus.bdev)) { 110 goto error; 111 } 112 device_set_ivars(sc->sc_ohci.sc_bus.bdev, &sc->sc_ohci.sc_bus); 113 114 strlcpy(sc->sc_ohci.sc_vendor, "Atmel", sizeof(sc->sc_ohci.sc_vendor)); 115 116#if (__FreeBSD_version >= 700031) 117 err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 118 NULL, (void *)ohci_interrupt, sc, &sc->sc_ohci.sc_intr_hdl); 119#else 120 err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 121 (void *)ohci_interrupt, sc, &sc->sc_ohci.sc_intr_hdl); 122#endif 123 if (err) { 124 sc->sc_ohci.sc_intr_hdl = NULL; 125 goto error; 126 } 127 /* 128 * turn on the clocks from the AT91's point of view. Keep the unit in reset. 129 */ 130 at91_pmc_clock_enable(sc->iclk); 131 at91_pmc_clock_enable(sc->fclk); 132 bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl, 133 OHCI_CONTROL, 0); 134 135 err = ohci_init(&sc->sc_ohci); 136 if (!err) { 137 err = device_probe_and_attach(sc->sc_ohci.sc_bus.bdev); 138 } 139 if (err) { 140 goto error; 141 } 142 return (0); 143 144error: 145 ohci_atmelarm_detach(dev); 146 return (ENXIO); 147} 148 149static int 150ohci_atmelarm_detach(device_t dev) 151{ 152 struct at91_ohci_softc *sc = device_get_softc(dev); 153 device_t bdev; 154 int err; 155 156 if (sc->sc_ohci.sc_bus.bdev) { 157 bdev = sc->sc_ohci.sc_bus.bdev; 158 device_detach(bdev); 159 device_delete_child(dev, bdev); 160 } 161 /* during module unload there are lots of children leftover */ 162 device_delete_all_children(dev); 163 164 /* 165 * Put the controller into reset, then disable clocks and do 166 * the MI tear down. We have to disable the clocks/hardware 167 * after we do the rest of the teardown. We also disable the 168 * clocks in the opposite order we acquire them, but that 169 * doesn't seem to be absolutely necessary. We free up the 170 * clocks after we disable them, so the system could, in 171 * theory, reuse them. 172 */ 173 bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl, 174 OHCI_CONTROL, 0); 175 176 at91_pmc_clock_disable(sc->fclk); 177 at91_pmc_clock_disable(sc->iclk); 178 at91_pmc_clock_deref(sc->fclk); 179 at91_pmc_clock_deref(sc->iclk); 180 181 if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) { 182 /* 183 * only call ohci_detach() after ohci_init() 184 */ 185 ohci_detach(&sc->sc_ohci); 186 187 err = bus_teardown_intr(dev, sc->sc_ohci.sc_irq_res, sc->sc_ohci.sc_intr_hdl); 188 sc->sc_ohci.sc_intr_hdl = NULL; 189 } 190 if (sc->sc_ohci.sc_irq_res) { 191 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_ohci.sc_irq_res); 192 sc->sc_ohci.sc_irq_res = NULL; 193 } 194 if (sc->sc_ohci.sc_io_res) { 195 bus_release_resource(dev, SYS_RES_MEMORY, MEM_RID, 196 sc->sc_ohci.sc_io_res); 197 sc->sc_ohci.sc_io_res = NULL; 198 } 199 usb2_bus_mem_free_all(&sc->sc_ohci.sc_bus, &ohci_iterate_hw_softc); 200 201 return (0); 202} 203 204static device_method_t ohci_methods[] = { 205 /* Device interface */ 206 DEVMETHOD(device_probe, ohci_atmelarm_probe), 207 DEVMETHOD(device_attach, ohci_atmelarm_attach), 208 DEVMETHOD(device_detach, ohci_atmelarm_detach), 209 DEVMETHOD(device_shutdown, bus_generic_shutdown), 210 211 /* Bus interface */ 212 DEVMETHOD(bus_print_child, bus_generic_print_child), 213 214 {0, 0} 215}; 216 217static driver_t ohci_driver = { 218 "ohci", 219 ohci_methods, 220 sizeof(struct at91_ohci_softc), 221}; 222 223static devclass_t ohci_devclass; 224 225DRIVER_MODULE(ohci, atmelarm, ohci_driver, ohci_devclass, 0, 0); 226MODULE_DEPEND(ohci, usb2_controller, 1, 1, 1); 227MODULE_DEPEND(ohci, usb2_core, 1, 1, 1); 228