sys_machdep.c revision 219134
11573Srgrimes/*-
2144545Sdas * Copyright (c) 1990 The Regents of the University of California.
3144545Sdas * All rights reserved.
41573Srgrimes *
51573Srgrimes * Redistribution and use in source and binary forms, with or without
61573Srgrimes * modification, are permitted provided that the following conditions
71573Srgrimes * are met:
81573Srgrimes * 1. Redistributions of source code must retain the above copyright
91573Srgrimes *    notice, this list of conditions and the following disclaimer.
101573Srgrimes * 2. Redistributions in binary form must reproduce the above copyright
111573Srgrimes *    notice, this list of conditions and the following disclaimer in the
121573Srgrimes *    documentation and/or other materials provided with the distribution.
131573Srgrimes * 3. All advertising materials mentioning features or use of this software
14144545Sdas *    must display the following acknowledgement:
151573Srgrimes *	This product includes software developed by the University of
161573Srgrimes *	California, Berkeley and its contributors.
17144545Sdas * 4. Neither the name of the University nor the names of its contributors
181573Srgrimes *    may be used to endorse or promote products derived from this software
191573Srgrimes *    without specific prior written permission.
201573Srgrimes *
211573Srgrimes * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
221573Srgrimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
231573Srgrimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
241573Srgrimes * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
251573Srgrimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
261573Srgrimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2786170Sobrien * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2886170Sobrien * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
291573Srgrimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30144545Sdas * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31144545Sdas * SUCH DAMAGE.
321573Srgrimes *
331573Srgrimes *	from: @(#)sys_machdep.c	5.5 (Berkeley) 1/19/91
34144545Sdas */
35144545Sdas
36144545Sdas#include <sys/cdefs.h>
371573Srgrimes__FBSDID("$FreeBSD: head/sys/arm/arm/sys_machdep.c 219134 2011-03-01 13:35:48Z rwatson $");
38144545Sdas
391573Srgrimes#include "opt_capabilities.h"
401573Srgrimes
41144545Sdas#include <sys/param.h>
42144545Sdas#include <sys/systm.h>
431573Srgrimes#include <sys/capability.h>
44144545Sdas#include <sys/proc.h>
45144545Sdas#include <sys/sysproto.h>
46144545Sdas#include <sys/syscall.h>
47144545Sdas#include <sys/sysent.h>
48144545Sdas
49144545Sdas#include <machine/sysarch.h>
50144545Sdas
51144545Sdas#ifndef _SYS_SYSPROTO_H_
52144545Sdasstruct sysarch_args {
53144545Sdas	int op;
54144545Sdas	char *parms;
55144545Sdas};
56144545Sdas#endif
57144545Sdas
58144545Sdas/* Prototypes */
59144545Sdasstatic int arm32_sync_icache (struct thread *, void *);
60144545Sdasstatic int arm32_drain_writebuf(struct thread *, void *);
61144545Sdas
62144545Sdasstatic int
631573Srgrimesarm32_sync_icache(struct thread *td, void *args)
64144545Sdas{
65144545Sdas	struct arm_sync_icache_args ua;
66144545Sdas	int error;
67144545Sdas
68144545Sdas	if ((error = copyin(args, &ua, sizeof(ua))) != 0)
69144545Sdas		return (error);
70144545Sdas
71144545Sdas	cpu_icache_sync_range(ua.addr, ua.len);
721573Srgrimes
73	td->td_retval[0] = 0;
74	return (0);
75}
76
77static int
78arm32_drain_writebuf(struct thread *td, void *args)
79{
80	/* No args. */
81
82	td->td_retval[0] = 0;
83	cpu_drain_writebuf();
84	return (0);
85}
86
87static int
88arm32_set_tp(struct thread *td, void *args)
89{
90
91	td->td_md.md_tp = (register_t)args;
92	return (0);
93}
94
95static int
96arm32_get_tp(struct thread *td, void *args)
97{
98
99	td->td_retval[0] = td->td_md.md_tp;
100	return (0);
101}
102
103int
104sysarch(td, uap)
105	struct thread *td;
106	register struct sysarch_args *uap;
107{
108	int error;
109
110#ifdef CAPABILITIES
111	/*
112	 * Whitelist of operations which are safe enough for capability mode.
113	 */
114	if (IN_CAPABILITY_MODE(td)) {
115		switch (uap->op) {
116			case ARM_SYNC_ICACHE:
117			case ARM_DRAIN_WRITEBUF:
118			case ARM_SET_TP:
119			case ARM_GET_TP:
120				break;
121
122			default:
123				return (ECAPMODE);
124		}
125	}
126#endif
127
128	switch (uap->op) {
129	case ARM_SYNC_ICACHE :
130		error = arm32_sync_icache(td, uap->parms);
131		break;
132	case ARM_DRAIN_WRITEBUF :
133		error = arm32_drain_writebuf(td, uap->parms);
134		break;
135	case ARM_SET_TP:
136		error = arm32_set_tp(td, uap->parms);
137		break;
138	case ARM_GET_TP:
139		error = arm32_get_tp(td, uap->parms);
140		break;
141	default:
142		error = EINVAL;
143		break;
144	}
145	return (error);
146}
147