support.S revision 129198
1129198Scognet/*-
2129198Scognet * Copyright (c) 2004 Olivier Houchard
3129198Scognet * All rights reserved.
4129198Scognet *
5129198Scognet * Redistribution and use in source and binary forms, with or without
6129198Scognet * modification, are permitted provided that the following conditions
7129198Scognet * are met:
8129198Scognet * 1. Redistributions of source code must retain the above copyright
9129198Scognet *    notice, this list of conditions and the following disclaimer.
10129198Scognet * 2. Redistributions in binary form must reproduce the above copyright
11129198Scognet *    notice, this list of conditions and the following disclaimer in the
12129198Scognet *    documentation and/or other materials provided with the distribution.
13129198Scognet *
14129198Scognet * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15129198Scognet * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16129198Scognet * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17129198Scognet * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18129198Scognet * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19129198Scognet * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20129198Scognet * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21129198Scognet * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22129198Scognet * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23129198Scognet * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24129198Scognet * SUCH DAMAGE.
25129198Scognet */
26129198Scognet
27129198Scognet#include <machine/asm.h>
28129198Scognet#include <machine/asmacros.h>
29129198Scognet__FBSDID("$FreeBSD: head/sys/arm/arm/support.S 129198 2004-05-14 11:46:45Z cognet $");
30129198Scognet
31129198Scognet#include "assym.s"
32129198Scognet
33129198ScognetENTRY(casuptr)
34129198Scognet	mov	r1, r2
35129198Scognet	bl	suword
36129198Scognet/*
37129198Scognet * New experimental definitions of IRQdisable and IRQenable
38129198Scognet * These keep FIQ's enabled since FIQ's are special.
39129198Scognet */
40129198Scognet
41129198Scognet#define IRQdisable \
42129198Scognet	mrs	r14, cpsr ; \
43129198Scognet	orr	r14, r14, #(I32_bit) ; \
44129198Scognet	msr	cpsr_c, r14 ; \
45129198Scognet
46129198Scognet#define IRQenable \
47129198Scognet	mrs	r14, cpsr ; \
48129198Scognet	bic	r14, r14, #(I32_bit) ; \
49129198Scognet	msr	cpsr_c, r14 ; \
50129198Scognet
51129198Scognet/*
52129198Scognet * These are used for switching the translation table/DACR.
53129198Scognet * Since the vector page can be invalid for a short time, we must
54129198Scognet * disable both regular IRQs *and* FIQs.
55129198Scognet *
56129198Scognet * XXX: This is not necessary if the vector table is relocated.
57129198Scognet */
58129198Scognet#define IRQdisableALL \
59129198Scognet	mrs	r14, cpsr ; \
60129198Scognet	orr	r14, r14, #(I32_bit) ; \
61129198Scognet	msr	cpsr_all, r14
62129198Scognet
63129198Scognet#define IRQenableALL \
64129198Scognet	mrs	r14, cpsr ; \
65129198Scognet	bic	r14, r14, #(I32_bit) ; \
66129198Scognet	msr	cpsr_all, r14
67129198Scognet
68129198ScognetENTRY(disable_intr)
69129198Scognet	IRQdisableALL
70129198ScognetENTRY(enable_intr)
71129198Scognet	IRQenableALL
72129198Scognet
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