machdep.c revision 327656
1/* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3/*- 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 1994-1998 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Brinicombe 22 * for the NetBSD Project. 23 * 4. The name of the company nor the name of the author may be used to 24 * endorse or promote products derived from this software without specific 25 * prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * Machine dependent functions for kernel setup 40 * 41 * Created : 17/09/94 42 * Updated : 18/04/01 updated for new wscons 43 */ 44 45#include "opt_compat.h" 46#include "opt_ddb.h" 47#include "opt_kstack_pages.h" 48#include "opt_platform.h" 49#include "opt_sched.h" 50#include "opt_timer.h" 51 52#include <sys/cdefs.h> 53__FBSDID("$FreeBSD: stable/11/sys/arm/arm/machdep.c 327656 2018-01-06 23:24:52Z ian $"); 54 55#include <sys/param.h> 56#include <sys/buf.h> 57#include <sys/bus.h> 58#include <sys/cons.h> 59#include <sys/cpu.h> 60#include <sys/devmap.h> 61#include <sys/efi.h> 62#include <sys/imgact.h> 63#include <sys/kdb.h> 64#include <sys/kernel.h> 65#include <sys/linker.h> 66#include <sys/msgbuf.h> 67#include <sys/rwlock.h> 68#include <sys/sched.h> 69#include <sys/syscallsubr.h> 70#include <sys/sysent.h> 71#include <sys/sysproto.h> 72 73#include <vm/vm_object.h> 74#include <vm/vm_page.h> 75#include <vm/vm_pager.h> 76 77#include <machine/debug_monitor.h> 78#include <machine/machdep.h> 79#include <machine/metadata.h> 80#include <machine/pcb.h> 81#include <machine/physmem.h> 82#include <machine/platform.h> 83#include <machine/sysarch.h> 84#include <machine/undefined.h> 85#include <machine/vfp.h> 86#include <machine/vmparam.h> 87 88#ifdef FDT 89#include <dev/fdt/fdt_common.h> 90#include <machine/ofw_machdep.h> 91#endif 92 93#ifdef DEBUG 94#define debugf(fmt, args...) printf(fmt, ##args) 95#else 96#define debugf(fmt, args...) 97#endif 98 99#if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \ 100 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \ 101 defined(COMPAT_FREEBSD9) 102#error FreeBSD/arm doesn't provide compatibility with releases prior to 10 103#endif 104 105struct pcpu __pcpu[MAXCPU]; 106struct pcpu *pcpup = &__pcpu[0]; 107 108static struct trapframe proc0_tf; 109uint32_t cpu_reset_address = 0; 110int cold = 1; 111vm_offset_t vector_page; 112 113int (*_arm_memcpy)(void *, void *, int, int) = NULL; 114int (*_arm_bzero)(void *, int, int) = NULL; 115int _min_memcpy_size = 0; 116int _min_bzero_size = 0; 117 118extern int *end; 119 120#ifdef FDT 121vm_paddr_t pmap_pa; 122#if __ARM_ARCH >= 6 123vm_offset_t systempage; 124vm_offset_t irqstack; 125vm_offset_t undstack; 126vm_offset_t abtstack; 127#else 128/* 129 * This is the number of L2 page tables required for covering max 130 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 131 * stacks etc.), uprounded to be divisible by 4. 132 */ 133#define KERNEL_PT_MAX 78 134static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 135struct pv_addr systempage; 136static struct pv_addr msgbufpv; 137struct pv_addr irqstack; 138struct pv_addr undstack; 139struct pv_addr abtstack; 140static struct pv_addr kernelstack; 141#endif /* __ARM_ARCH >= 6 */ 142#endif /* FDT */ 143 144#ifdef MULTIDELAY 145static delay_func *delay_impl; 146static void *delay_arg; 147#endif 148 149struct kva_md_info kmi; 150 151/* 152 * arm32_vector_init: 153 * 154 * Initialize the vector page, and select whether or not to 155 * relocate the vectors. 156 * 157 * NOTE: We expect the vector page to be mapped at its expected 158 * destination. 159 */ 160 161extern unsigned int page0[], page0_data[]; 162void 163arm_vector_init(vm_offset_t va, int which) 164{ 165 unsigned int *vectors = (int *) va; 166 unsigned int *vectors_data = vectors + (page0_data - page0); 167 int vec; 168 169 /* 170 * Loop through the vectors we're taking over, and copy the 171 * vector's insn and data word. 172 */ 173 for (vec = 0; vec < ARM_NVEC; vec++) { 174 if ((which & (1 << vec)) == 0) { 175 /* Don't want to take over this vector. */ 176 continue; 177 } 178 vectors[vec] = page0[vec]; 179 vectors_data[vec] = page0_data[vec]; 180 } 181 182 /* Now sync the vectors. */ 183 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int)); 184 185 vector_page = va; 186#if __ARM_ARCH < 6 187 if (va == ARM_VECTORS_HIGH) { 188 /* 189 * Enable high vectors in the system control reg (SCTLR). 190 * 191 * Assume the MD caller knows what it's doing here, and really 192 * does want the vector page relocated. 193 * 194 * Note: This has to be done here (and not just in 195 * cpu_setup()) because the vector page needs to be 196 * accessible *before* cpu_startup() is called. 197 * Think ddb(9) ... 198 */ 199 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 200 } 201#endif 202} 203 204static void 205cpu_startup(void *dummy) 206{ 207 struct pcb *pcb = thread0.td_pcb; 208 const unsigned int mbyte = 1024 * 1024; 209#if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE) 210 vm_page_t m; 211#endif 212 213 identify_arm_cpu(); 214 215 vm_ksubmap_init(&kmi); 216 217 /* 218 * Display the RAM layout. 219 */ 220 printf("real memory = %ju (%ju MB)\n", 221 (uintmax_t)arm32_ptob(realmem), 222 (uintmax_t)arm32_ptob(realmem) / mbyte); 223 printf("avail memory = %ju (%ju MB)\n", 224 (uintmax_t)arm32_ptob(vm_cnt.v_free_count), 225 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte); 226 if (bootverbose) { 227 arm_physmem_print_tables(); 228 devmap_print_table(); 229 } 230 231 bufinit(); 232 vm_pager_bufferinit(); 233 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack + 234 USPACE_SVC_STACK_TOP; 235 pmap_set_pcb_pagedir(kernel_pmap, pcb); 236#if __ARM_ARCH < 6 237 vector_page_setprot(VM_PROT_READ); 238 pmap_postinit(); 239#ifdef ARM_CACHE_LOCK_ENABLE 240 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 241 arm_lock_cache_line(ARM_TP_ADDRESS); 242#else 243 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 244 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 245#endif 246 *(uint32_t *)ARM_RAS_START = 0; 247 *(uint32_t *)ARM_RAS_END = 0xffffffff; 248#endif 249} 250 251SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 252 253/* 254 * Flush the D-cache for non-DMA I/O so that the I-cache can 255 * be made coherent later. 256 */ 257void 258cpu_flush_dcache(void *ptr, size_t len) 259{ 260 261 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len); 262} 263 264/* Get current clock frequency for the given cpu id. */ 265int 266cpu_est_clockrate(int cpu_id, uint64_t *rate) 267{ 268 269 return (ENXIO); 270} 271 272void 273cpu_idle(int busy) 274{ 275 276 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); 277 spinlock_enter(); 278#ifndef NO_EVENTTIMERS 279 if (!busy) 280 cpu_idleclock(); 281#endif 282 if (!sched_runnable()) 283 cpu_sleep(0); 284#ifndef NO_EVENTTIMERS 285 if (!busy) 286 cpu_activeclock(); 287#endif 288 spinlock_exit(); 289 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu); 290} 291 292int 293cpu_idle_wakeup(int cpu) 294{ 295 296 return (0); 297} 298 299/* 300 * Most ARM platforms don't need to do anything special to init their clocks 301 * (they get intialized during normal device attachment), and by not defining a 302 * cpu_initclocks() function they get this generic one. Any platform that needs 303 * to do something special can just provide their own implementation, which will 304 * override this one due to the weak linkage. 305 */ 306void 307arm_generic_initclocks(void) 308{ 309 310#ifndef NO_EVENTTIMERS 311#ifdef SMP 312 if (PCPU_GET(cpuid) == 0) 313 cpu_initclocks_bsp(); 314 else 315 cpu_initclocks_ap(); 316#else 317 cpu_initclocks_bsp(); 318#endif 319#endif 320} 321__weak_reference(arm_generic_initclocks, cpu_initclocks); 322 323#ifdef MULTIDELAY 324void 325arm_set_delay(delay_func *impl, void *arg) 326{ 327 328 KASSERT(impl != NULL, ("No DELAY implementation")); 329 delay_impl = impl; 330 delay_arg = arg; 331} 332 333void 334DELAY(int usec) 335{ 336 337 delay_impl(usec, delay_arg); 338} 339#endif 340 341void 342cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 343{ 344} 345 346void 347spinlock_enter(void) 348{ 349 struct thread *td; 350 register_t cspr; 351 352 td = curthread; 353 if (td->td_md.md_spinlock_count == 0) { 354 cspr = disable_interrupts(PSR_I | PSR_F); 355 td->td_md.md_spinlock_count = 1; 356 td->td_md.md_saved_cspr = cspr; 357 } else 358 td->td_md.md_spinlock_count++; 359 critical_enter(); 360} 361 362void 363spinlock_exit(void) 364{ 365 struct thread *td; 366 register_t cspr; 367 368 td = curthread; 369 critical_exit(); 370 cspr = td->td_md.md_saved_cspr; 371 td->td_md.md_spinlock_count--; 372 if (td->td_md.md_spinlock_count == 0) 373 restore_interrupts(cspr); 374} 375 376/* 377 * Clear registers on exec 378 */ 379void 380exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 381{ 382 struct trapframe *tf = td->td_frame; 383 384 memset(tf, 0, sizeof(*tf)); 385 tf->tf_usr_sp = stack; 386 tf->tf_usr_lr = imgp->entry_addr; 387 tf->tf_svc_lr = 0x77777777; 388 tf->tf_pc = imgp->entry_addr; 389 tf->tf_spsr = PSR_USR32_MODE; 390} 391 392 393#ifdef VFP 394/* 395 * Get machine VFP context. 396 */ 397void 398get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 399{ 400 struct pcb *pcb; 401 402 pcb = td->td_pcb; 403 if (td == curthread) { 404 critical_enter(); 405 vfp_store(&pcb->pcb_vfpstate, false); 406 critical_exit(); 407 } else 408 MPASS(TD_IS_SUSPENDED(td)); 409 memcpy(vfp->mcv_reg, pcb->pcb_vfpstate.reg, 410 sizeof(vfp->mcv_reg)); 411 vfp->mcv_fpscr = pcb->pcb_vfpstate.fpscr; 412} 413 414/* 415 * Set machine VFP context. 416 */ 417void 418set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 419{ 420 struct pcb *pcb; 421 422 pcb = td->td_pcb; 423 if (td == curthread) { 424 critical_enter(); 425 vfp_discard(td); 426 critical_exit(); 427 } else 428 MPASS(TD_IS_SUSPENDED(td)); 429 memcpy(pcb->pcb_vfpstate.reg, vfp->mcv_reg, 430 sizeof(pcb->pcb_vfpstate.reg)); 431 pcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr; 432} 433#endif 434 435int 436arm_get_vfpstate(struct thread *td, void *args) 437{ 438 int rv; 439 struct arm_get_vfpstate_args ua; 440 mcontext_vfp_t mcontext_vfp; 441 442 rv = copyin(args, &ua, sizeof(ua)); 443 if (rv != 0) 444 return (rv); 445 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t)) 446 return (EINVAL); 447#ifdef VFP 448 get_vfpcontext(td, &mcontext_vfp); 449#else 450 bzero(&mcontext_vfp, sizeof(mcontext_vfp)); 451#endif 452 453 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp)); 454 if (rv != 0) 455 return (rv); 456 return (0); 457} 458 459/* 460 * Get machine context. 461 */ 462int 463get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 464{ 465 struct trapframe *tf = td->td_frame; 466 __greg_t *gr = mcp->__gregs; 467 468 if (clear_ret & GET_MC_CLEAR_RET) { 469 gr[_REG_R0] = 0; 470 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C; 471 } else { 472 gr[_REG_R0] = tf->tf_r0; 473 gr[_REG_CPSR] = tf->tf_spsr; 474 } 475 gr[_REG_R1] = tf->tf_r1; 476 gr[_REG_R2] = tf->tf_r2; 477 gr[_REG_R3] = tf->tf_r3; 478 gr[_REG_R4] = tf->tf_r4; 479 gr[_REG_R5] = tf->tf_r5; 480 gr[_REG_R6] = tf->tf_r6; 481 gr[_REG_R7] = tf->tf_r7; 482 gr[_REG_R8] = tf->tf_r8; 483 gr[_REG_R9] = tf->tf_r9; 484 gr[_REG_R10] = tf->tf_r10; 485 gr[_REG_R11] = tf->tf_r11; 486 gr[_REG_R12] = tf->tf_r12; 487 gr[_REG_SP] = tf->tf_usr_sp; 488 gr[_REG_LR] = tf->tf_usr_lr; 489 gr[_REG_PC] = tf->tf_pc; 490 491 mcp->mc_vfp_size = 0; 492 mcp->mc_vfp_ptr = NULL; 493 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare)); 494 495 return (0); 496} 497 498/* 499 * Set machine context. 500 * 501 * However, we don't set any but the user modifiable flags, and we won't 502 * touch the cs selector. 503 */ 504int 505set_mcontext(struct thread *td, mcontext_t *mcp) 506{ 507 mcontext_vfp_t mc_vfp, *vfp; 508 struct trapframe *tf = td->td_frame; 509 const __greg_t *gr = mcp->__gregs; 510 int spsr; 511 512 /* 513 * Make sure the processor mode has not been tampered with and 514 * interrupts have not been disabled. 515 */ 516 spsr = gr[_REG_CPSR]; 517 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 518 (spsr & (PSR_I | PSR_F)) != 0) 519 return (EINVAL); 520 521#ifdef WITNESS 522 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) { 523 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n", 524 td->td_proc->p_comm, __func__, 525 mcp->mc_vfp_size, mcp->mc_vfp_size); 526 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) { 527 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n", 528 td->td_proc->p_comm, __func__); 529 } 530#endif 531 532 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) { 533 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0) 534 return (EFAULT); 535 vfp = &mc_vfp; 536 } else { 537 vfp = NULL; 538 } 539 540 tf->tf_r0 = gr[_REG_R0]; 541 tf->tf_r1 = gr[_REG_R1]; 542 tf->tf_r2 = gr[_REG_R2]; 543 tf->tf_r3 = gr[_REG_R3]; 544 tf->tf_r4 = gr[_REG_R4]; 545 tf->tf_r5 = gr[_REG_R5]; 546 tf->tf_r6 = gr[_REG_R6]; 547 tf->tf_r7 = gr[_REG_R7]; 548 tf->tf_r8 = gr[_REG_R8]; 549 tf->tf_r9 = gr[_REG_R9]; 550 tf->tf_r10 = gr[_REG_R10]; 551 tf->tf_r11 = gr[_REG_R11]; 552 tf->tf_r12 = gr[_REG_R12]; 553 tf->tf_usr_sp = gr[_REG_SP]; 554 tf->tf_usr_lr = gr[_REG_LR]; 555 tf->tf_pc = gr[_REG_PC]; 556 tf->tf_spsr = gr[_REG_CPSR]; 557#ifdef VFP 558 if (vfp != NULL) 559 set_vfpcontext(td, vfp); 560#endif 561 return (0); 562} 563 564void 565sendsig(catcher, ksi, mask) 566 sig_t catcher; 567 ksiginfo_t *ksi; 568 sigset_t *mask; 569{ 570 struct thread *td; 571 struct proc *p; 572 struct trapframe *tf; 573 struct sigframe *fp, frame; 574 struct sigacts *psp; 575 struct sysentvec *sysent; 576 int onstack; 577 int sig; 578 int code; 579 580 td = curthread; 581 p = td->td_proc; 582 PROC_LOCK_ASSERT(p, MA_OWNED); 583 sig = ksi->ksi_signo; 584 code = ksi->ksi_code; 585 psp = p->p_sigacts; 586 mtx_assert(&psp->ps_mtx, MA_OWNED); 587 tf = td->td_frame; 588 onstack = sigonstack(tf->tf_usr_sp); 589 590 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 591 catcher, sig); 592 593 /* Allocate and validate space for the signal handler context. */ 594 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 595 SIGISMEMBER(psp->ps_sigonstack, sig)) { 596 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp + 597 td->td_sigstk.ss_size); 598#if defined(COMPAT_43) 599 td->td_sigstk.ss_flags |= SS_ONSTACK; 600#endif 601 } else 602 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 603 604 /* make room on the stack */ 605 fp--; 606 607 /* make the stack aligned */ 608 fp = (struct sigframe *)STACKALIGN(fp); 609 /* Populate the siginfo frame. */ 610 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 611#ifdef VFP 612 get_vfpcontext(td, &frame.sf_vfp); 613 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp); 614 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp; 615#else 616 frame.sf_uc.uc_mcontext.mc_vfp_size = 0; 617 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL; 618#endif 619 frame.sf_si = ksi->ksi_info; 620 frame.sf_uc.uc_sigmask = *mask; 621 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 622 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE; 623 frame.sf_uc.uc_stack = td->td_sigstk; 624 mtx_unlock(&psp->ps_mtx); 625 PROC_UNLOCK(td->td_proc); 626 627 /* Copy the sigframe out to the user's stack. */ 628 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 629 /* Process has trashed its stack. Kill it. */ 630 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 631 PROC_LOCK(p); 632 sigexit(td, SIGILL); 633 } 634 635 /* 636 * Build context to run handler in. We invoke the handler 637 * directly, only returning via the trampoline. Note the 638 * trampoline version numbers are coordinated with machine- 639 * dependent code in libc. 640 */ 641 642 tf->tf_r0 = sig; 643 tf->tf_r1 = (register_t)&fp->sf_si; 644 tf->tf_r2 = (register_t)&fp->sf_uc; 645 646 /* the trampoline uses r5 as the uc address */ 647 tf->tf_r5 = (register_t)&fp->sf_uc; 648 tf->tf_pc = (register_t)catcher; 649 tf->tf_usr_sp = (register_t)fp; 650 sysent = p->p_sysent; 651 if (sysent->sv_sigcode_base != 0) 652 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base; 653 else 654 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings - 655 *(sysent->sv_szsigcode)); 656 /* Set the mode to enter in the signal handler */ 657#if __ARM_ARCH >= 7 658 if ((register_t)catcher & 1) 659 tf->tf_spsr |= PSR_T; 660 else 661 tf->tf_spsr &= ~PSR_T; 662#endif 663 664 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 665 tf->tf_usr_sp); 666 667 PROC_LOCK(p); 668 mtx_lock(&psp->ps_mtx); 669} 670 671int 672sys_sigreturn(td, uap) 673 struct thread *td; 674 struct sigreturn_args /* { 675 const struct __ucontext *sigcntxp; 676 } */ *uap; 677{ 678 ucontext_t uc; 679 int error; 680 681 if (uap == NULL) 682 return (EFAULT); 683 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 684 return (EFAULT); 685 /* Restore register context. */ 686 error = set_mcontext(td, &uc.uc_mcontext); 687 if (error != 0) 688 return (error); 689 690 /* Restore signal mask. */ 691 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 692 693 return (EJUSTRETURN); 694} 695 696/* 697 * Construct a PCB from a trapframe. This is called from kdb_trap() where 698 * we want to start a backtrace from the function that caused us to enter 699 * the debugger. We have the context in the trapframe, but base the trace 700 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 701 * enough for a backtrace. 702 */ 703void 704makectx(struct trapframe *tf, struct pcb *pcb) 705{ 706 pcb->pcb_regs.sf_r4 = tf->tf_r4; 707 pcb->pcb_regs.sf_r5 = tf->tf_r5; 708 pcb->pcb_regs.sf_r6 = tf->tf_r6; 709 pcb->pcb_regs.sf_r7 = tf->tf_r7; 710 pcb->pcb_regs.sf_r8 = tf->tf_r8; 711 pcb->pcb_regs.sf_r9 = tf->tf_r9; 712 pcb->pcb_regs.sf_r10 = tf->tf_r10; 713 pcb->pcb_regs.sf_r11 = tf->tf_r11; 714 pcb->pcb_regs.sf_r12 = tf->tf_r12; 715 pcb->pcb_regs.sf_pc = tf->tf_pc; 716 pcb->pcb_regs.sf_lr = tf->tf_usr_lr; 717 pcb->pcb_regs.sf_sp = tf->tf_usr_sp; 718} 719 720void 721pcpu0_init(void) 722{ 723#if __ARM_ARCH >= 6 724 set_curthread(&thread0); 725#endif 726 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 727 PCPU_SET(curthread, &thread0); 728} 729 730/* 731 * Initialize proc0 732 */ 733void 734init_proc0(vm_offset_t kstack) 735{ 736 proc_linkup0(&proc0, &thread0); 737 thread0.td_kstack = kstack; 738 thread0.td_pcb = (struct pcb *) 739 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1; 740 thread0.td_pcb->pcb_flags = 0; 741 thread0.td_pcb->pcb_vfpcpu = -1; 742 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN; 743 thread0.td_frame = &proc0_tf; 744 pcpup->pc_curpcb = thread0.td_pcb; 745} 746 747#if __ARM_ARCH >= 6 748void 749set_stackptrs(int cpu) 750{ 751 752 set_stackptr(PSR_IRQ32_MODE, 753 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 754 set_stackptr(PSR_ABT32_MODE, 755 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 756 set_stackptr(PSR_UND32_MODE, 757 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 758} 759#else 760void 761set_stackptrs(int cpu) 762{ 763 764 set_stackptr(PSR_IRQ32_MODE, 765 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 766 set_stackptr(PSR_ABT32_MODE, 767 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 768 set_stackptr(PSR_UND32_MODE, 769 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 770} 771#endif 772 773 774#ifdef FDT 775#if __ARM_ARCH < 6 776void * 777initarm(struct arm_boot_params *abp) 778{ 779 struct mem_region mem_regions[FDT_MEM_REGIONS]; 780 struct pv_addr kernel_l1pt; 781 struct pv_addr dpcpu; 782 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 783 uint64_t memsize; 784 uint32_t l2size; 785 char *env; 786 void *kmdp; 787 u_int l1pagetable; 788 int i, j, err_devmap, mem_regions_sz; 789 790 lastaddr = parse_boot_param(abp); 791 arm_physmem_kernaddr = abp->abp_physaddr; 792 793 memsize = 0; 794 795 cpuinfo_init(); 796 set_cpufuncs(); 797 798 /* 799 * Find the dtb passed in by the boot loader. 800 */ 801 kmdp = preload_search_by_type("elf kernel"); 802 if (kmdp != NULL) 803 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 804 else 805 dtbp = (vm_offset_t)NULL; 806 807#if defined(FDT_DTB_STATIC) 808 /* 809 * In case the device tree blob was not retrieved (from metadata) try 810 * to use the statically embedded one. 811 */ 812 if (dtbp == (vm_offset_t)NULL) 813 dtbp = (vm_offset_t)&fdt_static_dtb; 814#endif 815 816 if (OF_install(OFW_FDT, 0) == FALSE) 817 panic("Cannot install FDT"); 818 819 if (OF_init((void *)dtbp) != 0) 820 panic("OF_init failed with the found device tree"); 821 822 /* Grab physical memory regions information from device tree. */ 823 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 824 panic("Cannot get physical memory regions"); 825 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 826 827 /* Grab reserved memory regions information from device tree. */ 828 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 829 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 830 EXFLAG_NODUMP | EXFLAG_NOALLOC); 831 832 /* Platform-specific initialisation */ 833 platform_probe_and_attach(); 834 835 pcpu0_init(); 836 837 /* Do basic tuning, hz etc */ 838 init_param1(); 839 840 /* Calculate number of L2 tables needed for mapping vm_page_array */ 841 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 842 l2size = (l2size >> L1_S_SHIFT) + 1; 843 844 /* 845 * Add one table for end of kernel map, one for stacks, msgbuf and 846 * L1 and L2 tables map and one for vectors map. 847 */ 848 l2size += 3; 849 850 /* Make it divisible by 4 */ 851 l2size = (l2size + 3) & ~3; 852 853 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 854 855 /* Define a macro to simplify memory allocation */ 856#define valloc_pages(var, np) \ 857 alloc_pages((var).pv_va, (np)); \ 858 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 859 860#define alloc_pages(var, np) \ 861 (var) = freemempos; \ 862 freemempos += (np * PAGE_SIZE); \ 863 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 864 865 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 866 freemempos += PAGE_SIZE; 867 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 868 869 for (i = 0, j = 0; i < l2size; ++i) { 870 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 871 valloc_pages(kernel_pt_table[i], 872 L2_TABLE_SIZE / PAGE_SIZE); 873 j = i; 874 } else { 875 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 876 L2_TABLE_SIZE_REAL * (i - j); 877 kernel_pt_table[i].pv_pa = 878 kernel_pt_table[i].pv_va - KERNVIRTADDR + 879 abp->abp_physaddr; 880 881 } 882 } 883 /* 884 * Allocate a page for the system page mapped to 0x00000000 885 * or 0xffff0000. This page will just contain the system vectors 886 * and can be shared by all processes. 887 */ 888 valloc_pages(systempage, 1); 889 890 /* Allocate dynamic per-cpu area. */ 891 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 892 dpcpu_init((void *)dpcpu.pv_va, 0); 893 894 /* Allocate stacks for all modes */ 895 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 896 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 897 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 898 valloc_pages(kernelstack, kstack_pages * MAXCPU); 899 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 900 901 /* 902 * Now we start construction of the L1 page table 903 * We start by mapping the L2 page tables into the L1. 904 * This means that we can replace L1 mappings later on if necessary 905 */ 906 l1pagetable = kernel_l1pt.pv_va; 907 908 /* 909 * Try to map as much as possible of kernel text and data using 910 * 1MB section mapping and for the rest of initial kernel address 911 * space use L2 coarse tables. 912 * 913 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 914 * and kernel structures 915 */ 916 l2_start = lastaddr & ~(L1_S_OFFSET); 917 for (i = 0 ; i < l2size - 1; i++) 918 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 919 &kernel_pt_table[i]); 920 921 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 922 923 /* Map kernel code and data */ 924 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 925 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 926 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 927 928 /* Map L1 directory and allocated L2 page tables */ 929 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 930 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 931 932 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 933 kernel_pt_table[0].pv_pa, 934 L2_TABLE_SIZE_REAL * l2size, 935 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 936 937 /* Map allocated DPCPU, stacks and msgbuf */ 938 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 939 freemempos - dpcpu.pv_va, 940 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 941 942 /* Link and map the vector page */ 943 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 944 &kernel_pt_table[l2size - 1]); 945 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 946 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 947 948 /* Establish static device mappings. */ 949 err_devmap = platform_devmap_init(); 950 devmap_bootstrap(l1pagetable, NULL); 951 vm_max_kernel_address = platform_lastaddr(); 952 953 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 954 pmap_pa = kernel_l1pt.pv_pa; 955 cpu_setttb(kernel_l1pt.pv_pa); 956 cpu_tlb_flushID(); 957 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 958 959 /* 960 * Now that proper page tables are installed, call cpu_setup() to enable 961 * instruction and data caches and other chip-specific features. 962 */ 963 cpu_setup(); 964 965 /* 966 * Only after the SOC registers block is mapped we can perform device 967 * tree fixups, as they may attempt to read parameters from hardware. 968 */ 969 OF_interpret("perform-fixup", 0); 970 971 platform_gpio_init(); 972 973 cninit(); 974 975 debugf("initarm: console initialized\n"); 976 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 977 debugf(" boothowto = 0x%08x\n", boothowto); 978 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 979 arm_print_kenv(); 980 981 env = kern_getenv("kernelname"); 982 if (env != NULL) { 983 strlcpy(kernelname, env, sizeof(kernelname)); 984 freeenv(env); 985 } 986 987 if (err_devmap != 0) 988 printf("WARNING: could not fully configure devmap, error=%d\n", 989 err_devmap); 990 991 platform_late_init(); 992 993 /* 994 * Pages were allocated during the secondary bootstrap for the 995 * stacks for different CPU modes. 996 * We must now set the r13 registers in the different CPU modes to 997 * point to these stacks. 998 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 999 * of the stack memory. 1000 */ 1001 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1002 1003 set_stackptrs(0); 1004 1005 /* 1006 * We must now clean the cache again.... 1007 * Cleaning may be done by reading new data to displace any 1008 * dirty data in the cache. This will have happened in cpu_setttb() 1009 * but since we are boot strapping the addresses used for the read 1010 * may have just been remapped and thus the cache could be out 1011 * of sync. A re-clean after the switch will cure this. 1012 * After booting there are no gross relocations of the kernel thus 1013 * this problem will not occur after initarm(). 1014 */ 1015 cpu_idcache_wbinv_all(); 1016 1017 undefined_init(); 1018 1019 init_proc0(kernelstack.pv_va); 1020 1021 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1022 pmap_bootstrap(freemempos, &kernel_l1pt); 1023 msgbufp = (void *)msgbufpv.pv_va; 1024 msgbufinit(msgbufp, msgbufsize); 1025 mutex_init(); 1026 1027 /* 1028 * Exclude the kernel (and all the things we allocated which immediately 1029 * follow the kernel) from the VM allocation pool but not from crash 1030 * dumps. virtual_avail is a global variable which tracks the kva we've 1031 * "allocated" while setting up pmaps. 1032 * 1033 * Prepare the list of physical memory available to the vm subsystem. 1034 */ 1035 arm_physmem_exclude_region(abp->abp_physaddr, 1036 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1037 arm_physmem_init_kernel_globals(); 1038 1039 init_param2(physmem); 1040 dbg_monitor_init(); 1041 kdb_init(); 1042 1043 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1044 sizeof(struct pcb))); 1045} 1046#else /* __ARM_ARCH < 6 */ 1047void * 1048initarm(struct arm_boot_params *abp) 1049{ 1050 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1051 vm_paddr_t lastaddr; 1052 vm_offset_t dtbp, kernelstack, dpcpu; 1053 char *env; 1054 void *kmdp; 1055 int err_devmap, mem_regions_sz; 1056#ifdef EFI 1057 struct efi_map_header *efihdr; 1058#endif 1059 1060 /* get last allocated physical address */ 1061 arm_physmem_kernaddr = abp->abp_physaddr; 1062 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr; 1063 1064 set_cpufuncs(); 1065 cpuinfo_init(); 1066 1067 /* 1068 * Find the dtb passed in by the boot loader. 1069 */ 1070 kmdp = preload_search_by_type("elf kernel"); 1071 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1072#if defined(FDT_DTB_STATIC) 1073 /* 1074 * In case the device tree blob was not retrieved (from metadata) try 1075 * to use the statically embedded one. 1076 */ 1077 if (dtbp == (vm_offset_t)NULL) 1078 dtbp = (vm_offset_t)&fdt_static_dtb; 1079#endif 1080 1081 if (OF_install(OFW_FDT, 0) == FALSE) 1082 panic("Cannot install FDT"); 1083 1084 if (OF_init((void *)dtbp) != 0) 1085 panic("OF_init failed with the found device tree"); 1086 1087#if defined(LINUX_BOOT_ABI) 1088 arm_parse_fdt_bootargs(); 1089#endif 1090 1091#ifdef EFI 1092 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1093 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1094 if (efihdr != NULL) { 1095 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz); 1096 } else 1097#endif 1098 { 1099 /* Grab physical memory regions information from device tree. */ 1100 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0) 1101 panic("Cannot get physical memory regions"); 1102 } 1103 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1104 1105 /* Grab reserved memory regions information from device tree. */ 1106 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1107 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1108 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1109 1110 /* 1111 * Set TEX remapping registers. 1112 * Setup kernel page tables and switch to kernel L1 page table. 1113 */ 1114 pmap_set_tex(); 1115 pmap_bootstrap_prepare(lastaddr); 1116 1117 /* 1118 * If EARLY_PRINTF support is enabled, we need to re-establish the 1119 * mapping after pmap_bootstrap_prepare() switches to new page tables. 1120 * Note that we can only do the remapping if the VA is outside the 1121 * kernel, now that we have real virtual (not VA=PA) mappings in effect. 1122 * Early printf does not work between the time pmap_set_tex() does 1123 * cp15_prrr_set() and this code remaps the VA. 1124 */ 1125#if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE 1126 pmap_preboot_map_attr(SOCDEV_PA, SOCDEV_VA, 1024 * 1024, 1127 VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE); 1128#endif 1129 1130 /* 1131 * Now that proper page tables are installed, call cpu_setup() to enable 1132 * instruction and data caches and other chip-specific features. 1133 */ 1134 cpu_setup(); 1135 1136 /* Platform-specific initialisation */ 1137 platform_probe_and_attach(); 1138 pcpu0_init(); 1139 1140 /* Do basic tuning, hz etc */ 1141 init_param1(); 1142 1143 /* 1144 * Allocate a page for the system page mapped to 0xffff0000 1145 * This page will just contain the system vectors and can be 1146 * shared by all processes. 1147 */ 1148 systempage = pmap_preboot_get_pages(1); 1149 1150 /* Map the vector page. */ 1151 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1); 1152 if (virtual_end >= ARM_VECTORS_HIGH) 1153 virtual_end = ARM_VECTORS_HIGH - 1; 1154 1155 /* Allocate dynamic per-cpu area. */ 1156 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE); 1157 dpcpu_init((void *)dpcpu, 0); 1158 1159 /* Allocate stacks for all modes */ 1160 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU); 1161 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU); 1162 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU ); 1163 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU); 1164 1165 /* Allocate message buffer. */ 1166 msgbufp = (void *)pmap_preboot_get_vpages( 1167 round_page(msgbufsize) / PAGE_SIZE); 1168 1169 /* 1170 * Pages were allocated during the secondary bootstrap for the 1171 * stacks for different CPU modes. 1172 * We must now set the r13 registers in the different CPU modes to 1173 * point to these stacks. 1174 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1175 * of the stack memory. 1176 */ 1177 set_stackptrs(0); 1178 mutex_init(); 1179 1180 /* Establish static device mappings. */ 1181 err_devmap = platform_devmap_init(); 1182 devmap_bootstrap(0, NULL); 1183 vm_max_kernel_address = platform_lastaddr(); 1184 1185 /* 1186 * Only after the SOC registers block is mapped we can perform device 1187 * tree fixups, as they may attempt to read parameters from hardware. 1188 */ 1189 OF_interpret("perform-fixup", 0); 1190 platform_gpio_init(); 1191 cninit(); 1192 1193 /* 1194 * If we made a mapping for EARLY_PRINTF after pmap_bootstrap_prepare(), 1195 * undo it now that the normal console printf works. 1196 */ 1197#if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE 1198 pmap_kremove(SOCDEV_VA); 1199#endif 1200 1201 debugf("initarm: console initialized\n"); 1202 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1203 debugf(" boothowto = 0x%08x\n", boothowto); 1204 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1205 debugf(" lastaddr1: 0x%08x\n", lastaddr); 1206 arm_print_kenv(); 1207 1208 env = kern_getenv("kernelname"); 1209 if (env != NULL) 1210 strlcpy(kernelname, env, sizeof(kernelname)); 1211 1212 if (err_devmap != 0) 1213 printf("WARNING: could not fully configure devmap, error=%d\n", 1214 err_devmap); 1215 1216 platform_late_init(); 1217 1218 /* 1219 * We must now clean the cache again.... 1220 * Cleaning may be done by reading new data to displace any 1221 * dirty data in the cache. This will have happened in cpu_setttb() 1222 * but since we are boot strapping the addresses used for the read 1223 * may have just been remapped and thus the cache could be out 1224 * of sync. A re-clean after the switch will cure this. 1225 * After booting there are no gross relocations of the kernel thus 1226 * this problem will not occur after initarm(). 1227 */ 1228 /* Set stack for exception handlers */ 1229 undefined_init(); 1230 init_proc0(kernelstack); 1231 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1232 enable_interrupts(PSR_A); 1233 pmap_bootstrap(0); 1234 1235 /* Exclude the kernel (and all the things we allocated which immediately 1236 * follow the kernel) from the VM allocation pool but not from crash 1237 * dumps. virtual_avail is a global variable which tracks the kva we've 1238 * "allocated" while setting up pmaps. 1239 * 1240 * Prepare the list of physical memory available to the vm subsystem. 1241 */ 1242 arm_physmem_exclude_region(abp->abp_physaddr, 1243 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC); 1244 arm_physmem_init_kernel_globals(); 1245 1246 init_param2(physmem); 1247 /* Init message buffer. */ 1248 msgbufinit(msgbufp, msgbufsize); 1249 dbg_monitor_init(); 1250 kdb_init(); 1251 return ((void *)STACKALIGN(thread0.td_pcb)); 1252 1253} 1254 1255#endif /* __ARM_ARCH < 6 */ 1256#endif /* FDT */ 1257