machdep.c revision 299069
1/* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3/*- 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 1994-1998 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Brinicombe 22 * for the NetBSD Project. 23 * 4. The name of the company nor the name of the author may be used to 24 * endorse or promote products derived from this software without specific 25 * prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * Machine dependent functions for kernel setup 40 * 41 * Created : 17/09/94 42 * Updated : 18/04/01 updated for new wscons 43 */ 44 45#include "opt_compat.h" 46#include "opt_ddb.h" 47#include "opt_kstack_pages.h" 48#include "opt_platform.h" 49#include "opt_sched.h" 50#include "opt_timer.h" 51 52#include <sys/cdefs.h> 53__FBSDID("$FreeBSD: head/sys/arm/arm/machdep.c 299069 2016-05-04 15:48:59Z pfg $"); 54 55#include <sys/param.h> 56#include <sys/proc.h> 57#include <sys/systm.h> 58#include <sys/bio.h> 59#include <sys/buf.h> 60#include <sys/bus.h> 61#include <sys/cons.h> 62#include <sys/cpu.h> 63#include <sys/ctype.h> 64#include <sys/devmap.h> 65#include <sys/efi.h> 66#include <sys/exec.h> 67#include <sys/imgact.h> 68#include <sys/kdb.h> 69#include <sys/kernel.h> 70#include <sys/ktr.h> 71#include <sys/linker.h> 72#include <sys/lock.h> 73#include <sys/malloc.h> 74#include <sys/msgbuf.h> 75#include <sys/mutex.h> 76#include <sys/pcpu.h> 77#include <sys/ptrace.h> 78#include <sys/reboot.h> 79#include <sys/boot.h> 80#include <sys/rwlock.h> 81#include <sys/sched.h> 82#include <sys/signalvar.h> 83#include <sys/syscallsubr.h> 84#include <sys/sysctl.h> 85#include <sys/sysent.h> 86#include <sys/sysproto.h> 87#include <sys/uio.h> 88#include <sys/vdso.h> 89 90#include <vm/vm.h> 91#include <vm/pmap.h> 92#include <vm/vm_map.h> 93#include <vm/vm_object.h> 94#include <vm/vm_page.h> 95#include <vm/vm_pager.h> 96 97#include <machine/acle-compat.h> 98#include <machine/armreg.h> 99#include <machine/atags.h> 100#include <machine/cpu.h> 101#include <machine/cpuinfo.h> 102#include <machine/debug_monitor.h> 103#include <machine/db_machdep.h> 104#include <machine/frame.h> 105#include <machine/intr.h> 106#include <machine/machdep.h> 107#include <machine/md_var.h> 108#include <machine/metadata.h> 109#include <machine/pcb.h> 110#include <machine/physmem.h> 111#include <machine/platform.h> 112#include <machine/reg.h> 113#include <machine/trap.h> 114#include <machine/undefined.h> 115#include <machine/vfp.h> 116#include <machine/vmparam.h> 117#include <machine/sysarch.h> 118 119#ifdef FDT 120#include <contrib/libfdt/libfdt.h> 121#include <dev/fdt/fdt_common.h> 122#include <dev/ofw/openfirm.h> 123#endif 124 125#ifdef DDB 126#include <ddb/ddb.h> 127 128#if __ARM_ARCH >= 6 129 130DB_SHOW_COMMAND(cp15, db_show_cp15) 131{ 132 u_int reg; 133 134 reg = cp15_midr_get(); 135 db_printf("Cpu ID: 0x%08x\n", reg); 136 reg = cp15_ctr_get(); 137 db_printf("Current Cache Lvl ID: 0x%08x\n",reg); 138 139 reg = cp15_sctlr_get(); 140 db_printf("Ctrl: 0x%08x\n",reg); 141 reg = cp15_actlr_get(); 142 db_printf("Aux Ctrl: 0x%08x\n",reg); 143 144 reg = cp15_id_pfr0_get(); 145 db_printf("Processor Feat 0: 0x%08x\n", reg); 146 reg = cp15_id_pfr1_get(); 147 db_printf("Processor Feat 1: 0x%08x\n", reg); 148 reg = cp15_id_dfr0_get(); 149 db_printf("Debug Feat 0: 0x%08x\n", reg); 150 reg = cp15_id_afr0_get(); 151 db_printf("Auxiliary Feat 0: 0x%08x\n", reg); 152 reg = cp15_id_mmfr0_get(); 153 db_printf("Memory Model Feat 0: 0x%08x\n", reg); 154 reg = cp15_id_mmfr1_get(); 155 db_printf("Memory Model Feat 1: 0x%08x\n", reg); 156 reg = cp15_id_mmfr2_get(); 157 db_printf("Memory Model Feat 2: 0x%08x\n", reg); 158 reg = cp15_id_mmfr3_get(); 159 db_printf("Memory Model Feat 3: 0x%08x\n", reg); 160 reg = cp15_ttbr_get(); 161 db_printf("TTB0: 0x%08x\n", reg); 162} 163 164DB_SHOW_COMMAND(vtop, db_show_vtop) 165{ 166 u_int reg; 167 168 if (have_addr) { 169 cp15_ats1cpr_set(addr); 170 reg = cp15_par_get(); 171 db_printf("Physical address reg: 0x%08x\n",reg); 172 } else 173 db_printf("show vtop <virt_addr>\n"); 174} 175#endif /* __ARM_ARCH >= 6 */ 176#endif /* DDB */ 177 178#ifdef DEBUG 179#define debugf(fmt, args...) printf(fmt, ##args) 180#else 181#define debugf(fmt, args...) 182#endif 183 184#if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \ 185 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \ 186 defined(COMPAT_FREEBSD9) 187#error FreeBSD/arm doesn't provide compatibility with releases prior to 10 188#endif 189 190struct pcpu __pcpu[MAXCPU]; 191struct pcpu *pcpup = &__pcpu[0]; 192 193static struct trapframe proc0_tf; 194uint32_t cpu_reset_address = 0; 195int cold = 1; 196vm_offset_t vector_page; 197 198int (*_arm_memcpy)(void *, void *, int, int) = NULL; 199int (*_arm_bzero)(void *, int, int) = NULL; 200int _min_memcpy_size = 0; 201int _min_bzero_size = 0; 202 203extern int *end; 204 205#ifdef FDT 206static char *loader_envp; 207 208vm_paddr_t pmap_pa; 209 210#if __ARM_ARCH >= 6 211vm_offset_t systempage; 212vm_offset_t irqstack; 213vm_offset_t undstack; 214vm_offset_t abtstack; 215#else 216/* 217 * This is the number of L2 page tables required for covering max 218 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 219 * stacks etc.), uprounded to be divisible by 4. 220 */ 221#define KERNEL_PT_MAX 78 222 223static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 224 225struct pv_addr systempage; 226static struct pv_addr msgbufpv; 227struct pv_addr irqstack; 228struct pv_addr undstack; 229struct pv_addr abtstack; 230static struct pv_addr kernelstack; 231#endif 232#endif 233 234#if defined(LINUX_BOOT_ABI) 235#define LBABI_MAX_BANKS 10 236 237#define CMDLINE_GUARD "FreeBSD:" 238uint32_t board_id; 239struct arm_lbabi_tag *atag_list; 240char linux_command_line[LBABI_MAX_COMMAND_LINE + 1]; 241char atags[LBABI_MAX_COMMAND_LINE * 2]; 242uint32_t memstart[LBABI_MAX_BANKS]; 243uint32_t memsize[LBABI_MAX_BANKS]; 244uint32_t membanks; 245#endif 246#ifdef MULTIDELAY 247static delay_func *delay_impl; 248static void *delay_arg; 249#endif 250 251static uint32_t board_revision; 252/* hex representation of uint64_t */ 253static char board_serial[32]; 254 255SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes"); 256SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD, 257 &board_revision, 0, "Board revision"); 258SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD, 259 board_serial, 0, "Board serial"); 260 261int vfp_exists; 262SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD, 263 &vfp_exists, 0, "Floating point support enabled"); 264 265void 266board_set_serial(uint64_t serial) 267{ 268 269 snprintf(board_serial, sizeof(board_serial)-1, 270 "%016jx", serial); 271} 272 273void 274board_set_revision(uint32_t revision) 275{ 276 277 board_revision = revision; 278} 279 280void 281sendsig(catcher, ksi, mask) 282 sig_t catcher; 283 ksiginfo_t *ksi; 284 sigset_t *mask; 285{ 286 struct thread *td; 287 struct proc *p; 288 struct trapframe *tf; 289 struct sigframe *fp, frame; 290 struct sigacts *psp; 291 struct sysentvec *sysent; 292 int onstack; 293 int sig; 294 int code; 295 296 td = curthread; 297 p = td->td_proc; 298 PROC_LOCK_ASSERT(p, MA_OWNED); 299 sig = ksi->ksi_signo; 300 code = ksi->ksi_code; 301 psp = p->p_sigacts; 302 mtx_assert(&psp->ps_mtx, MA_OWNED); 303 tf = td->td_frame; 304 onstack = sigonstack(tf->tf_usr_sp); 305 306 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 307 catcher, sig); 308 309 /* Allocate and validate space for the signal handler context. */ 310 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 311 SIGISMEMBER(psp->ps_sigonstack, sig)) { 312 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp + 313 td->td_sigstk.ss_size); 314#if defined(COMPAT_43) 315 td->td_sigstk.ss_flags |= SS_ONSTACK; 316#endif 317 } else 318 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 319 320 /* make room on the stack */ 321 fp--; 322 323 /* make the stack aligned */ 324 fp = (struct sigframe *)STACKALIGN(fp); 325 /* Populate the siginfo frame. */ 326 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 327 frame.sf_si = ksi->ksi_info; 328 frame.sf_uc.uc_sigmask = *mask; 329 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 330 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE; 331 frame.sf_uc.uc_stack = td->td_sigstk; 332 mtx_unlock(&psp->ps_mtx); 333 PROC_UNLOCK(td->td_proc); 334 335 /* Copy the sigframe out to the user's stack. */ 336 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 337 /* Process has trashed its stack. Kill it. */ 338 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 339 PROC_LOCK(p); 340 sigexit(td, SIGILL); 341 } 342 343 /* 344 * Build context to run handler in. We invoke the handler 345 * directly, only returning via the trampoline. Note the 346 * trampoline version numbers are coordinated with machine- 347 * dependent code in libc. 348 */ 349 350 tf->tf_r0 = sig; 351 tf->tf_r1 = (register_t)&fp->sf_si; 352 tf->tf_r2 = (register_t)&fp->sf_uc; 353 354 /* the trampoline uses r5 as the uc address */ 355 tf->tf_r5 = (register_t)&fp->sf_uc; 356 tf->tf_pc = (register_t)catcher; 357 tf->tf_usr_sp = (register_t)fp; 358 sysent = p->p_sysent; 359 if (sysent->sv_sigcode_base != 0) 360 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base; 361 else 362 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings - 363 *(sysent->sv_szsigcode)); 364 /* Set the mode to enter in the signal handler */ 365#if __ARM_ARCH >= 7 366 if ((register_t)catcher & 1) 367 tf->tf_spsr |= PSR_T; 368 else 369 tf->tf_spsr &= ~PSR_T; 370#endif 371 372 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 373 tf->tf_usr_sp); 374 375 PROC_LOCK(p); 376 mtx_lock(&psp->ps_mtx); 377} 378 379struct kva_md_info kmi; 380 381/* 382 * arm32_vector_init: 383 * 384 * Initialize the vector page, and select whether or not to 385 * relocate the vectors. 386 * 387 * NOTE: We expect the vector page to be mapped at its expected 388 * destination. 389 */ 390 391extern unsigned int page0[], page0_data[]; 392void 393arm_vector_init(vm_offset_t va, int which) 394{ 395 unsigned int *vectors = (int *) va; 396 unsigned int *vectors_data = vectors + (page0_data - page0); 397 int vec; 398 399 /* 400 * Loop through the vectors we're taking over, and copy the 401 * vector's insn and data word. 402 */ 403 for (vec = 0; vec < ARM_NVEC; vec++) { 404 if ((which & (1 << vec)) == 0) { 405 /* Don't want to take over this vector. */ 406 continue; 407 } 408 vectors[vec] = page0[vec]; 409 vectors_data[vec] = page0_data[vec]; 410 } 411 412 /* Now sync the vectors. */ 413 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int)); 414 415 vector_page = va; 416 417 if (va == ARM_VECTORS_HIGH) { 418 /* 419 * Assume the MD caller knows what it's doing here, and 420 * really does want the vector page relocated. 421 * 422 * Note: This has to be done here (and not just in 423 * cpu_setup()) because the vector page needs to be 424 * accessible *before* cpu_startup() is called. 425 * Think ddb(9) ... 426 * 427 * NOTE: If the CPU control register is not readable, 428 * this will totally fail! We'll just assume that 429 * any system that has high vector support has a 430 * readable CPU control register, for now. If we 431 * ever encounter one that does not, we'll have to 432 * rethink this. 433 */ 434 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 435 } 436} 437 438static void 439cpu_startup(void *dummy) 440{ 441 struct pcb *pcb = thread0.td_pcb; 442 const unsigned int mbyte = 1024 * 1024; 443#if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE) 444 vm_page_t m; 445#endif 446 447 identify_arm_cpu(); 448 449 vm_ksubmap_init(&kmi); 450 451 /* 452 * Display the RAM layout. 453 */ 454 printf("real memory = %ju (%ju MB)\n", 455 (uintmax_t)arm32_ptob(realmem), 456 (uintmax_t)arm32_ptob(realmem) / mbyte); 457 printf("avail memory = %ju (%ju MB)\n", 458 (uintmax_t)arm32_ptob(vm_cnt.v_free_count), 459 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte); 460 if (bootverbose) { 461 arm_physmem_print_tables(); 462 devmap_print_table(); 463 } 464 465 bufinit(); 466 vm_pager_bufferinit(); 467 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack + 468 USPACE_SVC_STACK_TOP; 469 pmap_set_pcb_pagedir(kernel_pmap, pcb); 470#if __ARM_ARCH < 6 471 vector_page_setprot(VM_PROT_READ); 472 pmap_postinit(); 473#ifdef ARM_CACHE_LOCK_ENABLE 474 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 475 arm_lock_cache_line(ARM_TP_ADDRESS); 476#else 477 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 478 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 479#endif 480 *(uint32_t *)ARM_RAS_START = 0; 481 *(uint32_t *)ARM_RAS_END = 0xffffffff; 482#endif 483} 484 485SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 486 487/* 488 * Flush the D-cache for non-DMA I/O so that the I-cache can 489 * be made coherent later. 490 */ 491void 492cpu_flush_dcache(void *ptr, size_t len) 493{ 494 495 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len); 496} 497 498/* Get current clock frequency for the given cpu id. */ 499int 500cpu_est_clockrate(int cpu_id, uint64_t *rate) 501{ 502 503 return (ENXIO); 504} 505 506void 507cpu_idle(int busy) 508{ 509 510 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); 511 spinlock_enter(); 512#ifndef NO_EVENTTIMERS 513 if (!busy) 514 cpu_idleclock(); 515#endif 516 if (!sched_runnable()) 517 cpu_sleep(0); 518#ifndef NO_EVENTTIMERS 519 if (!busy) 520 cpu_activeclock(); 521#endif 522 spinlock_exit(); 523 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu); 524} 525 526int 527cpu_idle_wakeup(int cpu) 528{ 529 530 return (0); 531} 532 533/* 534 * Most ARM platforms don't need to do anything special to init their clocks 535 * (they get intialized during normal device attachment), and by not defining a 536 * cpu_initclocks() function they get this generic one. Any platform that needs 537 * to do something special can just provide their own implementation, which will 538 * override this one due to the weak linkage. 539 */ 540void 541arm_generic_initclocks(void) 542{ 543 544#ifndef NO_EVENTTIMERS 545#ifdef SMP 546 if (PCPU_GET(cpuid) == 0) 547 cpu_initclocks_bsp(); 548 else 549 cpu_initclocks_ap(); 550#else 551 cpu_initclocks_bsp(); 552#endif 553#endif 554} 555__weak_reference(arm_generic_initclocks, cpu_initclocks); 556 557#ifdef MULTIDELAY 558void 559arm_set_delay(delay_func *impl, void *arg) 560{ 561 562 KASSERT(impl != NULL, ("No DELAY implementation")); 563 delay_impl = impl; 564 delay_arg = arg; 565} 566 567void 568DELAY(int usec) 569{ 570 571 delay_impl(usec, delay_arg); 572} 573#endif 574 575int 576fill_regs(struct thread *td, struct reg *regs) 577{ 578 struct trapframe *tf = td->td_frame; 579 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r)); 580 regs->r_sp = tf->tf_usr_sp; 581 regs->r_lr = tf->tf_usr_lr; 582 regs->r_pc = tf->tf_pc; 583 regs->r_cpsr = tf->tf_spsr; 584 return (0); 585} 586int 587fill_fpregs(struct thread *td, struct fpreg *regs) 588{ 589 bzero(regs, sizeof(*regs)); 590 return (0); 591} 592 593int 594set_regs(struct thread *td, struct reg *regs) 595{ 596 struct trapframe *tf = td->td_frame; 597 598 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r)); 599 tf->tf_usr_sp = regs->r_sp; 600 tf->tf_usr_lr = regs->r_lr; 601 tf->tf_pc = regs->r_pc; 602 tf->tf_spsr &= ~PSR_FLAGS; 603 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS; 604 return (0); 605} 606 607int 608set_fpregs(struct thread *td, struct fpreg *regs) 609{ 610 return (0); 611} 612 613int 614fill_dbregs(struct thread *td, struct dbreg *regs) 615{ 616 return (0); 617} 618int 619set_dbregs(struct thread *td, struct dbreg *regs) 620{ 621 return (0); 622} 623 624 625static int 626ptrace_read_int(struct thread *td, vm_offset_t addr, uint32_t *v) 627{ 628 629 if (proc_readmem(td, td->td_proc, addr, v, sizeof(*v)) != sizeof(*v)) 630 return (ENOMEM); 631 return (0); 632} 633 634static int 635ptrace_write_int(struct thread *td, vm_offset_t addr, uint32_t v) 636{ 637 638 if (proc_writemem(td, td->td_proc, addr, &v, sizeof(v)) != sizeof(v)) 639 return (ENOMEM); 640 return (0); 641} 642 643static u_int 644ptrace_get_usr_reg(void *cookie, int reg) 645{ 646 int ret; 647 struct thread *td = cookie; 648 649 KASSERT(((reg >= 0) && (reg <= ARM_REG_NUM_PC)), 650 ("reg is outside range")); 651 652 switch(reg) { 653 case ARM_REG_NUM_PC: 654 ret = td->td_frame->tf_pc; 655 break; 656 case ARM_REG_NUM_LR: 657 ret = td->td_frame->tf_usr_lr; 658 break; 659 case ARM_REG_NUM_SP: 660 ret = td->td_frame->tf_usr_sp; 661 break; 662 default: 663 ret = *((register_t*)&td->td_frame->tf_r0 + reg); 664 break; 665 } 666 667 return (ret); 668} 669 670static u_int 671ptrace_get_usr_int(void* cookie, vm_offset_t offset, u_int* val) 672{ 673 struct thread *td = cookie; 674 u_int error; 675 676 error = ptrace_read_int(td, offset, val); 677 678 return (error); 679} 680 681/** 682 * This function parses current instruction opcode and decodes 683 * any possible jump (change in PC) which might occur after 684 * the instruction is executed. 685 * 686 * @param td Thread structure of analysed task 687 * @param cur_instr Currently executed instruction 688 * @param alt_next_address Pointer to the variable where 689 * the destination address of the 690 * jump instruction shall be stored. 691 * 692 * @return <0> when jump is possible 693 * <EINVAL> otherwise 694 */ 695static int 696ptrace_get_alternative_next(struct thread *td, uint32_t cur_instr, 697 uint32_t *alt_next_address) 698{ 699 int error; 700 701 if (inst_branch(cur_instr) || inst_call(cur_instr) || 702 inst_return(cur_instr)) { 703 error = arm_predict_branch(td, cur_instr, td->td_frame->tf_pc, 704 alt_next_address, ptrace_get_usr_reg, ptrace_get_usr_int); 705 706 return (error); 707 } 708 709 return (EINVAL); 710} 711 712int 713ptrace_single_step(struct thread *td) 714{ 715 struct proc *p; 716 int error, error_alt; 717 uint32_t cur_instr, alt_next = 0; 718 719 /* TODO: This needs to be updated for Thumb-2 */ 720 if ((td->td_frame->tf_spsr & PSR_T) != 0) 721 return (EINVAL); 722 723 KASSERT(td->td_md.md_ptrace_instr == 0, 724 ("Didn't clear single step")); 725 KASSERT(td->td_md.md_ptrace_instr_alt == 0, 726 ("Didn't clear alternative single step")); 727 p = td->td_proc; 728 PROC_UNLOCK(p); 729 730 error = ptrace_read_int(td, td->td_frame->tf_pc, 731 &cur_instr); 732 if (error) 733 goto out; 734 735 error = ptrace_read_int(td, td->td_frame->tf_pc + INSN_SIZE, 736 &td->td_md.md_ptrace_instr); 737 if (error == 0) { 738 error = ptrace_write_int(td, td->td_frame->tf_pc + INSN_SIZE, 739 PTRACE_BREAKPOINT); 740 if (error) { 741 td->td_md.md_ptrace_instr = 0; 742 } else { 743 td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 744 INSN_SIZE; 745 } 746 } 747 748 error_alt = ptrace_get_alternative_next(td, cur_instr, &alt_next); 749 if (error_alt == 0) { 750 error_alt = ptrace_read_int(td, alt_next, 751 &td->td_md.md_ptrace_instr_alt); 752 if (error_alt) { 753 td->td_md.md_ptrace_instr_alt = 0; 754 } else { 755 error_alt = ptrace_write_int(td, alt_next, 756 PTRACE_BREAKPOINT); 757 if (error_alt) 758 td->td_md.md_ptrace_instr_alt = 0; 759 else 760 td->td_md.md_ptrace_addr_alt = alt_next; 761 } 762 } 763 764out: 765 PROC_LOCK(p); 766 return ((error != 0) && (error_alt != 0)); 767} 768 769int 770ptrace_clear_single_step(struct thread *td) 771{ 772 struct proc *p; 773 774 /* TODO: This needs to be updated for Thumb-2 */ 775 if ((td->td_frame->tf_spsr & PSR_T) != 0) 776 return (EINVAL); 777 778 if (td->td_md.md_ptrace_instr != 0) { 779 p = td->td_proc; 780 PROC_UNLOCK(p); 781 ptrace_write_int(td, td->td_md.md_ptrace_addr, 782 td->td_md.md_ptrace_instr); 783 PROC_LOCK(p); 784 td->td_md.md_ptrace_instr = 0; 785 } 786 787 if (td->td_md.md_ptrace_instr_alt != 0) { 788 p = td->td_proc; 789 PROC_UNLOCK(p); 790 ptrace_write_int(td, td->td_md.md_ptrace_addr_alt, 791 td->td_md.md_ptrace_instr_alt); 792 PROC_LOCK(p); 793 td->td_md.md_ptrace_instr_alt = 0; 794 } 795 796 return (0); 797} 798 799int 800ptrace_set_pc(struct thread *td, unsigned long addr) 801{ 802 td->td_frame->tf_pc = addr; 803 return (0); 804} 805 806void 807cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 808{ 809} 810 811void 812spinlock_enter(void) 813{ 814 struct thread *td; 815 register_t cspr; 816 817 td = curthread; 818 if (td->td_md.md_spinlock_count == 0) { 819 cspr = disable_interrupts(PSR_I | PSR_F); 820 td->td_md.md_spinlock_count = 1; 821 td->td_md.md_saved_cspr = cspr; 822 } else 823 td->td_md.md_spinlock_count++; 824 critical_enter(); 825} 826 827void 828spinlock_exit(void) 829{ 830 struct thread *td; 831 register_t cspr; 832 833 td = curthread; 834 critical_exit(); 835 cspr = td->td_md.md_saved_cspr; 836 td->td_md.md_spinlock_count--; 837 if (td->td_md.md_spinlock_count == 0) 838 restore_interrupts(cspr); 839} 840 841/* 842 * Clear registers on exec 843 */ 844void 845exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 846{ 847 struct trapframe *tf = td->td_frame; 848 849 memset(tf, 0, sizeof(*tf)); 850 tf->tf_usr_sp = stack; 851 tf->tf_usr_lr = imgp->entry_addr; 852 tf->tf_svc_lr = 0x77777777; 853 tf->tf_pc = imgp->entry_addr; 854 tf->tf_spsr = PSR_USR32_MODE; 855} 856 857/* 858 * Get machine context. 859 */ 860int 861get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 862{ 863 struct trapframe *tf = td->td_frame; 864 __greg_t *gr = mcp->__gregs; 865 866 if (clear_ret & GET_MC_CLEAR_RET) { 867 gr[_REG_R0] = 0; 868 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C; 869 } else { 870 gr[_REG_R0] = tf->tf_r0; 871 gr[_REG_CPSR] = tf->tf_spsr; 872 } 873 gr[_REG_R1] = tf->tf_r1; 874 gr[_REG_R2] = tf->tf_r2; 875 gr[_REG_R3] = tf->tf_r3; 876 gr[_REG_R4] = tf->tf_r4; 877 gr[_REG_R5] = tf->tf_r5; 878 gr[_REG_R6] = tf->tf_r6; 879 gr[_REG_R7] = tf->tf_r7; 880 gr[_REG_R8] = tf->tf_r8; 881 gr[_REG_R9] = tf->tf_r9; 882 gr[_REG_R10] = tf->tf_r10; 883 gr[_REG_R11] = tf->tf_r11; 884 gr[_REG_R12] = tf->tf_r12; 885 gr[_REG_SP] = tf->tf_usr_sp; 886 gr[_REG_LR] = tf->tf_usr_lr; 887 gr[_REG_PC] = tf->tf_pc; 888 889 return (0); 890} 891 892/* 893 * Set machine context. 894 * 895 * However, we don't set any but the user modifiable flags, and we won't 896 * touch the cs selector. 897 */ 898int 899set_mcontext(struct thread *td, mcontext_t *mcp) 900{ 901 struct trapframe *tf = td->td_frame; 902 const __greg_t *gr = mcp->__gregs; 903 904 tf->tf_r0 = gr[_REG_R0]; 905 tf->tf_r1 = gr[_REG_R1]; 906 tf->tf_r2 = gr[_REG_R2]; 907 tf->tf_r3 = gr[_REG_R3]; 908 tf->tf_r4 = gr[_REG_R4]; 909 tf->tf_r5 = gr[_REG_R5]; 910 tf->tf_r6 = gr[_REG_R6]; 911 tf->tf_r7 = gr[_REG_R7]; 912 tf->tf_r8 = gr[_REG_R8]; 913 tf->tf_r9 = gr[_REG_R9]; 914 tf->tf_r10 = gr[_REG_R10]; 915 tf->tf_r11 = gr[_REG_R11]; 916 tf->tf_r12 = gr[_REG_R12]; 917 tf->tf_usr_sp = gr[_REG_SP]; 918 tf->tf_usr_lr = gr[_REG_LR]; 919 tf->tf_pc = gr[_REG_PC]; 920 tf->tf_spsr = gr[_REG_CPSR]; 921 922 return (0); 923} 924 925/* 926 * MPSAFE 927 */ 928int 929sys_sigreturn(td, uap) 930 struct thread *td; 931 struct sigreturn_args /* { 932 const struct __ucontext *sigcntxp; 933 } */ *uap; 934{ 935 ucontext_t uc; 936 int spsr; 937 938 if (uap == NULL) 939 return (EFAULT); 940 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 941 return (EFAULT); 942 /* 943 * Make sure the processor mode has not been tampered with and 944 * interrupts have not been disabled. 945 */ 946 spsr = uc.uc_mcontext.__gregs[_REG_CPSR]; 947 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 948 (spsr & (PSR_I | PSR_F)) != 0) 949 return (EINVAL); 950 /* Restore register context. */ 951 set_mcontext(td, &uc.uc_mcontext); 952 953 /* Restore signal mask. */ 954 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 955 956 return (EJUSTRETURN); 957} 958 959 960/* 961 * Construct a PCB from a trapframe. This is called from kdb_trap() where 962 * we want to start a backtrace from the function that caused us to enter 963 * the debugger. We have the context in the trapframe, but base the trace 964 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 965 * enough for a backtrace. 966 */ 967void 968makectx(struct trapframe *tf, struct pcb *pcb) 969{ 970 pcb->pcb_regs.sf_r4 = tf->tf_r4; 971 pcb->pcb_regs.sf_r5 = tf->tf_r5; 972 pcb->pcb_regs.sf_r6 = tf->tf_r6; 973 pcb->pcb_regs.sf_r7 = tf->tf_r7; 974 pcb->pcb_regs.sf_r8 = tf->tf_r8; 975 pcb->pcb_regs.sf_r9 = tf->tf_r9; 976 pcb->pcb_regs.sf_r10 = tf->tf_r10; 977 pcb->pcb_regs.sf_r11 = tf->tf_r11; 978 pcb->pcb_regs.sf_r12 = tf->tf_r12; 979 pcb->pcb_regs.sf_pc = tf->tf_pc; 980 pcb->pcb_regs.sf_lr = tf->tf_usr_lr; 981 pcb->pcb_regs.sf_sp = tf->tf_usr_sp; 982} 983 984/* 985 * Fake up a boot descriptor table 986 */ 987vm_offset_t 988fake_preload_metadata(struct arm_boot_params *abp __unused, void *dtb_ptr, 989 size_t dtb_size) 990{ 991#ifdef DDB 992 vm_offset_t zstart = 0, zend = 0; 993#endif 994 vm_offset_t lastaddr; 995 int i = 0; 996 static uint32_t fake_preload[35]; 997 998 fake_preload[i++] = MODINFO_NAME; 999 fake_preload[i++] = strlen("kernel") + 1; 1000 strcpy((char*)&fake_preload[i++], "kernel"); 1001 i += 1; 1002 fake_preload[i++] = MODINFO_TYPE; 1003 fake_preload[i++] = strlen("elf kernel") + 1; 1004 strcpy((char*)&fake_preload[i++], "elf kernel"); 1005 i += 2; 1006 fake_preload[i++] = MODINFO_ADDR; 1007 fake_preload[i++] = sizeof(vm_offset_t); 1008 fake_preload[i++] = KERNVIRTADDR; 1009 fake_preload[i++] = MODINFO_SIZE; 1010 fake_preload[i++] = sizeof(uint32_t); 1011 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR; 1012#ifdef DDB 1013 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) { 1014 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM; 1015 fake_preload[i++] = sizeof(vm_offset_t); 1016 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4); 1017 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM; 1018 fake_preload[i++] = sizeof(vm_offset_t); 1019 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8); 1020 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8); 1021 zend = lastaddr; 1022 zstart = *(uint32_t *)(KERNVIRTADDR + 4); 1023 db_fetch_ksymtab(zstart, zend); 1024 } else 1025#endif 1026 lastaddr = (vm_offset_t)&end; 1027 if (dtb_ptr != NULL) { 1028 /* Copy DTB to KVA space and insert it into module chain. */ 1029 lastaddr = roundup(lastaddr, sizeof(int)); 1030 fake_preload[i++] = MODINFO_METADATA | MODINFOMD_DTBP; 1031 fake_preload[i++] = sizeof(uint32_t); 1032 fake_preload[i++] = (uint32_t)lastaddr; 1033 memmove((void *)lastaddr, dtb_ptr, dtb_size); 1034 lastaddr += dtb_size; 1035 lastaddr = roundup(lastaddr, sizeof(int)); 1036 } 1037 fake_preload[i++] = 0; 1038 fake_preload[i] = 0; 1039 preload_metadata = (void *)fake_preload; 1040 1041 init_static_kenv(NULL, 0); 1042 1043 return (lastaddr); 1044} 1045 1046void 1047pcpu0_init(void) 1048{ 1049#if __ARM_ARCH >= 6 1050 set_curthread(&thread0); 1051#endif 1052 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 1053 PCPU_SET(curthread, &thread0); 1054} 1055 1056#if defined(LINUX_BOOT_ABI) 1057 1058/* Convert the U-Boot command line into FreeBSD kenv and boot options. */ 1059static void 1060cmdline_set_env(char *cmdline, const char *guard) 1061{ 1062 char *cmdline_next, *env; 1063 size_t size, guard_len; 1064 int i; 1065 1066 size = strlen(cmdline); 1067 /* Skip leading spaces. */ 1068 for (; isspace(*cmdline) && (size > 0); cmdline++) 1069 size--; 1070 1071 /* Test and remove guard. */ 1072 if (guard != NULL && guard[0] != '\0') { 1073 guard_len = strlen(guard); 1074 if (strncasecmp(cmdline, guard, guard_len) != 0) 1075 return; 1076 cmdline += guard_len; 1077 size -= guard_len; 1078 } 1079 1080 /* Skip leading spaces. */ 1081 for (; isspace(*cmdline) && (size > 0); cmdline++) 1082 size--; 1083 1084 /* Replace ',' with '\0'. */ 1085 /* TODO: implement escaping for ',' character. */ 1086 cmdline_next = cmdline; 1087 while(strsep(&cmdline_next, ",") != NULL) 1088 ; 1089 init_static_kenv(cmdline, 0); 1090 /* Parse boothowto. */ 1091 for (i = 0; howto_names[i].ev != NULL; i++) { 1092 env = kern_getenv(howto_names[i].ev); 1093 if (env != NULL) { 1094 if (strtoul(env, NULL, 10) != 0) 1095 boothowto |= howto_names[i].mask; 1096 freeenv(env); 1097 } 1098 } 1099} 1100 1101vm_offset_t 1102linux_parse_boot_param(struct arm_boot_params *abp) 1103{ 1104 struct arm_lbabi_tag *walker; 1105 uint32_t revision; 1106 uint64_t serial; 1107 int size; 1108 vm_offset_t lastaddr; 1109#ifdef FDT 1110 struct fdt_header *dtb_ptr; 1111 uint32_t dtb_size; 1112#endif 1113 1114 /* 1115 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2 1116 * is atags or dtb pointer. If all of these aren't satisfied, 1117 * then punt. Unfortunately, it looks like DT enabled kernels 1118 * doesn't uses board type and U-Boot delivers 0 in r1 for them. 1119 */ 1120 if (abp->abp_r0 != 0 || abp->abp_r2 == 0) 1121 return (0); 1122#ifdef FDT 1123 /* Test if r2 point to valid DTB. */ 1124 dtb_ptr = (struct fdt_header *)abp->abp_r2; 1125 if (fdt_check_header(dtb_ptr) == 0) { 1126 dtb_size = fdt_totalsize(dtb_ptr); 1127 return (fake_preload_metadata(abp, dtb_ptr, dtb_size)); 1128 } 1129#endif 1130 1131 board_id = abp->abp_r1; 1132 walker = (struct arm_lbabi_tag *)abp->abp_r2; 1133 1134 if (ATAG_TAG(walker) != ATAG_CORE) 1135 return 0; 1136 1137 atag_list = walker; 1138 while (ATAG_TAG(walker) != ATAG_NONE) { 1139 switch (ATAG_TAG(walker)) { 1140 case ATAG_CORE: 1141 break; 1142 case ATAG_MEM: 1143 arm_physmem_hardware_region(walker->u.tag_mem.start, 1144 walker->u.tag_mem.size); 1145 break; 1146 case ATAG_INITRD2: 1147 break; 1148 case ATAG_SERIAL: 1149 serial = walker->u.tag_sn.high; 1150 serial <<= 32; 1151 serial |= walker->u.tag_sn.low; 1152 board_set_serial(serial); 1153 break; 1154 case ATAG_REVISION: 1155 revision = walker->u.tag_rev.rev; 1156 board_set_revision(revision); 1157 break; 1158 case ATAG_CMDLINE: 1159 size = ATAG_SIZE(walker) - 1160 sizeof(struct arm_lbabi_header); 1161 size = min(size, LBABI_MAX_COMMAND_LINE); 1162 strncpy(linux_command_line, walker->u.tag_cmd.command, 1163 size); 1164 linux_command_line[size] = '\0'; 1165 break; 1166 default: 1167 break; 1168 } 1169 walker = ATAG_NEXT(walker); 1170 } 1171 1172 /* Save a copy for later */ 1173 bcopy(atag_list, atags, 1174 (char *)walker - (char *)atag_list + ATAG_SIZE(walker)); 1175 1176 lastaddr = fake_preload_metadata(abp, NULL, 0); 1177 cmdline_set_env(linux_command_line, CMDLINE_GUARD); 1178 return lastaddr; 1179} 1180#endif 1181 1182#if defined(FREEBSD_BOOT_LOADER) 1183vm_offset_t 1184freebsd_parse_boot_param(struct arm_boot_params *abp) 1185{ 1186 vm_offset_t lastaddr = 0; 1187 void *mdp; 1188 void *kmdp; 1189#ifdef DDB 1190 vm_offset_t ksym_start; 1191 vm_offset_t ksym_end; 1192#endif 1193 1194 /* 1195 * Mask metadata pointer: it is supposed to be on page boundary. If 1196 * the first argument (mdp) doesn't point to a valid address the 1197 * bootloader must have passed us something else than the metadata 1198 * ptr, so we give up. Also give up if we cannot find metadta section 1199 * the loader creates that we get all this data out of. 1200 */ 1201 1202 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL) 1203 return 0; 1204 preload_metadata = mdp; 1205 kmdp = preload_search_by_type("elf kernel"); 1206 if (kmdp == NULL) 1207 return 0; 1208 1209 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1210 loader_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); 1211 init_static_kenv(loader_envp, 0); 1212 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t); 1213#ifdef DDB 1214 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1215 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1216 db_fetch_ksymtab(ksym_start, ksym_end); 1217#endif 1218 return lastaddr; 1219} 1220#endif 1221 1222vm_offset_t 1223default_parse_boot_param(struct arm_boot_params *abp) 1224{ 1225 vm_offset_t lastaddr; 1226 1227#if defined(LINUX_BOOT_ABI) 1228 if ((lastaddr = linux_parse_boot_param(abp)) != 0) 1229 return lastaddr; 1230#endif 1231#if defined(FREEBSD_BOOT_LOADER) 1232 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0) 1233 return lastaddr; 1234#endif 1235 /* Fall back to hardcoded metadata. */ 1236 lastaddr = fake_preload_metadata(abp, NULL, 0); 1237 1238 return lastaddr; 1239} 1240 1241/* 1242 * Stub version of the boot parameter parsing routine. We are 1243 * called early in initarm, before even VM has been initialized. 1244 * This routine needs to preserve any data that the boot loader 1245 * has passed in before the kernel starts to grow past the end 1246 * of the BSS, traditionally the place boot-loaders put this data. 1247 * 1248 * Since this is called so early, things that depend on the vm system 1249 * being setup (including access to some SoC's serial ports), about 1250 * all that can be done in this routine is to copy the arguments. 1251 * 1252 * This is the default boot parameter parsing routine. Individual 1253 * kernels/boards can override this weak function with one of their 1254 * own. We just fake metadata... 1255 */ 1256__weak_reference(default_parse_boot_param, parse_boot_param); 1257 1258/* 1259 * Initialize proc0 1260 */ 1261void 1262init_proc0(vm_offset_t kstack) 1263{ 1264 proc_linkup0(&proc0, &thread0); 1265 thread0.td_kstack = kstack; 1266 thread0.td_pcb = (struct pcb *) 1267 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1; 1268 thread0.td_pcb->pcb_flags = 0; 1269 thread0.td_pcb->pcb_vfpcpu = -1; 1270 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN; 1271 thread0.td_frame = &proc0_tf; 1272 pcpup->pc_curpcb = thread0.td_pcb; 1273} 1274 1275int 1276arm_predict_branch(void *cookie, u_int insn, register_t pc, register_t *new_pc, 1277 u_int (*fetch_reg)(void*, int), u_int (*read_int)(void*, vm_offset_t, u_int*)) 1278{ 1279 u_int addr, nregs, offset = 0; 1280 int error = 0; 1281 1282 switch ((insn >> 24) & 0xf) { 1283 case 0x2: /* add pc, reg1, #value */ 1284 case 0x0: /* add pc, reg1, reg2, lsl #offset */ 1285 addr = fetch_reg(cookie, (insn >> 16) & 0xf); 1286 if (((insn >> 16) & 0xf) == 15) 1287 addr += 8; 1288 if (insn & 0x0200000) { 1289 offset = (insn >> 7) & 0x1e; 1290 offset = (insn & 0xff) << (32 - offset) | 1291 (insn & 0xff) >> offset; 1292 } else { 1293 1294 offset = fetch_reg(cookie, insn & 0x0f); 1295 if ((insn & 0x0000ff0) != 0x00000000) { 1296 if (insn & 0x10) 1297 nregs = fetch_reg(cookie, 1298 (insn >> 8) & 0xf); 1299 else 1300 nregs = (insn >> 7) & 0x1f; 1301 switch ((insn >> 5) & 3) { 1302 case 0: 1303 /* lsl */ 1304 offset = offset << nregs; 1305 break; 1306 case 1: 1307 /* lsr */ 1308 offset = offset >> nregs; 1309 break; 1310 default: 1311 break; /* XXX */ 1312 } 1313 1314 } 1315 *new_pc = addr + offset; 1316 return (0); 1317 1318 } 1319 1320 case 0xa: /* b ... */ 1321 case 0xb: /* bl ... */ 1322 addr = ((insn << 2) & 0x03ffffff); 1323 if (addr & 0x02000000) 1324 addr |= 0xfc000000; 1325 *new_pc = (pc + 8 + addr); 1326 return (0); 1327 case 0x7: /* ldr pc, [pc, reg, lsl #2] */ 1328 addr = fetch_reg(cookie, insn & 0xf); 1329 addr = pc + 8 + (addr << 2); 1330 error = read_int(cookie, addr, &addr); 1331 *new_pc = addr; 1332 return (error); 1333 case 0x1: /* mov pc, reg */ 1334 *new_pc = fetch_reg(cookie, insn & 0xf); 1335 return (0); 1336 case 0x4: 1337 case 0x5: /* ldr pc, [reg] */ 1338 addr = fetch_reg(cookie, (insn >> 16) & 0xf); 1339 /* ldr pc, [reg, #offset] */ 1340 if (insn & (1 << 24)) 1341 offset = insn & 0xfff; 1342 if (insn & 0x00800000) 1343 addr += offset; 1344 else 1345 addr -= offset; 1346 error = read_int(cookie, addr, &addr); 1347 *new_pc = addr; 1348 1349 return (error); 1350 case 0x8: /* ldmxx reg, {..., pc} */ 1351 case 0x9: 1352 addr = fetch_reg(cookie, (insn >> 16) & 0xf); 1353 nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555); 1354 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333); 1355 nregs = (nregs + (nregs >> 4)) & 0x0f0f; 1356 nregs = (nregs + (nregs >> 8)) & 0x001f; 1357 switch ((insn >> 23) & 0x3) { 1358 case 0x0: /* ldmda */ 1359 addr = addr - 0; 1360 break; 1361 case 0x1: /* ldmia */ 1362 addr = addr + 0 + ((nregs - 1) << 2); 1363 break; 1364 case 0x2: /* ldmdb */ 1365 addr = addr - 4; 1366 break; 1367 case 0x3: /* ldmib */ 1368 addr = addr + 4 + ((nregs - 1) << 2); 1369 break; 1370 } 1371 error = read_int(cookie, addr, &addr); 1372 *new_pc = addr; 1373 1374 return (error); 1375 default: 1376 return (EINVAL); 1377 } 1378} 1379 1380#if __ARM_ARCH >= 6 1381void 1382set_stackptrs(int cpu) 1383{ 1384 1385 set_stackptr(PSR_IRQ32_MODE, 1386 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1387 set_stackptr(PSR_ABT32_MODE, 1388 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1389 set_stackptr(PSR_UND32_MODE, 1390 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1391} 1392#else 1393void 1394set_stackptrs(int cpu) 1395{ 1396 1397 set_stackptr(PSR_IRQ32_MODE, 1398 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1399 set_stackptr(PSR_ABT32_MODE, 1400 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1401 set_stackptr(PSR_UND32_MODE, 1402 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1403} 1404#endif 1405 1406#ifdef EFI 1407#define efi_next_descriptor(ptr, size) \ 1408 ((struct efi_md *)(((uint8_t *) ptr) + size)) 1409 1410static void 1411add_efi_map_entries(struct efi_map_header *efihdr, struct mem_region *mr, 1412 int *mrcnt) 1413{ 1414 struct efi_md *map, *p; 1415 const char *type; 1416 size_t efisz, memory_size; 1417 int ndesc, i, j; 1418 1419 static const char *types[] = { 1420 "Reserved", 1421 "LoaderCode", 1422 "LoaderData", 1423 "BootServicesCode", 1424 "BootServicesData", 1425 "RuntimeServicesCode", 1426 "RuntimeServicesData", 1427 "ConventionalMemory", 1428 "UnusableMemory", 1429 "ACPIReclaimMemory", 1430 "ACPIMemoryNVS", 1431 "MemoryMappedIO", 1432 "MemoryMappedIOPortSpace", 1433 "PalCode" 1434 }; 1435 1436 *mrcnt = 0; 1437 1438 /* 1439 * Memory map data provided by UEFI via the GetMemoryMap 1440 * Boot Services API. 1441 */ 1442 efisz = roundup2(sizeof(struct efi_map_header), 0x10); 1443 map = (struct efi_md *)((uint8_t *)efihdr + efisz); 1444 1445 if (efihdr->descriptor_size == 0) 1446 return; 1447 ndesc = efihdr->memory_size / efihdr->descriptor_size; 1448 1449 if (boothowto & RB_VERBOSE) 1450 printf("%23s %12s %12s %8s %4s\n", 1451 "Type", "Physical", "Virtual", "#Pages", "Attr"); 1452 1453 memory_size = 0; 1454 for (i = 0, j = 0, p = map; i < ndesc; i++, 1455 p = efi_next_descriptor(p, efihdr->descriptor_size)) { 1456 if (boothowto & RB_VERBOSE) { 1457 if (p->md_type <= EFI_MD_TYPE_PALCODE) 1458 type = types[p->md_type]; 1459 else 1460 type = "<INVALID>"; 1461 printf("%23s %012llx %12p %08llx ", type, p->md_phys, 1462 p->md_virt, p->md_pages); 1463 if (p->md_attr & EFI_MD_ATTR_UC) 1464 printf("UC "); 1465 if (p->md_attr & EFI_MD_ATTR_WC) 1466 printf("WC "); 1467 if (p->md_attr & EFI_MD_ATTR_WT) 1468 printf("WT "); 1469 if (p->md_attr & EFI_MD_ATTR_WB) 1470 printf("WB "); 1471 if (p->md_attr & EFI_MD_ATTR_UCE) 1472 printf("UCE "); 1473 if (p->md_attr & EFI_MD_ATTR_WP) 1474 printf("WP "); 1475 if (p->md_attr & EFI_MD_ATTR_RP) 1476 printf("RP "); 1477 if (p->md_attr & EFI_MD_ATTR_XP) 1478 printf("XP "); 1479 if (p->md_attr & EFI_MD_ATTR_RT) 1480 printf("RUNTIME"); 1481 printf("\n"); 1482 } 1483 1484 switch (p->md_type) { 1485 case EFI_MD_TYPE_CODE: 1486 case EFI_MD_TYPE_DATA: 1487 case EFI_MD_TYPE_BS_CODE: 1488 case EFI_MD_TYPE_BS_DATA: 1489 case EFI_MD_TYPE_FREE: 1490 /* 1491 * We're allowed to use any entry with these types. 1492 */ 1493 break; 1494 default: 1495 continue; 1496 } 1497 1498 j++; 1499 if (j >= FDT_MEM_REGIONS) 1500 break; 1501 1502 mr[j].mr_start = p->md_phys; 1503 mr[j].mr_size = p->md_pages * PAGE_SIZE; 1504 memory_size += mr[j].mr_size; 1505 } 1506 1507 *mrcnt = j; 1508} 1509#endif /* EFI */ 1510 1511#ifdef FDT 1512static char * 1513kenv_next(char *cp) 1514{ 1515 1516 if (cp != NULL) { 1517 while (*cp != 0) 1518 cp++; 1519 cp++; 1520 if (*cp == 0) 1521 cp = NULL; 1522 } 1523 return (cp); 1524} 1525 1526static void 1527print_kenv(void) 1528{ 1529 char *cp; 1530 1531 debugf("loader passed (static) kenv:\n"); 1532 if (loader_envp == NULL) { 1533 debugf(" no env, null ptr\n"); 1534 return; 1535 } 1536 debugf(" loader_envp = 0x%08x\n", (uint32_t)loader_envp); 1537 1538 for (cp = loader_envp; cp != NULL; cp = kenv_next(cp)) 1539 debugf(" %x %s\n", (uint32_t)cp, cp); 1540} 1541 1542#if __ARM_ARCH < 6 1543void * 1544initarm(struct arm_boot_params *abp) 1545{ 1546 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1547 struct pv_addr kernel_l1pt; 1548 struct pv_addr dpcpu; 1549 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 1550 uint64_t memsize; 1551 uint32_t l2size; 1552 char *env; 1553 void *kmdp; 1554 u_int l1pagetable; 1555 int i, j, err_devmap, mem_regions_sz; 1556 1557 lastaddr = parse_boot_param(abp); 1558 arm_physmem_kernaddr = abp->abp_physaddr; 1559 1560 memsize = 0; 1561 1562 cpuinfo_init(); 1563 set_cpufuncs(); 1564 1565 /* 1566 * Find the dtb passed in by the boot loader. 1567 */ 1568 kmdp = preload_search_by_type("elf kernel"); 1569 if (kmdp != NULL) 1570 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1571 else 1572 dtbp = (vm_offset_t)NULL; 1573 1574#if defined(FDT_DTB_STATIC) 1575 /* 1576 * In case the device tree blob was not retrieved (from metadata) try 1577 * to use the statically embedded one. 1578 */ 1579 if (dtbp == (vm_offset_t)NULL) 1580 dtbp = (vm_offset_t)&fdt_static_dtb; 1581#endif 1582 1583 if (OF_install(OFW_FDT, 0) == FALSE) 1584 panic("Cannot install FDT"); 1585 1586 if (OF_init((void *)dtbp) != 0) 1587 panic("OF_init failed with the found device tree"); 1588 1589 /* Grab physical memory regions information from device tree. */ 1590 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 1591 panic("Cannot get physical memory regions"); 1592 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1593 1594 /* Grab reserved memory regions information from device tree. */ 1595 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1596 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1597 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1598 1599 /* Platform-specific initialisation */ 1600 platform_probe_and_attach(); 1601 1602 pcpu0_init(); 1603 1604 /* Do basic tuning, hz etc */ 1605 init_param1(); 1606 1607 /* Calculate number of L2 tables needed for mapping vm_page_array */ 1608 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 1609 l2size = (l2size >> L1_S_SHIFT) + 1; 1610 1611 /* 1612 * Add one table for end of kernel map, one for stacks, msgbuf and 1613 * L1 and L2 tables map and one for vectors map. 1614 */ 1615 l2size += 3; 1616 1617 /* Make it divisible by 4 */ 1618 l2size = (l2size + 3) & ~3; 1619 1620 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 1621 1622 /* Define a macro to simplify memory allocation */ 1623#define valloc_pages(var, np) \ 1624 alloc_pages((var).pv_va, (np)); \ 1625 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 1626 1627#define alloc_pages(var, np) \ 1628 (var) = freemempos; \ 1629 freemempos += (np * PAGE_SIZE); \ 1630 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 1631 1632 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 1633 freemempos += PAGE_SIZE; 1634 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 1635 1636 for (i = 0, j = 0; i < l2size; ++i) { 1637 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 1638 valloc_pages(kernel_pt_table[i], 1639 L2_TABLE_SIZE / PAGE_SIZE); 1640 j = i; 1641 } else { 1642 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 1643 L2_TABLE_SIZE_REAL * (i - j); 1644 kernel_pt_table[i].pv_pa = 1645 kernel_pt_table[i].pv_va - KERNVIRTADDR + 1646 abp->abp_physaddr; 1647 1648 } 1649 } 1650 /* 1651 * Allocate a page for the system page mapped to 0x00000000 1652 * or 0xffff0000. This page will just contain the system vectors 1653 * and can be shared by all processes. 1654 */ 1655 valloc_pages(systempage, 1); 1656 1657 /* Allocate dynamic per-cpu area. */ 1658 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 1659 dpcpu_init((void *)dpcpu.pv_va, 0); 1660 1661 /* Allocate stacks for all modes */ 1662 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 1663 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 1664 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 1665 valloc_pages(kernelstack, kstack_pages * MAXCPU); 1666 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 1667 1668 /* 1669 * Now we start construction of the L1 page table 1670 * We start by mapping the L2 page tables into the L1. 1671 * This means that we can replace L1 mappings later on if necessary 1672 */ 1673 l1pagetable = kernel_l1pt.pv_va; 1674 1675 /* 1676 * Try to map as much as possible of kernel text and data using 1677 * 1MB section mapping and for the rest of initial kernel address 1678 * space use L2 coarse tables. 1679 * 1680 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 1681 * and kernel structures 1682 */ 1683 l2_start = lastaddr & ~(L1_S_OFFSET); 1684 for (i = 0 ; i < l2size - 1; i++) 1685 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 1686 &kernel_pt_table[i]); 1687 1688 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 1689 1690 /* Map kernel code and data */ 1691 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 1692 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 1693 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1694 1695 /* Map L1 directory and allocated L2 page tables */ 1696 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 1697 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1698 1699 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 1700 kernel_pt_table[0].pv_pa, 1701 L2_TABLE_SIZE_REAL * l2size, 1702 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1703 1704 /* Map allocated DPCPU, stacks and msgbuf */ 1705 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 1706 freemempos - dpcpu.pv_va, 1707 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1708 1709 /* Link and map the vector page */ 1710 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 1711 &kernel_pt_table[l2size - 1]); 1712 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 1713 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 1714 1715 /* Establish static device mappings. */ 1716 err_devmap = platform_devmap_init(); 1717 devmap_bootstrap(l1pagetable, NULL); 1718 vm_max_kernel_address = platform_lastaddr(); 1719 1720 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 1721 pmap_pa = kernel_l1pt.pv_pa; 1722 cpu_setttb(kernel_l1pt.pv_pa); 1723 cpu_tlb_flushID(); 1724 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 1725 1726 /* 1727 * Now that proper page tables are installed, call cpu_setup() to enable 1728 * instruction and data caches and other chip-specific features. 1729 */ 1730 cpu_setup(); 1731 1732 /* 1733 * Only after the SOC registers block is mapped we can perform device 1734 * tree fixups, as they may attempt to read parameters from hardware. 1735 */ 1736 OF_interpret("perform-fixup", 0); 1737 1738 platform_gpio_init(); 1739 1740 cninit(); 1741 1742 debugf("initarm: console initialized\n"); 1743 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1744 debugf(" boothowto = 0x%08x\n", boothowto); 1745 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1746 print_kenv(); 1747 1748 env = kern_getenv("kernelname"); 1749 if (env != NULL) { 1750 strlcpy(kernelname, env, sizeof(kernelname)); 1751 freeenv(env); 1752 } 1753 1754 if (err_devmap != 0) 1755 printf("WARNING: could not fully configure devmap, error=%d\n", 1756 err_devmap); 1757 1758 platform_late_init(); 1759 1760 /* 1761 * Pages were allocated during the secondary bootstrap for the 1762 * stacks for different CPU modes. 1763 * We must now set the r13 registers in the different CPU modes to 1764 * point to these stacks. 1765 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1766 * of the stack memory. 1767 */ 1768 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1769 1770 set_stackptrs(0); 1771 1772 /* 1773 * We must now clean the cache again.... 1774 * Cleaning may be done by reading new data to displace any 1775 * dirty data in the cache. This will have happened in cpu_setttb() 1776 * but since we are boot strapping the addresses used for the read 1777 * may have just been remapped and thus the cache could be out 1778 * of sync. A re-clean after the switch will cure this. 1779 * After booting there are no gross relocations of the kernel thus 1780 * this problem will not occur after initarm(). 1781 */ 1782 cpu_idcache_wbinv_all(); 1783 1784 undefined_init(); 1785 1786 init_proc0(kernelstack.pv_va); 1787 1788 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1789 pmap_bootstrap(freemempos, &kernel_l1pt); 1790 msgbufp = (void *)msgbufpv.pv_va; 1791 msgbufinit(msgbufp, msgbufsize); 1792 mutex_init(); 1793 1794 /* 1795 * Exclude the kernel (and all the things we allocated which immediately 1796 * follow the kernel) from the VM allocation pool but not from crash 1797 * dumps. virtual_avail is a global variable which tracks the kva we've 1798 * "allocated" while setting up pmaps. 1799 * 1800 * Prepare the list of physical memory available to the vm subsystem. 1801 */ 1802 arm_physmem_exclude_region(abp->abp_physaddr, 1803 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1804 arm_physmem_init_kernel_globals(); 1805 1806 init_param2(physmem); 1807 dbg_monitor_init(); 1808 kdb_init(); 1809 1810 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1811 sizeof(struct pcb))); 1812} 1813#else /* __ARM_ARCH < 6 */ 1814void * 1815initarm(struct arm_boot_params *abp) 1816{ 1817 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1818 vm_paddr_t lastaddr; 1819 vm_offset_t dtbp, kernelstack, dpcpu; 1820 char *env; 1821 void *kmdp; 1822 int err_devmap, mem_regions_sz; 1823#ifdef EFI 1824 struct efi_map_header *efihdr; 1825#endif 1826 1827 /* get last allocated physical address */ 1828 arm_physmem_kernaddr = abp->abp_physaddr; 1829 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr; 1830 1831 set_cpufuncs(); 1832 cpuinfo_init(); 1833 1834 /* 1835 * Find the dtb passed in by the boot loader. 1836 */ 1837 kmdp = preload_search_by_type("elf kernel"); 1838 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1839#if defined(FDT_DTB_STATIC) 1840 /* 1841 * In case the device tree blob was not retrieved (from metadata) try 1842 * to use the statically embedded one. 1843 */ 1844 if (dtbp == (vm_offset_t)NULL) 1845 dtbp = (vm_offset_t)&fdt_static_dtb; 1846#endif 1847 1848 if (OF_install(OFW_FDT, 0) == FALSE) 1849 panic("Cannot install FDT"); 1850 1851 if (OF_init((void *)dtbp) != 0) 1852 panic("OF_init failed with the found device tree"); 1853 1854#if defined(LINUX_BOOT_ABI) 1855 if (loader_envp == NULL && fdt_get_chosen_bootargs(linux_command_line, 1856 LBABI_MAX_COMMAND_LINE) == 0) 1857 cmdline_set_env(linux_command_line, CMDLINE_GUARD); 1858#endif 1859 1860#ifdef EFI 1861 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1862 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1863 if (efihdr != NULL) { 1864 add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz); 1865 } else 1866#endif 1867 { 1868 /* Grab physical memory regions information from device tree. */ 1869 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0) 1870 panic("Cannot get physical memory regions"); 1871 } 1872 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1873 1874 /* Grab reserved memory regions information from device tree. */ 1875 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1876 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1877 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1878 1879 /* 1880 * Set TEX remapping registers. 1881 * Setup kernel page tables and switch to kernel L1 page table. 1882 */ 1883 pmap_set_tex(); 1884 pmap_bootstrap_prepare(lastaddr); 1885 1886 /* 1887 * Now that proper page tables are installed, call cpu_setup() to enable 1888 * instruction and data caches and other chip-specific features. 1889 */ 1890 cpu_setup(); 1891 1892 /* Platform-specific initialisation */ 1893 platform_probe_and_attach(); 1894 pcpu0_init(); 1895 1896 /* Do basic tuning, hz etc */ 1897 init_param1(); 1898 1899 /* 1900 * Allocate a page for the system page mapped to 0xffff0000 1901 * This page will just contain the system vectors and can be 1902 * shared by all processes. 1903 */ 1904 systempage = pmap_preboot_get_pages(1); 1905 1906 /* Map the vector page. */ 1907 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1); 1908 if (virtual_end >= ARM_VECTORS_HIGH) 1909 virtual_end = ARM_VECTORS_HIGH - 1; 1910 1911 /* Allocate dynamic per-cpu area. */ 1912 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE); 1913 dpcpu_init((void *)dpcpu, 0); 1914 1915 /* Allocate stacks for all modes */ 1916 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU); 1917 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU); 1918 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU ); 1919 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU); 1920 1921 /* Allocate message buffer. */ 1922 msgbufp = (void *)pmap_preboot_get_vpages( 1923 round_page(msgbufsize) / PAGE_SIZE); 1924 1925 /* 1926 * Pages were allocated during the secondary bootstrap for the 1927 * stacks for different CPU modes. 1928 * We must now set the r13 registers in the different CPU modes to 1929 * point to these stacks. 1930 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1931 * of the stack memory. 1932 */ 1933 set_stackptrs(0); 1934 mutex_init(); 1935 1936 /* Establish static device mappings. */ 1937 err_devmap = platform_devmap_init(); 1938 devmap_bootstrap(0, NULL); 1939 vm_max_kernel_address = platform_lastaddr(); 1940 1941 /* 1942 * Only after the SOC registers block is mapped we can perform device 1943 * tree fixups, as they may attempt to read parameters from hardware. 1944 */ 1945 OF_interpret("perform-fixup", 0); 1946 platform_gpio_init(); 1947 cninit(); 1948 1949 debugf("initarm: console initialized\n"); 1950 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1951 debugf(" boothowto = 0x%08x\n", boothowto); 1952 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1953 debugf(" lastaddr1: 0x%08x\n", lastaddr); 1954 print_kenv(); 1955 1956 env = kern_getenv("kernelname"); 1957 if (env != NULL) 1958 strlcpy(kernelname, env, sizeof(kernelname)); 1959 1960 if (err_devmap != 0) 1961 printf("WARNING: could not fully configure devmap, error=%d\n", 1962 err_devmap); 1963 1964 platform_late_init(); 1965 1966 /* 1967 * We must now clean the cache again.... 1968 * Cleaning may be done by reading new data to displace any 1969 * dirty data in the cache. This will have happened in cpu_setttb() 1970 * but since we are boot strapping the addresses used for the read 1971 * may have just been remapped and thus the cache could be out 1972 * of sync. A re-clean after the switch will cure this. 1973 * After booting there are no gross relocations of the kernel thus 1974 * this problem will not occur after initarm(). 1975 */ 1976 /* Set stack for exception handlers */ 1977 undefined_init(); 1978 init_proc0(kernelstack); 1979 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1980 enable_interrupts(PSR_A); 1981 pmap_bootstrap(0); 1982 1983 /* Exclude the kernel (and all the things we allocated which immediately 1984 * follow the kernel) from the VM allocation pool but not from crash 1985 * dumps. virtual_avail is a global variable which tracks the kva we've 1986 * "allocated" while setting up pmaps. 1987 * 1988 * Prepare the list of physical memory available to the vm subsystem. 1989 */ 1990 arm_physmem_exclude_region(abp->abp_physaddr, 1991 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC); 1992 arm_physmem_init_kernel_globals(); 1993 1994 init_param2(physmem); 1995 /* Init message buffer. */ 1996 msgbufinit(msgbufp, msgbufsize); 1997 dbg_monitor_init(); 1998 kdb_init(); 1999 return ((void *)STACKALIGN(thread0.td_pcb)); 2000 2001} 2002 2003#endif /* __ARM_ARCH < 6 */ 2004#endif /* FDT */ 2005 2006uint32_t (*arm_cpu_fill_vdso_timehands)(struct vdso_timehands *, 2007 struct timecounter *); 2008 2009uint32_t 2010cpu_fill_vdso_timehands(struct vdso_timehands *vdso_th, struct timecounter *tc) 2011{ 2012 2013 return (arm_cpu_fill_vdso_timehands != NULL ? 2014 arm_cpu_fill_vdso_timehands(vdso_th, tc) : 0); 2015} 2016