machdep.c revision 296258
1/* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3/*- 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 1994-1998 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Brinicombe 22 * for the NetBSD Project. 23 * 4. The name of the company nor the name of the author may be used to 24 * endorse or promote products derived from this software without specific 25 * prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * Machine dependant functions for kernel setup 40 * 41 * Created : 17/09/94 42 * Updated : 18/04/01 updated for new wscons 43 */ 44 45#include "opt_compat.h" 46#include "opt_ddb.h" 47#include "opt_kstack_pages.h" 48#include "opt_platform.h" 49#include "opt_sched.h" 50#include "opt_timer.h" 51 52#include <sys/cdefs.h> 53__FBSDID("$FreeBSD: head/sys/arm/arm/machdep.c 296258 2016-03-01 09:51:36Z andrew $"); 54 55#include <sys/param.h> 56#include <sys/proc.h> 57#include <sys/systm.h> 58#include <sys/bio.h> 59#include <sys/buf.h> 60#include <sys/bus.h> 61#include <sys/cons.h> 62#include <sys/cpu.h> 63#include <sys/efi.h> 64#include <sys/exec.h> 65#include <sys/imgact.h> 66#include <sys/kdb.h> 67#include <sys/kernel.h> 68#include <sys/ktr.h> 69#include <sys/linker.h> 70#include <sys/lock.h> 71#include <sys/malloc.h> 72#include <sys/msgbuf.h> 73#include <sys/mutex.h> 74#include <sys/pcpu.h> 75#include <sys/ptrace.h> 76#include <sys/reboot.h> 77#include <sys/rwlock.h> 78#include <sys/sched.h> 79#include <sys/signalvar.h> 80#include <sys/syscallsubr.h> 81#include <sys/sysctl.h> 82#include <sys/sysent.h> 83#include <sys/sysproto.h> 84#include <sys/uio.h> 85#include <sys/vdso.h> 86 87#include <vm/vm.h> 88#include <vm/pmap.h> 89#include <vm/vm_map.h> 90#include <vm/vm_object.h> 91#include <vm/vm_page.h> 92#include <vm/vm_pager.h> 93 94#include <machine/acle-compat.h> 95#include <machine/armreg.h> 96#include <machine/atags.h> 97#include <machine/cpu.h> 98#include <machine/cpuinfo.h> 99#include <machine/debug_monitor.h> 100#include <machine/db_machdep.h> 101#include <machine/devmap.h> 102#include <machine/frame.h> 103#include <machine/intr.h> 104#include <machine/machdep.h> 105#include <machine/md_var.h> 106#include <machine/metadata.h> 107#include <machine/pcb.h> 108#include <machine/physmem.h> 109#include <machine/platform.h> 110#include <machine/reg.h> 111#include <machine/trap.h> 112#include <machine/undefined.h> 113#include <machine/vfp.h> 114#include <machine/vmparam.h> 115#include <machine/sysarch.h> 116 117#ifdef FDT 118#include <dev/fdt/fdt_common.h> 119#include <dev/ofw/openfirm.h> 120#endif 121 122#ifdef DDB 123#include <ddb/ddb.h> 124 125#if __ARM_ARCH >= 6 126 127DB_SHOW_COMMAND(cp15, db_show_cp15) 128{ 129 u_int reg; 130 131 reg = cp15_midr_get(); 132 db_printf("Cpu ID: 0x%08x\n", reg); 133 reg = cp15_ctr_get(); 134 db_printf("Current Cache Lvl ID: 0x%08x\n",reg); 135 136 reg = cp15_sctlr_get(); 137 db_printf("Ctrl: 0x%08x\n",reg); 138 reg = cp15_actlr_get(); 139 db_printf("Aux Ctrl: 0x%08x\n",reg); 140 141 reg = cp15_id_pfr0_get(); 142 db_printf("Processor Feat 0: 0x%08x\n", reg); 143 reg = cp15_id_pfr1_get(); 144 db_printf("Processor Feat 1: 0x%08x\n", reg); 145 reg = cp15_id_dfr0_get(); 146 db_printf("Debug Feat 0: 0x%08x\n", reg); 147 reg = cp15_id_afr0_get(); 148 db_printf("Auxiliary Feat 0: 0x%08x\n", reg); 149 reg = cp15_id_mmfr0_get(); 150 db_printf("Memory Model Feat 0: 0x%08x\n", reg); 151 reg = cp15_id_mmfr1_get(); 152 db_printf("Memory Model Feat 1: 0x%08x\n", reg); 153 reg = cp15_id_mmfr2_get(); 154 db_printf("Memory Model Feat 2: 0x%08x\n", reg); 155 reg = cp15_id_mmfr3_get(); 156 db_printf("Memory Model Feat 3: 0x%08x\n", reg); 157 reg = cp15_ttbr_get(); 158 db_printf("TTB0: 0x%08x\n", reg); 159} 160 161DB_SHOW_COMMAND(vtop, db_show_vtop) 162{ 163 u_int reg; 164 165 if (have_addr) { 166 cp15_ats1cpr_set(addr); 167 reg = cp15_par_get(); 168 db_printf("Physical address reg: 0x%08x\n",reg); 169 } else 170 db_printf("show vtop <virt_addr>\n"); 171} 172#endif /* __ARM_ARCH >= 6 */ 173#endif /* DDB */ 174 175#ifdef DEBUG 176#define debugf(fmt, args...) printf(fmt, ##args) 177#else 178#define debugf(fmt, args...) 179#endif 180 181struct pcpu __pcpu[MAXCPU]; 182struct pcpu *pcpup = &__pcpu[0]; 183 184static struct trapframe proc0_tf; 185uint32_t cpu_reset_address = 0; 186int cold = 1; 187vm_offset_t vector_page; 188 189int (*_arm_memcpy)(void *, void *, int, int) = NULL; 190int (*_arm_bzero)(void *, int, int) = NULL; 191int _min_memcpy_size = 0; 192int _min_bzero_size = 0; 193 194extern int *end; 195 196#ifdef FDT 197static char *loader_envp; 198 199vm_paddr_t pmap_pa; 200 201#if __ARM_ARCH >= 6 202vm_offset_t systempage; 203vm_offset_t irqstack; 204vm_offset_t undstack; 205vm_offset_t abtstack; 206#else 207/* 208 * This is the number of L2 page tables required for covering max 209 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 210 * stacks etc.), uprounded to be divisible by 4. 211 */ 212#define KERNEL_PT_MAX 78 213 214static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 215 216struct pv_addr systempage; 217static struct pv_addr msgbufpv; 218struct pv_addr irqstack; 219struct pv_addr undstack; 220struct pv_addr abtstack; 221static struct pv_addr kernelstack; 222#endif 223#endif 224 225#if defined(LINUX_BOOT_ABI) 226#define LBABI_MAX_BANKS 10 227 228uint32_t board_id; 229struct arm_lbabi_tag *atag_list; 230char linux_command_line[LBABI_MAX_COMMAND_LINE + 1]; 231char atags[LBABI_MAX_COMMAND_LINE * 2]; 232uint32_t memstart[LBABI_MAX_BANKS]; 233uint32_t memsize[LBABI_MAX_BANKS]; 234uint32_t membanks; 235#endif 236 237static uint32_t board_revision; 238/* hex representation of uint64_t */ 239static char board_serial[32]; 240 241SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes"); 242SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD, 243 &board_revision, 0, "Board revision"); 244SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD, 245 board_serial, 0, "Board serial"); 246 247int vfp_exists; 248SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD, 249 &vfp_exists, 0, "Floating point support enabled"); 250 251void 252board_set_serial(uint64_t serial) 253{ 254 255 snprintf(board_serial, sizeof(board_serial)-1, 256 "%016jx", serial); 257} 258 259void 260board_set_revision(uint32_t revision) 261{ 262 263 board_revision = revision; 264} 265 266void 267sendsig(catcher, ksi, mask) 268 sig_t catcher; 269 ksiginfo_t *ksi; 270 sigset_t *mask; 271{ 272 struct thread *td; 273 struct proc *p; 274 struct trapframe *tf; 275 struct sigframe *fp, frame; 276 struct sigacts *psp; 277 struct sysentvec *sysent; 278 int onstack; 279 int sig; 280 int code; 281 282 td = curthread; 283 p = td->td_proc; 284 PROC_LOCK_ASSERT(p, MA_OWNED); 285 sig = ksi->ksi_signo; 286 code = ksi->ksi_code; 287 psp = p->p_sigacts; 288 mtx_assert(&psp->ps_mtx, MA_OWNED); 289 tf = td->td_frame; 290 onstack = sigonstack(tf->tf_usr_sp); 291 292 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 293 catcher, sig); 294 295 /* Allocate and validate space for the signal handler context. */ 296 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 297 SIGISMEMBER(psp->ps_sigonstack, sig)) { 298 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp + 299 td->td_sigstk.ss_size); 300#if defined(COMPAT_43) 301 td->td_sigstk.ss_flags |= SS_ONSTACK; 302#endif 303 } else 304 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 305 306 /* make room on the stack */ 307 fp--; 308 309 /* make the stack aligned */ 310 fp = (struct sigframe *)STACKALIGN(fp); 311 /* Populate the siginfo frame. */ 312 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 313 frame.sf_si = ksi->ksi_info; 314 frame.sf_uc.uc_sigmask = *mask; 315 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 316 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE; 317 frame.sf_uc.uc_stack = td->td_sigstk; 318 mtx_unlock(&psp->ps_mtx); 319 PROC_UNLOCK(td->td_proc); 320 321 /* Copy the sigframe out to the user's stack. */ 322 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 323 /* Process has trashed its stack. Kill it. */ 324 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 325 PROC_LOCK(p); 326 sigexit(td, SIGILL); 327 } 328 329 /* 330 * Build context to run handler in. We invoke the handler 331 * directly, only returning via the trampoline. Note the 332 * trampoline version numbers are coordinated with machine- 333 * dependent code in libc. 334 */ 335 336 tf->tf_r0 = sig; 337 tf->tf_r1 = (register_t)&fp->sf_si; 338 tf->tf_r2 = (register_t)&fp->sf_uc; 339 340 /* the trampoline uses r5 as the uc address */ 341 tf->tf_r5 = (register_t)&fp->sf_uc; 342 tf->tf_pc = (register_t)catcher; 343 tf->tf_usr_sp = (register_t)fp; 344 sysent = p->p_sysent; 345 if (sysent->sv_sigcode_base != 0) 346 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base; 347 else 348 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings - 349 *(sysent->sv_szsigcode)); 350 /* Set the mode to enter in the signal handler */ 351#if __ARM_ARCH >= 7 352 if ((register_t)catcher & 1) 353 tf->tf_spsr |= PSR_T; 354 else 355 tf->tf_spsr &= ~PSR_T; 356#endif 357 358 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 359 tf->tf_usr_sp); 360 361 PROC_LOCK(p); 362 mtx_lock(&psp->ps_mtx); 363} 364 365struct kva_md_info kmi; 366 367/* 368 * arm32_vector_init: 369 * 370 * Initialize the vector page, and select whether or not to 371 * relocate the vectors. 372 * 373 * NOTE: We expect the vector page to be mapped at its expected 374 * destination. 375 */ 376 377extern unsigned int page0[], page0_data[]; 378void 379arm_vector_init(vm_offset_t va, int which) 380{ 381 unsigned int *vectors = (int *) va; 382 unsigned int *vectors_data = vectors + (page0_data - page0); 383 int vec; 384 385 /* 386 * Loop through the vectors we're taking over, and copy the 387 * vector's insn and data word. 388 */ 389 for (vec = 0; vec < ARM_NVEC; vec++) { 390 if ((which & (1 << vec)) == 0) { 391 /* Don't want to take over this vector. */ 392 continue; 393 } 394 vectors[vec] = page0[vec]; 395 vectors_data[vec] = page0_data[vec]; 396 } 397 398 /* Now sync the vectors. */ 399 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int)); 400 401 vector_page = va; 402 403 if (va == ARM_VECTORS_HIGH) { 404 /* 405 * Assume the MD caller knows what it's doing here, and 406 * really does want the vector page relocated. 407 * 408 * Note: This has to be done here (and not just in 409 * cpu_setup()) because the vector page needs to be 410 * accessible *before* cpu_startup() is called. 411 * Think ddb(9) ... 412 * 413 * NOTE: If the CPU control register is not readable, 414 * this will totally fail! We'll just assume that 415 * any system that has high vector support has a 416 * readable CPU control register, for now. If we 417 * ever encounter one that does not, we'll have to 418 * rethink this. 419 */ 420 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 421 } 422} 423 424static void 425cpu_startup(void *dummy) 426{ 427 struct pcb *pcb = thread0.td_pcb; 428 const unsigned int mbyte = 1024 * 1024; 429#if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE) 430 vm_page_t m; 431#endif 432 433 identify_arm_cpu(); 434 435 vm_ksubmap_init(&kmi); 436 437 /* 438 * Display the RAM layout. 439 */ 440 printf("real memory = %ju (%ju MB)\n", 441 (uintmax_t)arm32_ptob(realmem), 442 (uintmax_t)arm32_ptob(realmem) / mbyte); 443 printf("avail memory = %ju (%ju MB)\n", 444 (uintmax_t)arm32_ptob(vm_cnt.v_free_count), 445 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte); 446 if (bootverbose) { 447 arm_physmem_print_tables(); 448 arm_devmap_print_table(); 449 } 450 451 bufinit(); 452 vm_pager_bufferinit(); 453 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack + 454 USPACE_SVC_STACK_TOP; 455 pmap_set_pcb_pagedir(kernel_pmap, pcb); 456#if __ARM_ARCH < 6 457 vector_page_setprot(VM_PROT_READ); 458 pmap_postinit(); 459#ifdef ARM_CACHE_LOCK_ENABLE 460 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 461 arm_lock_cache_line(ARM_TP_ADDRESS); 462#else 463 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 464 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 465#endif 466 *(uint32_t *)ARM_RAS_START = 0; 467 *(uint32_t *)ARM_RAS_END = 0xffffffff; 468#endif 469} 470 471SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 472 473/* 474 * Flush the D-cache for non-DMA I/O so that the I-cache can 475 * be made coherent later. 476 */ 477void 478cpu_flush_dcache(void *ptr, size_t len) 479{ 480 481 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len); 482} 483 484/* Get current clock frequency for the given cpu id. */ 485int 486cpu_est_clockrate(int cpu_id, uint64_t *rate) 487{ 488 489 return (ENXIO); 490} 491 492void 493cpu_idle(int busy) 494{ 495 496 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); 497 spinlock_enter(); 498#ifndef NO_EVENTTIMERS 499 if (!busy) 500 cpu_idleclock(); 501#endif 502 if (!sched_runnable()) 503 cpu_sleep(0); 504#ifndef NO_EVENTTIMERS 505 if (!busy) 506 cpu_activeclock(); 507#endif 508 spinlock_exit(); 509 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu); 510} 511 512int 513cpu_idle_wakeup(int cpu) 514{ 515 516 return (0); 517} 518 519/* 520 * Most ARM platforms don't need to do anything special to init their clocks 521 * (they get intialized during normal device attachment), and by not defining a 522 * cpu_initclocks() function they get this generic one. Any platform that needs 523 * to do something special can just provide their own implementation, which will 524 * override this one due to the weak linkage. 525 */ 526void 527arm_generic_initclocks(void) 528{ 529 530#ifndef NO_EVENTTIMERS 531#ifdef SMP 532 if (PCPU_GET(cpuid) == 0) 533 cpu_initclocks_bsp(); 534 else 535 cpu_initclocks_ap(); 536#else 537 cpu_initclocks_bsp(); 538#endif 539#endif 540} 541__weak_reference(arm_generic_initclocks, cpu_initclocks); 542 543int 544fill_regs(struct thread *td, struct reg *regs) 545{ 546 struct trapframe *tf = td->td_frame; 547 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r)); 548 regs->r_sp = tf->tf_usr_sp; 549 regs->r_lr = tf->tf_usr_lr; 550 regs->r_pc = tf->tf_pc; 551 regs->r_cpsr = tf->tf_spsr; 552 return (0); 553} 554int 555fill_fpregs(struct thread *td, struct fpreg *regs) 556{ 557 bzero(regs, sizeof(*regs)); 558 return (0); 559} 560 561int 562set_regs(struct thread *td, struct reg *regs) 563{ 564 struct trapframe *tf = td->td_frame; 565 566 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r)); 567 tf->tf_usr_sp = regs->r_sp; 568 tf->tf_usr_lr = regs->r_lr; 569 tf->tf_pc = regs->r_pc; 570 tf->tf_spsr &= ~PSR_FLAGS; 571 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS; 572 return (0); 573} 574 575int 576set_fpregs(struct thread *td, struct fpreg *regs) 577{ 578 return (0); 579} 580 581int 582fill_dbregs(struct thread *td, struct dbreg *regs) 583{ 584 return (0); 585} 586int 587set_dbregs(struct thread *td, struct dbreg *regs) 588{ 589 return (0); 590} 591 592 593static int 594ptrace_read_int(struct thread *td, vm_offset_t addr, uint32_t *v) 595{ 596 597 if (proc_readmem(td, td->td_proc, addr, v, sizeof(*v)) != sizeof(*v)) 598 return (ENOMEM); 599 return (0); 600} 601 602static int 603ptrace_write_int(struct thread *td, vm_offset_t addr, uint32_t v) 604{ 605 606 if (proc_writemem(td, td->td_proc, addr, &v, sizeof(v)) != sizeof(v)) 607 return (ENOMEM); 608 return (0); 609} 610 611static u_int 612ptrace_get_usr_reg(void *cookie, int reg) 613{ 614 int ret; 615 struct thread *td = cookie; 616 617 KASSERT(((reg >= 0) && (reg <= ARM_REG_NUM_PC)), 618 ("reg is outside range")); 619 620 switch(reg) { 621 case ARM_REG_NUM_PC: 622 ret = td->td_frame->tf_pc; 623 break; 624 case ARM_REG_NUM_LR: 625 ret = td->td_frame->tf_usr_lr; 626 break; 627 case ARM_REG_NUM_SP: 628 ret = td->td_frame->tf_usr_sp; 629 break; 630 default: 631 ret = *((register_t*)&td->td_frame->tf_r0 + reg); 632 break; 633 } 634 635 return (ret); 636} 637 638static u_int 639ptrace_get_usr_int(void* cookie, vm_offset_t offset, u_int* val) 640{ 641 struct thread *td = cookie; 642 u_int error; 643 644 error = ptrace_read_int(td, offset, val); 645 646 return (error); 647} 648 649/** 650 * This function parses current instruction opcode and decodes 651 * any possible jump (change in PC) which might occur after 652 * the instruction is executed. 653 * 654 * @param td Thread structure of analysed task 655 * @param cur_instr Currently executed instruction 656 * @param alt_next_address Pointer to the variable where 657 * the destination address of the 658 * jump instruction shall be stored. 659 * 660 * @return <0> when jump is possible 661 * <EINVAL> otherwise 662 */ 663static int 664ptrace_get_alternative_next(struct thread *td, uint32_t cur_instr, 665 uint32_t *alt_next_address) 666{ 667 int error; 668 669 if (inst_branch(cur_instr) || inst_call(cur_instr) || 670 inst_return(cur_instr)) { 671 error = arm_predict_branch(td, cur_instr, td->td_frame->tf_pc, 672 alt_next_address, ptrace_get_usr_reg, ptrace_get_usr_int); 673 674 return (error); 675 } 676 677 return (EINVAL); 678} 679 680int 681ptrace_single_step(struct thread *td) 682{ 683 struct proc *p; 684 int error, error_alt; 685 uint32_t cur_instr, alt_next = 0; 686 687 /* TODO: This needs to be updated for Thumb-2 */ 688 if ((td->td_frame->tf_spsr & PSR_T) != 0) 689 return (EINVAL); 690 691 KASSERT(td->td_md.md_ptrace_instr == 0, 692 ("Didn't clear single step")); 693 KASSERT(td->td_md.md_ptrace_instr_alt == 0, 694 ("Didn't clear alternative single step")); 695 p = td->td_proc; 696 PROC_UNLOCK(p); 697 698 error = ptrace_read_int(td, td->td_frame->tf_pc, 699 &cur_instr); 700 if (error) 701 goto out; 702 703 error = ptrace_read_int(td, td->td_frame->tf_pc + INSN_SIZE, 704 &td->td_md.md_ptrace_instr); 705 if (error == 0) { 706 error = ptrace_write_int(td, td->td_frame->tf_pc + INSN_SIZE, 707 PTRACE_BREAKPOINT); 708 if (error) { 709 td->td_md.md_ptrace_instr = 0; 710 } else { 711 td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 712 INSN_SIZE; 713 } 714 } 715 716 error_alt = ptrace_get_alternative_next(td, cur_instr, &alt_next); 717 if (error_alt == 0) { 718 error_alt = ptrace_read_int(td, alt_next, 719 &td->td_md.md_ptrace_instr_alt); 720 if (error_alt) { 721 td->td_md.md_ptrace_instr_alt = 0; 722 } else { 723 error_alt = ptrace_write_int(td, alt_next, 724 PTRACE_BREAKPOINT); 725 if (error_alt) 726 td->td_md.md_ptrace_instr_alt = 0; 727 else 728 td->td_md.md_ptrace_addr_alt = alt_next; 729 } 730 } 731 732out: 733 PROC_LOCK(p); 734 return ((error != 0) && (error_alt != 0)); 735} 736 737int 738ptrace_clear_single_step(struct thread *td) 739{ 740 struct proc *p; 741 742 /* TODO: This needs to be updated for Thumb-2 */ 743 if ((td->td_frame->tf_spsr & PSR_T) != 0) 744 return (EINVAL); 745 746 if (td->td_md.md_ptrace_instr != 0) { 747 p = td->td_proc; 748 PROC_UNLOCK(p); 749 ptrace_write_int(td, td->td_md.md_ptrace_addr, 750 td->td_md.md_ptrace_instr); 751 PROC_LOCK(p); 752 td->td_md.md_ptrace_instr = 0; 753 } 754 755 if (td->td_md.md_ptrace_instr_alt != 0) { 756 p = td->td_proc; 757 PROC_UNLOCK(p); 758 ptrace_write_int(td, td->td_md.md_ptrace_addr_alt, 759 td->td_md.md_ptrace_instr_alt); 760 PROC_LOCK(p); 761 td->td_md.md_ptrace_instr_alt = 0; 762 } 763 764 return (0); 765} 766 767int 768ptrace_set_pc(struct thread *td, unsigned long addr) 769{ 770 td->td_frame->tf_pc = addr; 771 return (0); 772} 773 774void 775cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 776{ 777} 778 779void 780spinlock_enter(void) 781{ 782 struct thread *td; 783 register_t cspr; 784 785 td = curthread; 786 if (td->td_md.md_spinlock_count == 0) { 787 cspr = disable_interrupts(PSR_I | PSR_F); 788 td->td_md.md_spinlock_count = 1; 789 td->td_md.md_saved_cspr = cspr; 790 } else 791 td->td_md.md_spinlock_count++; 792 critical_enter(); 793} 794 795void 796spinlock_exit(void) 797{ 798 struct thread *td; 799 register_t cspr; 800 801 td = curthread; 802 critical_exit(); 803 cspr = td->td_md.md_saved_cspr; 804 td->td_md.md_spinlock_count--; 805 if (td->td_md.md_spinlock_count == 0) 806 restore_interrupts(cspr); 807} 808 809/* 810 * Clear registers on exec 811 */ 812void 813exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 814{ 815 struct trapframe *tf = td->td_frame; 816 817 memset(tf, 0, sizeof(*tf)); 818 tf->tf_usr_sp = stack; 819 tf->tf_usr_lr = imgp->entry_addr; 820 tf->tf_svc_lr = 0x77777777; 821 tf->tf_pc = imgp->entry_addr; 822 tf->tf_spsr = PSR_USR32_MODE; 823} 824 825/* 826 * Get machine context. 827 */ 828int 829get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 830{ 831 struct trapframe *tf = td->td_frame; 832 __greg_t *gr = mcp->__gregs; 833 834 if (clear_ret & GET_MC_CLEAR_RET) { 835 gr[_REG_R0] = 0; 836 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C; 837 } else { 838 gr[_REG_R0] = tf->tf_r0; 839 gr[_REG_CPSR] = tf->tf_spsr; 840 } 841 gr[_REG_R1] = tf->tf_r1; 842 gr[_REG_R2] = tf->tf_r2; 843 gr[_REG_R3] = tf->tf_r3; 844 gr[_REG_R4] = tf->tf_r4; 845 gr[_REG_R5] = tf->tf_r5; 846 gr[_REG_R6] = tf->tf_r6; 847 gr[_REG_R7] = tf->tf_r7; 848 gr[_REG_R8] = tf->tf_r8; 849 gr[_REG_R9] = tf->tf_r9; 850 gr[_REG_R10] = tf->tf_r10; 851 gr[_REG_R11] = tf->tf_r11; 852 gr[_REG_R12] = tf->tf_r12; 853 gr[_REG_SP] = tf->tf_usr_sp; 854 gr[_REG_LR] = tf->tf_usr_lr; 855 gr[_REG_PC] = tf->tf_pc; 856 857 return (0); 858} 859 860/* 861 * Set machine context. 862 * 863 * However, we don't set any but the user modifiable flags, and we won't 864 * touch the cs selector. 865 */ 866int 867set_mcontext(struct thread *td, mcontext_t *mcp) 868{ 869 struct trapframe *tf = td->td_frame; 870 const __greg_t *gr = mcp->__gregs; 871 872 tf->tf_r0 = gr[_REG_R0]; 873 tf->tf_r1 = gr[_REG_R1]; 874 tf->tf_r2 = gr[_REG_R2]; 875 tf->tf_r3 = gr[_REG_R3]; 876 tf->tf_r4 = gr[_REG_R4]; 877 tf->tf_r5 = gr[_REG_R5]; 878 tf->tf_r6 = gr[_REG_R6]; 879 tf->tf_r7 = gr[_REG_R7]; 880 tf->tf_r8 = gr[_REG_R8]; 881 tf->tf_r9 = gr[_REG_R9]; 882 tf->tf_r10 = gr[_REG_R10]; 883 tf->tf_r11 = gr[_REG_R11]; 884 tf->tf_r12 = gr[_REG_R12]; 885 tf->tf_usr_sp = gr[_REG_SP]; 886 tf->tf_usr_lr = gr[_REG_LR]; 887 tf->tf_pc = gr[_REG_PC]; 888 tf->tf_spsr = gr[_REG_CPSR]; 889 890 return (0); 891} 892 893/* 894 * MPSAFE 895 */ 896int 897sys_sigreturn(td, uap) 898 struct thread *td; 899 struct sigreturn_args /* { 900 const struct __ucontext *sigcntxp; 901 } */ *uap; 902{ 903 ucontext_t uc; 904 int spsr; 905 906 if (uap == NULL) 907 return (EFAULT); 908 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 909 return (EFAULT); 910 /* 911 * Make sure the processor mode has not been tampered with and 912 * interrupts have not been disabled. 913 */ 914 spsr = uc.uc_mcontext.__gregs[_REG_CPSR]; 915 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 916 (spsr & (PSR_I | PSR_F)) != 0) 917 return (EINVAL); 918 /* Restore register context. */ 919 set_mcontext(td, &uc.uc_mcontext); 920 921 /* Restore signal mask. */ 922 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 923 924 return (EJUSTRETURN); 925} 926 927 928/* 929 * Construct a PCB from a trapframe. This is called from kdb_trap() where 930 * we want to start a backtrace from the function that caused us to enter 931 * the debugger. We have the context in the trapframe, but base the trace 932 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 933 * enough for a backtrace. 934 */ 935void 936makectx(struct trapframe *tf, struct pcb *pcb) 937{ 938 pcb->pcb_regs.sf_r4 = tf->tf_r4; 939 pcb->pcb_regs.sf_r5 = tf->tf_r5; 940 pcb->pcb_regs.sf_r6 = tf->tf_r6; 941 pcb->pcb_regs.sf_r7 = tf->tf_r7; 942 pcb->pcb_regs.sf_r8 = tf->tf_r8; 943 pcb->pcb_regs.sf_r9 = tf->tf_r9; 944 pcb->pcb_regs.sf_r10 = tf->tf_r10; 945 pcb->pcb_regs.sf_r11 = tf->tf_r11; 946 pcb->pcb_regs.sf_r12 = tf->tf_r12; 947 pcb->pcb_regs.sf_pc = tf->tf_pc; 948 pcb->pcb_regs.sf_lr = tf->tf_usr_lr; 949 pcb->pcb_regs.sf_sp = tf->tf_usr_sp; 950} 951 952/* 953 * Fake up a boot descriptor table 954 */ 955vm_offset_t 956fake_preload_metadata(struct arm_boot_params *abp __unused) 957{ 958#ifdef DDB 959 vm_offset_t zstart = 0, zend = 0; 960#endif 961 vm_offset_t lastaddr; 962 int i = 0; 963 static uint32_t fake_preload[35]; 964 965 fake_preload[i++] = MODINFO_NAME; 966 fake_preload[i++] = strlen("kernel") + 1; 967 strcpy((char*)&fake_preload[i++], "kernel"); 968 i += 1; 969 fake_preload[i++] = MODINFO_TYPE; 970 fake_preload[i++] = strlen("elf kernel") + 1; 971 strcpy((char*)&fake_preload[i++], "elf kernel"); 972 i += 2; 973 fake_preload[i++] = MODINFO_ADDR; 974 fake_preload[i++] = sizeof(vm_offset_t); 975 fake_preload[i++] = KERNVIRTADDR; 976 fake_preload[i++] = MODINFO_SIZE; 977 fake_preload[i++] = sizeof(uint32_t); 978 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR; 979#ifdef DDB 980 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) { 981 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM; 982 fake_preload[i++] = sizeof(vm_offset_t); 983 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4); 984 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM; 985 fake_preload[i++] = sizeof(vm_offset_t); 986 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8); 987 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8); 988 zend = lastaddr; 989 zstart = *(uint32_t *)(KERNVIRTADDR + 4); 990 db_fetch_ksymtab(zstart, zend); 991 } else 992#endif 993 lastaddr = (vm_offset_t)&end; 994 fake_preload[i++] = 0; 995 fake_preload[i] = 0; 996 preload_metadata = (void *)fake_preload; 997 998 init_static_kenv(NULL, 0); 999 1000 return (lastaddr); 1001} 1002 1003void 1004pcpu0_init(void) 1005{ 1006#if __ARM_ARCH >= 6 1007 set_curthread(&thread0); 1008#endif 1009 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 1010 PCPU_SET(curthread, &thread0); 1011} 1012 1013#if defined(LINUX_BOOT_ABI) 1014vm_offset_t 1015linux_parse_boot_param(struct arm_boot_params *abp) 1016{ 1017 struct arm_lbabi_tag *walker; 1018 uint32_t revision; 1019 uint64_t serial; 1020 1021 /* 1022 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2 1023 * is atags or dtb pointer. If all of these aren't satisfied, 1024 * then punt. 1025 */ 1026 if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0)) 1027 return 0; 1028 1029 board_id = abp->abp_r1; 1030 walker = (struct arm_lbabi_tag *) 1031 (abp->abp_r2 + KERNVIRTADDR - abp->abp_physaddr); 1032 1033 /* xxx - Need to also look for binary device tree */ 1034 if (ATAG_TAG(walker) != ATAG_CORE) 1035 return 0; 1036 1037 atag_list = walker; 1038 while (ATAG_TAG(walker) != ATAG_NONE) { 1039 switch (ATAG_TAG(walker)) { 1040 case ATAG_CORE: 1041 break; 1042 case ATAG_MEM: 1043 arm_physmem_hardware_region(walker->u.tag_mem.start, 1044 walker->u.tag_mem.size); 1045 break; 1046 case ATAG_INITRD2: 1047 break; 1048 case ATAG_SERIAL: 1049 serial = walker->u.tag_sn.low | 1050 ((uint64_t)walker->u.tag_sn.high << 32); 1051 board_set_serial(serial); 1052 break; 1053 case ATAG_REVISION: 1054 revision = walker->u.tag_rev.rev; 1055 board_set_revision(revision); 1056 break; 1057 case ATAG_CMDLINE: 1058 /* XXX open question: Parse this for boothowto? */ 1059 bcopy(walker->u.tag_cmd.command, linux_command_line, 1060 ATAG_SIZE(walker)); 1061 break; 1062 default: 1063 break; 1064 } 1065 walker = ATAG_NEXT(walker); 1066 } 1067 1068 /* Save a copy for later */ 1069 bcopy(atag_list, atags, 1070 (char *)walker - (char *)atag_list + ATAG_SIZE(walker)); 1071 1072 init_static_kenv(NULL, 0); 1073 1074 return fake_preload_metadata(abp); 1075} 1076#endif 1077 1078#if defined(FREEBSD_BOOT_LOADER) 1079vm_offset_t 1080freebsd_parse_boot_param(struct arm_boot_params *abp) 1081{ 1082 vm_offset_t lastaddr = 0; 1083 void *mdp; 1084 void *kmdp; 1085#ifdef DDB 1086 vm_offset_t ksym_start; 1087 vm_offset_t ksym_end; 1088#endif 1089 1090 /* 1091 * Mask metadata pointer: it is supposed to be on page boundary. If 1092 * the first argument (mdp) doesn't point to a valid address the 1093 * bootloader must have passed us something else than the metadata 1094 * ptr, so we give up. Also give up if we cannot find metadta section 1095 * the loader creates that we get all this data out of. 1096 */ 1097 1098 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL) 1099 return 0; 1100 preload_metadata = mdp; 1101 kmdp = preload_search_by_type("elf kernel"); 1102 if (kmdp == NULL) 1103 return 0; 1104 1105 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1106 loader_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); 1107 init_static_kenv(loader_envp, 0); 1108 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t); 1109#ifdef DDB 1110 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1111 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1112 db_fetch_ksymtab(ksym_start, ksym_end); 1113#endif 1114 return lastaddr; 1115} 1116#endif 1117 1118vm_offset_t 1119default_parse_boot_param(struct arm_boot_params *abp) 1120{ 1121 vm_offset_t lastaddr; 1122 1123#if defined(LINUX_BOOT_ABI) 1124 if ((lastaddr = linux_parse_boot_param(abp)) != 0) 1125 return lastaddr; 1126#endif 1127#if defined(FREEBSD_BOOT_LOADER) 1128 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0) 1129 return lastaddr; 1130#endif 1131 /* Fall back to hardcoded metadata. */ 1132 lastaddr = fake_preload_metadata(abp); 1133 1134 return lastaddr; 1135} 1136 1137/* 1138 * Stub version of the boot parameter parsing routine. We are 1139 * called early in initarm, before even VM has been initialized. 1140 * This routine needs to preserve any data that the boot loader 1141 * has passed in before the kernel starts to grow past the end 1142 * of the BSS, traditionally the place boot-loaders put this data. 1143 * 1144 * Since this is called so early, things that depend on the vm system 1145 * being setup (including access to some SoC's serial ports), about 1146 * all that can be done in this routine is to copy the arguments. 1147 * 1148 * This is the default boot parameter parsing routine. Individual 1149 * kernels/boards can override this weak function with one of their 1150 * own. We just fake metadata... 1151 */ 1152__weak_reference(default_parse_boot_param, parse_boot_param); 1153 1154/* 1155 * Initialize proc0 1156 */ 1157void 1158init_proc0(vm_offset_t kstack) 1159{ 1160 proc_linkup0(&proc0, &thread0); 1161 thread0.td_kstack = kstack; 1162 thread0.td_pcb = (struct pcb *) 1163 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1; 1164 thread0.td_pcb->pcb_flags = 0; 1165 thread0.td_pcb->pcb_vfpcpu = -1; 1166 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN; 1167 thread0.td_frame = &proc0_tf; 1168 pcpup->pc_curpcb = thread0.td_pcb; 1169} 1170 1171int 1172arm_predict_branch(void *cookie, u_int insn, register_t pc, register_t *new_pc, 1173 u_int (*fetch_reg)(void*, int), u_int (*read_int)(void*, vm_offset_t, u_int*)) 1174{ 1175 u_int addr, nregs, offset = 0; 1176 int error = 0; 1177 1178 switch ((insn >> 24) & 0xf) { 1179 case 0x2: /* add pc, reg1, #value */ 1180 case 0x0: /* add pc, reg1, reg2, lsl #offset */ 1181 addr = fetch_reg(cookie, (insn >> 16) & 0xf); 1182 if (((insn >> 16) & 0xf) == 15) 1183 addr += 8; 1184 if (insn & 0x0200000) { 1185 offset = (insn >> 7) & 0x1e; 1186 offset = (insn & 0xff) << (32 - offset) | 1187 (insn & 0xff) >> offset; 1188 } else { 1189 1190 offset = fetch_reg(cookie, insn & 0x0f); 1191 if ((insn & 0x0000ff0) != 0x00000000) { 1192 if (insn & 0x10) 1193 nregs = fetch_reg(cookie, 1194 (insn >> 8) & 0xf); 1195 else 1196 nregs = (insn >> 7) & 0x1f; 1197 switch ((insn >> 5) & 3) { 1198 case 0: 1199 /* lsl */ 1200 offset = offset << nregs; 1201 break; 1202 case 1: 1203 /* lsr */ 1204 offset = offset >> nregs; 1205 break; 1206 default: 1207 break; /* XXX */ 1208 } 1209 1210 } 1211 *new_pc = addr + offset; 1212 return (0); 1213 1214 } 1215 1216 case 0xa: /* b ... */ 1217 case 0xb: /* bl ... */ 1218 addr = ((insn << 2) & 0x03ffffff); 1219 if (addr & 0x02000000) 1220 addr |= 0xfc000000; 1221 *new_pc = (pc + 8 + addr); 1222 return (0); 1223 case 0x7: /* ldr pc, [pc, reg, lsl #2] */ 1224 addr = fetch_reg(cookie, insn & 0xf); 1225 addr = pc + 8 + (addr << 2); 1226 error = read_int(cookie, addr, &addr); 1227 *new_pc = addr; 1228 return (error); 1229 case 0x1: /* mov pc, reg */ 1230 *new_pc = fetch_reg(cookie, insn & 0xf); 1231 return (0); 1232 case 0x4: 1233 case 0x5: /* ldr pc, [reg] */ 1234 addr = fetch_reg(cookie, (insn >> 16) & 0xf); 1235 /* ldr pc, [reg, #offset] */ 1236 if (insn & (1 << 24)) 1237 offset = insn & 0xfff; 1238 if (insn & 0x00800000) 1239 addr += offset; 1240 else 1241 addr -= offset; 1242 error = read_int(cookie, addr, &addr); 1243 *new_pc = addr; 1244 1245 return (error); 1246 case 0x8: /* ldmxx reg, {..., pc} */ 1247 case 0x9: 1248 addr = fetch_reg(cookie, (insn >> 16) & 0xf); 1249 nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555); 1250 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333); 1251 nregs = (nregs + (nregs >> 4)) & 0x0f0f; 1252 nregs = (nregs + (nregs >> 8)) & 0x001f; 1253 switch ((insn >> 23) & 0x3) { 1254 case 0x0: /* ldmda */ 1255 addr = addr - 0; 1256 break; 1257 case 0x1: /* ldmia */ 1258 addr = addr + 0 + ((nregs - 1) << 2); 1259 break; 1260 case 0x2: /* ldmdb */ 1261 addr = addr - 4; 1262 break; 1263 case 0x3: /* ldmib */ 1264 addr = addr + 4 + ((nregs - 1) << 2); 1265 break; 1266 } 1267 error = read_int(cookie, addr, &addr); 1268 *new_pc = addr; 1269 1270 return (error); 1271 default: 1272 return (EINVAL); 1273 } 1274} 1275 1276#if __ARM_ARCH >= 6 1277void 1278set_stackptrs(int cpu) 1279{ 1280 1281 set_stackptr(PSR_IRQ32_MODE, 1282 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1283 set_stackptr(PSR_ABT32_MODE, 1284 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1285 set_stackptr(PSR_UND32_MODE, 1286 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1287} 1288#else 1289void 1290set_stackptrs(int cpu) 1291{ 1292 1293 set_stackptr(PSR_IRQ32_MODE, 1294 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1295 set_stackptr(PSR_ABT32_MODE, 1296 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1297 set_stackptr(PSR_UND32_MODE, 1298 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1299} 1300#endif 1301 1302#ifdef EFI 1303#define efi_next_descriptor(ptr, size) \ 1304 ((struct efi_md *)(((uint8_t *) ptr) + size)) 1305 1306static void 1307add_efi_map_entries(struct efi_map_header *efihdr, struct mem_region *mr, 1308 int *mrcnt) 1309{ 1310 struct efi_md *map, *p; 1311 const char *type; 1312 size_t efisz, memory_size; 1313 int ndesc, i, j; 1314 1315 static const char *types[] = { 1316 "Reserved", 1317 "LoaderCode", 1318 "LoaderData", 1319 "BootServicesCode", 1320 "BootServicesData", 1321 "RuntimeServicesCode", 1322 "RuntimeServicesData", 1323 "ConventionalMemory", 1324 "UnusableMemory", 1325 "ACPIReclaimMemory", 1326 "ACPIMemoryNVS", 1327 "MemoryMappedIO", 1328 "MemoryMappedIOPortSpace", 1329 "PalCode" 1330 }; 1331 1332 *mrcnt = 0; 1333 1334 /* 1335 * Memory map data provided by UEFI via the GetMemoryMap 1336 * Boot Services API. 1337 */ 1338 efisz = roundup2(sizeof(struct efi_map_header), 0x10); 1339 map = (struct efi_md *)((uint8_t *)efihdr + efisz); 1340 1341 if (efihdr->descriptor_size == 0) 1342 return; 1343 ndesc = efihdr->memory_size / efihdr->descriptor_size; 1344 1345 if (boothowto & RB_VERBOSE) 1346 printf("%23s %12s %12s %8s %4s\n", 1347 "Type", "Physical", "Virtual", "#Pages", "Attr"); 1348 1349 memory_size = 0; 1350 for (i = 0, j = 0, p = map; i < ndesc; i++, 1351 p = efi_next_descriptor(p, efihdr->descriptor_size)) { 1352 if (boothowto & RB_VERBOSE) { 1353 if (p->md_type <= EFI_MD_TYPE_PALCODE) 1354 type = types[p->md_type]; 1355 else 1356 type = "<INVALID>"; 1357 printf("%23s %012llx %12p %08llx ", type, p->md_phys, 1358 p->md_virt, p->md_pages); 1359 if (p->md_attr & EFI_MD_ATTR_UC) 1360 printf("UC "); 1361 if (p->md_attr & EFI_MD_ATTR_WC) 1362 printf("WC "); 1363 if (p->md_attr & EFI_MD_ATTR_WT) 1364 printf("WT "); 1365 if (p->md_attr & EFI_MD_ATTR_WB) 1366 printf("WB "); 1367 if (p->md_attr & EFI_MD_ATTR_UCE) 1368 printf("UCE "); 1369 if (p->md_attr & EFI_MD_ATTR_WP) 1370 printf("WP "); 1371 if (p->md_attr & EFI_MD_ATTR_RP) 1372 printf("RP "); 1373 if (p->md_attr & EFI_MD_ATTR_XP) 1374 printf("XP "); 1375 if (p->md_attr & EFI_MD_ATTR_RT) 1376 printf("RUNTIME"); 1377 printf("\n"); 1378 } 1379 1380 switch (p->md_type) { 1381 case EFI_MD_TYPE_CODE: 1382 case EFI_MD_TYPE_DATA: 1383 case EFI_MD_TYPE_BS_CODE: 1384 case EFI_MD_TYPE_BS_DATA: 1385 case EFI_MD_TYPE_FREE: 1386 /* 1387 * We're allowed to use any entry with these types. 1388 */ 1389 break; 1390 default: 1391 continue; 1392 } 1393 1394 j++; 1395 if (j >= FDT_MEM_REGIONS) 1396 break; 1397 1398 mr[j].mr_start = p->md_phys; 1399 mr[j].mr_size = p->md_pages * PAGE_SIZE; 1400 memory_size += mr[j].mr_size; 1401 } 1402 1403 *mrcnt = j; 1404} 1405#endif /* EFI */ 1406 1407#ifdef FDT 1408static char * 1409kenv_next(char *cp) 1410{ 1411 1412 if (cp != NULL) { 1413 while (*cp != 0) 1414 cp++; 1415 cp++; 1416 if (*cp == 0) 1417 cp = NULL; 1418 } 1419 return (cp); 1420} 1421 1422static void 1423print_kenv(void) 1424{ 1425 char *cp; 1426 1427 debugf("loader passed (static) kenv:\n"); 1428 if (loader_envp == NULL) { 1429 debugf(" no env, null ptr\n"); 1430 return; 1431 } 1432 debugf(" loader_envp = 0x%08x\n", (uint32_t)loader_envp); 1433 1434 for (cp = loader_envp; cp != NULL; cp = kenv_next(cp)) 1435 debugf(" %x %s\n", (uint32_t)cp, cp); 1436} 1437 1438#if __ARM_ARCH < 6 1439void * 1440initarm(struct arm_boot_params *abp) 1441{ 1442 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1443 struct pv_addr kernel_l1pt; 1444 struct pv_addr dpcpu; 1445 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 1446 u_long memsize; 1447 uint32_t l2size; 1448 char *env; 1449 void *kmdp; 1450 u_int l1pagetable; 1451 int i, j, err_devmap, mem_regions_sz; 1452 1453 lastaddr = parse_boot_param(abp); 1454 arm_physmem_kernaddr = abp->abp_physaddr; 1455 1456 memsize = 0; 1457 1458 cpuinfo_init(); 1459 set_cpufuncs(); 1460 1461 /* 1462 * Find the dtb passed in by the boot loader. 1463 */ 1464 kmdp = preload_search_by_type("elf kernel"); 1465 if (kmdp != NULL) 1466 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1467 else 1468 dtbp = (vm_offset_t)NULL; 1469 1470#if defined(FDT_DTB_STATIC) 1471 /* 1472 * In case the device tree blob was not retrieved (from metadata) try 1473 * to use the statically embedded one. 1474 */ 1475 if (dtbp == (vm_offset_t)NULL) 1476 dtbp = (vm_offset_t)&fdt_static_dtb; 1477#endif 1478 1479 if (OF_install(OFW_FDT, 0) == FALSE) 1480 panic("Cannot install FDT"); 1481 1482 if (OF_init((void *)dtbp) != 0) 1483 panic("OF_init failed with the found device tree"); 1484 1485 /* Grab physical memory regions information from device tree. */ 1486 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 1487 panic("Cannot get physical memory regions"); 1488 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1489 1490 /* Grab reserved memory regions information from device tree. */ 1491 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1492 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1493 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1494 1495 /* Platform-specific initialisation */ 1496 platform_probe_and_attach(); 1497 1498 pcpu0_init(); 1499 1500 /* Do basic tuning, hz etc */ 1501 init_param1(); 1502 1503 /* Calculate number of L2 tables needed for mapping vm_page_array */ 1504 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 1505 l2size = (l2size >> L1_S_SHIFT) + 1; 1506 1507 /* 1508 * Add one table for end of kernel map, one for stacks, msgbuf and 1509 * L1 and L2 tables map and one for vectors map. 1510 */ 1511 l2size += 3; 1512 1513 /* Make it divisible by 4 */ 1514 l2size = (l2size + 3) & ~3; 1515 1516 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 1517 1518 /* Define a macro to simplify memory allocation */ 1519#define valloc_pages(var, np) \ 1520 alloc_pages((var).pv_va, (np)); \ 1521 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 1522 1523#define alloc_pages(var, np) \ 1524 (var) = freemempos; \ 1525 freemempos += (np * PAGE_SIZE); \ 1526 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 1527 1528 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 1529 freemempos += PAGE_SIZE; 1530 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 1531 1532 for (i = 0, j = 0; i < l2size; ++i) { 1533 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 1534 valloc_pages(kernel_pt_table[i], 1535 L2_TABLE_SIZE / PAGE_SIZE); 1536 j = i; 1537 } else { 1538 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 1539 L2_TABLE_SIZE_REAL * (i - j); 1540 kernel_pt_table[i].pv_pa = 1541 kernel_pt_table[i].pv_va - KERNVIRTADDR + 1542 abp->abp_physaddr; 1543 1544 } 1545 } 1546 /* 1547 * Allocate a page for the system page mapped to 0x00000000 1548 * or 0xffff0000. This page will just contain the system vectors 1549 * and can be shared by all processes. 1550 */ 1551 valloc_pages(systempage, 1); 1552 1553 /* Allocate dynamic per-cpu area. */ 1554 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 1555 dpcpu_init((void *)dpcpu.pv_va, 0); 1556 1557 /* Allocate stacks for all modes */ 1558 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 1559 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 1560 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 1561 valloc_pages(kernelstack, kstack_pages * MAXCPU); 1562 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 1563 1564 /* 1565 * Now we start construction of the L1 page table 1566 * We start by mapping the L2 page tables into the L1. 1567 * This means that we can replace L1 mappings later on if necessary 1568 */ 1569 l1pagetable = kernel_l1pt.pv_va; 1570 1571 /* 1572 * Try to map as much as possible of kernel text and data using 1573 * 1MB section mapping and for the rest of initial kernel address 1574 * space use L2 coarse tables. 1575 * 1576 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 1577 * and kernel structures 1578 */ 1579 l2_start = lastaddr & ~(L1_S_OFFSET); 1580 for (i = 0 ; i < l2size - 1; i++) 1581 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 1582 &kernel_pt_table[i]); 1583 1584 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 1585 1586 /* Map kernel code and data */ 1587 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 1588 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 1589 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1590 1591 /* Map L1 directory and allocated L2 page tables */ 1592 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 1593 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1594 1595 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 1596 kernel_pt_table[0].pv_pa, 1597 L2_TABLE_SIZE_REAL * l2size, 1598 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1599 1600 /* Map allocated DPCPU, stacks and msgbuf */ 1601 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 1602 freemempos - dpcpu.pv_va, 1603 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1604 1605 /* Link and map the vector page */ 1606 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 1607 &kernel_pt_table[l2size - 1]); 1608 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 1609 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 1610 1611 /* Establish static device mappings. */ 1612 err_devmap = platform_devmap_init(); 1613 arm_devmap_bootstrap(l1pagetable, NULL); 1614 vm_max_kernel_address = platform_lastaddr(); 1615 1616 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 1617 pmap_pa = kernel_l1pt.pv_pa; 1618 cpu_setttb(kernel_l1pt.pv_pa); 1619 cpu_tlb_flushID(); 1620 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 1621 1622 /* 1623 * Now that proper page tables are installed, call cpu_setup() to enable 1624 * instruction and data caches and other chip-specific features. 1625 */ 1626 cpu_setup(); 1627 1628 /* 1629 * Only after the SOC registers block is mapped we can perform device 1630 * tree fixups, as they may attempt to read parameters from hardware. 1631 */ 1632 OF_interpret("perform-fixup", 0); 1633 1634 platform_gpio_init(); 1635 1636 cninit(); 1637 1638 debugf("initarm: console initialized\n"); 1639 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1640 debugf(" boothowto = 0x%08x\n", boothowto); 1641 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1642 print_kenv(); 1643 1644 env = kern_getenv("kernelname"); 1645 if (env != NULL) { 1646 strlcpy(kernelname, env, sizeof(kernelname)); 1647 freeenv(env); 1648 } 1649 1650 if (err_devmap != 0) 1651 printf("WARNING: could not fully configure devmap, error=%d\n", 1652 err_devmap); 1653 1654 platform_late_init(); 1655 1656 /* 1657 * Pages were allocated during the secondary bootstrap for the 1658 * stacks for different CPU modes. 1659 * We must now set the r13 registers in the different CPU modes to 1660 * point to these stacks. 1661 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1662 * of the stack memory. 1663 */ 1664 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1665 1666 set_stackptrs(0); 1667 1668 /* 1669 * We must now clean the cache again.... 1670 * Cleaning may be done by reading new data to displace any 1671 * dirty data in the cache. This will have happened in cpu_setttb() 1672 * but since we are boot strapping the addresses used for the read 1673 * may have just been remapped and thus the cache could be out 1674 * of sync. A re-clean after the switch will cure this. 1675 * After booting there are no gross relocations of the kernel thus 1676 * this problem will not occur after initarm(). 1677 */ 1678 cpu_idcache_wbinv_all(); 1679 1680 undefined_init(); 1681 1682 init_proc0(kernelstack.pv_va); 1683 1684 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1685 pmap_bootstrap(freemempos, &kernel_l1pt); 1686 msgbufp = (void *)msgbufpv.pv_va; 1687 msgbufinit(msgbufp, msgbufsize); 1688 mutex_init(); 1689 1690 /* 1691 * Exclude the kernel (and all the things we allocated which immediately 1692 * follow the kernel) from the VM allocation pool but not from crash 1693 * dumps. virtual_avail is a global variable which tracks the kva we've 1694 * "allocated" while setting up pmaps. 1695 * 1696 * Prepare the list of physical memory available to the vm subsystem. 1697 */ 1698 arm_physmem_exclude_region(abp->abp_physaddr, 1699 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1700 arm_physmem_init_kernel_globals(); 1701 1702 init_param2(physmem); 1703 dbg_monitor_init(); 1704 kdb_init(); 1705 1706 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1707 sizeof(struct pcb))); 1708} 1709#else /* __ARM_ARCH < 6 */ 1710void * 1711initarm(struct arm_boot_params *abp) 1712{ 1713 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1714 vm_paddr_t lastaddr; 1715 vm_offset_t dtbp, kernelstack, dpcpu; 1716 char *env; 1717 void *kmdp; 1718 int err_devmap, mem_regions_sz; 1719#ifdef EFI 1720 struct efi_map_header *efihdr; 1721#endif 1722 1723 /* get last allocated physical address */ 1724 arm_physmem_kernaddr = abp->abp_physaddr; 1725 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr; 1726 1727 set_cpufuncs(); 1728 cpuinfo_init(); 1729 1730 /* 1731 * Find the dtb passed in by the boot loader. 1732 */ 1733 kmdp = preload_search_by_type("elf kernel"); 1734 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1735#if defined(FDT_DTB_STATIC) 1736 /* 1737 * In case the device tree blob was not retrieved (from metadata) try 1738 * to use the statically embedded one. 1739 */ 1740 if (dtbp == (vm_offset_t)NULL) 1741 dtbp = (vm_offset_t)&fdt_static_dtb; 1742#endif 1743 1744 if (OF_install(OFW_FDT, 0) == FALSE) 1745 panic("Cannot install FDT"); 1746 1747 if (OF_init((void *)dtbp) != 0) 1748 panic("OF_init failed with the found device tree"); 1749 1750#ifdef EFI 1751 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1752 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1753 if (efihdr != NULL) { 1754 add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz); 1755 } else 1756#endif 1757 { 1758 /* Grab physical memory regions information from device tree. */ 1759 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0) 1760 panic("Cannot get physical memory regions"); 1761 } 1762 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1763 1764 /* Grab reserved memory regions information from device tree. */ 1765 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1766 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1767 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1768 1769 /* 1770 * Set TEX remapping registers. 1771 * Setup kernel page tables and switch to kernel L1 page table. 1772 */ 1773 pmap_set_tex(); 1774 pmap_bootstrap_prepare(lastaddr); 1775 1776 /* 1777 * Now that proper page tables are installed, call cpu_setup() to enable 1778 * instruction and data caches and other chip-specific features. 1779 */ 1780 cpu_setup(); 1781 1782 /* Platform-specific initialisation */ 1783 platform_probe_and_attach(); 1784 pcpu0_init(); 1785 1786 /* Do basic tuning, hz etc */ 1787 init_param1(); 1788 1789 /* 1790 * Allocate a page for the system page mapped to 0xffff0000 1791 * This page will just contain the system vectors and can be 1792 * shared by all processes. 1793 */ 1794 systempage = pmap_preboot_get_pages(1); 1795 1796 /* Map the vector page. */ 1797 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1); 1798 if (virtual_end >= ARM_VECTORS_HIGH) 1799 virtual_end = ARM_VECTORS_HIGH - 1; 1800 1801 /* Allocate dynamic per-cpu area. */ 1802 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE); 1803 dpcpu_init((void *)dpcpu, 0); 1804 1805 /* Allocate stacks for all modes */ 1806 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU); 1807 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU); 1808 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU ); 1809 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU); 1810 1811 /* Allocate message buffer. */ 1812 msgbufp = (void *)pmap_preboot_get_vpages( 1813 round_page(msgbufsize) / PAGE_SIZE); 1814 1815 /* 1816 * Pages were allocated during the secondary bootstrap for the 1817 * stacks for different CPU modes. 1818 * We must now set the r13 registers in the different CPU modes to 1819 * point to these stacks. 1820 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1821 * of the stack memory. 1822 */ 1823 set_stackptrs(0); 1824 mutex_init(); 1825 1826 /* Establish static device mappings. */ 1827 err_devmap = platform_devmap_init(); 1828 arm_devmap_bootstrap(0, NULL); 1829 vm_max_kernel_address = platform_lastaddr(); 1830 1831 /* 1832 * Only after the SOC registers block is mapped we can perform device 1833 * tree fixups, as they may attempt to read parameters from hardware. 1834 */ 1835 OF_interpret("perform-fixup", 0); 1836 platform_gpio_init(); 1837 cninit(); 1838 1839 debugf("initarm: console initialized\n"); 1840 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1841 debugf(" boothowto = 0x%08x\n", boothowto); 1842 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1843 debugf(" lastaddr1: 0x%08x\n", lastaddr); 1844 print_kenv(); 1845 1846 env = kern_getenv("kernelname"); 1847 if (env != NULL) 1848 strlcpy(kernelname, env, sizeof(kernelname)); 1849 1850 if (err_devmap != 0) 1851 printf("WARNING: could not fully configure devmap, error=%d\n", 1852 err_devmap); 1853 1854 platform_late_init(); 1855 1856 /* 1857 * We must now clean the cache again.... 1858 * Cleaning may be done by reading new data to displace any 1859 * dirty data in the cache. This will have happened in cpu_setttb() 1860 * but since we are boot strapping the addresses used for the read 1861 * may have just been remapped and thus the cache could be out 1862 * of sync. A re-clean after the switch will cure this. 1863 * After booting there are no gross relocations of the kernel thus 1864 * this problem will not occur after initarm(). 1865 */ 1866 /* Set stack for exception handlers */ 1867 undefined_init(); 1868 init_proc0(kernelstack); 1869 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1870 enable_interrupts(PSR_A); 1871 pmap_bootstrap(0); 1872 1873 /* Exclude the kernel (and all the things we allocated which immediately 1874 * follow the kernel) from the VM allocation pool but not from crash 1875 * dumps. virtual_avail is a global variable which tracks the kva we've 1876 * "allocated" while setting up pmaps. 1877 * 1878 * Prepare the list of physical memory available to the vm subsystem. 1879 */ 1880 arm_physmem_exclude_region(abp->abp_physaddr, 1881 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC); 1882 arm_physmem_init_kernel_globals(); 1883 1884 init_param2(physmem); 1885 /* Init message buffer. */ 1886 msgbufinit(msgbufp, msgbufsize); 1887 dbg_monitor_init(); 1888 kdb_init(); 1889 return ((void *)STACKALIGN(thread0.td_pcb)); 1890 1891} 1892 1893#endif /* __ARM_ARCH < 6 */ 1894#endif /* FDT */ 1895 1896uint32_t (*arm_cpu_fill_vdso_timehands)(struct vdso_timehands *, 1897 struct timecounter *); 1898 1899uint32_t 1900cpu_fill_vdso_timehands(struct vdso_timehands *vdso_th, struct timecounter *tc) 1901{ 1902 1903 return (arm_cpu_fill_vdso_timehands != NULL ? 1904 arm_cpu_fill_vdso_timehands(vdso_th, tc) : 0); 1905} 1906