busdma_machdep-v6.c revision 269217
194380Sdfr/*- 294380Sdfr * Copyright (c) 2012 Ian Lepore 394380Sdfr * Copyright (c) 2010 Mark Tinguely 494380Sdfr * Copyright (c) 2004 Olivier Houchard 594380Sdfr * Copyright (c) 2002 Peter Grehan 694380Sdfr * Copyright (c) 1997, 1998 Justin T. Gibbs. 794380Sdfr * All rights reserved. 8119332Speter * 9119332Speter * Redistribution and use in source and binary forms, with or without 1094380Sdfr * modification, are permitted provided that the following conditions 1194380Sdfr * are met: 1294380Sdfr * 1. Redistributions of source code must retain the above copyright 13177613Sjhb * notice, this list of conditions, and the following disclaimer, 14227776Slstewart * without modification, immediately at the beginning of the file. 15164199Sru * 2. The name of the author may not be used to endorse or promote products 16113989Sjhb * derived from this software without specific prior written permission. 17255658Sjilles * 18113989Sjhb * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19161330Sjhb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20161330Sjhb * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2194380Sdfr * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 2294380Sdfr * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2394380Sdfr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2494380Sdfr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2594380Sdfr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2694380Sdfr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2794380Sdfr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2894380Sdfr * SUCH DAMAGE. 2994380Sdfr * 3094380Sdfr * From i386/busdma_machdep.c 191438 2009-04-23 20:24:19Z jhb 3194380Sdfr */ 3294380Sdfr 3394380Sdfr#include <sys/cdefs.h> 3494380Sdfr__FBSDID("$FreeBSD: head/sys/arm/arm/busdma_machdep-v6.c 269217 2014-07-29 02:38:02Z ian $"); 3594380Sdfr 36232449Sjmallett#define _ARM32_BUS_DMA_PRIVATE 37205014Snwhitehorn#include <sys/param.h> 38205014Snwhitehorn#include <sys/kdb.h> 39119332Speter#include <ddb/ddb.h> 4094380Sdfr#include <ddb/db_output.h> 4194380Sdfr#include <sys/systm.h> 4294380Sdfr#include <sys/malloc.h> 43100385Speter#include <sys/bus.h> 4494380Sdfr#include <sys/busdma_bufalloc.h> 45151360Sps#include <sys/interrupt.h> 46151360Sps#include <sys/kernel.h> 47151360Sps#include <sys/ktr.h> 48151360Sps#include <sys/lock.h> 49151360Sps#include <sys/memdesc.h> 50151360Sps#include <sys/proc.h> 51151360Sps#include <sys/mutex.h> 52151360Sps#include <sys/sysctl.h> 53151360Sps#include <sys/uio.h> 54151360Sps 55151360Sps#include <vm/vm.h> 56151360Sps#include <vm/vm_page.h> 57236027Sed#include <vm/vm_map.h> 58236027Sed#include <vm/vm_extern.h> 59151360Sps#include <vm/vm_kern.h> 60236027Sed 61236027Sed#include <machine/atomic.h> 62151360Sps#include <machine/bus.h> 63302095Sbrooks#include <machine/cpufunc.h> 64302095Sbrooks#include <machine/md_var.h> 65302095Sbrooks 66151721Speter#define MAX_BPAGES 64 67151583Sps#define MAX_DMA_SEGMENTS 4096 68151583Sps#define BUS_DMA_EXCL_BOUNCE BUS_DMA_BUS2 69119332Speter#define BUS_DMA_ALIGN_BOUNCE BUS_DMA_BUS3 70100385Speter#define BUS_DMA_COULD_BOUNCE (BUS_DMA_EXCL_BOUNCE | BUS_DMA_ALIGN_BOUNCE) 71100385Speter#define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4 7294380Sdfr 73183271Sobrienstruct bounce_zone; 74183271Sobrien 75183271Sobrienstruct bus_dma_tag { 76183271Sobrien bus_dma_tag_t parent; 77183271Sobrien bus_size_t alignment; 78119332Speter bus_size_t boundary; 7994380Sdfr bus_addr_t lowaddr; 80236027Sed bus_addr_t highaddr; 81236027Sed bus_dma_filter_t *filter; 8294380Sdfr void *filterarg; 83226349Smarcel bus_size_t maxsize; 84226349Smarcel u_int nsegments; 85226349Smarcel bus_size_t maxsegsz; 86226349Smarcel int flags; 87226349Smarcel int ref_count; 88119332Speter int map_count; 8994380Sdfr bus_dma_lock_t *lockfunc; 90100385Speter void *lockfuncarg; 91100385Speter struct bounce_zone *bounce_zone; 9294380Sdfr /* 93125171Speter * DMA range for this tag. If the page doesn't fall within 94125171Speter * one of these ranges, an error is returned. The caller 95125171Speter * may then decide what to do with the transfer. If the 96125171Speter * range pointer is NULL, it is ignored. 97270692Skib */ 98270692Skib struct arm32_dma_range *ranges; 99270692Skib int _nranges; 100270692Skib}; 101270692Skib 102119332Speterstruct bounce_page { 10394380Sdfr vm_offset_t vaddr; /* kva of bounce buffer */ 10494380Sdfr bus_addr_t busaddr; /* Physical address */ 10594380Sdfr vm_offset_t datavaddr; /* kva of client data */ 10694380Sdfr bus_addr_t dataaddr; /* client physical address */ 107100385Speter bus_size_t datacount; /* client data count */ 10894380Sdfr STAILQ_ENTRY(bounce_page) links; 109119332Speter}; 110100385Speter 11194380Sdfrstruct sync_list { 11294380Sdfr vm_offset_t vaddr; /* kva of bounce buffer */ 113119332Speter bus_addr_t busaddr; /* Physical address */ 11494380Sdfr bus_size_t datacount; /* client data count */ 115100385Speter}; 11694380Sdfr 117119332Speterint busdma_swi_pending; 11894380Sdfr 119100385Speterstruct bounce_zone { 12094380Sdfr STAILQ_ENTRY(bounce_zone) links; 12194380Sdfr STAILQ_HEAD(bp_list, bounce_page) bounce_page_list; 122119332Speter int total_bpages; 12394380Sdfr int free_bpages; 124100385Speter int reserved_bpages; 12594380Sdfr int active_bpages; 12694380Sdfr int total_bounced; 127119332Speter int total_deferred; 128100385Speter int map_count; 12994380Sdfr bus_size_t alignment; 13094380Sdfr bus_addr_t lowaddr; 131119332Speter char zoneid[8]; 13294380Sdfr char lowaddrid[20]; 133100385Speter struct sysctl_ctx_list sysctl_tree; 13494380Sdfr struct sysctl_oid *sysctl_tree_top; 135119332Speter}; 136100385Speter 137100385Speterstatic struct mtx bounce_lock; 13894380Sdfrstatic int total_bpages; 139190622Skibstatic int busdma_zonecount; 140190622Skibstatic uint32_t tags_total; 141190622Skibstatic uint32_t maps_total; 142190622Skibstatic uint32_t maps_dmamem; 143119332Speterstatic uint32_t maps_coherent; 14494380Sdfrstatic uint64_t maploads_total; 14594380Sdfrstatic uint64_t maploads_bounced; 14694380Sdfrstatic uint64_t maploads_coherent; 14794380Sdfrstatic uint64_t maploads_dmamem; 14894380Sdfrstatic uint64_t maploads_mbuf; 14994380Sdfrstatic uint64_t maploads_physmem; 150119332Speter 15194380Sdfrstatic STAILQ_HEAD(, bounce_zone) bounce_zone_list; 15294380Sdfr 15394380SdfrSYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters"); 15494380SdfrSYSCTL_UINT(_hw_busdma, OID_AUTO, tags_total, CTLFLAG_RD, &tags_total, 0, 15594380Sdfr "Number of active tags"); 15694380SdfrSYSCTL_UINT(_hw_busdma, OID_AUTO, maps_total, CTLFLAG_RD, &maps_total, 0, 15794380Sdfr "Number of active maps"); 158119332SpeterSYSCTL_UINT(_hw_busdma, OID_AUTO, maps_dmamem, CTLFLAG_RD, &maps_dmamem, 0, 159157286Sps "Number of active maps for bus_dmamem_alloc buffers"); 160157286SpsSYSCTL_UINT(_hw_busdma, OID_AUTO, maps_coherent, CTLFLAG_RD, &maps_coherent, 0, 161157286Sps "Number of active maps with BUS_DMA_COHERENT flag set"); 162157286SpsSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_total, CTLFLAG_RD, &maploads_total, 0, 16394380Sdfr "Number of load operations performed"); 164119332SpeterSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_bounced, CTLFLAG_RD, &maploads_bounced, 0, 16594380Sdfr "Number of load operations that used bounce buffers"); 166100385SpeterSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_coherent, CTLFLAG_RD, &maploads_dmamem, 0, 16794380Sdfr "Number of load operations on BUS_DMA_COHERENT memory"); 168119332SpeterSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_dmamem, CTLFLAG_RD, &maploads_dmamem, 0, 16994380Sdfr "Number of load operations on bus_dmamem_alloc buffers"); 170100385SpeterSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_mbuf, CTLFLAG_RD, &maploads_mbuf, 0, 17194380Sdfr "Number of load operations for mbufs"); 172119332SpeterSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_physmem, CTLFLAG_RD, &maploads_physmem, 0, 17394380Sdfr "Number of load operations on physical buffers"); 174100385SpeterSYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0, 17594380Sdfr "Total bounce pages"); 176184184Sjhb 177184184Sjhbstruct bus_dmamap { 178184184Sjhb struct bp_list bpages; 179184184Sjhb int pagesneeded; 180184184Sjhb int pagesreserved; 181184184Sjhb bus_dma_tag_t dmat; 182119332Speter struct memdesc mem; 18394380Sdfr pmap_t pmap; 18494380Sdfr bus_dmamap_callback_t *callback; 18594380Sdfr void *callback_arg; 186236027Sed int flags; 18794380Sdfr#define DMAMAP_COHERENT (1 << 0) 188236027Sed#define DMAMAP_DMAMEM_ALLOC (1 << 1) 18994380Sdfr#define DMAMAP_MBUF (1 << 2) 190154596Sambrisko STAILQ_ENTRY(bus_dmamap) links; 191154596Sambrisko bus_dma_segment_t *segments; 192154596Sambrisko int sync_count; 193154596Sambrisko struct sync_list slist[]; 194165406Sjkim}; 195165406Sjkim 196165406Sjkimstatic STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist; 197165406Sjkimstatic STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist; 198165406Sjkim 199165406Sjkimstatic void init_bounce_pages(void *dummy); 200165406Sjkimstatic int alloc_bounce_zone(bus_dma_tag_t dmat); 201165406Sjkimstatic int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages); 202165406Sjkimstatic int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 203165406Sjkim int commit); 204165406Sjkimstatic bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, 205165406Sjkim vm_offset_t vaddr, bus_addr_t addr, 206165406Sjkim bus_size_t size); 207151358Spsstatic void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage); 208151358Spsstatic void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 209151358Sps void *buf, bus_size_t buflen, int flags); 210151358Spsstatic void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, 211151358Sps vm_paddr_t buf, bus_size_t buflen, int flags); 212151358Spsstatic int _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 213151358Sps int flags); 214151358Sps 215151358Spsstatic busdma_bufalloc_t coherent_allocator; /* Cache of coherent buffers */ 216151358Spsstatic busdma_bufalloc_t standard_allocator; /* Cache of standard buffers */ 217151358Spsstatic void 218151358Spsbusdma_init(void *dummy) 219253531Skib{ 220253531Skib int uma_flags; 221253531Skib 222253531Skib uma_flags = 0; 223253531Skib 224253531Skib /* Create a cache of buffers in standard (cacheable) memory. */ 225253531Skib standard_allocator = busdma_bufalloc_create("buffer", 226253531Skib arm_dcache_align, /* minimum_alignment */ 227253531Skib NULL, /* uma_alloc func */ 228253531Skib NULL, /* uma_free func */ 229253531Skib uma_flags); /* uma_zcreate_flags */ 230253531Skib 231253531Skib#ifdef INVARIANTS 232253531Skib /* 233253531Skib * Force UMA zone to allocate service structures like 234140481Sps * slabs using own allocator. uma_debug code performs 235151356Sps * atomic ops on uma_slab_t fields and safety of this 236151356Sps * operation is not guaranteed for write-back caches 237140481Sps */ 238317618Svangyzen uma_flags = UMA_ZONE_OFFPAGE; 239317618Svangyzen#endif 240317618Svangyzen /* 241317618Svangyzen * Create a cache of buffers in uncacheable memory, to implement the 242317618Svangyzen * BUS_DMA_COHERENT (and potentially BUS_DMA_NOCACHE) flag. 243317618Svangyzen */ 244253495Skib coherent_allocator = busdma_bufalloc_create("coherent", 245253495Skib arm_dcache_align, /* minimum_alignment */ 246253495Skib busdma_bufalloc_alloc_uncacheable, 247253495Skib busdma_bufalloc_free_uncacheable, 248253495Skib uma_flags); /* uma_zcreate_flags */ 249253495Skib} 250185879Sjhb 251185879Sjhb/* 252185879Sjhb * This init historically used SI_SUB_VM, but now the init code requires 253185879Sjhb * malloc(9) using M_DEVBUF memory, which is set up later than SI_SUB_VM, by 254185879Sjhb * SI_SUB_KMEM and SI_ORDER_THIRD, so we'll go right after that by using 255185879Sjhb * SI_SUB_KMEM and SI_ORDER_FOURTH. 256185879Sjhb */ 257185879SjhbSYSINIT(busdma, SI_SUB_KMEM, SI_ORDER_FOURTH, busdma_init, NULL); 258185879Sjhb 259185879Sjhb/* 260253531Skib * This routine checks the exclusion zone constraints from a tag against the 261185879Sjhb * physical RAM available on the machine. If a tag specifies an exclusion zone 262154587Sambrisko * but there's no RAM in that zone, then we avoid allocating resources to bounce 263154587Sambrisko * a request, and we can use any memory allocator (as opposed to needing 264154587Sambrisko * kmem_alloc_contig() just because it can allocate pages in an address range). 265154587Sambrisko * 266147814Sjhb * Most tags have BUS_SPACE_MAXADDR or BUS_SPACE_MAXADDR_32BIT (they are the 267147814Sjhb * same value on 32-bit architectures) as their lowaddr constraint, and we can't 268147814Sjhb * possibly have RAM at an address higher than the highest address we can 269147814Sjhb * express, so we take a fast out. 270236027Sed */ 271236027Sedstatic int 272147814Sjhbexclusion_bounce_check(vm_offset_t lowaddr, vm_offset_t highaddr) 273147814Sjhb{ 274147814Sjhb int i; 275147814Sjhb 276147814Sjhb if (lowaddr >= BUS_SPACE_MAXADDR) 277236027Sed return (0); 278236027Sed 279147814Sjhb for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) { 280140482Sps if ((lowaddr >= phys_avail[i] && lowaddr < phys_avail[i + 1]) || 281140482Sps (lowaddr < phys_avail[i] && highaddr >= phys_avail[i])) 282140482Sps return (1); 283140482Sps } 284220159Skib return (0); 285220159Skib} 286220159Skib 287220159Skib/* 288185879Sjhb * Return true if the tag has an exclusion zone that could lead to bouncing. 289185879Sjhb */ 290185879Sjhbstatic __inline int 291185879Sjhbexclusion_bounce(bus_dma_tag_t dmat) 292185879Sjhb{ 293185879Sjhb 294185879Sjhb return (dmat->flags & BUS_DMA_EXCL_BOUNCE); 295185879Sjhb} 296185879Sjhb 297185879Sjhb/* 298185879Sjhb * Return true if the given address does not fall on the alignment boundary. 299337428Skib */ 300337428Skibstatic __inline int 301337428Skibalignment_bounce(bus_dma_tag_t dmat, bus_addr_t addr) 302337428Skib{ 303185436Sbz 304185436Sbz return (addr & (dmat->alignment - 1)); 305185436Sbz} 306163020Sdavidxu 307163020Sdavidxu/* 308163020Sdavidxu * Return true if the DMA should bounce because the start or end does not fall 309163020Sdavidxu * on a cacheline boundary (which would require a partial cacheline flush). 310163020Sdavidxu * COHERENT memory doesn't trigger cacheline flushes. Memory allocated by 311163020Sdavidxu * bus_dmamem_alloc() is always aligned to cacheline boundaries, and there's a 312163020Sdavidxu * strict rule that such memory cannot be accessed by the CPU while DMA is in 313163020Sdavidxu * progress (or by multiple DMA engines at once), so that it's always safe to do 314163020Sdavidxu * full cacheline flushes even if that affects memory outside the range of a 315185879Sjhb * given DMA operation that doesn't involve the full allocated buffer. If we're 316185879Sjhb * mapping an mbuf, that follows the same rules as a buffer we allocated. 317185879Sjhb */ 318185879Sjhbstatic __inline int 319119332Spetercacheline_bounce(bus_dmamap_t map, bus_addr_t addr, bus_size_t size) 320114988Speter{ 321142874Sps 322114988Speter if (map->flags & (DMAMAP_DMAMEM_ALLOC | DMAMAP_COHERENT | DMAMAP_MBUF)) 323142874Sps return (0); 324114988Speter return ((addr | size) & arm_dcache_align_mask); 325142874Sps} 326104739Speter 327183189Sobrien/* 328183189Sobrien * Return true if we might need to bounce the DMA described by addr and size. 329183189Sobrien * 330183189Sobrien * This is used to quick-check whether we need to do the more expensive work of 331183189Sobrien * checking the DMA page-by-page looking for alignment and exclusion bounces. 332119332Speter * 33394380Sdfr * Note that the addr argument might be either virtual or physical. It doesn't 33494380Sdfr * matter because we only look at the low-order bits, which are the same in both 335236027Sed * address spaces. 336236027Sed */ 33794380Sdfrstatic __inline int 338156115Spsmight_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t addr, 33994380Sdfr bus_size_t size) 34094380Sdfr{ 34194380Sdfr return ((dmat->flags & BUS_DMA_EXCL_BOUNCE) || 342205328Skib alignment_bounce(dmat, addr) || 343205328Skib cacheline_bounce(map, addr, size)); 344205328Skib} 345205328Skib 346205328Skib/* 347205328Skib * Return true if we must bounce the DMA described by paddr and size. 348205328Skib * 349205328Skib * Bouncing can be triggered by DMA that doesn't begin and end on cacheline 350205328Skib * boundaries, or doesn't begin on an alignment boundary, or falls within the 351205328Skib * exclusion zone of any tag in the ancestry chain. 352205328Skib * 353119332Speter * For exclusions, walk the chain of tags comparing paddr to the exclusion zone 354114988Speter * within each tag. If the tag has a filter function, use it to decide whether 355114988Speter * the DMA needs to bounce, otherwise any DMA within the zone bounces. 356114988Speter */ 357114988Speterstatic int 358119332Spetermust_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr, 359119332Speter bus_size_t size) 360119194Speter{ 361150632Speter 362150632Speter if (cacheline_bounce(map, paddr, size)) 363150632Speter return (1); 364150632Speter 365150632Speter /* 366150632Speter * The tag already contains ancestors' alignment restrictions so this 367150632Speter * check doesn't need to be inside the loop. 368150632Speter */ 369150632Speter if (alignment_bounce(dmat, paddr)) 370150632Speter return (1); 371205328Skib 372205328Skib /* 373205328Skib * Even though each tag has an exclusion zone that is a superset of its 374205328Skib * own and all its ancestors' exclusions, the exclusion zone of each tag 375162552Sdavidxu * up the chain must be checked within the loop, because the busdma 376162552Sdavidxu * rules say the filter function is called only when the address lies 377162552Sdavidxu * within the low-highaddr range of the tag that filterfunc belongs to. 378162537Sdavidxu */ 379162537Sdavidxu while (dmat != NULL && exclusion_bounce(dmat)) { 380162537Sdavidxu if ((paddr >= dmat->lowaddr && paddr <= dmat->highaddr) && 381163451Sdavidxu (dmat->filter == NULL || 382162537Sdavidxu dmat->filter(dmat->filterarg, paddr) != 0)) 383162537Sdavidxu return (1); 384162537Sdavidxu dmat = dmat->parent; 385162552Sdavidxu } 386162552Sdavidxu 387162552Sdavidxu return (0); 388162552Sdavidxu} 389318244Sbrooks 390318244Sbrooksstatic __inline struct arm32_dma_range * 391318244Sbrooks_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges, 392318244Sbrooks bus_addr_t curaddr) 393318244Sbrooks{ 394205328Skib struct arm32_dma_range *dr; 395205328Skib int i; 396205328Skib 397205328Skib for (i = 0, dr = ranges; i < nranges; i++, dr++) { 398205328Skib if (curaddr >= dr->dr_sysbase && 399205328Skib round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len)) 400205328Skib return (dr); 401205328Skib } 402205328Skib 403205328Skib return (NULL); 404205328Skib} 405205328Skib 406205328Skib/* 407205328Skib * Convenience function for manipulating driver locks from busdma (during 408205328Skib * busdma_swi, for example). Drivers that don't provide their own locks 409205328Skib * should specify &Giant to dmat->lockfuncarg. Drivers that use their own 410205328Skib * non-mutex locking scheme don't have to use this at all. 411205328Skib */ 412205328Skibvoid 413205328Skibbusdma_lock_mutex(void *arg, bus_dma_lock_op_t op) 414205328Skib{ 415205328Skib struct mtx *dmtx; 416205328Skib 417205328Skib dmtx = (struct mtx *)arg; 418205328Skib switch (op) { 419253531Skib case BUS_DMA_LOCK: 420253531Skib mtx_lock(dmtx); 421253531Skib break; 422253531Skib case BUS_DMA_UNLOCK: 423185879Sjhb mtx_unlock(dmtx); 424185879Sjhb break; 425185879Sjhb default: 426185879Sjhb panic("Unknown operation 0x%x for busdma_lock_mutex!", op); 427205014Snwhitehorn } 428171214Speter} 429171214Speter 430171214Speter/* 431171214Speter * dflt_lock should never get called. It gets put into the dma tag when 432205014Snwhitehorn * lockfunc == NULL, which is only valid if the maps that are associated 433236027Sed * with the tag are meant to never be defered. 434236027Sed * XXX Should have a way to identify which driver is responsible here. 435171214Speter */ 436171214Speterstatic void 437171214Speterdflt_lock(void *arg, bus_dma_lock_op_t op) 438171214Speter{ 439171214Speter panic("driver error: busdma dflt_lock called"); 440205014Snwhitehorn} 441236027Sed 442236027Sed/* 443171214Speter * Allocate a device specific dma_tag. 444171214Speter */ 445171214Speterint 446171214Speterbus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, 447171214Speter bus_size_t boundary, bus_addr_t lowaddr, 448171214Speter bus_addr_t highaddr, bus_dma_filter_t *filter, 449171214Speter void *filterarg, bus_size_t maxsize, int nsegments, 450205014Snwhitehorn bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, 451236027Sed void *lockfuncarg, bus_dma_tag_t *dmat) 452236027Sed{ 453171214Speter bus_dma_tag_t newtag; 454171214Speter int error = 0; 455171214Speter 456205014Snwhitehorn#if 0 457236027Sed if (!parent) 458236027Sed parent = arm_root_dma_tag; 459171214Speter#endif 460171214Speter 461171214Speter /* Basic sanity checking */ 462171214Speter if (boundary != 0 && boundary < maxsegsz) 463205014Snwhitehorn maxsegsz = boundary; 464236027Sed 465236027Sed /* Return a NULL tag on failure */ 466171214Speter *dmat = NULL; 467171214Speter 468171214Speter if (maxsegsz == 0) { 469205014Snwhitehorn return (EINVAL); 470236027Sed } 471236027Sed 472171214Speter newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, 473205014Snwhitehorn M_ZERO | M_NOWAIT); 474205014Snwhitehorn if (newtag == NULL) { 475205014Snwhitehorn CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", 476205014Snwhitehorn __func__, newtag, 0, error); 477205014Snwhitehorn return (ENOMEM); 478236027Sed } 479236027Sed 480205014Snwhitehorn newtag->parent = parent; 481205014Snwhitehorn newtag->alignment = alignment; 482205014Snwhitehorn newtag->boundary = boundary; 483205014Snwhitehorn newtag->lowaddr = trunc_page((vm_paddr_t)lowaddr) + (PAGE_SIZE - 1); 484205014Snwhitehorn newtag->highaddr = trunc_page((vm_paddr_t)highaddr) + 485236027Sed (PAGE_SIZE - 1); 486236027Sed newtag->filter = filter; 487205014Snwhitehorn newtag->filterarg = filterarg; 488205014Snwhitehorn newtag->maxsize = maxsize; 489205014Snwhitehorn newtag->nsegments = nsegments; 490205014Snwhitehorn newtag->maxsegsz = maxsegsz; 491205014Snwhitehorn newtag->flags = flags; 492205014Snwhitehorn newtag->ref_count = 1; /* Count ourself */ 493205014Snwhitehorn newtag->map_count = 0; 494236027Sed newtag->ranges = bus_dma_get_range(); 495236027Sed newtag->_nranges = bus_dma_get_range_nb(); 496205014Snwhitehorn if (lockfunc != NULL) { 497205014Snwhitehorn newtag->lockfunc = lockfunc; 498205014Snwhitehorn newtag->lockfuncarg = lockfuncarg; 499236027Sed } else { 500236027Sed newtag->lockfunc = dflt_lock; 501205014Snwhitehorn newtag->lockfuncarg = NULL; 502205014Snwhitehorn } 503205014Snwhitehorn 504205014Snwhitehorn /* Take into account any restrictions imposed by our parent tag */ 505236027Sed if (parent != NULL) { 506236027Sed newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr); 507205014Snwhitehorn newtag->highaddr = MAX(parent->highaddr, newtag->highaddr); 508205014Snwhitehorn newtag->alignment = MAX(parent->alignment, newtag->alignment); 509205014Snwhitehorn newtag->flags |= parent->flags & BUS_DMA_COULD_BOUNCE; 510236027Sed if (newtag->boundary == 0) 511236027Sed newtag->boundary = parent->boundary; 512205014Snwhitehorn else if (parent->boundary != 0) 513205014Snwhitehorn newtag->boundary = MIN(parent->boundary, 514205014Snwhitehorn newtag->boundary); 515180434Sbrooks if (newtag->filter == NULL) { 516180434Sbrooks /* 517205014Snwhitehorn * Short circuit to looking at our parent directly 518236027Sed * since we have encapsulated all of its information 519236027Sed */ 520180434Sbrooks newtag->filter = parent->filter; 521180434Sbrooks newtag->filterarg = parent->filterarg; 522205014Snwhitehorn newtag->parent = parent->parent; 523205014Snwhitehorn } 524205014Snwhitehorn if (newtag->parent != NULL) 525236027Sed atomic_add_int(&parent->ref_count, 1); 526236027Sed } 527205014Snwhitehorn 528205014Snwhitehorn if (exclusion_bounce_check(newtag->lowaddr, newtag->highaddr)) 529205014Snwhitehorn newtag->flags |= BUS_DMA_EXCL_BOUNCE; 530180434Sbrooks if (alignment_bounce(newtag, 1)) 531180434Sbrooks newtag->flags |= BUS_DMA_ALIGN_BOUNCE; 532180434Sbrooks 533236027Sed /* 534236027Sed * Any request can auto-bounce due to cacheline alignment, in addition 535180434Sbrooks * to any alignment or boundary specifications in the tag, so if the 536180434Sbrooks * ALLOCNOW flag is set, there's always work to do. 537180434Sbrooks */ 538180434Sbrooks if ((flags & BUS_DMA_ALLOCNOW) != 0) { 539180434Sbrooks struct bounce_zone *bz; 540236027Sed /* 541236027Sed * Round size up to a full page, and add one more page because 542180434Sbrooks * there can always be one more boundary crossing than the 543180434Sbrooks * number of pages in a transfer. 544180434Sbrooks */ 545180434Sbrooks maxsize = roundup2(maxsize, PAGE_SIZE) + PAGE_SIZE; 546180434Sbrooks 547180434Sbrooks if ((error = alloc_bounce_zone(newtag)) != 0) { 548236027Sed free(newtag, M_DEVBUF); 549236027Sed return (error); 550180434Sbrooks } 551180434Sbrooks bz = newtag->bounce_zone; 552180434Sbrooks 553177790Skib if (ptoa(bz->total_bpages) < maxsize) { 554177790Skib int pages; 555236027Sed 556236027Sed pages = atop(maxsize) - bz->total_bpages; 557177790Skib 558177790Skib /* Add pages to our bounce pool */ 559177790Skib if (alloc_bounce_pages(newtag, pages) < pages) 560177790Skib error = ENOMEM; 561177790Skib } 562177790Skib /* Performed initial allocation */ 563177790Skib newtag->flags |= BUS_DMA_MIN_ALLOC_COMP; 564177790Skib } else 565177790Skib newtag->bounce_zone = NULL; 566177790Skib 567177790Skib if (error != 0) { 568177790Skib free(newtag, M_DEVBUF); 569191675Sjamie } else { 570191675Sjamie atomic_add_32(&tags_total, 1); 571191675Sjamie *dmat = newtag; 572191675Sjamie } 573191675Sjamie CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", 574191675Sjamie __func__, newtag, (newtag != NULL ? newtag->flags : 0), error); 575191675Sjamie return (error); 576191675Sjamie} 577191675Sjamie 578191675Sjamieint 579194919Sjhbbus_dma_tag_destroy(bus_dma_tag_t dmat) 580194919Sjhb{ 581194919Sjhb bus_dma_tag_t dmat_copy; 582194919Sjhb int error; 583194919Sjhb 584194919Sjhb error = 0; 585194919Sjhb dmat_copy = dmat; 586194919Sjhb 587194919Sjhb if (dmat != NULL) { 588194919Sjhb 589194919Sjhb if (dmat->map_count != 0) { 590194919Sjhb error = EBUSY; 591194919Sjhb goto out; 592194919Sjhb } 593194919Sjhb 594194919Sjhb while (dmat != NULL) { 595198512Skib bus_dma_tag_t parent; 596198512Skib 597198512Skib parent = dmat->parent; 598198512Skib atomic_subtract_int(&dmat->ref_count, 1); 599198512Skib if (dmat->ref_count == 0) { 600198512Skib atomic_subtract_32(&tags_total, 1); 601198512Skib free(dmat, M_DEVBUF); 602198512Skib /* 603250854Skib * Last reference count, so 604220792Smdf * release our reference 605220792Smdf * count on our parent. 606250854Skib */ 607226365Sjhb dmat = parent; 608226365Sjhb } else 609226365Sjhb dmat = NULL; 610226365Sjhb } 611220792Smdf } 612227071Sjhbout: 613227071Sjhb CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error); 614250854Skib return (error); 615227071Sjhb} 616227071Sjhb 617227071Sjhbstatic int allocate_bz_and_pages(bus_dma_tag_t dmat, bus_dmamap_t mapp) 618227071Sjhb{ 619227071Sjhb struct bounce_zone *bz; 620227071Sjhb int maxpages; 621242959Skib int error; 622242959Skib 623250854Skib if (dmat->bounce_zone == NULL) 624250854Skib if ((error = alloc_bounce_zone(dmat)) != 0) 625250854Skib return (error); 626242959Skib bz = dmat->bounce_zone; 627242959Skib /* Initialize the new map */ 628242959Skib STAILQ_INIT(&(mapp->bpages)); 629242959Skib 630242959Skib /* 631250854Skib * Attempt to add pages to our pool on a per-instance basis up to a sane 632250854Skib * limit. Even if the tag isn't flagged as COULD_BOUNCE due to 633250854Skib * alignment and boundary constraints, it could still auto-bounce due to 634250854Skib * cacheline alignment, which requires at most two bounce pages. 635250854Skib */ 636250854Skib if (dmat->flags & BUS_DMA_COULD_BOUNCE) 637250854Skib maxpages = MAX_BPAGES; 638250854Skib else 639250854Skib maxpages = 2 * bz->map_count; 640250854Skib if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0 || 641250854Skib (bz->map_count > 0 && bz->total_bpages < maxpages)) { 642250854Skib int pages; 643250854Skib 644250854Skib pages = atop(roundup2(dmat->maxsize, PAGE_SIZE)) + 1; 645250854Skib pages = MIN(maxpages - bz->total_bpages, pages); 646250854Skib pages = MAX(pages, 2); 647250854Skib if (alloc_bounce_pages(dmat, pages) < pages) 648250854Skib return (ENOMEM); 649250854Skib 650250854Skib if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) 651250854Skib dmat->flags |= BUS_DMA_MIN_ALLOC_COMP; 652250854Skib } 653250854Skib bz->map_count++; 654250854Skib return (0); 655250854Skib} 656250854Skib 657254482Spjdstatic bus_dmamap_t 658254482Spjdallocate_map(bus_dma_tag_t dmat, int mflags) 659254482Spjd{ 660254482Spjd int mapsize, segsize; 661254482Spjd bus_dmamap_t map; 662254482Spjd 663254482Spjd /* 664254482Spjd * Allocate the map. The map structure ends with an embedded 665254482Spjd * variable-sized array of sync_list structures. Following that 666254482Spjd * we allocate enough extra space to hold the array of bus_dma_segments. 667251527Sglebius */ 668251527Sglebius KASSERT(dmat->nsegments <= MAX_DMA_SEGMENTS, 669251527Sglebius ("cannot allocate %u dma segments (max is %u)", 670255709Sjhb dmat->nsegments, MAX_DMA_SEGMENTS)); 671255709Sjhb segsize = sizeof(struct bus_dma_segment) * dmat->nsegments; 672255709Sjhb mapsize = sizeof(*map) + sizeof(struct sync_list) * dmat->nsegments; 673255709Sjhb map = malloc(mapsize + segsize, M_DEVBUF, mflags | M_ZERO); 674255709Sjhb if (map == NULL) { 675255709Sjhb CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM); 676255709Sjhb return (NULL); 677255709Sjhb } 678255709Sjhb map->segments = (bus_dma_segment_t *)((uintptr_t)map + mapsize); 679255709Sjhb return (map); 680255709Sjhb} 681255709Sjhb 682255709Sjhb/* 683255709Sjhb * Allocate a handle for mapping from kva/uva/physical 684255709Sjhb * address space into bus device space. 685255709Sjhb */ 686255709Sjhbint 687255709Sjhbbus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) 688274463Sdchagin{ 689274463Sdchagin bus_dmamap_t map; 690274463Sdchagin int error = 0; 691274463Sdchagin 692274463Sdchagin *mapp = map = allocate_map(dmat, M_NOWAIT); 693274463Sdchagin if (map == NULL) { 694277611Sjilles CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM); 695277611Sjilles return (ENOMEM); 696277611Sjilles } 697277611Sjilles 698277611Sjilles /* 699277611Sjilles * Bouncing might be required if the driver asks for an exclusion 700277611Sjilles * region, a data alignment that is stricter than 1, or DMA that begins 701277611Sjilles * or ends with a partial cacheline. Whether bouncing will actually 702277611Sjilles * happen can't be known until mapping time, but we need to pre-allocate 703277611Sjilles * resources now because we might not be allowed to at mapping time. 704232449Sjmallett */ 705205014Snwhitehorn error = allocate_bz_and_pages(dmat, map); 706205014Snwhitehorn if (error != 0) { 707119332Speter free(map, M_DEVBUF); 708151360Sps *mapp = NULL; 709151360Sps return (error); 710151360Sps } 711119332Speter if (map->flags & DMAMAP_COHERENT) 712183271Sobrien atomic_add_32(&maps_coherent, 1); 713119332Speter atomic_add_32(&maps_total, 1); 714226349Smarcel return (0); 715119332Speter} 716125171Speter 717270692Skib/* 718119332Speter * Destroy a handle for mapping from kva/uva/physical 719119332Speter * address space into bus device space. 720119332Speter */ 721119332Speterint 722119332Speterbus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) 723119332Speter{ 724119332Speter if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) { 725119332Speter CTR3(KTR_BUSDMA, "%s: tag %p error %d", 726190622Skib __func__, dmat, EBUSY); 727119332Speter return (EBUSY); 728119332Speter } 729119332Speter if (dmat->bounce_zone) 730119332Speter dmat->bounce_zone->map_count--; 731119332Speter if (map->flags & DMAMAP_COHERENT) 732119332Speter atomic_subtract_32(&maps_coherent, 1); 733184184Sjhb atomic_subtract_32(&maps_total, 1); 734119332Speter free(map, M_DEVBUF); 735154596Sambrisko dmat->map_count--; 736165406Sjkim CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat); 737165406Sjkim return (0); 738151358Sps} 739151358Sps 740151358Sps 741253531Skib/* 742253531Skib * Allocate a piece of memory that can be efficiently mapped into 743253531Skib * bus device space based on the constraints lited in the dma tag. 744140481Sps * A dmamap to for use with dmamap_load is also allocated. 745317618Svangyzen */ 746253495Skibint 747185879Sjhbbus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, 748185879Sjhb bus_dmamap_t *mapp) 749185879Sjhb{ 750154587Sambrisko busdma_bufalloc_t ba; 751147814Sjhb struct busdma_bufzone *bufzone; 752147814Sjhb bus_dmamap_t map; 753140482Sps vm_memattr_t memattr; 754220159Skib int mflags; 755185879Sjhb 756185879Sjhb if (flags & BUS_DMA_NOWAIT) 757185879Sjhb mflags = M_NOWAIT; 758337428Skib else 759185436Sbz mflags = M_WAITOK; 760163020Sdavidxu if (flags & BUS_DMA_ZERO) 761163020Sdavidxu mflags |= M_ZERO; 762185879Sjhb 763119332Speter *mapp = map = allocate_map(dmat, mflags); 764183189Sobrien if (map == NULL) { 765119332Speter CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 766205328Skib __func__, dmat, dmat->flags, ENOMEM); 767205328Skib return (ENOMEM); 768119332Speter } 769119332Speter map->flags = DMAMAP_DMAMEM_ALLOC; 770150632Speter 771150632Speter /* Choose a busdma buffer allocator based on memory type flags. */ 772150632Speter if (flags & BUS_DMA_COHERENT) { 773205328Skib memattr = VM_MEMATTR_UNCACHEABLE; 774162552Sdavidxu ba = coherent_allocator; 775162537Sdavidxu map->flags |= DMAMAP_COHERENT; 776162552Sdavidxu } else { 777318244Sbrooks memattr = VM_MEMATTR_DEFAULT; 778205328Skib ba = standard_allocator; 779205328Skib } 780205328Skib 781205328Skib /* 782253531Skib * Try to find a bufzone in the allocator that holds a cache of buffers 783185879Sjhb * of the right size for this request. If the buffer is too big to be 784205014Snwhitehorn * held in the allocator cache, this returns NULL. 785171214Speter */ 786171214Speter bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize); 787171214Speter 788171214Speter /* 789171214Speter * Allocate the buffer from the uma(9) allocator if... 790171214Speter * - It's small enough to be in the allocator (bufzone not NULL). 791205014Snwhitehorn * - The alignment constraint isn't larger than the allocation size 792205014Snwhitehorn * (the allocator aligns buffers to their size boundaries). 793205014Snwhitehorn * - There's no need to handle lowaddr/highaddr exclusion zones. 794205014Snwhitehorn * else allocate non-contiguous pages if... 795205014Snwhitehorn * - The page count that could get allocated doesn't exceed nsegments. 796205014Snwhitehorn * - The alignment constraint isn't larger than a page boundary. 797205014Snwhitehorn * - There are no boundary-crossing constraints. 798205014Snwhitehorn * else allocate a block of contiguous pages because one or more of the 799205014Snwhitehorn * constraints is something that only the contig allocator can fulfill. 800180434Sbrooks */ 801205014Snwhitehorn if (bufzone != NULL && dmat->alignment <= bufzone->size && 802205014Snwhitehorn !exclusion_bounce(dmat)) { 803205014Snwhitehorn *vaddr = uma_zalloc(bufzone->umazone, mflags); 804180434Sbrooks } else if (dmat->nsegments >= btoc(dmat->maxsize) && 805180434Sbrooks dmat->alignment <= PAGE_SIZE && dmat->boundary == 0) { 806180434Sbrooks *vaddr = (void *)kmem_alloc_attr(kernel_arena, dmat->maxsize, 807177790Skib mflags, 0, dmat->lowaddr, memattr); 808177790Skib } else { 809177790Skib *vaddr = (void *)kmem_alloc_contig(kernel_arena, dmat->maxsize, 810191675Sjamie mflags, 0, dmat->lowaddr, dmat->alignment, dmat->boundary, 811191675Sjamie memattr); 812194919Sjhb } 813194919Sjhb 814194919Sjhb 815198512Skib if (*vaddr == NULL) { 816250854Skib CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 817220792Smdf __func__, dmat, dmat->flags, ENOMEM); 818227071Sjhb free(map, M_DEVBUF); 819242959Skib *mapp = NULL; 820250854Skib return (ENOMEM); 821250854Skib } 822250854Skib if (map->flags & DMAMAP_COHERENT) 823250854Skib atomic_add_32(&maps_coherent, 1); 824250854Skib atomic_add_32(&maps_dmamem, 1); 825254482Spjd atomic_add_32(&maps_total, 1); 826254482Spjd dmat->map_count++; 827251527Sglebius 828255709Sjhb CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 829255709Sjhb __func__, dmat, dmat->flags, 0); 830255709Sjhb return (0); 831255709Sjhb} 832255709Sjhb 833274463Sdchagin/* 834277611Sjilles * Free a piece of memory and it's allociated dmamap, that was allocated 835277611Sjilles * via bus_dmamem_alloc. Make the same choice for free/contigfree. 83694380Sdfr */ 83794380Sdfrvoid 83894380Sdfrbus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) 839232449Sjmallett{ 840205014Snwhitehorn struct busdma_bufzone *bufzone; 841205014Snwhitehorn busdma_bufalloc_t ba; 842223167Skib 843223167Skib if (map->flags & DMAMAP_COHERENT) 844223167Skib ba = coherent_allocator; 845223167Skib else 846223167Skib ba = standard_allocator; 847220239Skib 848220239Skib /* Be careful not to access map from here on. */ 849220239Skib 850220239Skib bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize); 851220239Skib 852220239Skib if (bufzone != NULL && dmat->alignment <= bufzone->size && 853220239Skib !exclusion_bounce(dmat)) 854220239Skib uma_zfree(bufzone->umazone, vaddr); 855151721Speter else 856151721Speter kmem_free(kernel_arena, (vm_offset_t)vaddr, dmat->maxsize); 857151721Speter 858151721Speter dmat->map_count--; 859151721Speter if (map->flags & DMAMAP_COHERENT) 860151721Speter atomic_subtract_32(&maps_coherent, 1); 861151721Speter atomic_subtract_32(&maps_total, 1); 862151721Speter atomic_subtract_32(&maps_dmamem, 1); 863151721Speter free(map, M_DEVBUF); 864220239Skib CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags); 865220239Skib} 866220239Skib 867220239Skibstatic void 868220239Skib_bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf, 869220239Skib bus_size_t buflen, int flags) 870220239Skib{ 871220239Skib bus_addr_t curaddr; 872220239Skib bus_size_t sgsize; 873220239Skib 874151721Speter if (map->pagesneeded == 0) { 875151721Speter CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d" 876151721Speter " map= %p, pagesneeded= %d", 877151721Speter dmat->lowaddr, dmat->boundary, dmat->alignment, 878151721Speter map, map->pagesneeded); 879151721Speter /* 880151721Speter * Count the number of bounce pages 881151721Speter * needed in order to complete this transfer 882151721Speter */ 883151721Speter curaddr = buf; 884151721Speter while (buflen != 0) { 885151721Speter sgsize = MIN(buflen, dmat->maxsegsz); 886151721Speter if (must_bounce(dmat, map, curaddr, sgsize) != 0) { 887151721Speter sgsize = MIN(sgsize, PAGE_SIZE); 888151721Speter map->pagesneeded++; 889151721Speter } 890151721Speter curaddr += sgsize; 891151721Speter buflen -= sgsize; 892220239Skib } 893220239Skib CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded); 894220239Skib } 895220239Skib} 896220239Skib 897220239Skibstatic void 898205014Snwhitehorn_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 899205014Snwhitehorn void *buf, bus_size_t buflen, int flags) 900205014Snwhitehorn{ 901205014Snwhitehorn vm_offset_t vaddr; 902205014Snwhitehorn vm_offset_t vendaddr; 903205014Snwhitehorn bus_addr_t paddr; 904250854Skib 905250854Skib if (map->pagesneeded == 0) { 906250854Skib CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d" 907255709Sjhb " map= %p, pagesneeded= %d", 908255709Sjhb dmat->lowaddr, dmat->boundary, dmat->alignment, 909255709Sjhb map, map->pagesneeded); 910223167Skib /* 911220239Skib * Count the number of bounce pages 912220239Skib * needed in order to complete this transfer 913151721Speter */ 914151721Speter vaddr = (vm_offset_t)buf; 915151721Speter vendaddr = (vm_offset_t)buf + buflen; 916220239Skib 917220239Skib while (vaddr < vendaddr) { 918220239Skib if (__predict_true(map->pmap == kernel_pmap)) 919151721Speter paddr = pmap_kextract(vaddr); 920151721Speter else 921151721Speter paddr = pmap_extract(map->pmap, vaddr); 922151721Speter if (must_bounce(dmat, map, paddr, 923151721Speter min(vendaddr - vaddr, (PAGE_SIZE - ((vm_offset_t)vaddr & 924220239Skib PAGE_MASK)))) != 0) { 92594380Sdfr map->pagesneeded++; 92694380Sdfr } 92794380Sdfr vaddr += (PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK)); 928100385Speter 929100385Speter } 930100385Speter CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded); 931232449Sjmallett } 932205014Snwhitehorn} 933205014Snwhitehorn 934128261Speterstatic int 935128261Speter_bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags) 936128261Speter{ 937313452Sjhb 938128261Speter /* Reserve Necessary Bounce Pages */ 939128261Speter mtx_lock(&bounce_lock); 940128261Speter if (flags & BUS_DMA_NOWAIT) { 941128261Speter if (reserve_bounce_pages(dmat, map, 0) != 0) { 942128261Speter map->pagesneeded = 0; 943128261Speter mtx_unlock(&bounce_lock); 944128261Speter return (ENOMEM); 945128261Speter } 946128261Speter } else { 947128261Speter if (reserve_bounce_pages(dmat, map, 1) != 0) { 948128261Speter /* Queue us for resources */ 949128261Speter STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links); 950128261Speter mtx_unlock(&bounce_lock); 951119332Speter return (EINPROGRESS); 952104739Speter } 953104739Speter } 954236027Sed mtx_unlock(&bounce_lock); 955236027Sed 956104739Speter return (0); 957156115Sps} 958104739Speter 959104739Speter/* 960104739Speter * Add a single contiguous physical range to the segment list. 961119332Speter */ 962114988Speterstatic int 963114988Speter_bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr, 964114988Speter bus_size_t sgsize, bus_dma_segment_t *segs, int *segp) 965114988Speter{ 966119332Speter bus_addr_t baddr, bmask; 967126093Speter int seg; 968114988Speter 969205014Snwhitehorn /* 970205014Snwhitehorn * Make sure we don't cross any boundaries. 971205014Snwhitehorn */ 972205014Snwhitehorn bmask = ~(dmat->boundary - 1); 973205014Snwhitehorn if (dmat->boundary > 0) { 974205014Snwhitehorn baddr = (curaddr + dmat->boundary) & bmask; 975250854Skib if (sgsize > (baddr - curaddr)) 976250854Skib sgsize = (baddr - curaddr); 977250854Skib } 978255709Sjhb 979255709Sjhb if (dmat->ranges) { 980255709Sjhb struct arm32_dma_range *dr; 981128261Speter 982128261Speter dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges, 983128261Speter curaddr); 984128261Speter if (dr == NULL) { 985119332Speter _bus_dmamap_unload(dmat, map); 986119332Speter return (0); 987119332Speter } 988100385Speter /* 989100385Speter * In a valid DMA range. Translate the physical 990100385Speter * memory address to an address in the DMA window. 991171214Speter */ 992197637Srwatson curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase; 993171214Speter } 994232449Sjmallett 995205014Snwhitehorn /* 996205014Snwhitehorn * Insert chunk into a segment, coalescing with 997171214Speter * previous segment if possible. 998171214Speter */ 999171214Speter seg = *segp; 1000171214Speter if (seg == -1) { 1001171214Speter seg = 0; 1002236027Sed segs[seg].ds_addr = curaddr; 1003236027Sed segs[seg].ds_len = sgsize; 1004171214Speter } else { 1005171214Speter if (curaddr == segs[seg].ds_addr + segs[seg].ds_len && 1006171214Speter (segs[seg].ds_len + sgsize) <= dmat->maxsegsz && 1007171214Speter (dmat->boundary == 0 || 1008171214Speter (segs[seg].ds_addr & bmask) == (curaddr & bmask))) 1009171214Speter segs[seg].ds_len += sgsize; 1010236027Sed else { 1011236027Sed if (++seg >= dmat->nsegments) 1012171214Speter return (0); 1013171214Speter segs[seg].ds_addr = curaddr; 1014171214Speter segs[seg].ds_len = sgsize; 1015171214Speter } 1016171214Speter } 1017171214Speter *segp = seg; 1018171214Speter return (sgsize); 1019171214Speter} 1020236027Sed 1021236027Sed/* 1022171214Speter * Utility function to load a physical buffer. segp contains 1023171214Speter * the starting segment on entrace, and the ending segment on exit. 1024171214Speter */ 1025171214Speterint 1026236027Sed_bus_dmamap_load_phys(bus_dma_tag_t dmat, 1027236027Sed bus_dmamap_t map, 1028171214Speter vm_paddr_t buf, bus_size_t buflen, 1029171214Speter int flags, 1030171214Speter bus_dma_segment_t *segs, 1031171214Speter int *segp) 1032171214Speter{ 1033236027Sed bus_addr_t curaddr; 1034236027Sed bus_size_t sgsize; 1035171214Speter int error; 1036171214Speter 1037171214Speter if (segs == NULL) 1038171214Speter segs = map->segments; 1039236027Sed 1040236027Sed maploads_total++; 1041171214Speter maploads_physmem++; 1042296573Sjhb 1043296573Sjhb if (might_bounce(dmat, map, buflen, buflen)) { 1044296573Sjhb _bus_dmamap_count_phys(dmat, map, buf, buflen, flags); 1045296573Sjhb if (map->pagesneeded != 0) { 1046296573Sjhb maploads_bounced++; 1047296573Sjhb error = _bus_dmamap_reserve_pages(dmat, map, flags); 1048296573Sjhb if (error) 1049296573Sjhb return (error); 1050296573Sjhb } 1051296573Sjhb } 1052296573Sjhb 1053296573Sjhb while (buflen > 0) { 1054205014Snwhitehorn curaddr = buf; 1055205014Snwhitehorn sgsize = MIN(buflen, dmat->maxsegsz); 1056205014Snwhitehorn if (map->pagesneeded != 0 && must_bounce(dmat, map, curaddr, 1057205014Snwhitehorn sgsize)) { 1058205014Snwhitehorn sgsize = MIN(sgsize, PAGE_SIZE); 1059205014Snwhitehorn curaddr = add_bounce_page(dmat, map, 0, curaddr, 1060250854Skib sgsize); 1061250854Skib } 1062250854Skib sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, 1063255709Sjhb segp); 1064255709Sjhb if (sgsize == 0) 1065255709Sjhb break; 1066171214Speter buf += sgsize; 1067171214Speter buflen -= sgsize; 1068171214Speter } 1069171214Speter 1070171214Speter /* 1071171214Speter * Did we fit? 1072296573Sjhb */ 1073296573Sjhb if (buflen != 0) { 1074296573Sjhb _bus_dmamap_unload(dmat, map); 1075171214Speter return (EFBIG); /* XXX better return value here? */ 1076197637Srwatson } 1077171214Speter return (0); 1078194919Sjhb} 1079200619Simp 1080194919Sjhbint 1081232449Sjmallett_bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map, 1082205014Snwhitehorn struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags, 1083205014Snwhitehorn bus_dma_segment_t *segs, int *segp) 1084194919Sjhb{ 1085194919Sjhb 1086194919Sjhb return (bus_dmamap_load_ma_triv(dmat, map, ma, tlen, ma_offs, flags, 1087194919Sjhb segs, segp)); 1088194919Sjhb} 1089194919Sjhb 1090194919Sjhb/* 1091194919Sjhb * Utility function to load a linear buffer. segp contains 1092194919Sjhb * the starting segment on entrace, and the ending segment on exit. 1093194919Sjhb */ 1094194919Sjhbint 1095194919Sjhb_bus_dmamap_load_buffer(bus_dma_tag_t dmat, 1096194919Sjhb bus_dmamap_t map, 1097194919Sjhb void *buf, bus_size_t buflen, 1098194919Sjhb pmap_t pmap, 1099194919Sjhb int flags, 1100205014Snwhitehorn bus_dma_segment_t *segs, 1101205014Snwhitehorn int *segp) 1102205014Snwhitehorn{ 1103205014Snwhitehorn bus_size_t sgsize; 1104205014Snwhitehorn bus_addr_t curaddr; 1105205014Snwhitehorn vm_offset_t vaddr; 1106250854Skib struct sync_list *sl; 1107250854Skib int error; 1108250854Skib 1109255709Sjhb maploads_total++; 1110255709Sjhb if (map->flags & DMAMAP_COHERENT) 1111255709Sjhb maploads_coherent++; 1112194919Sjhb if (map->flags & DMAMAP_DMAMEM_ALLOC) 1113194919Sjhb maploads_dmamem++; 1114194919Sjhb 1115194919Sjhb if (segs == NULL) 1116200619Simp segs = map->segments; 1117194919Sjhb 1118302095Sbrooks if (flags & BUS_DMA_LOAD_MBUF) { 1119302095Sbrooks maploads_mbuf++; 1120302095Sbrooks map->flags |= DMAMAP_MBUF; 1121302095Sbrooks } 1122302095Sbrooks 1123302095Sbrooks map->pmap = pmap; 1124302095Sbrooks 1125302095Sbrooks if (might_bounce(dmat, map, (bus_addr_t)buf, buflen)) { 1126302095Sbrooks _bus_dmamap_count_pages(dmat, map, buf, buflen, flags); 1127302095Sbrooks if (map->pagesneeded != 0) { 1128302095Sbrooks maploads_bounced++; 1129302095Sbrooks error = _bus_dmamap_reserve_pages(dmat, map, flags); 1130302095Sbrooks if (error) 1131302095Sbrooks return (error); 1132302095Sbrooks } 1133302095Sbrooks } 1134302095Sbrooks 1135302095Sbrooks sl = NULL; 1136302095Sbrooks vaddr = (vm_offset_t)buf; 1137302095Sbrooks 1138302095Sbrooks while (buflen > 0) { 1139302095Sbrooks /* 1140161330Sjhb * Get the physical address for this segment. 1141194647Sjhb */ 1142223167Skib if (__predict_true(map->pmap == kernel_pmap)) 1143161330Sjhb curaddr = pmap_kextract(vaddr); 1144161330Sjhb else 1145161330Sjhb curaddr = pmap_extract(map->pmap, vaddr); 1146220239Skib 1147220239Skib /* 1148302095Sbrooks * Compute the segment size, and adjust counts. 1149194647Sjhb */ 1150194647Sjhb sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK); 1151194647Sjhb if (sgsize > dmat->maxsegsz) 1152162374Srwatson sgsize = dmat->maxsegsz; 1153183271Sobrien if (buflen < sgsize) 1154161330Sjhb sgsize = buflen; 1155220239Skib 1156220239Skib if (map->pagesneeded != 0 && must_bounce(dmat, map, curaddr, 1157226349Smarcel sgsize)) { 1158161330Sjhb curaddr = add_bounce_page(dmat, map, vaddr, curaddr, 1159161330Sjhb sgsize); 1160270692Skib } else { 1161161330Sjhb sl = &map->slist[map->sync_count - 1]; 1162220239Skib if (map->sync_count == 0 || 1163194647Sjhb#ifdef ARM_L2_PIPT 1164194647Sjhb curaddr != sl->busaddr + sl->datacount || 1165194647Sjhb#endif 1166194647Sjhb vaddr != sl->vaddr + sl->datacount) { 1167194647Sjhb if (++map->sync_count > dmat->nsegments) 1168161330Sjhb goto cleanup; 1169161330Sjhb sl++; 1170161330Sjhb sl->vaddr = vaddr; 1171161330Sjhb sl->datacount = sgsize; 1172161330Sjhb sl->busaddr = curaddr; 1173161330Sjhb } else 1174161330Sjhb sl->datacount += sgsize; 1175220239Skib } 1176194647Sjhb sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, 1177194647Sjhb segp); 1178190622Skib if (sgsize == 0) 1179161330Sjhb break; 1180161330Sjhb vaddr += sgsize; 1181161330Sjhb buflen -= sgsize; 1182194647Sjhb } 1183194647Sjhb 1184161330Sjhbcleanup: 1185161330Sjhb /* 1186161330Sjhb * Did we fit? 1187184184Sjhb */ 1188194647Sjhb if (buflen != 0) { 1189194647Sjhb _bus_dmamap_unload(dmat, map); 1190194647Sjhb return (EFBIG); /* XXX better return value here? */ 1191194647Sjhb } 1192161330Sjhb return (0); 1193161330Sjhb} 1194194919Sjhb 1195194919Sjhb 1196165406Sjkimvoid 1197165406Sjkim__bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map, 1198194919Sjhb struct memdesc *mem, bus_dmamap_callback_t *callback, 1199161330Sjhb void *callback_arg) 1200161330Sjhb{ 1201161330Sjhb 1202253531Skib map->mem = *mem; 1203253531Skib map->dmat = dmat; 1204253531Skib map->callback = callback; 1205161330Sjhb map->callback_arg = callback_arg; 1206317618Svangyzen} 1207253495Skib 1208185879Sjhbbus_dma_segment_t * 1209185879Sjhb_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map, 1210185879Sjhb bus_dma_segment_t *segs, int nsegs, int error) 1211161330Sjhb{ 1212161330Sjhb 1213161330Sjhb if (segs == NULL) 1214194647Sjhb segs = map->segments; 1215161330Sjhb return (segs); 1216220159Skib} 1217185879Sjhb 1218185879Sjhb/* 1219185879Sjhb * Release the mapping held by map. 1220296573Sjhb */ 1221296573Sjhbvoid 1222296573Sjhb_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) 1223337428Skib{ 1224194647Sjhb struct bounce_page *bpage; 1225185436Sbz struct bounce_zone *bz; 1226194647Sjhb 1227194647Sjhb if ((bz = dmat->bounce_zone) != NULL) { 1228163020Sdavidxu while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { 1229163020Sdavidxu STAILQ_REMOVE_HEAD(&map->bpages, links); 1230185879Sjhb free_bounce_page(dmat, bpage); 1231161330Sjhb } 1232183189Sobrien 1233161960Srwatson bz = dmat->bounce_zone; 1234205328Skib bz->free_bpages += map->pagesreserved; 1235205328Skib bz->reserved_bpages -= map->pagesreserved; 1236161330Sjhb map->pagesreserved = 0; 1237161330Sjhb map->pagesneeded = 0; 1238161330Sjhb } 1239161330Sjhb map->sync_count = 0; 1240161330Sjhb map->flags &= ~DMAMAP_MBUF; 1241205328Skib} 1242162552Sdavidxu 1243162537Sdavidxu#ifdef notyetbounceuser 1244162552Sdavidxu /* If busdma uses user pages, then the interrupt handler could 1245318244Sbrooks * be use the kernel vm mapping. Both bounce pages and sync list 1246205328Skib * do not cross page boundaries. 1247205328Skib * Below is a rough sequence that a person would do to fix the 1248205328Skib * user page reference in the kernel vmspace. This would be 1249205328Skib * done in the dma post routine. 1250253531Skib */ 1251185879Sjhbvoid 1252171214Speter_bus_dmamap_fix_user(vm_offset_t buf, bus_size_t len, 1253171214Speter pmap_t pmap, int op) 1254171214Speter{ 1255171214Speter bus_size_t sgsize; 1256171214Speter bus_addr_t curaddr; 1257171214Speter vm_offset_t va; 1258205014Snwhitehorn 1259205014Snwhitehorn /* each synclist entry is contained within a single page. 1260205014Snwhitehorn * 1261205014Snwhitehorn * this would be needed if BUS_DMASYNC_POSTxxxx was implemented 1262205014Snwhitehorn */ 1263205014Snwhitehorn curaddr = pmap_extract(pmap, buf); 1264180434Sbrooks va = pmap_dma_map(curaddr); 1265205014Snwhitehorn switch (op) { 1266180434Sbrooks case SYNC_USER_INV: 1267180434Sbrooks cpu_dcache_wb_range(va, sgsize); 1268180434Sbrooks break; 1269177790Skib 1270177790Skib case SYNC_USER_COPYTO: 1271177790Skib bcopy((void *)va, (void *)bounce, sgsize); 1272191675Sjamie break; 1273191675Sjamie 1274194919Sjhb case SYNC_USER_COPYFROM: 1275194919Sjhb bcopy((void *) bounce, (void *)va, sgsize); 1276194919Sjhb break; 1277198512Skib 1278220792Smdf default: 1279227071Sjhb break; 1280242959Skib } 1281250854Skib 1282250854Skib pmap_dma_unmap(va); 1283250854Skib} 1284254482Spjd#endif 1285254482Spjd 1286251527Sglebius#ifdef ARM_L2_PIPT 1287255709Sjhb#define l2cache_wb_range(va, pa, size) cpu_l2cache_wb_range(pa, size) 1288255709Sjhb#define l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range(pa, size) 1289274463Sdchagin#define l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range(pa, size) 1290277611Sjilles#else 1291277611Sjilles#define l2cache_wb_range(va, pa, size) cpu_l2cache_wb_range(va, size) 1292161330Sjhb#define l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range(va, size) 129394380Sdfr#define l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range(va, size) 129494380Sdfr#endif 129594380Sdfr 129694380Sdfrvoid 1297119332Speter_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) 1298{ 1299 struct bounce_page *bpage; 1300 struct sync_list *sl, *end; 1301 /* 1302 * If the buffer was from user space, it is possible that this is not 1303 * the same vm map, especially on a POST operation. It's not clear that 1304 * dma on userland buffers can work at all right now, certainly not if a 1305 * partial cacheline flush has to be handled. To be safe, until we're 1306 * able to test direct userland dma, panic on a map mismatch. 1307 */ 1308 if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { 1309 if (!pmap_dmap_iscurrent(map->pmap)) 1310 panic("_bus_dmamap_sync: wrong user map for bounce sync."); 1311 /* Handle data bouncing. */ 1312 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " 1313 "performing bounce", __func__, dmat, dmat->flags, op); 1314 1315 if (op & BUS_DMASYNC_PREWRITE) { 1316 while (bpage != NULL) { 1317 if (bpage->datavaddr != 0) 1318 bcopy((void *)bpage->datavaddr, 1319 (void *)bpage->vaddr, 1320 bpage->datacount); 1321 else 1322 physcopyout(bpage->dataaddr, 1323 (void *)bpage->vaddr, 1324 bpage->datacount); 1325 cpu_dcache_wb_range((vm_offset_t)bpage->vaddr, 1326 bpage->datacount); 1327 l2cache_wb_range((vm_offset_t)bpage->vaddr, 1328 (vm_offset_t)bpage->busaddr, 1329 bpage->datacount); 1330 bpage = STAILQ_NEXT(bpage, links); 1331 } 1332 dmat->bounce_zone->total_bounced++; 1333 } 1334 1335 if (op & BUS_DMASYNC_PREREAD) { 1336 bpage = STAILQ_FIRST(&map->bpages); 1337 while (bpage != NULL) { 1338 cpu_dcache_inv_range((vm_offset_t)bpage->vaddr, 1339 bpage->datacount); 1340 l2cache_inv_range((vm_offset_t)bpage->vaddr, 1341 (vm_offset_t)bpage->busaddr, 1342 bpage->datacount); 1343 bpage = STAILQ_NEXT(bpage, links); 1344 } 1345 } 1346 if (op & BUS_DMASYNC_POSTREAD) { 1347 while (bpage != NULL) { 1348 vm_offset_t startv; 1349 vm_paddr_t startp; 1350 int len; 1351 1352 startv = bpage->vaddr &~ arm_dcache_align_mask; 1353 startp = bpage->busaddr &~ arm_dcache_align_mask; 1354 len = bpage->datacount; 1355 1356 if (startv != bpage->vaddr) 1357 len += bpage->vaddr & arm_dcache_align_mask; 1358 if (len & arm_dcache_align_mask) 1359 len = (len - 1360 (len & arm_dcache_align_mask)) + 1361 arm_dcache_align; 1362 cpu_dcache_inv_range(startv, len); 1363 l2cache_inv_range(startv, startp, len); 1364 if (bpage->datavaddr != 0) 1365 bcopy((void *)bpage->vaddr, 1366 (void *)bpage->datavaddr, 1367 bpage->datacount); 1368 else 1369 physcopyin((void *)bpage->vaddr, 1370 bpage->dataaddr, 1371 bpage->datacount); 1372 bpage = STAILQ_NEXT(bpage, links); 1373 } 1374 dmat->bounce_zone->total_bounced++; 1375 } 1376 } 1377 if (map->flags & DMAMAP_COHERENT) 1378 return; 1379 1380 if (map->sync_count != 0) { 1381 if (!pmap_dmap_iscurrent(map->pmap)) 1382 panic("_bus_dmamap_sync: wrong user map for sync."); 1383 /* ARM caches are not self-snooping for dma */ 1384 1385 sl = &map->slist[0]; 1386 end = &map->slist[map->sync_count]; 1387 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " 1388 "performing sync", __func__, dmat, dmat->flags, op); 1389 1390 switch (op) { 1391 case BUS_DMASYNC_PREWRITE: 1392 while (sl != end) { 1393 cpu_dcache_wb_range(sl->vaddr, sl->datacount); 1394 l2cache_wb_range(sl->vaddr, sl->busaddr, 1395 sl->datacount); 1396 sl++; 1397 } 1398 break; 1399 1400 case BUS_DMASYNC_PREREAD: 1401 while (sl != end) { 1402 cpu_dcache_inv_range(sl->vaddr, sl->datacount); 1403 l2cache_inv_range(sl->vaddr, sl->busaddr, 1404 sl->datacount); 1405 sl++; 1406 } 1407 break; 1408 1409 case BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD: 1410 while (sl != end) { 1411 cpu_dcache_wbinv_range(sl->vaddr, sl->datacount); 1412 l2cache_wbinv_range(sl->vaddr, 1413 sl->busaddr, sl->datacount); 1414 sl++; 1415 } 1416 break; 1417 1418 case BUS_DMASYNC_POSTREAD: 1419 case BUS_DMASYNC_POSTWRITE: 1420 case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE: 1421 break; 1422 default: 1423 panic("unsupported combination of sync operations: 0x%08x\n", op); 1424 break; 1425 } 1426 } 1427} 1428 1429static void 1430init_bounce_pages(void *dummy __unused) 1431{ 1432 1433 total_bpages = 0; 1434 STAILQ_INIT(&bounce_zone_list); 1435 STAILQ_INIT(&bounce_map_waitinglist); 1436 STAILQ_INIT(&bounce_map_callbacklist); 1437 mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF); 1438} 1439SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL); 1440 1441static struct sysctl_ctx_list * 1442busdma_sysctl_tree(struct bounce_zone *bz) 1443{ 1444 return (&bz->sysctl_tree); 1445} 1446 1447static struct sysctl_oid * 1448busdma_sysctl_tree_top(struct bounce_zone *bz) 1449{ 1450 return (bz->sysctl_tree_top); 1451} 1452 1453static int 1454alloc_bounce_zone(bus_dma_tag_t dmat) 1455{ 1456 struct bounce_zone *bz; 1457 1458 /* Check to see if we already have a suitable zone */ 1459 STAILQ_FOREACH(bz, &bounce_zone_list, links) { 1460 if ((dmat->alignment <= bz->alignment) && 1461 (dmat->lowaddr >= bz->lowaddr)) { 1462 dmat->bounce_zone = bz; 1463 return (0); 1464 } 1465 } 1466 1467 if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF, 1468 M_NOWAIT | M_ZERO)) == NULL) 1469 return (ENOMEM); 1470 1471 STAILQ_INIT(&bz->bounce_page_list); 1472 bz->free_bpages = 0; 1473 bz->reserved_bpages = 0; 1474 bz->active_bpages = 0; 1475 bz->lowaddr = dmat->lowaddr; 1476 bz->alignment = MAX(dmat->alignment, PAGE_SIZE); 1477 bz->map_count = 0; 1478 snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount); 1479 busdma_zonecount++; 1480 snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr); 1481 STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links); 1482 dmat->bounce_zone = bz; 1483 1484 sysctl_ctx_init(&bz->sysctl_tree); 1485 bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree, 1486 SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid, 1487 CTLFLAG_RD, 0, ""); 1488 if (bz->sysctl_tree_top == NULL) { 1489 sysctl_ctx_free(&bz->sysctl_tree); 1490 return (0); /* XXX error code? */ 1491 } 1492 1493 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1494 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1495 "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0, 1496 "Total bounce pages"); 1497 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1498 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1499 "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0, 1500 "Free bounce pages"); 1501 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1502 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1503 "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0, 1504 "Reserved bounce pages"); 1505 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1506 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1507 "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0, 1508 "Active bounce pages"); 1509 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1510 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1511 "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0, 1512 "Total bounce requests (pages bounced)"); 1513 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1514 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1515 "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0, 1516 "Total bounce requests that were deferred"); 1517 SYSCTL_ADD_STRING(busdma_sysctl_tree(bz), 1518 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1519 "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, ""); 1520 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1521 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1522 "alignment", CTLFLAG_RD, &bz->alignment, 0, ""); 1523 1524 return (0); 1525} 1526 1527static int 1528alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages) 1529{ 1530 struct bounce_zone *bz; 1531 int count; 1532 1533 bz = dmat->bounce_zone; 1534 count = 0; 1535 while (numpages > 0) { 1536 struct bounce_page *bpage; 1537 1538 bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF, 1539 M_NOWAIT | M_ZERO); 1540 1541 if (bpage == NULL) 1542 break; 1543 bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF, 1544 M_NOWAIT, 0ul, bz->lowaddr, PAGE_SIZE, 0); 1545 if (bpage->vaddr == 0) { 1546 free(bpage, M_DEVBUF); 1547 break; 1548 } 1549 bpage->busaddr = pmap_kextract(bpage->vaddr); 1550 mtx_lock(&bounce_lock); 1551 STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links); 1552 total_bpages++; 1553 bz->total_bpages++; 1554 bz->free_bpages++; 1555 mtx_unlock(&bounce_lock); 1556 count++; 1557 numpages--; 1558 } 1559 return (count); 1560} 1561 1562static int 1563reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit) 1564{ 1565 struct bounce_zone *bz; 1566 int pages; 1567 1568 mtx_assert(&bounce_lock, MA_OWNED); 1569 bz = dmat->bounce_zone; 1570 pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved); 1571 if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages)) 1572 return (map->pagesneeded - (map->pagesreserved + pages)); 1573 bz->free_bpages -= pages; 1574 bz->reserved_bpages += pages; 1575 map->pagesreserved += pages; 1576 pages = map->pagesneeded - map->pagesreserved; 1577 1578 return (pages); 1579} 1580 1581static bus_addr_t 1582add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr, 1583 bus_addr_t addr, bus_size_t size) 1584{ 1585 struct bounce_zone *bz; 1586 struct bounce_page *bpage; 1587 1588 KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag")); 1589 KASSERT(map != NULL, 1590 ("add_bounce_page: bad map %p", map)); 1591 1592 bz = dmat->bounce_zone; 1593 if (map->pagesneeded == 0) 1594 panic("add_bounce_page: map doesn't need any pages"); 1595 map->pagesneeded--; 1596 1597 if (map->pagesreserved == 0) 1598 panic("add_bounce_page: map doesn't need any pages"); 1599 map->pagesreserved--; 1600 1601 mtx_lock(&bounce_lock); 1602 bpage = STAILQ_FIRST(&bz->bounce_page_list); 1603 if (bpage == NULL) 1604 panic("add_bounce_page: free page list is empty"); 1605 1606 STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links); 1607 bz->reserved_bpages--; 1608 bz->active_bpages++; 1609 mtx_unlock(&bounce_lock); 1610 1611 if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { 1612 /* Page offset needs to be preserved. */ 1613 bpage->vaddr |= vaddr & PAGE_MASK; 1614 bpage->busaddr |= vaddr & PAGE_MASK; 1615 } 1616 bpage->datavaddr = vaddr; 1617 bpage->dataaddr = addr; 1618 bpage->datacount = size; 1619 STAILQ_INSERT_TAIL(&(map->bpages), bpage, links); 1620 return (bpage->busaddr); 1621} 1622 1623static void 1624free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage) 1625{ 1626 struct bus_dmamap *map; 1627 struct bounce_zone *bz; 1628 1629 bz = dmat->bounce_zone; 1630 bpage->datavaddr = 0; 1631 bpage->datacount = 0; 1632 if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { 1633 /* 1634 * Reset the bounce page to start at offset 0. Other uses 1635 * of this bounce page may need to store a full page of 1636 * data and/or assume it starts on a page boundary. 1637 */ 1638 bpage->vaddr &= ~PAGE_MASK; 1639 bpage->busaddr &= ~PAGE_MASK; 1640 } 1641 1642 mtx_lock(&bounce_lock); 1643 STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links); 1644 bz->free_bpages++; 1645 bz->active_bpages--; 1646 if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) { 1647 if (reserve_bounce_pages(map->dmat, map, 1) == 0) { 1648 STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links); 1649 STAILQ_INSERT_TAIL(&bounce_map_callbacklist, 1650 map, links); 1651 busdma_swi_pending = 1; 1652 bz->total_deferred++; 1653 swi_sched(vm_ih, 0); 1654 } 1655 } 1656 mtx_unlock(&bounce_lock); 1657} 1658 1659void 1660busdma_swi(void) 1661{ 1662 bus_dma_tag_t dmat; 1663 struct bus_dmamap *map; 1664 1665 mtx_lock(&bounce_lock); 1666 while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) { 1667 STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links); 1668 mtx_unlock(&bounce_lock); 1669 dmat = map->dmat; 1670 dmat->lockfunc(dmat->lockfuncarg, BUS_DMA_LOCK); 1671 bus_dmamap_load_mem(map->dmat, map, &map->mem, map->callback, 1672 map->callback_arg, BUS_DMA_WAITOK); 1673 dmat->lockfunc(dmat->lockfuncarg, BUS_DMA_UNLOCK); 1674 mtx_lock(&bounce_lock); 1675 } 1676 mtx_unlock(&bounce_lock); 1677} 1678