busdma_machdep-v6.c revision 252652
1/*- 2 * Copyright (c) 2012 Ian Lepore 3 * Copyright (c) 2010 Mark Tinguely 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 2002 Peter Grehan 6 * Copyright (c) 1997, 1998 Justin T. Gibbs. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions, and the following disclaimer, 14 * without modification, immediately at the beginning of the file. 15 * 2. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 22 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * From i386/busdma_machdep.c 191438 2009-04-23 20:24:19Z jhb 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: head/sys/arm/arm/busdma_machdep-v6.c 252652 2013-07-03 23:38:02Z gonzo $"); 35 36#define _ARM32_BUS_DMA_PRIVATE 37#include <sys/param.h> 38#include <sys/kdb.h> 39#include <ddb/ddb.h> 40#include <ddb/db_output.h> 41#include <sys/systm.h> 42#include <sys/malloc.h> 43#include <sys/bus.h> 44#include <sys/busdma_bufalloc.h> 45#include <sys/interrupt.h> 46#include <sys/kernel.h> 47#include <sys/ktr.h> 48#include <sys/lock.h> 49#include <sys/memdesc.h> 50#include <sys/proc.h> 51#include <sys/mutex.h> 52#include <sys/sysctl.h> 53#include <sys/uio.h> 54 55#include <vm/vm.h> 56#include <vm/vm_page.h> 57#include <vm/vm_map.h> 58#include <vm/vm_extern.h> 59#include <vm/vm_kern.h> 60 61#include <machine/atomic.h> 62#include <machine/bus.h> 63#include <machine/cpufunc.h> 64#include <machine/md_var.h> 65 66#define MAX_BPAGES 64 67#define BUS_DMA_COULD_BOUNCE BUS_DMA_BUS3 68#define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4 69 70#define FIX_DMAP_BUS_DMASYNC_POSTREAD 71 72struct bounce_zone; 73 74struct bus_dma_tag { 75 bus_dma_tag_t parent; 76 bus_size_t alignment; 77 bus_size_t boundary; 78 bus_addr_t lowaddr; 79 bus_addr_t highaddr; 80 bus_dma_filter_t *filter; 81 void *filterarg; 82 bus_size_t maxsize; 83 u_int nsegments; 84 bus_size_t maxsegsz; 85 int flags; 86 int ref_count; 87 int map_count; 88 bus_dma_lock_t *lockfunc; 89 void *lockfuncarg; 90 struct bounce_zone *bounce_zone; 91 /* 92 * DMA range for this tag. If the page doesn't fall within 93 * one of these ranges, an error is returned. The caller 94 * may then decide what to do with the transfer. If the 95 * range pointer is NULL, it is ignored. 96 */ 97 struct arm32_dma_range *ranges; 98 int _nranges; 99 /* 100 * Most tags need one or two segments, and can use the local tagsegs 101 * array. For tags with a larger limit, we'll allocate a bigger array 102 * on first use. 103 */ 104 bus_dma_segment_t *segments; 105 bus_dma_segment_t tagsegs[2]; 106 107 108}; 109 110struct bounce_page { 111 vm_offset_t vaddr; /* kva of bounce buffer */ 112 bus_addr_t busaddr; /* Physical address */ 113 vm_offset_t datavaddr; /* kva of client data */ 114 bus_addr_t dataaddr; /* client physical address */ 115 bus_size_t datacount; /* client data count */ 116 STAILQ_ENTRY(bounce_page) links; 117}; 118 119struct sync_list { 120 vm_offset_t vaddr; /* kva of bounce buffer */ 121 bus_addr_t busaddr; /* Physical address */ 122 bus_size_t datacount; /* client data count */ 123}; 124 125int busdma_swi_pending; 126 127struct bounce_zone { 128 STAILQ_ENTRY(bounce_zone) links; 129 STAILQ_HEAD(bp_list, bounce_page) bounce_page_list; 130 int total_bpages; 131 int free_bpages; 132 int reserved_bpages; 133 int active_bpages; 134 int total_bounced; 135 int total_deferred; 136 int map_count; 137 bus_size_t alignment; 138 bus_addr_t lowaddr; 139 char zoneid[8]; 140 char lowaddrid[20]; 141 struct sysctl_ctx_list sysctl_tree; 142 struct sysctl_oid *sysctl_tree_top; 143}; 144 145static struct mtx bounce_lock; 146static int total_bpages; 147static int busdma_zonecount; 148static STAILQ_HEAD(, bounce_zone) bounce_zone_list; 149 150SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters"); 151SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0, 152 "Total bounce pages"); 153 154struct bus_dmamap { 155 struct bp_list bpages; 156 int pagesneeded; 157 int pagesreserved; 158 bus_dma_tag_t dmat; 159 struct memdesc mem; 160 pmap_t pmap; 161 bus_dmamap_callback_t *callback; 162 void *callback_arg; 163 int flags; 164#define DMAMAP_COHERENT (1 << 0) 165 STAILQ_ENTRY(bus_dmamap) links; 166 int sync_count; 167 struct sync_list slist[]; 168}; 169 170static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist; 171static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist; 172 173static void init_bounce_pages(void *dummy); 174static int alloc_bounce_zone(bus_dma_tag_t dmat); 175static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages); 176static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 177 int commit); 178static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, 179 vm_offset_t vaddr, bus_addr_t addr, 180 bus_size_t size); 181static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage); 182int run_filter(bus_dma_tag_t dmat, bus_addr_t paddr); 183static void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 184 void *buf, bus_size_t buflen, int flags); 185static void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, 186 vm_paddr_t buf, bus_size_t buflen, int flags); 187static int _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 188 int flags); 189 190static busdma_bufalloc_t coherent_allocator; /* Cache of coherent buffers */ 191static busdma_bufalloc_t standard_allocator; /* Cache of standard buffers */ 192static void 193busdma_init(void *dummy) 194{ 195 int uma_flags; 196 197 uma_flags = 0; 198 199 /* Create a cache of buffers in standard (cacheable) memory. */ 200 standard_allocator = busdma_bufalloc_create("buffer", 201 arm_dcache_align, /* minimum_alignment */ 202 NULL, /* uma_alloc func */ 203 NULL, /* uma_free func */ 204 uma_flags); /* uma_zcreate_flags */ 205 206#ifdef INVARIANTS 207 /* 208 * Force UMA zone to allocate service structures like 209 * slabs using own allocator. uma_debug code performs 210 * atomic ops on uma_slab_t fields and safety of this 211 * operation is not guaranteed for write-back caches 212 */ 213 uma_flags = UMA_ZONE_OFFPAGE; 214#endif 215 /* 216 * Create a cache of buffers in uncacheable memory, to implement the 217 * BUS_DMA_COHERENT (and potentially BUS_DMA_NOCACHE) flag. 218 */ 219 coherent_allocator = busdma_bufalloc_create("coherent", 220 arm_dcache_align, /* minimum_alignment */ 221 busdma_bufalloc_alloc_uncacheable, 222 busdma_bufalloc_free_uncacheable, 223 uma_flags); /* uma_zcreate_flags */ 224} 225 226/* 227 * This init historically used SI_SUB_VM, but now the init code requires 228 * malloc(9) using M_DEVBUF memory, which is set up later than SI_SUB_VM, by 229 * SI_SUB_KMEM and SI_ORDER_SECOND, so we'll go right after that by using 230 * SI_SUB_KMEM and SI_ORDER_THIRD. 231 */ 232SYSINIT(busdma, SI_SUB_KMEM, SI_ORDER_THIRD, busdma_init, NULL); 233 234static __inline int 235_bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr) 236{ 237 int i; 238 for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) { 239 if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1]) 240 || (lowaddr < phys_avail[i] && 241 highaddr > phys_avail[i])) 242 return (1); 243 } 244 return (0); 245} 246 247static __inline struct arm32_dma_range * 248_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges, 249 bus_addr_t curaddr) 250{ 251 struct arm32_dma_range *dr; 252 int i; 253 254 for (i = 0, dr = ranges; i < nranges; i++, dr++) { 255 if (curaddr >= dr->dr_sysbase && 256 round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len)) 257 return (dr); 258 } 259 260 return (NULL); 261} 262 263/* 264 * Return true if a match is made. 265 * 266 * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'. 267 * 268 * If paddr is within the bounds of the dma tag then call the filter callback 269 * to check for a match, if there is no filter callback then assume a match. 270 */ 271int 272run_filter(bus_dma_tag_t dmat, bus_addr_t paddr) 273{ 274 int retval; 275 276 retval = 0; 277 278 do { 279 if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr) 280 || ((paddr & (dmat->alignment - 1)) != 0)) 281 && (dmat->filter == NULL 282 || (*dmat->filter)(dmat->filterarg, paddr) != 0)) 283 retval = 1; 284 285 dmat = dmat->parent; 286 } while (retval == 0 && dmat != NULL); 287 return (retval); 288} 289 290/* 291 * Convenience function for manipulating driver locks from busdma (during 292 * busdma_swi, for example). Drivers that don't provide their own locks 293 * should specify &Giant to dmat->lockfuncarg. Drivers that use their own 294 * non-mutex locking scheme don't have to use this at all. 295 */ 296void 297busdma_lock_mutex(void *arg, bus_dma_lock_op_t op) 298{ 299 struct mtx *dmtx; 300 301 dmtx = (struct mtx *)arg; 302 switch (op) { 303 case BUS_DMA_LOCK: 304 mtx_lock(dmtx); 305 break; 306 case BUS_DMA_UNLOCK: 307 mtx_unlock(dmtx); 308 break; 309 default: 310 panic("Unknown operation 0x%x for busdma_lock_mutex!", op); 311 } 312} 313 314/* 315 * dflt_lock should never get called. It gets put into the dma tag when 316 * lockfunc == NULL, which is only valid if the maps that are associated 317 * with the tag are meant to never be defered. 318 * XXX Should have a way to identify which driver is responsible here. 319 */ 320static void 321dflt_lock(void *arg, bus_dma_lock_op_t op) 322{ 323 panic("driver error: busdma dflt_lock called"); 324} 325 326/* 327 * Allocate a device specific dma_tag. 328 */ 329int 330bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, 331 bus_size_t boundary, bus_addr_t lowaddr, 332 bus_addr_t highaddr, bus_dma_filter_t *filter, 333 void *filterarg, bus_size_t maxsize, int nsegments, 334 bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, 335 void *lockfuncarg, bus_dma_tag_t *dmat) 336{ 337 bus_dma_tag_t newtag; 338 int error = 0; 339 340#if 0 341 if (!parent) 342 parent = arm_root_dma_tag; 343#endif 344 345 /* Basic sanity checking */ 346 if (boundary != 0 && boundary < maxsegsz) 347 maxsegsz = boundary; 348 349 /* Return a NULL tag on failure */ 350 *dmat = NULL; 351 352 if (maxsegsz == 0) { 353 return (EINVAL); 354 } 355 356 newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, 357 M_ZERO | M_NOWAIT); 358 if (newtag == NULL) { 359 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", 360 __func__, newtag, 0, error); 361 return (ENOMEM); 362 } 363 364 newtag->parent = parent; 365 newtag->alignment = alignment; 366 newtag->boundary = boundary; 367 newtag->lowaddr = trunc_page((vm_paddr_t)lowaddr) + (PAGE_SIZE - 1); 368 newtag->highaddr = trunc_page((vm_paddr_t)highaddr) + 369 (PAGE_SIZE - 1); 370 newtag->filter = filter; 371 newtag->filterarg = filterarg; 372 newtag->maxsize = maxsize; 373 newtag->nsegments = nsegments; 374 newtag->maxsegsz = maxsegsz; 375 newtag->flags = flags; 376 newtag->ref_count = 1; /* Count ourself */ 377 newtag->map_count = 0; 378 newtag->ranges = bus_dma_get_range(); 379 newtag->_nranges = bus_dma_get_range_nb(); 380 if (lockfunc != NULL) { 381 newtag->lockfunc = lockfunc; 382 newtag->lockfuncarg = lockfuncarg; 383 } else { 384 newtag->lockfunc = dflt_lock; 385 newtag->lockfuncarg = NULL; 386 } 387 /* 388 * If all the segments we need fit into the local tagsegs array, set the 389 * pointer now. Otherwise NULL the pointer and an array of segments 390 * will be allocated later, on first use. We don't pre-allocate now 391 * because some tags exist just to pass contraints to children in the 392 * device hierarchy, and they tend to use BUS_SPACE_UNRESTRICTED and we 393 * sure don't want to try to allocate an array for that. 394 */ 395 if (newtag->nsegments <= nitems(newtag->tagsegs)) 396 newtag->segments = newtag->tagsegs; 397 else 398 newtag->segments = NULL; 399 400 /* Take into account any restrictions imposed by our parent tag */ 401 if (parent != NULL) { 402 newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr); 403 newtag->highaddr = MAX(parent->highaddr, newtag->highaddr); 404 if (newtag->boundary == 0) 405 newtag->boundary = parent->boundary; 406 else if (parent->boundary != 0) 407 newtag->boundary = MIN(parent->boundary, 408 newtag->boundary); 409 if ((newtag->filter != NULL) || 410 ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0)) 411 newtag->flags |= BUS_DMA_COULD_BOUNCE; 412 if (newtag->filter == NULL) { 413 /* 414 * Short circuit looking at our parent directly 415 * since we have encapsulated all of its information 416 */ 417 newtag->filter = parent->filter; 418 newtag->filterarg = parent->filterarg; 419 newtag->parent = parent->parent; 420 } 421 if (newtag->parent != NULL) 422 atomic_add_int(&parent->ref_count, 1); 423 } 424 425 if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr) 426 || newtag->alignment > 1) 427 newtag->flags |= BUS_DMA_COULD_BOUNCE; 428 429 if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) && 430 (flags & BUS_DMA_ALLOCNOW) != 0) { 431 struct bounce_zone *bz; 432 433 /* Must bounce */ 434 435 if ((error = alloc_bounce_zone(newtag)) != 0) { 436 free(newtag, M_DEVBUF); 437 return (error); 438 } 439 bz = newtag->bounce_zone; 440 441 if (ptoa(bz->total_bpages) < maxsize) { 442 int pages; 443 444 pages = atop(maxsize) - bz->total_bpages; 445 446 /* Add pages to our bounce pool */ 447 if (alloc_bounce_pages(newtag, pages) < pages) 448 error = ENOMEM; 449 } 450 /* Performed initial allocation */ 451 newtag->flags |= BUS_DMA_MIN_ALLOC_COMP; 452 } else 453 newtag->bounce_zone = NULL; 454 455 if (error != 0) { 456 free(newtag, M_DEVBUF); 457 } else { 458 *dmat = newtag; 459 } 460 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", 461 __func__, newtag, (newtag != NULL ? newtag->flags : 0), error); 462 return (error); 463} 464 465int 466bus_dma_tag_destroy(bus_dma_tag_t dmat) 467{ 468 bus_dma_tag_t dmat_copy; 469 int error; 470 471 error = 0; 472 dmat_copy = dmat; 473 474 if (dmat != NULL) { 475 476 if (dmat->map_count != 0) { 477 error = EBUSY; 478 goto out; 479 } 480 481 while (dmat != NULL) { 482 bus_dma_tag_t parent; 483 484 parent = dmat->parent; 485 atomic_subtract_int(&dmat->ref_count, 1); 486 if (dmat->ref_count == 0) { 487 if (dmat->segments != NULL && 488 dmat->segments != dmat->tagsegs) 489 free(dmat->segments, M_DEVBUF); 490 free(dmat, M_DEVBUF); 491 /* 492 * Last reference count, so 493 * release our reference 494 * count on our parent. 495 */ 496 dmat = parent; 497 } else 498 dmat = NULL; 499 } 500 } 501out: 502 CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error); 503 return (error); 504} 505 506/* 507 * Allocate a handle for mapping from kva/uva/physical 508 * address space into bus device space. 509 */ 510int 511bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) 512{ 513 int mapsize; 514 int error; 515 516 error = 0; 517 518 mapsize = sizeof(**mapp) + (sizeof(struct sync_list) * dmat->nsegments); 519 *mapp = (bus_dmamap_t)malloc(mapsize, M_DEVBUF, M_NOWAIT | M_ZERO); 520 if (*mapp == NULL) { 521 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM); 522 return (ENOMEM); 523 } 524 (*mapp)->sync_count = 0; 525 526 if (dmat->segments == NULL) { 527 dmat->segments = (bus_dma_segment_t *)malloc( 528 sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF, 529 M_NOWAIT); 530 if (dmat->segments == NULL) { 531 CTR3(KTR_BUSDMA, "%s: tag %p error %d", 532 __func__, dmat, ENOMEM); 533 free(*mapp, M_DEVBUF); 534 *mapp = NULL; 535 return (ENOMEM); 536 } 537 } 538 /* 539 * Bouncing might be required if the driver asks for an active 540 * exclusion region, a data alignment that is stricter than 1, and/or 541 * an active address boundary. 542 */ 543 if (dmat->flags & BUS_DMA_COULD_BOUNCE) { 544 545 /* Must bounce */ 546 struct bounce_zone *bz; 547 int maxpages; 548 549 if (dmat->bounce_zone == NULL) { 550 if ((error = alloc_bounce_zone(dmat)) != 0) { 551 free(*mapp, M_DEVBUF); 552 *mapp = NULL; 553 return (error); 554 } 555 } 556 bz = dmat->bounce_zone; 557 558 /* Initialize the new map */ 559 STAILQ_INIT(&((*mapp)->bpages)); 560 561 /* 562 * Attempt to add pages to our pool on a per-instance 563 * basis up to a sane limit. 564 */ 565 maxpages = MAX_BPAGES; 566 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0 567 || (bz->map_count > 0 && bz->total_bpages < maxpages)) { 568 int pages; 569 570 pages = MAX(atop(dmat->maxsize), 1); 571 pages = MIN(maxpages - bz->total_bpages, pages); 572 pages = MAX(pages, 1); 573 if (alloc_bounce_pages(dmat, pages) < pages) 574 error = ENOMEM; 575 576 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) { 577 if (error == 0) 578 dmat->flags |= BUS_DMA_MIN_ALLOC_COMP; 579 } else { 580 error = 0; 581 } 582 } 583 bz->map_count++; 584 } 585 if (error == 0) 586 dmat->map_count++; 587 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 588 __func__, dmat, dmat->flags, error); 589 return (error); 590} 591 592/* 593 * Destroy a handle for mapping from kva/uva/physical 594 * address space into bus device space. 595 */ 596int 597bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) 598{ 599 if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) { 600 CTR3(KTR_BUSDMA, "%s: tag %p error %d", 601 __func__, dmat, EBUSY); 602 return (EBUSY); 603 } 604 if (dmat->bounce_zone) 605 dmat->bounce_zone->map_count--; 606 free(map, M_DEVBUF); 607 dmat->map_count--; 608 CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat); 609 return (0); 610} 611 612 613/* 614 * Allocate a piece of memory that can be efficiently mapped into 615 * bus device space based on the constraints lited in the dma tag. 616 * A dmamap to for use with dmamap_load is also allocated. 617 */ 618int 619bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, 620 bus_dmamap_t *mapp) 621{ 622 busdma_bufalloc_t ba; 623 struct busdma_bufzone *bufzone; 624 vm_memattr_t memattr; 625 int mflags; 626 int mapsize; 627 628 if (flags & BUS_DMA_NOWAIT) 629 mflags = M_NOWAIT; 630 else 631 mflags = M_WAITOK; 632 633 /* ARM non-snooping caches need a map for the VA cache sync structure */ 634 635 mapsize = sizeof(**mapp) + (sizeof(struct sync_list) * dmat->nsegments); 636 *mapp = (bus_dmamap_t)malloc(mapsize, M_DEVBUF, M_NOWAIT | M_ZERO); 637 if (*mapp == NULL) { 638 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 639 __func__, dmat, dmat->flags, ENOMEM); 640 return (ENOMEM); 641 } 642 643 (*mapp)->sync_count = 0; 644 645 if (dmat->segments == NULL) { 646 dmat->segments = (bus_dma_segment_t *)malloc( 647 sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF, 648 mflags); 649 if (dmat->segments == NULL) { 650 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 651 __func__, dmat, dmat->flags, ENOMEM); 652 free(*mapp, M_DEVBUF); 653 *mapp = NULL; 654 return (ENOMEM); 655 } 656 } 657 658 if (flags & BUS_DMA_ZERO) 659 mflags |= M_ZERO; 660 if (flags & BUS_DMA_COHERENT) { 661 memattr = VM_MEMATTR_UNCACHEABLE; 662 ba = coherent_allocator; 663 (*mapp)->flags |= DMAMAP_COHERENT; 664 } else { 665 memattr = VM_MEMATTR_DEFAULT; 666 ba = standard_allocator; 667 (*mapp)->flags = 0; 668 } 669#ifdef notyet 670 /* All buffers we allocate are cache-aligned. */ 671 map->flags |= DMAMAP_CACHE_ALIGNED; 672#endif 673 674 /* 675 * Try to find a bufzone in the allocator that holds a cache of buffers 676 * of the right size for this request. If the buffer is too big to be 677 * held in the allocator cache, this returns NULL. 678 */ 679 bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize); 680 681 /* 682 * Allocate the buffer from the uma(9) allocator if... 683 * - It's small enough to be in the allocator (bufzone not NULL). 684 * - The alignment constraint isn't larger than the allocation size 685 * (the allocator aligns buffers to their size boundaries). 686 * - There's no need to handle lowaddr/highaddr exclusion zones. 687 * else allocate non-contiguous pages if... 688 * - The page count that could get allocated doesn't exceed nsegments. 689 * - The alignment constraint isn't larger than a page boundary. 690 * - There are no boundary-crossing constraints. 691 * else allocate a block of contiguous pages because one or more of the 692 * constraints is something that only the contig allocator can fulfill. 693 */ 694 if (bufzone != NULL && dmat->alignment <= bufzone->size && 695 !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) { 696 *vaddr = uma_zalloc(bufzone->umazone, mflags); 697 } else if (dmat->nsegments >= btoc(dmat->maxsize) && 698 dmat->alignment <= PAGE_SIZE && dmat->boundary == 0) { 699 *vaddr = (void *)kmem_alloc_attr(kernel_map, dmat->maxsize, 700 mflags, 0, dmat->lowaddr, memattr); 701 } else { 702 *vaddr = (void *)kmem_alloc_contig(kernel_map, dmat->maxsize, 703 mflags, 0, dmat->lowaddr, dmat->alignment, dmat->boundary, 704 memattr); 705 } 706 707 708 if (*vaddr == NULL) { 709 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 710 __func__, dmat, dmat->flags, ENOMEM); 711 free(*mapp, M_DEVBUF); 712 *mapp = NULL; 713 return (ENOMEM); 714 } else if ((uintptr_t)*vaddr & (dmat->alignment - 1)) { 715 printf("bus_dmamem_alloc failed to align memory properly.\n"); 716 } 717 dmat->map_count++; 718 719 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 720 __func__, dmat, dmat->flags, 0); 721 return (0); 722} 723 724/* 725 * Free a piece of memory and it's allociated dmamap, that was allocated 726 * via bus_dmamem_alloc. Make the same choice for free/contigfree. 727 */ 728void 729bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) 730{ 731 struct busdma_bufzone *bufzone; 732 busdma_bufalloc_t ba; 733 734 if (map->flags & DMAMAP_COHERENT) 735 ba = coherent_allocator; 736 else 737 ba = standard_allocator; 738 739 /* Be careful not to access map from here on. */ 740 741 bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize); 742 743 if (bufzone != NULL && dmat->alignment <= bufzone->size && 744 !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) 745 uma_zfree(bufzone->umazone, vaddr); 746 else 747 kmem_free(kernel_map, (vm_offset_t)vaddr, dmat->maxsize); 748 749 dmat->map_count--; 750 free(map, M_DEVBUF); 751 CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags); 752} 753 754static void 755_bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf, 756 bus_size_t buflen, int flags) 757{ 758 bus_addr_t curaddr; 759 bus_size_t sgsize; 760 761 if (map->pagesneeded == 0) { 762 CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d" 763 " map= %p, pagesneeded= %d", 764 dmat->lowaddr, dmat->boundary, dmat->alignment, 765 map, map->pagesneeded); 766 /* 767 * Count the number of bounce pages 768 * needed in order to complete this transfer 769 */ 770 curaddr = buf; 771 while (buflen != 0) { 772 sgsize = MIN(buflen, dmat->maxsegsz); 773 if (run_filter(dmat, curaddr) != 0) { 774 sgsize = MIN(sgsize, PAGE_SIZE); 775 map->pagesneeded++; 776 } 777 curaddr += sgsize; 778 buflen -= sgsize; 779 } 780 CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded); 781 } 782} 783 784static void 785_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 786 void *buf, bus_size_t buflen, int flags) 787{ 788 vm_offset_t vaddr; 789 vm_offset_t vendaddr; 790 bus_addr_t paddr; 791 792 if (map->pagesneeded == 0) { 793 CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d" 794 " map= %p, pagesneeded= %d", 795 dmat->lowaddr, dmat->boundary, dmat->alignment, 796 map, map->pagesneeded); 797 /* 798 * Count the number of bounce pages 799 * needed in order to complete this transfer 800 */ 801 vaddr = (vm_offset_t)buf; 802 vendaddr = (vm_offset_t)buf + buflen; 803 804 while (vaddr < vendaddr) { 805 if (__predict_true(map->pmap == kernel_pmap)) 806 paddr = pmap_kextract(vaddr); 807 else 808 paddr = pmap_extract(map->pmap, vaddr); 809 if (run_filter(dmat, paddr) != 0) { 810 map->pagesneeded++; 811 } 812 vaddr += (PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK)); 813 814 } 815 CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded); 816 } 817} 818 819static int 820_bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags) 821{ 822 823 /* Reserve Necessary Bounce Pages */ 824 mtx_lock(&bounce_lock); 825 if (flags & BUS_DMA_NOWAIT) { 826 if (reserve_bounce_pages(dmat, map, 0) != 0) { 827 map->pagesneeded = 0; 828 mtx_unlock(&bounce_lock); 829 return (ENOMEM); 830 } 831 } else { 832 if (reserve_bounce_pages(dmat, map, 1) != 0) { 833 /* Queue us for resources */ 834 STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links); 835 mtx_unlock(&bounce_lock); 836 return (EINPROGRESS); 837 } 838 } 839 mtx_unlock(&bounce_lock); 840 841 return (0); 842} 843 844/* 845 * Add a single contiguous physical range to the segment list. 846 */ 847static int 848_bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr, 849 bus_size_t sgsize, bus_dma_segment_t *segs, int *segp) 850{ 851 bus_addr_t baddr, bmask; 852 int seg; 853 854 /* 855 * Make sure we don't cross any boundaries. 856 */ 857 bmask = ~(dmat->boundary - 1); 858 if (dmat->boundary > 0) { 859 baddr = (curaddr + dmat->boundary) & bmask; 860 if (sgsize > (baddr - curaddr)) 861 sgsize = (baddr - curaddr); 862 } 863 864 if (dmat->ranges) { 865 struct arm32_dma_range *dr; 866 867 dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges, 868 curaddr); 869 if (dr == NULL) { 870 _bus_dmamap_unload(dmat, map); 871 return (0); 872 } 873 /* 874 * In a valid DMA range. Translate the physical 875 * memory address to an address in the DMA window. 876 */ 877 curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase; 878 } 879 880 /* 881 * Insert chunk into a segment, coalescing with 882 * previous segment if possible. 883 */ 884 seg = *segp; 885 if (seg == -1) { 886 seg = 0; 887 segs[seg].ds_addr = curaddr; 888 segs[seg].ds_len = sgsize; 889 } else { 890 if (curaddr == segs[seg].ds_addr + segs[seg].ds_len && 891 (segs[seg].ds_len + sgsize) <= dmat->maxsegsz && 892 (dmat->boundary == 0 || 893 (segs[seg].ds_addr & bmask) == (curaddr & bmask))) 894 segs[seg].ds_len += sgsize; 895 else { 896 if (++seg >= dmat->nsegments) 897 return (0); 898 segs[seg].ds_addr = curaddr; 899 segs[seg].ds_len = sgsize; 900 } 901 } 902 *segp = seg; 903 return (sgsize); 904} 905 906/* 907 * Utility function to load a physical buffer. segp contains 908 * the starting segment on entrace, and the ending segment on exit. 909 */ 910int 911_bus_dmamap_load_phys(bus_dma_tag_t dmat, 912 bus_dmamap_t map, 913 vm_paddr_t buf, bus_size_t buflen, 914 int flags, 915 bus_dma_segment_t *segs, 916 int *segp) 917{ 918 bus_addr_t curaddr; 919 bus_size_t sgsize; 920 int error; 921 922 if (segs == NULL) 923 segs = dmat->segments; 924 925 if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) { 926 _bus_dmamap_count_phys(dmat, map, buf, buflen, flags); 927 if (map->pagesneeded != 0) { 928 error = _bus_dmamap_reserve_pages(dmat, map, flags); 929 if (error) 930 return (error); 931 } 932 } 933 934 while (buflen > 0) { 935 curaddr = buf; 936 sgsize = MIN(buflen, dmat->maxsegsz); 937 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) && 938 map->pagesneeded != 0 && run_filter(dmat, curaddr)) { 939 sgsize = MIN(sgsize, PAGE_SIZE); 940 curaddr = add_bounce_page(dmat, map, 0, curaddr, 941 sgsize); 942 } 943 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, 944 segp); 945 if (sgsize == 0) 946 break; 947 buf += sgsize; 948 buflen -= sgsize; 949 } 950 951 /* 952 * Did we fit? 953 */ 954 if (buflen != 0) { 955 _bus_dmamap_unload(dmat, map); 956 return (EFBIG); /* XXX better return value here? */ 957 } 958 return (0); 959} 960 961/* 962 * Utility function to load a linear buffer. segp contains 963 * the starting segment on entrace, and the ending segment on exit. 964 */ 965int 966_bus_dmamap_load_buffer(bus_dma_tag_t dmat, 967 bus_dmamap_t map, 968 void *buf, bus_size_t buflen, 969 pmap_t pmap, 970 int flags, 971 bus_dma_segment_t *segs, 972 int *segp) 973{ 974 bus_size_t sgsize; 975 bus_addr_t curaddr; 976 vm_offset_t vaddr; 977 struct sync_list *sl; 978 int error; 979 980 if (segs == NULL) 981 segs = dmat->segments; 982 983 map->pmap = pmap; 984 985 if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) { 986 _bus_dmamap_count_pages(dmat, map, buf, buflen, flags); 987 if (map->pagesneeded != 0) { 988 error = _bus_dmamap_reserve_pages(dmat, map, flags); 989 if (error) 990 return (error); 991 } 992 } 993 994 sl = NULL; 995 vaddr = (vm_offset_t)buf; 996 997 while (buflen > 0) { 998 /* 999 * Get the physical address for this segment. 1000 */ 1001 if (__predict_true(map->pmap == kernel_pmap)) 1002 curaddr = pmap_kextract(vaddr); 1003 else 1004 curaddr = pmap_extract(map->pmap, vaddr); 1005 1006 /* 1007 * Compute the segment size, and adjust counts. 1008 */ 1009 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK); 1010 if (sgsize > dmat->maxsegsz) 1011 sgsize = dmat->maxsegsz; 1012 if (buflen < sgsize) 1013 sgsize = buflen; 1014 1015 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) && 1016 map->pagesneeded != 0 && run_filter(dmat, curaddr)) { 1017 curaddr = add_bounce_page(dmat, map, vaddr, curaddr, 1018 sgsize); 1019 } else { 1020 sl = &map->slist[map->sync_count - 1]; 1021 if (map->sync_count == 0 || 1022#ifdef ARM_L2_PIPT 1023 curaddr != sl->busaddr + sl->datacount || 1024#endif 1025 vaddr != sl->vaddr + sl->datacount) { 1026 if (++map->sync_count > dmat->nsegments) 1027 goto cleanup; 1028 sl++; 1029 sl->vaddr = vaddr; 1030 sl->datacount = sgsize; 1031 sl->busaddr = curaddr; 1032 } else 1033 sl->datacount += sgsize; 1034 } 1035 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, 1036 segp); 1037 if (sgsize == 0) 1038 break; 1039 vaddr += sgsize; 1040 buflen -= sgsize; 1041 } 1042 1043cleanup: 1044 /* 1045 * Did we fit? 1046 */ 1047 if (buflen != 0) { 1048 _bus_dmamap_unload(dmat, map); 1049 return (EFBIG); /* XXX better return value here? */ 1050 } 1051 return (0); 1052} 1053 1054 1055void 1056__bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map, 1057 struct memdesc *mem, bus_dmamap_callback_t *callback, 1058 void *callback_arg) 1059{ 1060 1061 map->mem = *mem; 1062 map->dmat = dmat; 1063 map->callback = callback; 1064 map->callback_arg = callback_arg; 1065} 1066 1067bus_dma_segment_t * 1068_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map, 1069 bus_dma_segment_t *segs, int nsegs, int error) 1070{ 1071 1072 if (segs == NULL) 1073 segs = dmat->segments; 1074 return (segs); 1075} 1076 1077/* 1078 * Release the mapping held by map. 1079 */ 1080void 1081_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) 1082{ 1083 struct bounce_page *bpage; 1084 struct bounce_zone *bz; 1085 1086 if ((bz = dmat->bounce_zone) != NULL) { 1087 while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { 1088 STAILQ_REMOVE_HEAD(&map->bpages, links); 1089 free_bounce_page(dmat, bpage); 1090 } 1091 1092 bz = dmat->bounce_zone; 1093 bz->free_bpages += map->pagesreserved; 1094 bz->reserved_bpages -= map->pagesreserved; 1095 map->pagesreserved = 0; 1096 map->pagesneeded = 0; 1097 } 1098 map->sync_count = 0; 1099} 1100 1101#ifdef notyetbounceuser 1102 /* If busdma uses user pages, then the interrupt handler could 1103 * be use the kernel vm mapping. Both bounce pages and sync list 1104 * do not cross page boundaries. 1105 * Below is a rough sequence that a person would do to fix the 1106 * user page reference in the kernel vmspace. This would be 1107 * done in the dma post routine. 1108 */ 1109void 1110_bus_dmamap_fix_user(vm_offset_t buf, bus_size_t len, 1111 pmap_t pmap, int op) 1112{ 1113 bus_size_t sgsize; 1114 bus_addr_t curaddr; 1115 vm_offset_t va; 1116 1117 /* each synclist entry is contained within a single page. 1118 * 1119 * this would be needed if BUS_DMASYNC_POSTxxxx was implemented 1120 */ 1121 curaddr = pmap_extract(pmap, buf); 1122 va = pmap_dma_map(curaddr); 1123 switch (op) { 1124 case SYNC_USER_INV: 1125 cpu_dcache_wb_range(va, sgsize); 1126 break; 1127 1128 case SYNC_USER_COPYTO: 1129 bcopy((void *)va, (void *)bounce, sgsize); 1130 break; 1131 1132 case SYNC_USER_COPYFROM: 1133 bcopy((void *) bounce, (void *)va, sgsize); 1134 break; 1135 1136 default: 1137 break; 1138 } 1139 1140 pmap_dma_unmap(va); 1141} 1142#endif 1143 1144#ifdef ARM_L2_PIPT 1145#define l2cache_wb_range(va, pa, size) cpu_l2cache_wb_range(pa, size) 1146#define l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range(pa, size) 1147#define l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range(pa, size) 1148#else 1149#define l2cache_wb_range(va, pa, size) cpu_l2cache_wb_range(va, size) 1150#define l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range(va, size) 1151#define l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range(va, size) 1152#endif 1153 1154void 1155_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) 1156{ 1157 struct bounce_page *bpage; 1158 struct sync_list *sl, *end; 1159 bus_size_t len, unalign; 1160 vm_offset_t buf, ebuf; 1161#ifdef FIX_DMAP_BUS_DMASYNC_POSTREAD 1162 vm_offset_t bbuf; 1163 char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align]; 1164#endif 1165 /* 1166 * If the buffer was from user space, it is possible that this is not 1167 * the same vm map, especially on a POST operation. It's not clear that 1168 * dma on userland buffers can work at all right now, certainly not if a 1169 * partial cacheline flush has to be handled. To be safe, until we're 1170 * able to test direct userland dma, panic on a map mismatch. 1171 */ 1172 if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { 1173 if (!pmap_dmap_iscurrent(map->pmap)) 1174 panic("_bus_dmamap_sync: wrong user map for bounce sync."); 1175 /* Handle data bouncing. */ 1176 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " 1177 "performing bounce", __func__, dmat, dmat->flags, op); 1178 1179 if (op & BUS_DMASYNC_PREWRITE) { 1180 while (bpage != NULL) { 1181 if (bpage->datavaddr != 0) 1182 bcopy((void *)bpage->datavaddr, 1183 (void *)bpage->vaddr, 1184 bpage->datacount); 1185 else 1186 physcopyout(bpage->dataaddr, 1187 (void *)bpage->vaddr, 1188 bpage->datacount); 1189 cpu_dcache_wb_range((vm_offset_t)bpage->vaddr, 1190 bpage->datacount); 1191 l2cache_wb_range((vm_offset_t)bpage->vaddr, 1192 (vm_offset_t)bpage->busaddr, 1193 bpage->datacount); 1194 bpage = STAILQ_NEXT(bpage, links); 1195 } 1196 dmat->bounce_zone->total_bounced++; 1197 } 1198 1199 if (op & BUS_DMASYNC_POSTREAD) { 1200 cpu_dcache_inv_range((vm_offset_t)bpage->vaddr, 1201 bpage->datacount); 1202 l2cache_inv_range((vm_offset_t)bpage->vaddr, 1203 (vm_offset_t)bpage->busaddr, 1204 bpage->datacount); 1205 while (bpage != NULL) { 1206 vm_offset_t startv; 1207 vm_paddr_t startp; 1208 int len; 1209 1210 startv = bpage->vaddr &~ arm_dcache_align_mask; 1211 startp = bpage->busaddr &~ arm_dcache_align_mask; 1212 len = bpage->datacount; 1213 1214 if (startv != bpage->vaddr) 1215 len += bpage->vaddr & arm_dcache_align_mask; 1216 if (len & arm_dcache_align_mask) 1217 len = (len - 1218 (len & arm_dcache_align_mask)) + 1219 arm_dcache_align; 1220 cpu_dcache_inv_range(startv, len); 1221 l2cache_inv_range(startv, startp, len); 1222 if (bpage->datavaddr != 0) 1223 bcopy((void *)bpage->vaddr, 1224 (void *)bpage->datavaddr, 1225 bpage->datacount); 1226 else 1227 physcopyin((void *)bpage->vaddr, 1228 bpage->dataaddr, 1229 bpage->datacount); 1230 bpage = STAILQ_NEXT(bpage, links); 1231 } 1232 dmat->bounce_zone->total_bounced++; 1233 } 1234 } 1235 if (map->flags & DMAMAP_COHERENT) 1236 return; 1237 1238 if (map->sync_count != 0) { 1239 if (!pmap_dmap_iscurrent(map->pmap)) 1240 panic("_bus_dmamap_sync: wrong user map for sync."); 1241 /* ARM caches are not self-snooping for dma */ 1242 1243 sl = &map->slist[0]; 1244 end = &map->slist[map->sync_count]; 1245 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " 1246 "performing sync", __func__, dmat, dmat->flags, op); 1247 1248 switch (op) { 1249 case BUS_DMASYNC_PREWRITE: 1250 while (sl != end) { 1251 cpu_dcache_wb_range(sl->vaddr, sl->datacount); 1252 l2cache_wb_range(sl->vaddr, sl->busaddr, 1253 sl->datacount); 1254 sl++; 1255 } 1256 break; 1257 1258 case BUS_DMASYNC_PREREAD: 1259 while (sl != end) { 1260 /* write back the unaligned portions */ 1261 vm_paddr_t physaddr = sl->busaddr, ephysaddr; 1262 buf = sl->vaddr; 1263 len = sl->datacount; 1264 ebuf = buf + len; /* end of buffer */ 1265 ephysaddr = physaddr + len; 1266 unalign = buf & arm_dcache_align_mask; 1267 if (unalign) { 1268 /* wbinv leading fragment */ 1269 buf &= ~arm_dcache_align_mask; 1270 physaddr &= ~arm_dcache_align_mask; 1271 cpu_dcache_wbinv_range(buf, 1272 arm_dcache_align); 1273 l2cache_wbinv_range(buf, physaddr, 1274 arm_dcache_align); 1275 buf += arm_dcache_align; 1276 physaddr += arm_dcache_align; 1277 /* number byte in buffer wbinv */ 1278 unalign = arm_dcache_align - unalign; 1279 if (len > unalign) 1280 len -= unalign; 1281 else 1282 len = 0; 1283 } 1284 unalign = ebuf & arm_dcache_align_mask; 1285 if (ebuf > buf && unalign) { 1286 /* wbinv trailing fragment */ 1287 len -= unalign; 1288 ebuf -= unalign; 1289 ephysaddr -= unalign; 1290 cpu_dcache_wbinv_range(ebuf, 1291 arm_dcache_align); 1292 l2cache_wbinv_range(ebuf, ephysaddr, 1293 arm_dcache_align); 1294 } 1295 if (ebuf > buf) { 1296 cpu_dcache_inv_range(buf, len); 1297 l2cache_inv_range(buf, physaddr, len); 1298 } 1299 sl++; 1300 } 1301 break; 1302 1303 case BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD: 1304 while (sl != end) { 1305 cpu_dcache_wbinv_range(sl->vaddr, sl->datacount); 1306 l2cache_wbinv_range(sl->vaddr, 1307 sl->busaddr, sl->datacount); 1308 sl++; 1309 } 1310 break; 1311 1312#ifdef FIX_DMAP_BUS_DMASYNC_POSTREAD 1313 case BUS_DMASYNC_POSTREAD: 1314 while (sl != end) { 1315 /* write back the unaligned portions */ 1316 vm_paddr_t physaddr; 1317 register_t s = 0; 1318 1319 buf = sl->vaddr; 1320 len = sl->datacount; 1321 physaddr = sl->busaddr; 1322 bbuf = buf & ~arm_dcache_align_mask; 1323 ebuf = buf + len; 1324 physaddr = physaddr & ~arm_dcache_align_mask; 1325 1326 1327 if ((buf & arm_dcache_align_mask) || 1328 (ebuf & arm_dcache_align_mask)) { 1329 s = intr_disable(); 1330 unalign = buf & arm_dcache_align_mask; 1331 if (unalign) { 1332 memcpy(_tmp_cl, (void *)bbuf, unalign); 1333 len += unalign; /* inv entire cache line */ 1334 } 1335 1336 unalign = ebuf & arm_dcache_align_mask; 1337 if (unalign) { 1338 unalign = arm_dcache_align - unalign; 1339 memcpy(_tmp_clend, (void *)ebuf, unalign); 1340 len += unalign; /* inv entire cache line */ 1341 } 1342 } 1343 1344 /* inv are cache length aligned */ 1345 cpu_dcache_inv_range(bbuf, len); 1346 l2cache_inv_range(bbuf, physaddr, len); 1347 1348 if ((buf & arm_dcache_align_mask) || 1349 (ebuf & arm_dcache_align_mask)) { 1350 unalign = (vm_offset_t)buf & arm_dcache_align_mask; 1351 if (unalign) 1352 memcpy((void *)bbuf, _tmp_cl, unalign); 1353 1354 unalign = ebuf & arm_dcache_align_mask; 1355 if (unalign) 1356 memcpy((void *)ebuf, _tmp_clend, 1357 arm_dcache_align - unalign); 1358 1359 intr_restore(s); 1360 } 1361 sl++; 1362 } 1363 break; 1364#endif /* FIX_DMAP_BUS_DMASYNC_POSTREAD */ 1365 1366 default: 1367 break; 1368 } 1369 } 1370} 1371 1372static void 1373init_bounce_pages(void *dummy __unused) 1374{ 1375 1376 total_bpages = 0; 1377 STAILQ_INIT(&bounce_zone_list); 1378 STAILQ_INIT(&bounce_map_waitinglist); 1379 STAILQ_INIT(&bounce_map_callbacklist); 1380 mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF); 1381} 1382SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL); 1383 1384static struct sysctl_ctx_list * 1385busdma_sysctl_tree(struct bounce_zone *bz) 1386{ 1387 return (&bz->sysctl_tree); 1388} 1389 1390static struct sysctl_oid * 1391busdma_sysctl_tree_top(struct bounce_zone *bz) 1392{ 1393 return (bz->sysctl_tree_top); 1394} 1395 1396static int 1397alloc_bounce_zone(bus_dma_tag_t dmat) 1398{ 1399 struct bounce_zone *bz; 1400 1401 /* Check to see if we already have a suitable zone */ 1402 STAILQ_FOREACH(bz, &bounce_zone_list, links) { 1403 if ((dmat->alignment <= bz->alignment) 1404 && (dmat->lowaddr >= bz->lowaddr)) { 1405 dmat->bounce_zone = bz; 1406 return (0); 1407 } 1408 } 1409 1410 if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF, 1411 M_NOWAIT | M_ZERO)) == NULL) 1412 return (ENOMEM); 1413 1414 STAILQ_INIT(&bz->bounce_page_list); 1415 bz->free_bpages = 0; 1416 bz->reserved_bpages = 0; 1417 bz->active_bpages = 0; 1418 bz->lowaddr = dmat->lowaddr; 1419 bz->alignment = MAX(dmat->alignment, PAGE_SIZE); 1420 bz->map_count = 0; 1421 snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount); 1422 busdma_zonecount++; 1423 snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr); 1424 STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links); 1425 dmat->bounce_zone = bz; 1426 1427 sysctl_ctx_init(&bz->sysctl_tree); 1428 bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree, 1429 SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid, 1430 CTLFLAG_RD, 0, ""); 1431 if (bz->sysctl_tree_top == NULL) { 1432 sysctl_ctx_free(&bz->sysctl_tree); 1433 return (0); /* XXX error code? */ 1434 } 1435 1436 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1437 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1438 "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0, 1439 "Total bounce pages"); 1440 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1441 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1442 "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0, 1443 "Free bounce pages"); 1444 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1445 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1446 "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0, 1447 "Reserved bounce pages"); 1448 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1449 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1450 "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0, 1451 "Active bounce pages"); 1452 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1453 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1454 "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0, 1455 "Total bounce requests"); 1456 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1457 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1458 "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0, 1459 "Total bounce requests that were deferred"); 1460 SYSCTL_ADD_STRING(busdma_sysctl_tree(bz), 1461 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1462 "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, ""); 1463 SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1464 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1465 "alignment", CTLFLAG_RD, &bz->alignment, 0, ""); 1466 1467 return (0); 1468} 1469 1470static int 1471alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages) 1472{ 1473 struct bounce_zone *bz; 1474 int count; 1475 1476 bz = dmat->bounce_zone; 1477 count = 0; 1478 while (numpages > 0) { 1479 struct bounce_page *bpage; 1480 1481 bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF, 1482 M_NOWAIT | M_ZERO); 1483 1484 if (bpage == NULL) 1485 break; 1486 bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF, 1487 M_NOWAIT, 0ul, 1488 bz->lowaddr, 1489 PAGE_SIZE, 1490 0); 1491 if (bpage->vaddr == 0) { 1492 free(bpage, M_DEVBUF); 1493 break; 1494 } 1495 bpage->busaddr = pmap_kextract(bpage->vaddr); 1496 mtx_lock(&bounce_lock); 1497 STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links); 1498 total_bpages++; 1499 bz->total_bpages++; 1500 bz->free_bpages++; 1501 mtx_unlock(&bounce_lock); 1502 count++; 1503 numpages--; 1504 } 1505 return (count); 1506} 1507 1508static int 1509reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit) 1510{ 1511 struct bounce_zone *bz; 1512 int pages; 1513 1514 mtx_assert(&bounce_lock, MA_OWNED); 1515 bz = dmat->bounce_zone; 1516 pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved); 1517 if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages)) 1518 return (map->pagesneeded - (map->pagesreserved + pages)); 1519 bz->free_bpages -= pages; 1520 bz->reserved_bpages += pages; 1521 map->pagesreserved += pages; 1522 pages = map->pagesneeded - map->pagesreserved; 1523 1524 return (pages); 1525} 1526 1527static bus_addr_t 1528add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr, 1529 bus_addr_t addr, bus_size_t size) 1530{ 1531 struct bounce_zone *bz; 1532 struct bounce_page *bpage; 1533 1534 KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag")); 1535 KASSERT(map != NULL, 1536 ("add_bounce_page: bad map %p", map)); 1537 1538 bz = dmat->bounce_zone; 1539 if (map->pagesneeded == 0) 1540 panic("add_bounce_page: map doesn't need any pages"); 1541 map->pagesneeded--; 1542 1543 if (map->pagesreserved == 0) 1544 panic("add_bounce_page: map doesn't need any pages"); 1545 map->pagesreserved--; 1546 1547 mtx_lock(&bounce_lock); 1548 bpage = STAILQ_FIRST(&bz->bounce_page_list); 1549 if (bpage == NULL) 1550 panic("add_bounce_page: free page list is empty"); 1551 1552 STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links); 1553 bz->reserved_bpages--; 1554 bz->active_bpages++; 1555 mtx_unlock(&bounce_lock); 1556 1557 if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { 1558 /* Page offset needs to be preserved. */ 1559 bpage->vaddr |= vaddr & PAGE_MASK; 1560 bpage->busaddr |= vaddr & PAGE_MASK; 1561 } 1562 bpage->datavaddr = vaddr; 1563 bpage->dataaddr = addr; 1564 bpage->datacount = size; 1565 STAILQ_INSERT_TAIL(&(map->bpages), bpage, links); 1566 return (bpage->busaddr); 1567} 1568 1569static void 1570free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage) 1571{ 1572 struct bus_dmamap *map; 1573 struct bounce_zone *bz; 1574 1575 bz = dmat->bounce_zone; 1576 bpage->datavaddr = 0; 1577 bpage->datacount = 0; 1578 if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { 1579 /* 1580 * Reset the bounce page to start at offset 0. Other uses 1581 * of this bounce page may need to store a full page of 1582 * data and/or assume it starts on a page boundary. 1583 */ 1584 bpage->vaddr &= ~PAGE_MASK; 1585 bpage->busaddr &= ~PAGE_MASK; 1586 } 1587 1588 mtx_lock(&bounce_lock); 1589 STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links); 1590 bz->free_bpages++; 1591 bz->active_bpages--; 1592 if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) { 1593 if (reserve_bounce_pages(map->dmat, map, 1) == 0) { 1594 STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links); 1595 STAILQ_INSERT_TAIL(&bounce_map_callbacklist, 1596 map, links); 1597 busdma_swi_pending = 1; 1598 bz->total_deferred++; 1599 swi_sched(vm_ih, 0); 1600 } 1601 } 1602 mtx_unlock(&bounce_lock); 1603} 1604 1605void 1606busdma_swi(void) 1607{ 1608 bus_dma_tag_t dmat; 1609 struct bus_dmamap *map; 1610 1611 mtx_lock(&bounce_lock); 1612 while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) { 1613 STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links); 1614 mtx_unlock(&bounce_lock); 1615 dmat = map->dmat; 1616 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK); 1617 bus_dmamap_load_mem(map->dmat, map, &map->mem, map->callback, 1618 map->callback_arg, BUS_DMA_WAITOK); 1619 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK); 1620 mtx_lock(&bounce_lock); 1621 } 1622 mtx_unlock(&bounce_lock); 1623} 1624