busdma_machdep-v6.c revision 274538
1239268Sgonzo/*- 2244469Scognet * Copyright (c) 2012 Ian Lepore 3239268Sgonzo * Copyright (c) 2010 Mark Tinguely 4239268Sgonzo * Copyright (c) 2004 Olivier Houchard 5239268Sgonzo * Copyright (c) 2002 Peter Grehan 6239268Sgonzo * Copyright (c) 1997, 1998 Justin T. Gibbs. 7239268Sgonzo * All rights reserved. 8239268Sgonzo * 9239268Sgonzo * Redistribution and use in source and binary forms, with or without 10239268Sgonzo * modification, are permitted provided that the following conditions 11239268Sgonzo * are met: 12239268Sgonzo * 1. Redistributions of source code must retain the above copyright 13239268Sgonzo * notice, this list of conditions, and the following disclaimer, 14239268Sgonzo * without modification, immediately at the beginning of the file. 15239268Sgonzo * 2. The name of the author may not be used to endorse or promote products 16239268Sgonzo * derived from this software without specific prior written permission. 17239268Sgonzo * 18239268Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19239268Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20239268Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21239268Sgonzo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 22239268Sgonzo * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23239268Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24239268Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25239268Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26239268Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27239268Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28239268Sgonzo * SUCH DAMAGE. 29239268Sgonzo * 30239268Sgonzo * From i386/busdma_machdep.c 191438 2009-04-23 20:24:19Z jhb 31239268Sgonzo */ 32239268Sgonzo 33239268Sgonzo#include <sys/cdefs.h> 34239268Sgonzo__FBSDID("$FreeBSD: head/sys/arm/arm/busdma_machdep-v6.c 274538 2014-11-15 03:39:58Z ian $"); 35239268Sgonzo 36239268Sgonzo#define _ARM32_BUS_DMA_PRIVATE 37239268Sgonzo#include <sys/param.h> 38239268Sgonzo#include <sys/kdb.h> 39239268Sgonzo#include <ddb/ddb.h> 40239268Sgonzo#include <ddb/db_output.h> 41239268Sgonzo#include <sys/systm.h> 42239268Sgonzo#include <sys/malloc.h> 43239268Sgonzo#include <sys/bus.h> 44244469Scognet#include <sys/busdma_bufalloc.h> 45269321Sian#include <sys/counter.h> 46239268Sgonzo#include <sys/interrupt.h> 47239268Sgonzo#include <sys/kernel.h> 48239268Sgonzo#include <sys/ktr.h> 49239268Sgonzo#include <sys/lock.h> 50246713Skib#include <sys/memdesc.h> 51239268Sgonzo#include <sys/proc.h> 52239268Sgonzo#include <sys/mutex.h> 53246713Skib#include <sys/sysctl.h> 54239268Sgonzo#include <sys/uio.h> 55239268Sgonzo 56239268Sgonzo#include <vm/vm.h> 57239268Sgonzo#include <vm/vm_page.h> 58239268Sgonzo#include <vm/vm_map.h> 59244469Scognet#include <vm/vm_extern.h> 60244469Scognet#include <vm/vm_kern.h> 61239268Sgonzo 62239268Sgonzo#include <machine/atomic.h> 63239268Sgonzo#include <machine/bus.h> 64239268Sgonzo#include <machine/cpufunc.h> 65239268Sgonzo#include <machine/md_var.h> 66239268Sgonzo 67239268Sgonzo#define MAX_BPAGES 64 68269216Sian#define MAX_DMA_SEGMENTS 4096 69269207Sian#define BUS_DMA_EXCL_BOUNCE BUS_DMA_BUS2 70269207Sian#define BUS_DMA_ALIGN_BOUNCE BUS_DMA_BUS3 71269207Sian#define BUS_DMA_COULD_BOUNCE (BUS_DMA_EXCL_BOUNCE | BUS_DMA_ALIGN_BOUNCE) 72239268Sgonzo#define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4 73239268Sgonzo 74239268Sgonzostruct bounce_zone; 75239268Sgonzo 76239268Sgonzostruct bus_dma_tag { 77239268Sgonzo bus_dma_tag_t parent; 78239268Sgonzo bus_size_t alignment; 79239268Sgonzo bus_size_t boundary; 80239268Sgonzo bus_addr_t lowaddr; 81239268Sgonzo bus_addr_t highaddr; 82239268Sgonzo bus_dma_filter_t *filter; 83239268Sgonzo void *filterarg; 84239268Sgonzo bus_size_t maxsize; 85239268Sgonzo u_int nsegments; 86239268Sgonzo bus_size_t maxsegsz; 87239268Sgonzo int flags; 88239268Sgonzo int ref_count; 89239268Sgonzo int map_count; 90239268Sgonzo bus_dma_lock_t *lockfunc; 91239268Sgonzo void *lockfuncarg; 92239268Sgonzo struct bounce_zone *bounce_zone; 93239268Sgonzo /* 94239268Sgonzo * DMA range for this tag. If the page doesn't fall within 95239268Sgonzo * one of these ranges, an error is returned. The caller 96239268Sgonzo * may then decide what to do with the transfer. If the 97239268Sgonzo * range pointer is NULL, it is ignored. 98239268Sgonzo */ 99239268Sgonzo struct arm32_dma_range *ranges; 100239268Sgonzo int _nranges; 101239268Sgonzo}; 102239268Sgonzo 103239268Sgonzostruct bounce_page { 104239268Sgonzo vm_offset_t vaddr; /* kva of bounce buffer */ 105239268Sgonzo bus_addr_t busaddr; /* Physical address */ 106239268Sgonzo vm_offset_t datavaddr; /* kva of client data */ 107246713Skib bus_addr_t dataaddr; /* client physical address */ 108239268Sgonzo bus_size_t datacount; /* client data count */ 109239268Sgonzo STAILQ_ENTRY(bounce_page) links; 110239268Sgonzo}; 111239268Sgonzo 112239268Sgonzostruct sync_list { 113239268Sgonzo vm_offset_t vaddr; /* kva of bounce buffer */ 114239268Sgonzo bus_addr_t busaddr; /* Physical address */ 115239268Sgonzo bus_size_t datacount; /* client data count */ 116239268Sgonzo}; 117239268Sgonzo 118239268Sgonzoint busdma_swi_pending; 119239268Sgonzo 120239268Sgonzostruct bounce_zone { 121239268Sgonzo STAILQ_ENTRY(bounce_zone) links; 122239268Sgonzo STAILQ_HEAD(bp_list, bounce_page) bounce_page_list; 123239268Sgonzo int total_bpages; 124239268Sgonzo int free_bpages; 125239268Sgonzo int reserved_bpages; 126239268Sgonzo int active_bpages; 127239268Sgonzo int total_bounced; 128239268Sgonzo int total_deferred; 129239268Sgonzo int map_count; 130239268Sgonzo bus_size_t alignment; 131239268Sgonzo bus_addr_t lowaddr; 132239268Sgonzo char zoneid[8]; 133239268Sgonzo char lowaddrid[20]; 134239268Sgonzo struct sysctl_ctx_list sysctl_tree; 135239268Sgonzo struct sysctl_oid *sysctl_tree_top; 136239268Sgonzo}; 137239268Sgonzo 138239268Sgonzostatic struct mtx bounce_lock; 139239268Sgonzostatic int total_bpages; 140239268Sgonzostatic int busdma_zonecount; 141269217Sianstatic uint32_t tags_total; 142269217Sianstatic uint32_t maps_total; 143269217Sianstatic uint32_t maps_dmamem; 144269217Sianstatic uint32_t maps_coherent; 145269321Sianstatic counter_u64_t maploads_total; 146269321Sianstatic counter_u64_t maploads_bounced; 147269321Sianstatic counter_u64_t maploads_coherent; 148269321Sianstatic counter_u64_t maploads_dmamem; 149269321Sianstatic counter_u64_t maploads_mbuf; 150269321Sianstatic counter_u64_t maploads_physmem; 151269217Sian 152239268Sgonzostatic STAILQ_HEAD(, bounce_zone) bounce_zone_list; 153239268Sgonzo 154239268SgonzoSYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters"); 155269217SianSYSCTL_UINT(_hw_busdma, OID_AUTO, tags_total, CTLFLAG_RD, &tags_total, 0, 156269321Sian "Number of active tags"); 157269217SianSYSCTL_UINT(_hw_busdma, OID_AUTO, maps_total, CTLFLAG_RD, &maps_total, 0, 158269321Sian "Number of active maps"); 159269217SianSYSCTL_UINT(_hw_busdma, OID_AUTO, maps_dmamem, CTLFLAG_RD, &maps_dmamem, 0, 160269321Sian "Number of active maps for bus_dmamem_alloc buffers"); 161269217SianSYSCTL_UINT(_hw_busdma, OID_AUTO, maps_coherent, CTLFLAG_RD, &maps_coherent, 0, 162269321Sian "Number of active maps with BUS_DMA_COHERENT flag set"); 163269321SianSYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_total, CTLFLAG_RD, 164269321Sian &maploads_total, "Number of load operations performed"); 165269321SianSYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_bounced, CTLFLAG_RD, 166269321Sian &maploads_bounced, "Number of load operations that used bounce buffers"); 167269321SianSYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_coherent, CTLFLAG_RD, 168269321Sian &maploads_dmamem, "Number of load operations on BUS_DMA_COHERENT memory"); 169269321SianSYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_dmamem, CTLFLAG_RD, 170269321Sian &maploads_dmamem, "Number of load operations on bus_dmamem_alloc buffers"); 171269321SianSYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_mbuf, CTLFLAG_RD, 172269321Sian &maploads_mbuf, "Number of load operations for mbufs"); 173269321SianSYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_physmem, CTLFLAG_RD, 174269321Sian &maploads_physmem, "Number of load operations on physical buffers"); 175239268SgonzoSYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0, 176269321Sian "Total bounce pages"); 177239268Sgonzo 178239268Sgonzostruct bus_dmamap { 179239268Sgonzo struct bp_list bpages; 180239268Sgonzo int pagesneeded; 181239268Sgonzo int pagesreserved; 182239268Sgonzo bus_dma_tag_t dmat; 183246713Skib struct memdesc mem; 184239268Sgonzo pmap_t pmap; 185239268Sgonzo bus_dmamap_callback_t *callback; 186239268Sgonzo void *callback_arg; 187244469Scognet int flags; 188244469Scognet#define DMAMAP_COHERENT (1 << 0) 189269212Sian#define DMAMAP_DMAMEM_ALLOC (1 << 1) 190269212Sian#define DMAMAP_MBUF (1 << 2) 191239268Sgonzo STAILQ_ENTRY(bus_dmamap) links; 192269216Sian bus_dma_segment_t *segments; 193246713Skib int sync_count; 194246713Skib struct sync_list slist[]; 195239268Sgonzo}; 196239268Sgonzo 197239268Sgonzostatic STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist; 198239268Sgonzostatic STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist; 199239268Sgonzo 200239268Sgonzostatic void init_bounce_pages(void *dummy); 201239268Sgonzostatic int alloc_bounce_zone(bus_dma_tag_t dmat); 202239268Sgonzostatic int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages); 203239268Sgonzostatic int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 204239268Sgonzo int commit); 205239268Sgonzostatic bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, 206246713Skib vm_offset_t vaddr, bus_addr_t addr, 207246713Skib bus_size_t size); 208239268Sgonzostatic void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage); 209246713Skibstatic void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 210239268Sgonzo void *buf, bus_size_t buflen, int flags); 211246713Skibstatic void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, 212246713Skib vm_paddr_t buf, bus_size_t buflen, int flags); 213246713Skibstatic int _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 214246713Skib int flags); 215239268Sgonzo 216244469Scognetstatic busdma_bufalloc_t coherent_allocator; /* Cache of coherent buffers */ 217244469Scognetstatic busdma_bufalloc_t standard_allocator; /* Cache of standard buffers */ 218244469Scognetstatic void 219244469Scognetbusdma_init(void *dummy) 220244469Scognet{ 221252652Sgonzo int uma_flags; 222244469Scognet 223269321Sian maploads_total = counter_u64_alloc(M_WAITOK); 224269321Sian maploads_bounced = counter_u64_alloc(M_WAITOK); 225269321Sian maploads_coherent = counter_u64_alloc(M_WAITOK); 226269321Sian maploads_dmamem = counter_u64_alloc(M_WAITOK); 227269321Sian maploads_mbuf = counter_u64_alloc(M_WAITOK); 228269321Sian maploads_physmem = counter_u64_alloc(M_WAITOK); 229269321Sian 230252652Sgonzo uma_flags = 0; 231252652Sgonzo 232244469Scognet /* Create a cache of buffers in standard (cacheable) memory. */ 233244469Scognet standard_allocator = busdma_bufalloc_create("buffer", 234244469Scognet arm_dcache_align, /* minimum_alignment */ 235244469Scognet NULL, /* uma_alloc func */ 236244469Scognet NULL, /* uma_free func */ 237252652Sgonzo uma_flags); /* uma_zcreate_flags */ 238244469Scognet 239252652Sgonzo#ifdef INVARIANTS 240252652Sgonzo /* 241252652Sgonzo * Force UMA zone to allocate service structures like 242252652Sgonzo * slabs using own allocator. uma_debug code performs 243252652Sgonzo * atomic ops on uma_slab_t fields and safety of this 244252652Sgonzo * operation is not guaranteed for write-back caches 245252652Sgonzo */ 246252652Sgonzo uma_flags = UMA_ZONE_OFFPAGE; 247252652Sgonzo#endif 248244469Scognet /* 249244469Scognet * Create a cache of buffers in uncacheable memory, to implement the 250244469Scognet * BUS_DMA_COHERENT (and potentially BUS_DMA_NOCACHE) flag. 251244469Scognet */ 252244469Scognet coherent_allocator = busdma_bufalloc_create("coherent", 253244469Scognet arm_dcache_align, /* minimum_alignment */ 254244469Scognet busdma_bufalloc_alloc_uncacheable, 255244469Scognet busdma_bufalloc_free_uncacheable, 256252652Sgonzo uma_flags); /* uma_zcreate_flags */ 257244469Scognet} 258244469Scognet 259244469Scognet/* 260244469Scognet * This init historically used SI_SUB_VM, but now the init code requires 261269321Sian * malloc(9) using M_DEVBUF memory and the pcpu zones for counter(9), which get 262269321Sian * set up by SI_SUB_KMEM and SI_ORDER_LAST, so we'll go right after that by 263269321Sian * using SI_SUB_KMEM+1. 264244469Scognet */ 265269321SianSYSINIT(busdma, SI_SUB_KMEM+1, SI_ORDER_FIRST, busdma_init, NULL); 266244469Scognet 267269136Sian/* 268269136Sian * This routine checks the exclusion zone constraints from a tag against the 269269136Sian * physical RAM available on the machine. If a tag specifies an exclusion zone 270269136Sian * but there's no RAM in that zone, then we avoid allocating resources to bounce 271269136Sian * a request, and we can use any memory allocator (as opposed to needing 272269136Sian * kmem_alloc_contig() just because it can allocate pages in an address range). 273269136Sian * 274269136Sian * Most tags have BUS_SPACE_MAXADDR or BUS_SPACE_MAXADDR_32BIT (they are the 275269136Sian * same value on 32-bit architectures) as their lowaddr constraint, and we can't 276269136Sian * possibly have RAM at an address higher than the highest address we can 277269136Sian * express, so we take a fast out. 278269136Sian */ 279269206Sianstatic int 280269207Sianexclusion_bounce_check(vm_offset_t lowaddr, vm_offset_t highaddr) 281239268Sgonzo{ 282239268Sgonzo int i; 283269136Sian 284269136Sian if (lowaddr >= BUS_SPACE_MAXADDR) 285269136Sian return (0); 286269136Sian 287239268Sgonzo for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) { 288269209Sian if ((lowaddr >= phys_avail[i] && lowaddr < phys_avail[i + 1]) || 289269209Sian (lowaddr < phys_avail[i] && highaddr >= phys_avail[i])) 290239268Sgonzo return (1); 291239268Sgonzo } 292239268Sgonzo return (0); 293239268Sgonzo} 294239268Sgonzo 295269206Sian/* 296269207Sian * Return true if the tag has an exclusion zone that could lead to bouncing. 297269207Sian */ 298269207Sianstatic __inline int 299269207Sianexclusion_bounce(bus_dma_tag_t dmat) 300269207Sian{ 301269207Sian 302269207Sian return (dmat->flags & BUS_DMA_EXCL_BOUNCE); 303269207Sian} 304269207Sian 305269207Sian/* 306269206Sian * Return true if the given address does not fall on the alignment boundary. 307269206Sian */ 308269206Sianstatic __inline int 309269206Sianalignment_bounce(bus_dma_tag_t dmat, bus_addr_t addr) 310269206Sian{ 311269206Sian 312269206Sian return (addr & (dmat->alignment - 1)); 313269206Sian} 314269206Sian 315269206Sian/* 316269212Sian * Return true if the DMA should bounce because the start or end does not fall 317269212Sian * on a cacheline boundary (which would require a partial cacheline flush). 318269212Sian * COHERENT memory doesn't trigger cacheline flushes. Memory allocated by 319269212Sian * bus_dmamem_alloc() is always aligned to cacheline boundaries, and there's a 320269212Sian * strict rule that such memory cannot be accessed by the CPU while DMA is in 321269212Sian * progress (or by multiple DMA engines at once), so that it's always safe to do 322269212Sian * full cacheline flushes even if that affects memory outside the range of a 323269212Sian * given DMA operation that doesn't involve the full allocated buffer. If we're 324269212Sian * mapping an mbuf, that follows the same rules as a buffer we allocated. 325269206Sian */ 326269206Sianstatic __inline int 327269212Siancacheline_bounce(bus_dmamap_t map, bus_addr_t addr, bus_size_t size) 328269206Sian{ 329269206Sian 330269212Sian if (map->flags & (DMAMAP_DMAMEM_ALLOC | DMAMAP_COHERENT | DMAMAP_MBUF)) 331269212Sian return (0); 332269206Sian return ((addr | size) & arm_dcache_align_mask); 333269206Sian} 334269206Sian 335269211Sian/* 336269211Sian * Return true if we might need to bounce the DMA described by addr and size. 337269211Sian * 338269211Sian * This is used to quick-check whether we need to do the more expensive work of 339269211Sian * checking the DMA page-by-page looking for alignment and exclusion bounces. 340269211Sian * 341269211Sian * Note that the addr argument might be either virtual or physical. It doesn't 342269211Sian * matter because we only look at the low-order bits, which are the same in both 343269211Sian * address spaces. 344269211Sian */ 345269211Sianstatic __inline int 346269211Sianmight_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t addr, 347269211Sian bus_size_t size) 348269211Sian{ 349269212Sian return ((dmat->flags & BUS_DMA_EXCL_BOUNCE) || 350269212Sian alignment_bounce(dmat, addr) || 351269212Sian cacheline_bounce(map, addr, size)); 352269211Sian} 353269211Sian 354269211Sian/* 355269211Sian * Return true if we must bounce the DMA described by paddr and size. 356269211Sian * 357269211Sian * Bouncing can be triggered by DMA that doesn't begin and end on cacheline 358269211Sian * boundaries, or doesn't begin on an alignment boundary, or falls within the 359269211Sian * exclusion zone of any tag in the ancestry chain. 360269211Sian * 361269211Sian * For exclusions, walk the chain of tags comparing paddr to the exclusion zone 362269211Sian * within each tag. If the tag has a filter function, use it to decide whether 363269211Sian * the DMA needs to bounce, otherwise any DMA within the zone bounces. 364269211Sian */ 365269211Sianstatic int 366269211Sianmust_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr, 367269211Sian bus_size_t size) 368269211Sian{ 369269211Sian 370269212Sian if (cacheline_bounce(map, paddr, size)) 371269211Sian return (1); 372269211Sian 373269211Sian /* 374269211Sian * The tag already contains ancestors' alignment restrictions so this 375269211Sian * check doesn't need to be inside the loop. 376269211Sian */ 377269211Sian if (alignment_bounce(dmat, paddr)) 378269211Sian return (1); 379269211Sian 380269211Sian /* 381269211Sian * Even though each tag has an exclusion zone that is a superset of its 382269211Sian * own and all its ancestors' exclusions, the exclusion zone of each tag 383269211Sian * up the chain must be checked within the loop, because the busdma 384269211Sian * rules say the filter function is called only when the address lies 385269211Sian * within the low-highaddr range of the tag that filterfunc belongs to. 386269211Sian */ 387269211Sian while (dmat != NULL && exclusion_bounce(dmat)) { 388269211Sian if ((paddr >= dmat->lowaddr && paddr <= dmat->highaddr) && 389269211Sian (dmat->filter == NULL || 390269211Sian dmat->filter(dmat->filterarg, paddr) != 0)) 391269211Sian return (1); 392269211Sian dmat = dmat->parent; 393269211Sian } 394269211Sian 395269211Sian return (0); 396269211Sian} 397269211Sian 398239268Sgonzostatic __inline struct arm32_dma_range * 399239268Sgonzo_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges, 400239268Sgonzo bus_addr_t curaddr) 401239268Sgonzo{ 402239268Sgonzo struct arm32_dma_range *dr; 403239268Sgonzo int i; 404239268Sgonzo 405239268Sgonzo for (i = 0, dr = ranges; i < nranges; i++, dr++) { 406239268Sgonzo if (curaddr >= dr->dr_sysbase && 407239268Sgonzo round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len)) 408239268Sgonzo return (dr); 409239268Sgonzo } 410239268Sgonzo 411239268Sgonzo return (NULL); 412239268Sgonzo} 413239268Sgonzo 414239268Sgonzo/* 415239268Sgonzo * Convenience function for manipulating driver locks from busdma (during 416239268Sgonzo * busdma_swi, for example). Drivers that don't provide their own locks 417239268Sgonzo * should specify &Giant to dmat->lockfuncarg. Drivers that use their own 418239268Sgonzo * non-mutex locking scheme don't have to use this at all. 419239268Sgonzo */ 420239268Sgonzovoid 421239268Sgonzobusdma_lock_mutex(void *arg, bus_dma_lock_op_t op) 422239268Sgonzo{ 423239268Sgonzo struct mtx *dmtx; 424239268Sgonzo 425239268Sgonzo dmtx = (struct mtx *)arg; 426239268Sgonzo switch (op) { 427239268Sgonzo case BUS_DMA_LOCK: 428239268Sgonzo mtx_lock(dmtx); 429239268Sgonzo break; 430239268Sgonzo case BUS_DMA_UNLOCK: 431239268Sgonzo mtx_unlock(dmtx); 432239268Sgonzo break; 433239268Sgonzo default: 434239268Sgonzo panic("Unknown operation 0x%x for busdma_lock_mutex!", op); 435239268Sgonzo } 436239268Sgonzo} 437239268Sgonzo 438239268Sgonzo/* 439239268Sgonzo * dflt_lock should never get called. It gets put into the dma tag when 440239268Sgonzo * lockfunc == NULL, which is only valid if the maps that are associated 441239268Sgonzo * with the tag are meant to never be defered. 442239268Sgonzo * XXX Should have a way to identify which driver is responsible here. 443239268Sgonzo */ 444239268Sgonzostatic void 445239268Sgonzodflt_lock(void *arg, bus_dma_lock_op_t op) 446239268Sgonzo{ 447239268Sgonzo panic("driver error: busdma dflt_lock called"); 448239268Sgonzo} 449239268Sgonzo 450239268Sgonzo/* 451239268Sgonzo * Allocate a device specific dma_tag. 452239268Sgonzo */ 453239268Sgonzoint 454239268Sgonzobus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, 455239268Sgonzo bus_size_t boundary, bus_addr_t lowaddr, 456239268Sgonzo bus_addr_t highaddr, bus_dma_filter_t *filter, 457239268Sgonzo void *filterarg, bus_size_t maxsize, int nsegments, 458239268Sgonzo bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, 459239268Sgonzo void *lockfuncarg, bus_dma_tag_t *dmat) 460239268Sgonzo{ 461239268Sgonzo bus_dma_tag_t newtag; 462239268Sgonzo int error = 0; 463239268Sgonzo 464239268Sgonzo#if 0 465239268Sgonzo if (!parent) 466239268Sgonzo parent = arm_root_dma_tag; 467239268Sgonzo#endif 468239268Sgonzo 469274191Sian /* Basic sanity checking. */ 470274536Sian KASSERT(boundary == 0 || powerof2(boundary), 471274191Sian ("dma tag boundary %lu, must be a power of 2", boundary)); 472274191Sian KASSERT(boundary == 0 || boundary >= maxsegsz, 473274191Sian ("dma tag boundary %lu is < maxsegsz %lu\n", boundary, maxsegsz)); 474274536Sian KASSERT(alignment != 0 && powerof2(alignment), 475274191Sian ("dma tag alignment %lu, must be non-zero power of 2", alignment)); 476274191Sian KASSERT(maxsegsz != 0, ("dma tag maxsegsz must not be zero")); 477239268Sgonzo 478239268Sgonzo /* Return a NULL tag on failure */ 479239268Sgonzo *dmat = NULL; 480239268Sgonzo 481239268Sgonzo newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, 482239268Sgonzo M_ZERO | M_NOWAIT); 483239268Sgonzo if (newtag == NULL) { 484239268Sgonzo CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", 485239268Sgonzo __func__, newtag, 0, error); 486239268Sgonzo return (ENOMEM); 487239268Sgonzo } 488239268Sgonzo 489239268Sgonzo newtag->parent = parent; 490239268Sgonzo newtag->alignment = alignment; 491239268Sgonzo newtag->boundary = boundary; 492239268Sgonzo newtag->lowaddr = trunc_page((vm_paddr_t)lowaddr) + (PAGE_SIZE - 1); 493239268Sgonzo newtag->highaddr = trunc_page((vm_paddr_t)highaddr) + 494239268Sgonzo (PAGE_SIZE - 1); 495239268Sgonzo newtag->filter = filter; 496239268Sgonzo newtag->filterarg = filterarg; 497239268Sgonzo newtag->maxsize = maxsize; 498239268Sgonzo newtag->nsegments = nsegments; 499239268Sgonzo newtag->maxsegsz = maxsegsz; 500239268Sgonzo newtag->flags = flags; 501239268Sgonzo newtag->ref_count = 1; /* Count ourself */ 502239268Sgonzo newtag->map_count = 0; 503239268Sgonzo newtag->ranges = bus_dma_get_range(); 504239268Sgonzo newtag->_nranges = bus_dma_get_range_nb(); 505239268Sgonzo if (lockfunc != NULL) { 506239268Sgonzo newtag->lockfunc = lockfunc; 507239268Sgonzo newtag->lockfuncarg = lockfuncarg; 508239268Sgonzo } else { 509239268Sgonzo newtag->lockfunc = dflt_lock; 510239268Sgonzo newtag->lockfuncarg = NULL; 511239268Sgonzo } 512239268Sgonzo 513239268Sgonzo /* Take into account any restrictions imposed by our parent tag */ 514239268Sgonzo if (parent != NULL) { 515239268Sgonzo newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr); 516239268Sgonzo newtag->highaddr = MAX(parent->highaddr, newtag->highaddr); 517269210Sian newtag->alignment = MAX(parent->alignment, newtag->alignment); 518269207Sian newtag->flags |= parent->flags & BUS_DMA_COULD_BOUNCE; 519239268Sgonzo if (newtag->boundary == 0) 520239268Sgonzo newtag->boundary = parent->boundary; 521239268Sgonzo else if (parent->boundary != 0) 522239268Sgonzo newtag->boundary = MIN(parent->boundary, 523239268Sgonzo newtag->boundary); 524239268Sgonzo if (newtag->filter == NULL) { 525239268Sgonzo /* 526269207Sian * Short circuit to looking at our parent directly 527239268Sgonzo * since we have encapsulated all of its information 528239268Sgonzo */ 529239268Sgonzo newtag->filter = parent->filter; 530239268Sgonzo newtag->filterarg = parent->filterarg; 531239268Sgonzo newtag->parent = parent->parent; 532239268Sgonzo } 533239268Sgonzo if (newtag->parent != NULL) 534239268Sgonzo atomic_add_int(&parent->ref_count, 1); 535239268Sgonzo } 536239268Sgonzo 537269207Sian if (exclusion_bounce_check(newtag->lowaddr, newtag->highaddr)) 538269207Sian newtag->flags |= BUS_DMA_EXCL_BOUNCE; 539269207Sian if (alignment_bounce(newtag, 1)) 540269207Sian newtag->flags |= BUS_DMA_ALIGN_BOUNCE; 541239268Sgonzo 542256637Sian /* 543256637Sian * Any request can auto-bounce due to cacheline alignment, in addition 544256637Sian * to any alignment or boundary specifications in the tag, so if the 545256637Sian * ALLOCNOW flag is set, there's always work to do. 546256637Sian */ 547254061Scognet if ((flags & BUS_DMA_ALLOCNOW) != 0) { 548239268Sgonzo struct bounce_zone *bz; 549256637Sian /* 550256637Sian * Round size up to a full page, and add one more page because 551256637Sian * there can always be one more boundary crossing than the 552256637Sian * number of pages in a transfer. 553256637Sian */ 554256637Sian maxsize = roundup2(maxsize, PAGE_SIZE) + PAGE_SIZE; 555256637Sian 556239268Sgonzo if ((error = alloc_bounce_zone(newtag)) != 0) { 557239268Sgonzo free(newtag, M_DEVBUF); 558239268Sgonzo return (error); 559239268Sgonzo } 560239268Sgonzo bz = newtag->bounce_zone; 561239268Sgonzo 562239268Sgonzo if (ptoa(bz->total_bpages) < maxsize) { 563239268Sgonzo int pages; 564239268Sgonzo 565239268Sgonzo pages = atop(maxsize) - bz->total_bpages; 566239268Sgonzo 567239268Sgonzo /* Add pages to our bounce pool */ 568239268Sgonzo if (alloc_bounce_pages(newtag, pages) < pages) 569239268Sgonzo error = ENOMEM; 570239268Sgonzo } 571239268Sgonzo /* Performed initial allocation */ 572239268Sgonzo newtag->flags |= BUS_DMA_MIN_ALLOC_COMP; 573239268Sgonzo } else 574239268Sgonzo newtag->bounce_zone = NULL; 575239268Sgonzo 576239268Sgonzo if (error != 0) { 577239268Sgonzo free(newtag, M_DEVBUF); 578239268Sgonzo } else { 579269217Sian atomic_add_32(&tags_total, 1); 580239268Sgonzo *dmat = newtag; 581239268Sgonzo } 582239268Sgonzo CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", 583239268Sgonzo __func__, newtag, (newtag != NULL ? newtag->flags : 0), error); 584239268Sgonzo return (error); 585239268Sgonzo} 586239268Sgonzo 587239268Sgonzoint 588239268Sgonzobus_dma_tag_destroy(bus_dma_tag_t dmat) 589239268Sgonzo{ 590239268Sgonzo bus_dma_tag_t dmat_copy; 591239268Sgonzo int error; 592239268Sgonzo 593239268Sgonzo error = 0; 594239268Sgonzo dmat_copy = dmat; 595239268Sgonzo 596239268Sgonzo if (dmat != NULL) { 597239268Sgonzo 598239268Sgonzo if (dmat->map_count != 0) { 599239268Sgonzo error = EBUSY; 600239268Sgonzo goto out; 601239268Sgonzo } 602239268Sgonzo 603239268Sgonzo while (dmat != NULL) { 604239268Sgonzo bus_dma_tag_t parent; 605239268Sgonzo 606239268Sgonzo parent = dmat->parent; 607239268Sgonzo atomic_subtract_int(&dmat->ref_count, 1); 608239268Sgonzo if (dmat->ref_count == 0) { 609269217Sian atomic_subtract_32(&tags_total, 1); 610239268Sgonzo free(dmat, M_DEVBUF); 611239268Sgonzo /* 612239268Sgonzo * Last reference count, so 613239268Sgonzo * release our reference 614239268Sgonzo * count on our parent. 615239268Sgonzo */ 616239268Sgonzo dmat = parent; 617239268Sgonzo } else 618239268Sgonzo dmat = NULL; 619239268Sgonzo } 620239268Sgonzo } 621239268Sgonzoout: 622239268Sgonzo CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error); 623239268Sgonzo return (error); 624239268Sgonzo} 625239268Sgonzo 626254061Scognetstatic int allocate_bz_and_pages(bus_dma_tag_t dmat, bus_dmamap_t mapp) 627254061Scognet{ 628254061Scognet struct bounce_zone *bz; 629254061Scognet int maxpages; 630254061Scognet int error; 631254061Scognet 632254061Scognet if (dmat->bounce_zone == NULL) 633254061Scognet if ((error = alloc_bounce_zone(dmat)) != 0) 634254061Scognet return (error); 635254061Scognet bz = dmat->bounce_zone; 636254061Scognet /* Initialize the new map */ 637254061Scognet STAILQ_INIT(&(mapp->bpages)); 638254061Scognet 639254061Scognet /* 640256637Sian * Attempt to add pages to our pool on a per-instance basis up to a sane 641256637Sian * limit. Even if the tag isn't flagged as COULD_BOUNCE due to 642256637Sian * alignment and boundary constraints, it could still auto-bounce due to 643256637Sian * cacheline alignment, which requires at most two bounce pages. 644254061Scognet */ 645254229Scognet if (dmat->flags & BUS_DMA_COULD_BOUNCE) 646254229Scognet maxpages = MAX_BPAGES; 647254229Scognet else 648256637Sian maxpages = 2 * bz->map_count; 649269209Sian if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0 || 650269209Sian (bz->map_count > 0 && bz->total_bpages < maxpages)) { 651254061Scognet int pages; 652254061Scognet 653256637Sian pages = atop(roundup2(dmat->maxsize, PAGE_SIZE)) + 1; 654254061Scognet pages = MIN(maxpages - bz->total_bpages, pages); 655256637Sian pages = MAX(pages, 2); 656254061Scognet if (alloc_bounce_pages(dmat, pages) < pages) 657254061Scognet return (ENOMEM); 658254061Scognet 659254061Scognet if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) 660254061Scognet dmat->flags |= BUS_DMA_MIN_ALLOC_COMP; 661254061Scognet } 662254061Scognet bz->map_count++; 663254061Scognet return (0); 664254061Scognet} 665254061Scognet 666269216Sianstatic bus_dmamap_t 667269216Sianallocate_map(bus_dma_tag_t dmat, int mflags) 668269216Sian{ 669269216Sian int mapsize, segsize; 670269216Sian bus_dmamap_t map; 671269216Sian 672269216Sian /* 673269216Sian * Allocate the map. The map structure ends with an embedded 674269216Sian * variable-sized array of sync_list structures. Following that 675269216Sian * we allocate enough extra space to hold the array of bus_dma_segments. 676269216Sian */ 677269216Sian KASSERT(dmat->nsegments <= MAX_DMA_SEGMENTS, 678269216Sian ("cannot allocate %u dma segments (max is %u)", 679269216Sian dmat->nsegments, MAX_DMA_SEGMENTS)); 680269216Sian segsize = sizeof(struct bus_dma_segment) * dmat->nsegments; 681269216Sian mapsize = sizeof(*map) + sizeof(struct sync_list) * dmat->nsegments; 682269216Sian map = malloc(mapsize + segsize, M_DEVBUF, mflags | M_ZERO); 683269216Sian if (map == NULL) { 684269216Sian CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM); 685269216Sian return (NULL); 686269216Sian } 687269216Sian map->segments = (bus_dma_segment_t *)((uintptr_t)map + mapsize); 688269216Sian return (map); 689269216Sian} 690269216Sian 691239268Sgonzo/* 692239268Sgonzo * Allocate a handle for mapping from kva/uva/physical 693239268Sgonzo * address space into bus device space. 694239268Sgonzo */ 695239268Sgonzoint 696239268Sgonzobus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) 697239268Sgonzo{ 698269214Sian bus_dmamap_t map; 699254061Scognet int error = 0; 700239268Sgonzo 701269216Sian *mapp = map = allocate_map(dmat, M_NOWAIT); 702269214Sian if (map == NULL) { 703239268Sgonzo CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM); 704239268Sgonzo return (ENOMEM); 705239268Sgonzo } 706239268Sgonzo 707239268Sgonzo /* 708269216Sian * Bouncing might be required if the driver asks for an exclusion 709269216Sian * region, a data alignment that is stricter than 1, or DMA that begins 710269216Sian * or ends with a partial cacheline. Whether bouncing will actually 711269216Sian * happen can't be known until mapping time, but we need to pre-allocate 712269216Sian * resources now because we might not be allowed to at mapping time. 713239268Sgonzo */ 714269214Sian error = allocate_bz_and_pages(dmat, map); 715254061Scognet if (error != 0) { 716269214Sian free(map, M_DEVBUF); 717254061Scognet *mapp = NULL; 718254061Scognet return (error); 719239268Sgonzo } 720269217Sian if (map->flags & DMAMAP_COHERENT) 721269217Sian atomic_add_32(&maps_coherent, 1); 722269217Sian atomic_add_32(&maps_total, 1); 723273599Sloos dmat->map_count++; 724273599Sloos 725269217Sian return (0); 726239268Sgonzo} 727239268Sgonzo 728239268Sgonzo/* 729239268Sgonzo * Destroy a handle for mapping from kva/uva/physical 730239268Sgonzo * address space into bus device space. 731239268Sgonzo */ 732239268Sgonzoint 733239268Sgonzobus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) 734239268Sgonzo{ 735246713Skib if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) { 736239268Sgonzo CTR3(KTR_BUSDMA, "%s: tag %p error %d", 737239268Sgonzo __func__, dmat, EBUSY); 738239268Sgonzo return (EBUSY); 739239268Sgonzo } 740239268Sgonzo if (dmat->bounce_zone) 741239268Sgonzo dmat->bounce_zone->map_count--; 742269217Sian if (map->flags & DMAMAP_COHERENT) 743269217Sian atomic_subtract_32(&maps_coherent, 1); 744269217Sian atomic_subtract_32(&maps_total, 1); 745239268Sgonzo free(map, M_DEVBUF); 746239268Sgonzo dmat->map_count--; 747239268Sgonzo CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat); 748239268Sgonzo return (0); 749239268Sgonzo} 750239268Sgonzo 751239268Sgonzo 752239268Sgonzo/* 753239268Sgonzo * Allocate a piece of memory that can be efficiently mapped into 754239268Sgonzo * bus device space based on the constraints lited in the dma tag. 755239268Sgonzo * A dmamap to for use with dmamap_load is also allocated. 756239268Sgonzo */ 757239268Sgonzoint 758239268Sgonzobus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, 759239268Sgonzo bus_dmamap_t *mapp) 760239268Sgonzo{ 761244469Scognet busdma_bufalloc_t ba; 762244469Scognet struct busdma_bufzone *bufzone; 763269214Sian bus_dmamap_t map; 764244469Scognet vm_memattr_t memattr; 765244469Scognet int mflags; 766239268Sgonzo 767239268Sgonzo if (flags & BUS_DMA_NOWAIT) 768239268Sgonzo mflags = M_NOWAIT; 769239268Sgonzo else 770239268Sgonzo mflags = M_WAITOK; 771269216Sian if (flags & BUS_DMA_ZERO) 772269216Sian mflags |= M_ZERO; 773239268Sgonzo 774269216Sian *mapp = map = allocate_map(dmat, mflags); 775269214Sian if (map == NULL) { 776239268Sgonzo CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 777239268Sgonzo __func__, dmat, dmat->flags, ENOMEM); 778239268Sgonzo return (ENOMEM); 779239268Sgonzo } 780269214Sian map->flags = DMAMAP_DMAMEM_ALLOC; 781239268Sgonzo 782269216Sian /* Choose a busdma buffer allocator based on memory type flags. */ 783244469Scognet if (flags & BUS_DMA_COHERENT) { 784244469Scognet memattr = VM_MEMATTR_UNCACHEABLE; 785244469Scognet ba = coherent_allocator; 786269214Sian map->flags |= DMAMAP_COHERENT; 787244469Scognet } else { 788244469Scognet memattr = VM_MEMATTR_DEFAULT; 789244469Scognet ba = standard_allocator; 790244469Scognet } 791239268Sgonzo 792244469Scognet /* 793244469Scognet * Try to find a bufzone in the allocator that holds a cache of buffers 794244469Scognet * of the right size for this request. If the buffer is too big to be 795244469Scognet * held in the allocator cache, this returns NULL. 796239268Sgonzo */ 797244469Scognet bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize); 798244469Scognet 799244469Scognet /* 800244469Scognet * Allocate the buffer from the uma(9) allocator if... 801244469Scognet * - It's small enough to be in the allocator (bufzone not NULL). 802244469Scognet * - The alignment constraint isn't larger than the allocation size 803244469Scognet * (the allocator aligns buffers to their size boundaries). 804244469Scognet * - There's no need to handle lowaddr/highaddr exclusion zones. 805244469Scognet * else allocate non-contiguous pages if... 806244469Scognet * - The page count that could get allocated doesn't exceed nsegments. 807244469Scognet * - The alignment constraint isn't larger than a page boundary. 808244469Scognet * - There are no boundary-crossing constraints. 809244469Scognet * else allocate a block of contiguous pages because one or more of the 810244469Scognet * constraints is something that only the contig allocator can fulfill. 811244469Scognet */ 812244469Scognet if (bufzone != NULL && dmat->alignment <= bufzone->size && 813269207Sian !exclusion_bounce(dmat)) { 814244469Scognet *vaddr = uma_zalloc(bufzone->umazone, mflags); 815244469Scognet } else if (dmat->nsegments >= btoc(dmat->maxsize) && 816244469Scognet dmat->alignment <= PAGE_SIZE && dmat->boundary == 0) { 817254025Sjeff *vaddr = (void *)kmem_alloc_attr(kernel_arena, dmat->maxsize, 818244469Scognet mflags, 0, dmat->lowaddr, memattr); 819239268Sgonzo } else { 820254025Sjeff *vaddr = (void *)kmem_alloc_contig(kernel_arena, dmat->maxsize, 821244469Scognet mflags, 0, dmat->lowaddr, dmat->alignment, dmat->boundary, 822244469Scognet memattr); 823239268Sgonzo } 824244469Scognet 825244469Scognet 826239268Sgonzo if (*vaddr == NULL) { 827239268Sgonzo CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 828239268Sgonzo __func__, dmat, dmat->flags, ENOMEM); 829269214Sian free(map, M_DEVBUF); 830239268Sgonzo *mapp = NULL; 831239268Sgonzo return (ENOMEM); 832239268Sgonzo } 833269217Sian if (map->flags & DMAMAP_COHERENT) 834269217Sian atomic_add_32(&maps_coherent, 1); 835269217Sian atomic_add_32(&maps_dmamem, 1); 836269217Sian atomic_add_32(&maps_total, 1); 837239268Sgonzo dmat->map_count++; 838239268Sgonzo 839239268Sgonzo CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 840239268Sgonzo __func__, dmat, dmat->flags, 0); 841239268Sgonzo return (0); 842239268Sgonzo} 843239268Sgonzo 844239268Sgonzo/* 845239268Sgonzo * Free a piece of memory and it's allociated dmamap, that was allocated 846239268Sgonzo * via bus_dmamem_alloc. Make the same choice for free/contigfree. 847239268Sgonzo */ 848239268Sgonzovoid 849239268Sgonzobus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) 850239268Sgonzo{ 851244469Scognet struct busdma_bufzone *bufzone; 852244469Scognet busdma_bufalloc_t ba; 853239268Sgonzo 854244469Scognet if (map->flags & DMAMAP_COHERENT) 855244469Scognet ba = coherent_allocator; 856244469Scognet else 857244469Scognet ba = standard_allocator; 858244469Scognet 859244469Scognet /* Be careful not to access map from here on. */ 860244469Scognet 861244469Scognet bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize); 862244469Scognet 863244469Scognet if (bufzone != NULL && dmat->alignment <= bufzone->size && 864269207Sian !exclusion_bounce(dmat)) 865244469Scognet uma_zfree(bufzone->umazone, vaddr); 866244469Scognet else 867254025Sjeff kmem_free(kernel_arena, (vm_offset_t)vaddr, dmat->maxsize); 868244469Scognet 869239268Sgonzo dmat->map_count--; 870269217Sian if (map->flags & DMAMAP_COHERENT) 871269217Sian atomic_subtract_32(&maps_coherent, 1); 872269217Sian atomic_subtract_32(&maps_total, 1); 873269217Sian atomic_subtract_32(&maps_dmamem, 1); 874239268Sgonzo free(map, M_DEVBUF); 875239268Sgonzo CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags); 876239268Sgonzo} 877239268Sgonzo 878246713Skibstatic void 879246713Skib_bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf, 880246713Skib bus_size_t buflen, int flags) 881246713Skib{ 882246713Skib bus_addr_t curaddr; 883246713Skib bus_size_t sgsize; 884246713Skib 885246713Skib if (map->pagesneeded == 0) { 886246713Skib CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d" 887246713Skib " map= %p, pagesneeded= %d", 888246713Skib dmat->lowaddr, dmat->boundary, dmat->alignment, 889246713Skib map, map->pagesneeded); 890246713Skib /* 891246713Skib * Count the number of bounce pages 892246713Skib * needed in order to complete this transfer 893246713Skib */ 894246713Skib curaddr = buf; 895246713Skib while (buflen != 0) { 896246713Skib sgsize = MIN(buflen, dmat->maxsegsz); 897269211Sian if (must_bounce(dmat, map, curaddr, sgsize) != 0) { 898246713Skib sgsize = MIN(sgsize, PAGE_SIZE); 899246713Skib map->pagesneeded++; 900246713Skib } 901246713Skib curaddr += sgsize; 902246713Skib buflen -= sgsize; 903246713Skib } 904246713Skib CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded); 905246713Skib } 906246713Skib} 907246713Skib 908246713Skibstatic void 909239268Sgonzo_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 910239268Sgonzo void *buf, bus_size_t buflen, int flags) 911239268Sgonzo{ 912239268Sgonzo vm_offset_t vaddr; 913239268Sgonzo vm_offset_t vendaddr; 914239268Sgonzo bus_addr_t paddr; 915239268Sgonzo 916239268Sgonzo if (map->pagesneeded == 0) { 917239268Sgonzo CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d" 918239268Sgonzo " map= %p, pagesneeded= %d", 919239268Sgonzo dmat->lowaddr, dmat->boundary, dmat->alignment, 920239268Sgonzo map, map->pagesneeded); 921239268Sgonzo /* 922239268Sgonzo * Count the number of bounce pages 923239268Sgonzo * needed in order to complete this transfer 924239268Sgonzo */ 925239268Sgonzo vaddr = (vm_offset_t)buf; 926239268Sgonzo vendaddr = (vm_offset_t)buf + buflen; 927239268Sgonzo 928239268Sgonzo while (vaddr < vendaddr) { 929246713Skib if (__predict_true(map->pmap == kernel_pmap)) 930239268Sgonzo paddr = pmap_kextract(vaddr); 931239268Sgonzo else 932239268Sgonzo paddr = pmap_extract(map->pmap, vaddr); 933269211Sian if (must_bounce(dmat, map, paddr, 934269211Sian min(vendaddr - vaddr, (PAGE_SIZE - ((vm_offset_t)vaddr & 935269211Sian PAGE_MASK)))) != 0) { 936239268Sgonzo map->pagesneeded++; 937239268Sgonzo } 938239268Sgonzo vaddr += (PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK)); 939239268Sgonzo 940239268Sgonzo } 941239268Sgonzo CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded); 942239268Sgonzo } 943246713Skib} 944239268Sgonzo 945246713Skibstatic int 946246713Skib_bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags) 947246713Skib{ 948246713Skib 949239268Sgonzo /* Reserve Necessary Bounce Pages */ 950246713Skib mtx_lock(&bounce_lock); 951246713Skib if (flags & BUS_DMA_NOWAIT) { 952246713Skib if (reserve_bounce_pages(dmat, map, 0) != 0) { 953246713Skib map->pagesneeded = 0; 954246713Skib mtx_unlock(&bounce_lock); 955246713Skib return (ENOMEM); 956239268Sgonzo } 957246713Skib } else { 958246713Skib if (reserve_bounce_pages(dmat, map, 1) != 0) { 959246713Skib /* Queue us for resources */ 960246713Skib STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links); 961246713Skib mtx_unlock(&bounce_lock); 962246713Skib return (EINPROGRESS); 963246713Skib } 964239268Sgonzo } 965246713Skib mtx_unlock(&bounce_lock); 966239268Sgonzo 967239268Sgonzo return (0); 968239268Sgonzo} 969239268Sgonzo 970239268Sgonzo/* 971246713Skib * Add a single contiguous physical range to the segment list. 972246713Skib */ 973246713Skibstatic int 974246713Skib_bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr, 975246713Skib bus_size_t sgsize, bus_dma_segment_t *segs, int *segp) 976246713Skib{ 977246713Skib bus_addr_t baddr, bmask; 978246713Skib int seg; 979246713Skib 980246713Skib /* 981246713Skib * Make sure we don't cross any boundaries. 982246713Skib */ 983246713Skib bmask = ~(dmat->boundary - 1); 984246713Skib if (dmat->boundary > 0) { 985246713Skib baddr = (curaddr + dmat->boundary) & bmask; 986246713Skib if (sgsize > (baddr - curaddr)) 987246713Skib sgsize = (baddr - curaddr); 988246713Skib } 989246713Skib 990246713Skib if (dmat->ranges) { 991246713Skib struct arm32_dma_range *dr; 992246713Skib 993246713Skib dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges, 994246713Skib curaddr); 995246713Skib if (dr == NULL) { 996246713Skib _bus_dmamap_unload(dmat, map); 997246881Sian return (0); 998246713Skib } 999246713Skib /* 1000246713Skib * In a valid DMA range. Translate the physical 1001246713Skib * memory address to an address in the DMA window. 1002246713Skib */ 1003246713Skib curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase; 1004246713Skib } 1005246713Skib 1006246713Skib /* 1007246713Skib * Insert chunk into a segment, coalescing with 1008246713Skib * previous segment if possible. 1009246713Skib */ 1010246713Skib seg = *segp; 1011246713Skib if (seg == -1) { 1012246713Skib seg = 0; 1013246713Skib segs[seg].ds_addr = curaddr; 1014246713Skib segs[seg].ds_len = sgsize; 1015246713Skib } else { 1016246713Skib if (curaddr == segs[seg].ds_addr + segs[seg].ds_len && 1017246713Skib (segs[seg].ds_len + sgsize) <= dmat->maxsegsz && 1018246713Skib (dmat->boundary == 0 || 1019246713Skib (segs[seg].ds_addr & bmask) == (curaddr & bmask))) 1020246713Skib segs[seg].ds_len += sgsize; 1021246713Skib else { 1022246713Skib if (++seg >= dmat->nsegments) 1023246713Skib return (0); 1024246713Skib segs[seg].ds_addr = curaddr; 1025246713Skib segs[seg].ds_len = sgsize; 1026246713Skib } 1027246713Skib } 1028246713Skib *segp = seg; 1029246713Skib return (sgsize); 1030246713Skib} 1031246713Skib 1032246713Skib/* 1033246713Skib * Utility function to load a physical buffer. segp contains 1034239268Sgonzo * the starting segment on entrace, and the ending segment on exit. 1035239268Sgonzo */ 1036246713Skibint 1037246713Skib_bus_dmamap_load_phys(bus_dma_tag_t dmat, 1038246713Skib bus_dmamap_t map, 1039246713Skib vm_paddr_t buf, bus_size_t buflen, 1040246713Skib int flags, 1041246713Skib bus_dma_segment_t *segs, 1042246713Skib int *segp) 1043246713Skib{ 1044246713Skib bus_addr_t curaddr; 1045246713Skib bus_size_t sgsize; 1046246713Skib int error; 1047246713Skib 1048246713Skib if (segs == NULL) 1049269216Sian segs = map->segments; 1050246713Skib 1051269321Sian counter_u64_add(maploads_total, 1); 1052269321Sian counter_u64_add(maploads_physmem, 1); 1053269217Sian 1054269211Sian if (might_bounce(dmat, map, buflen, buflen)) { 1055246713Skib _bus_dmamap_count_phys(dmat, map, buf, buflen, flags); 1056246713Skib if (map->pagesneeded != 0) { 1057269321Sian counter_u64_add(maploads_bounced, 1); 1058246713Skib error = _bus_dmamap_reserve_pages(dmat, map, flags); 1059246713Skib if (error) 1060246713Skib return (error); 1061246713Skib } 1062246713Skib } 1063246713Skib 1064246713Skib while (buflen > 0) { 1065246713Skib curaddr = buf; 1066246713Skib sgsize = MIN(buflen, dmat->maxsegsz); 1067269211Sian if (map->pagesneeded != 0 && must_bounce(dmat, map, curaddr, 1068269211Sian sgsize)) { 1069246713Skib sgsize = MIN(sgsize, PAGE_SIZE); 1070246713Skib curaddr = add_bounce_page(dmat, map, 0, curaddr, 1071246713Skib sgsize); 1072246713Skib } 1073246713Skib sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, 1074246713Skib segp); 1075246713Skib if (sgsize == 0) 1076246713Skib break; 1077246713Skib buf += sgsize; 1078246713Skib buflen -= sgsize; 1079246713Skib } 1080246713Skib 1081246713Skib /* 1082246713Skib * Did we fit? 1083246713Skib */ 1084246713Skib if (buflen != 0) { 1085246713Skib _bus_dmamap_unload(dmat, map); 1086246713Skib return (EFBIG); /* XXX better return value here? */ 1087246713Skib } 1088246713Skib return (0); 1089246713Skib} 1090246713Skib 1091257228Skibint 1092257228Skib_bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map, 1093257228Skib struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags, 1094257228Skib bus_dma_segment_t *segs, int *segp) 1095257228Skib{ 1096257228Skib 1097257228Skib return (bus_dmamap_load_ma_triv(dmat, map, ma, tlen, ma_offs, flags, 1098257228Skib segs, segp)); 1099257228Skib} 1100257228Skib 1101246713Skib/* 1102246713Skib * Utility function to load a linear buffer. segp contains 1103246713Skib * the starting segment on entrace, and the ending segment on exit. 1104246713Skib */ 1105246713Skibint 1106239268Sgonzo_bus_dmamap_load_buffer(bus_dma_tag_t dmat, 1107239268Sgonzo bus_dmamap_t map, 1108239268Sgonzo void *buf, bus_size_t buflen, 1109246713Skib pmap_t pmap, 1110239268Sgonzo int flags, 1111239268Sgonzo bus_dma_segment_t *segs, 1112246713Skib int *segp) 1113239268Sgonzo{ 1114239268Sgonzo bus_size_t sgsize; 1115246713Skib bus_addr_t curaddr; 1116239268Sgonzo vm_offset_t vaddr; 1117239268Sgonzo struct sync_list *sl; 1118246713Skib int error; 1119239268Sgonzo 1120269321Sian counter_u64_add(maploads_total, 1); 1121269217Sian if (map->flags & DMAMAP_COHERENT) 1122269321Sian counter_u64_add(maploads_coherent, 1); 1123269217Sian if (map->flags & DMAMAP_DMAMEM_ALLOC) 1124269321Sian counter_u64_add(maploads_dmamem, 1); 1125269217Sian 1126246713Skib if (segs == NULL) 1127269216Sian segs = map->segments; 1128246713Skib 1129269217Sian if (flags & BUS_DMA_LOAD_MBUF) { 1130269321Sian counter_u64_add(maploads_mbuf, 1); 1131269212Sian map->flags |= DMAMAP_MBUF; 1132269217Sian } 1133269212Sian 1134246859Sian map->pmap = pmap; 1135246859Sian 1136269211Sian if (might_bounce(dmat, map, (bus_addr_t)buf, buflen)) { 1137246713Skib _bus_dmamap_count_pages(dmat, map, buf, buflen, flags); 1138246713Skib if (map->pagesneeded != 0) { 1139269321Sian counter_u64_add(maploads_bounced, 1); 1140246713Skib error = _bus_dmamap_reserve_pages(dmat, map, flags); 1141246713Skib if (error) 1142246713Skib return (error); 1143246713Skib } 1144239268Sgonzo } 1145239268Sgonzo 1146239268Sgonzo sl = NULL; 1147239268Sgonzo vaddr = (vm_offset_t)buf; 1148239268Sgonzo 1149246713Skib while (buflen > 0) { 1150239268Sgonzo /* 1151239268Sgonzo * Get the physical address for this segment. 1152239268Sgonzo */ 1153246713Skib if (__predict_true(map->pmap == kernel_pmap)) 1154239268Sgonzo curaddr = pmap_kextract(vaddr); 1155239268Sgonzo else 1156239268Sgonzo curaddr = pmap_extract(map->pmap, vaddr); 1157239268Sgonzo 1158239268Sgonzo /* 1159239268Sgonzo * Compute the segment size, and adjust counts. 1160239268Sgonzo */ 1161239268Sgonzo sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK); 1162239268Sgonzo if (sgsize > dmat->maxsegsz) 1163239268Sgonzo sgsize = dmat->maxsegsz; 1164239268Sgonzo if (buflen < sgsize) 1165239268Sgonzo sgsize = buflen; 1166239268Sgonzo 1167269211Sian if (map->pagesneeded != 0 && must_bounce(dmat, map, curaddr, 1168269211Sian sgsize)) { 1169246713Skib curaddr = add_bounce_page(dmat, map, vaddr, curaddr, 1170246713Skib sgsize); 1171239268Sgonzo } else { 1172246713Skib sl = &map->slist[map->sync_count - 1]; 1173246713Skib if (map->sync_count == 0 || 1174247776Scognet#ifdef ARM_L2_PIPT 1175247776Scognet curaddr != sl->busaddr + sl->datacount || 1176247776Scognet#endif 1177246713Skib vaddr != sl->vaddr + sl->datacount) { 1178246713Skib if (++map->sync_count > dmat->nsegments) 1179246713Skib goto cleanup; 1180246713Skib sl++; 1181246713Skib sl->vaddr = vaddr; 1182246713Skib sl->datacount = sgsize; 1183246713Skib sl->busaddr = curaddr; 1184246713Skib } else 1185246713Skib sl->datacount += sgsize; 1186239268Sgonzo } 1187246713Skib sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, 1188246713Skib segp); 1189246713Skib if (sgsize == 0) 1190246713Skib break; 1191239268Sgonzo vaddr += sgsize; 1192239268Sgonzo buflen -= sgsize; 1193239268Sgonzo } 1194239268Sgonzo 1195239268Sgonzocleanup: 1196239268Sgonzo /* 1197239268Sgonzo * Did we fit? 1198239268Sgonzo */ 1199239268Sgonzo if (buflen != 0) { 1200239268Sgonzo _bus_dmamap_unload(dmat, map); 1201246713Skib return (EFBIG); /* XXX better return value here? */ 1202239268Sgonzo } 1203239268Sgonzo return (0); 1204239268Sgonzo} 1205239268Sgonzo 1206246713Skib 1207246713Skibvoid 1208246713Skib__bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map, 1209246713Skib struct memdesc *mem, bus_dmamap_callback_t *callback, 1210246713Skib void *callback_arg) 1211239268Sgonzo{ 1212239268Sgonzo 1213246713Skib map->mem = *mem; 1214246713Skib map->dmat = dmat; 1215239268Sgonzo map->callback = callback; 1216239268Sgonzo map->callback_arg = callback_arg; 1217239268Sgonzo} 1218239268Sgonzo 1219246713Skibbus_dma_segment_t * 1220246713Skib_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map, 1221246713Skib bus_dma_segment_t *segs, int nsegs, int error) 1222239268Sgonzo{ 1223239268Sgonzo 1224246713Skib if (segs == NULL) 1225269216Sian segs = map->segments; 1226246713Skib return (segs); 1227239268Sgonzo} 1228239268Sgonzo 1229239268Sgonzo/* 1230239268Sgonzo * Release the mapping held by map. 1231239268Sgonzo */ 1232239268Sgonzovoid 1233239268Sgonzo_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) 1234239268Sgonzo{ 1235239268Sgonzo struct bounce_page *bpage; 1236239268Sgonzo struct bounce_zone *bz; 1237239268Sgonzo 1238239268Sgonzo if ((bz = dmat->bounce_zone) != NULL) { 1239239268Sgonzo while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { 1240239268Sgonzo STAILQ_REMOVE_HEAD(&map->bpages, links); 1241239268Sgonzo free_bounce_page(dmat, bpage); 1242239268Sgonzo } 1243239268Sgonzo 1244239268Sgonzo bz = dmat->bounce_zone; 1245239268Sgonzo bz->free_bpages += map->pagesreserved; 1246239268Sgonzo bz->reserved_bpages -= map->pagesreserved; 1247239268Sgonzo map->pagesreserved = 0; 1248239268Sgonzo map->pagesneeded = 0; 1249239268Sgonzo } 1250246713Skib map->sync_count = 0; 1251269212Sian map->flags &= ~DMAMAP_MBUF; 1252239268Sgonzo} 1253239268Sgonzo 1254239268Sgonzo#ifdef notyetbounceuser 1255239268Sgonzo /* If busdma uses user pages, then the interrupt handler could 1256239268Sgonzo * be use the kernel vm mapping. Both bounce pages and sync list 1257239268Sgonzo * do not cross page boundaries. 1258239268Sgonzo * Below is a rough sequence that a person would do to fix the 1259239268Sgonzo * user page reference in the kernel vmspace. This would be 1260239268Sgonzo * done in the dma post routine. 1261239268Sgonzo */ 1262239268Sgonzovoid 1263239268Sgonzo_bus_dmamap_fix_user(vm_offset_t buf, bus_size_t len, 1264239268Sgonzo pmap_t pmap, int op) 1265239268Sgonzo{ 1266239268Sgonzo bus_size_t sgsize; 1267239268Sgonzo bus_addr_t curaddr; 1268239268Sgonzo vm_offset_t va; 1269239268Sgonzo 1270239268Sgonzo /* each synclist entry is contained within a single page. 1271239268Sgonzo * 1272239268Sgonzo * this would be needed if BUS_DMASYNC_POSTxxxx was implemented 1273239268Sgonzo */ 1274239268Sgonzo curaddr = pmap_extract(pmap, buf); 1275239268Sgonzo va = pmap_dma_map(curaddr); 1276239268Sgonzo switch (op) { 1277239268Sgonzo case SYNC_USER_INV: 1278239268Sgonzo cpu_dcache_wb_range(va, sgsize); 1279239268Sgonzo break; 1280239268Sgonzo 1281239268Sgonzo case SYNC_USER_COPYTO: 1282239268Sgonzo bcopy((void *)va, (void *)bounce, sgsize); 1283239268Sgonzo break; 1284239268Sgonzo 1285239268Sgonzo case SYNC_USER_COPYFROM: 1286239268Sgonzo bcopy((void *) bounce, (void *)va, sgsize); 1287239268Sgonzo break; 1288239268Sgonzo 1289239268Sgonzo default: 1290239268Sgonzo break; 1291239268Sgonzo } 1292239268Sgonzo 1293239268Sgonzo pmap_dma_unmap(va); 1294239268Sgonzo} 1295239268Sgonzo#endif 1296239268Sgonzo 1297239268Sgonzo#ifdef ARM_L2_PIPT 1298239268Sgonzo#define l2cache_wb_range(va, pa, size) cpu_l2cache_wb_range(pa, size) 1299239268Sgonzo#define l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range(pa, size) 1300239268Sgonzo#define l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range(pa, size) 1301239268Sgonzo#else 1302239268Sgonzo#define l2cache_wb_range(va, pa, size) cpu_l2cache_wb_range(va, size) 1303239268Sgonzo#define l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range(va, size) 1304243909Scognet#define l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range(va, size) 1305239268Sgonzo#endif 1306239268Sgonzo 1307239268Sgonzovoid 1308239268Sgonzo_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) 1309239268Sgonzo{ 1310239268Sgonzo struct bounce_page *bpage; 1311246713Skib struct sync_list *sl, *end; 1312248655Sian /* 1313248655Sian * If the buffer was from user space, it is possible that this is not 1314248655Sian * the same vm map, especially on a POST operation. It's not clear that 1315248655Sian * dma on userland buffers can work at all right now, certainly not if a 1316248655Sian * partial cacheline flush has to be handled. To be safe, until we're 1317248655Sian * able to test direct userland dma, panic on a map mismatch. 1318248655Sian */ 1319239268Sgonzo if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { 1320248655Sian if (!pmap_dmap_iscurrent(map->pmap)) 1321248655Sian panic("_bus_dmamap_sync: wrong user map for bounce sync."); 1322239268Sgonzo /* Handle data bouncing. */ 1323239268Sgonzo CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " 1324239268Sgonzo "performing bounce", __func__, dmat, dmat->flags, op); 1325239268Sgonzo 1326239268Sgonzo if (op & BUS_DMASYNC_PREWRITE) { 1327239268Sgonzo while (bpage != NULL) { 1328246713Skib if (bpage->datavaddr != 0) 1329246713Skib bcopy((void *)bpage->datavaddr, 1330269209Sian (void *)bpage->vaddr, 1331269209Sian bpage->datacount); 1332246713Skib else 1333246713Skib physcopyout(bpage->dataaddr, 1334269209Sian (void *)bpage->vaddr, 1335269209Sian bpage->datacount); 1336239268Sgonzo cpu_dcache_wb_range((vm_offset_t)bpage->vaddr, 1337239268Sgonzo bpage->datacount); 1338239268Sgonzo l2cache_wb_range((vm_offset_t)bpage->vaddr, 1339239268Sgonzo (vm_offset_t)bpage->busaddr, 1340239268Sgonzo bpage->datacount); 1341239268Sgonzo bpage = STAILQ_NEXT(bpage, links); 1342239268Sgonzo } 1343239268Sgonzo dmat->bounce_zone->total_bounced++; 1344239268Sgonzo } 1345239268Sgonzo 1346261418Scognet if (op & BUS_DMASYNC_PREREAD) { 1347261418Scognet bpage = STAILQ_FIRST(&map->bpages); 1348261418Scognet while (bpage != NULL) { 1349261418Scognet cpu_dcache_inv_range((vm_offset_t)bpage->vaddr, 1350261418Scognet bpage->datacount); 1351261418Scognet l2cache_inv_range((vm_offset_t)bpage->vaddr, 1352261418Scognet (vm_offset_t)bpage->busaddr, 1353261418Scognet bpage->datacount); 1354261418Scognet bpage = STAILQ_NEXT(bpage, links); 1355261418Scognet } 1356261418Scognet } 1357239268Sgonzo if (op & BUS_DMASYNC_POSTREAD) { 1358239268Sgonzo while (bpage != NULL) { 1359239268Sgonzo vm_offset_t startv; 1360239268Sgonzo vm_paddr_t startp; 1361239268Sgonzo int len; 1362239268Sgonzo 1363239268Sgonzo startv = bpage->vaddr &~ arm_dcache_align_mask; 1364239268Sgonzo startp = bpage->busaddr &~ arm_dcache_align_mask; 1365239268Sgonzo len = bpage->datacount; 1366239268Sgonzo 1367239268Sgonzo if (startv != bpage->vaddr) 1368239268Sgonzo len += bpage->vaddr & arm_dcache_align_mask; 1369239268Sgonzo if (len & arm_dcache_align_mask) 1370239268Sgonzo len = (len - 1371239268Sgonzo (len & arm_dcache_align_mask)) + 1372239268Sgonzo arm_dcache_align; 1373239268Sgonzo cpu_dcache_inv_range(startv, len); 1374239268Sgonzo l2cache_inv_range(startv, startp, len); 1375246713Skib if (bpage->datavaddr != 0) 1376246713Skib bcopy((void *)bpage->vaddr, 1377269209Sian (void *)bpage->datavaddr, 1378269209Sian bpage->datacount); 1379246713Skib else 1380246713Skib physcopyin((void *)bpage->vaddr, 1381269209Sian bpage->dataaddr, 1382269209Sian bpage->datacount); 1383239268Sgonzo bpage = STAILQ_NEXT(bpage, links); 1384239268Sgonzo } 1385239268Sgonzo dmat->bounce_zone->total_bounced++; 1386239268Sgonzo } 1387239268Sgonzo } 1388274538Sian 1389274538Sian /* 1390274538Sian * For COHERENT memory no cache maintenance is necessary, but ensure all 1391274538Sian * writes have reached memory for the PREWRITE case. 1392274538Sian */ 1393274538Sian if (map->flags & DMAMAP_COHERENT) { 1394274538Sian if (op & BUS_DMASYNC_PREWRITE) { 1395274538Sian dsb(); 1396274538Sian cpu_l2cache_drain_writebuf(); 1397274538Sian } 1398244469Scognet return; 1399274538Sian } 1400239268Sgonzo 1401246713Skib if (map->sync_count != 0) { 1402248655Sian if (!pmap_dmap_iscurrent(map->pmap)) 1403248655Sian panic("_bus_dmamap_sync: wrong user map for sync."); 1404239268Sgonzo /* ARM caches are not self-snooping for dma */ 1405239268Sgonzo 1406246713Skib sl = &map->slist[0]; 1407246713Skib end = &map->slist[map->sync_count]; 1408239268Sgonzo CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " 1409239268Sgonzo "performing sync", __func__, dmat, dmat->flags, op); 1410239268Sgonzo 1411239268Sgonzo switch (op) { 1412239268Sgonzo case BUS_DMASYNC_PREWRITE: 1413246713Skib while (sl != end) { 1414239268Sgonzo cpu_dcache_wb_range(sl->vaddr, sl->datacount); 1415239268Sgonzo l2cache_wb_range(sl->vaddr, sl->busaddr, 1416239268Sgonzo sl->datacount); 1417246713Skib sl++; 1418239268Sgonzo } 1419239268Sgonzo break; 1420239268Sgonzo 1421239268Sgonzo case BUS_DMASYNC_PREREAD: 1422246713Skib while (sl != end) { 1423254061Scognet cpu_dcache_inv_range(sl->vaddr, sl->datacount); 1424254061Scognet l2cache_inv_range(sl->vaddr, sl->busaddr, 1425254061Scognet sl->datacount); 1426246713Skib sl++; 1427239268Sgonzo } 1428239268Sgonzo break; 1429239268Sgonzo 1430239268Sgonzo case BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD: 1431246713Skib while (sl != end) { 1432239268Sgonzo cpu_dcache_wbinv_range(sl->vaddr, sl->datacount); 1433239268Sgonzo l2cache_wbinv_range(sl->vaddr, 1434239268Sgonzo sl->busaddr, sl->datacount); 1435246713Skib sl++; 1436239268Sgonzo } 1437239268Sgonzo break; 1438239268Sgonzo 1439256638Sian case BUS_DMASYNC_POSTREAD: 1440256638Sian case BUS_DMASYNC_POSTWRITE: 1441256638Sian case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE: 1442256638Sian break; 1443239268Sgonzo default: 1444256638Sian panic("unsupported combination of sync operations: 0x%08x\n", op); 1445239268Sgonzo break; 1446239268Sgonzo } 1447239268Sgonzo } 1448239268Sgonzo} 1449239268Sgonzo 1450239268Sgonzostatic void 1451239268Sgonzoinit_bounce_pages(void *dummy __unused) 1452239268Sgonzo{ 1453239268Sgonzo 1454239268Sgonzo total_bpages = 0; 1455239268Sgonzo STAILQ_INIT(&bounce_zone_list); 1456239268Sgonzo STAILQ_INIT(&bounce_map_waitinglist); 1457239268Sgonzo STAILQ_INIT(&bounce_map_callbacklist); 1458239268Sgonzo mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF); 1459239268Sgonzo} 1460239268SgonzoSYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL); 1461239268Sgonzo 1462239268Sgonzostatic struct sysctl_ctx_list * 1463239268Sgonzobusdma_sysctl_tree(struct bounce_zone *bz) 1464239268Sgonzo{ 1465239268Sgonzo return (&bz->sysctl_tree); 1466239268Sgonzo} 1467239268Sgonzo 1468239268Sgonzostatic struct sysctl_oid * 1469239268Sgonzobusdma_sysctl_tree_top(struct bounce_zone *bz) 1470239268Sgonzo{ 1471239268Sgonzo return (bz->sysctl_tree_top); 1472239268Sgonzo} 1473239268Sgonzo 1474239268Sgonzostatic int 1475239268Sgonzoalloc_bounce_zone(bus_dma_tag_t dmat) 1476239268Sgonzo{ 1477239268Sgonzo struct bounce_zone *bz; 1478239268Sgonzo 1479239268Sgonzo /* Check to see if we already have a suitable zone */ 1480239268Sgonzo STAILQ_FOREACH(bz, &bounce_zone_list, links) { 1481269209Sian if ((dmat->alignment <= bz->alignment) && 1482269209Sian (dmat->lowaddr >= bz->lowaddr)) { 1483239268Sgonzo dmat->bounce_zone = bz; 1484239268Sgonzo return (0); 1485239268Sgonzo } 1486239268Sgonzo } 1487239268Sgonzo 1488239268Sgonzo if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF, 1489239268Sgonzo M_NOWAIT | M_ZERO)) == NULL) 1490239268Sgonzo return (ENOMEM); 1491239268Sgonzo 1492239268Sgonzo STAILQ_INIT(&bz->bounce_page_list); 1493239268Sgonzo bz->free_bpages = 0; 1494239268Sgonzo bz->reserved_bpages = 0; 1495239268Sgonzo bz->active_bpages = 0; 1496239268Sgonzo bz->lowaddr = dmat->lowaddr; 1497239268Sgonzo bz->alignment = MAX(dmat->alignment, PAGE_SIZE); 1498239268Sgonzo bz->map_count = 0; 1499239268Sgonzo snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount); 1500239268Sgonzo busdma_zonecount++; 1501239268Sgonzo snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr); 1502239268Sgonzo STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links); 1503239268Sgonzo dmat->bounce_zone = bz; 1504239268Sgonzo 1505239268Sgonzo sysctl_ctx_init(&bz->sysctl_tree); 1506239268Sgonzo bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree, 1507239268Sgonzo SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid, 1508239268Sgonzo CTLFLAG_RD, 0, ""); 1509239268Sgonzo if (bz->sysctl_tree_top == NULL) { 1510239268Sgonzo sysctl_ctx_free(&bz->sysctl_tree); 1511239268Sgonzo return (0); /* XXX error code? */ 1512239268Sgonzo } 1513239268Sgonzo 1514239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1515239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1516239268Sgonzo "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0, 1517239268Sgonzo "Total bounce pages"); 1518239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1519239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1520239268Sgonzo "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0, 1521239268Sgonzo "Free bounce pages"); 1522239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1523239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1524239268Sgonzo "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0, 1525239268Sgonzo "Reserved bounce pages"); 1526239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1527239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1528239268Sgonzo "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0, 1529239268Sgonzo "Active bounce pages"); 1530239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1531239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1532239268Sgonzo "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0, 1533269217Sian "Total bounce requests (pages bounced)"); 1534239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1535239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1536239268Sgonzo "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0, 1537239268Sgonzo "Total bounce requests that were deferred"); 1538239268Sgonzo SYSCTL_ADD_STRING(busdma_sysctl_tree(bz), 1539239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1540239268Sgonzo "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, ""); 1541273377Shselasky SYSCTL_ADD_ULONG(busdma_sysctl_tree(bz), 1542239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1543273377Shselasky "alignment", CTLFLAG_RD, &bz->alignment, ""); 1544239268Sgonzo 1545239268Sgonzo return (0); 1546239268Sgonzo} 1547239268Sgonzo 1548239268Sgonzostatic int 1549239268Sgonzoalloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages) 1550239268Sgonzo{ 1551239268Sgonzo struct bounce_zone *bz; 1552239268Sgonzo int count; 1553239268Sgonzo 1554239268Sgonzo bz = dmat->bounce_zone; 1555239268Sgonzo count = 0; 1556239268Sgonzo while (numpages > 0) { 1557239268Sgonzo struct bounce_page *bpage; 1558239268Sgonzo 1559239268Sgonzo bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF, 1560269209Sian M_NOWAIT | M_ZERO); 1561239268Sgonzo 1562239268Sgonzo if (bpage == NULL) 1563239268Sgonzo break; 1564239268Sgonzo bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF, 1565269209Sian M_NOWAIT, 0ul, bz->lowaddr, PAGE_SIZE, 0); 1566239268Sgonzo if (bpage->vaddr == 0) { 1567239268Sgonzo free(bpage, M_DEVBUF); 1568239268Sgonzo break; 1569239268Sgonzo } 1570239268Sgonzo bpage->busaddr = pmap_kextract(bpage->vaddr); 1571239268Sgonzo mtx_lock(&bounce_lock); 1572239268Sgonzo STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links); 1573239268Sgonzo total_bpages++; 1574239268Sgonzo bz->total_bpages++; 1575239268Sgonzo bz->free_bpages++; 1576239268Sgonzo mtx_unlock(&bounce_lock); 1577239268Sgonzo count++; 1578239268Sgonzo numpages--; 1579239268Sgonzo } 1580239268Sgonzo return (count); 1581239268Sgonzo} 1582239268Sgonzo 1583239268Sgonzostatic int 1584239268Sgonzoreserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit) 1585239268Sgonzo{ 1586239268Sgonzo struct bounce_zone *bz; 1587239268Sgonzo int pages; 1588239268Sgonzo 1589239268Sgonzo mtx_assert(&bounce_lock, MA_OWNED); 1590239268Sgonzo bz = dmat->bounce_zone; 1591239268Sgonzo pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved); 1592239268Sgonzo if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages)) 1593239268Sgonzo return (map->pagesneeded - (map->pagesreserved + pages)); 1594239268Sgonzo bz->free_bpages -= pages; 1595239268Sgonzo bz->reserved_bpages += pages; 1596239268Sgonzo map->pagesreserved += pages; 1597239268Sgonzo pages = map->pagesneeded - map->pagesreserved; 1598239268Sgonzo 1599239268Sgonzo return (pages); 1600239268Sgonzo} 1601239268Sgonzo 1602239268Sgonzostatic bus_addr_t 1603239268Sgonzoadd_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr, 1604246713Skib bus_addr_t addr, bus_size_t size) 1605239268Sgonzo{ 1606239268Sgonzo struct bounce_zone *bz; 1607239268Sgonzo struct bounce_page *bpage; 1608239268Sgonzo 1609239268Sgonzo KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag")); 1610239268Sgonzo KASSERT(map != NULL, 1611239268Sgonzo ("add_bounce_page: bad map %p", map)); 1612239268Sgonzo 1613239268Sgonzo bz = dmat->bounce_zone; 1614239268Sgonzo if (map->pagesneeded == 0) 1615239268Sgonzo panic("add_bounce_page: map doesn't need any pages"); 1616239268Sgonzo map->pagesneeded--; 1617239268Sgonzo 1618239268Sgonzo if (map->pagesreserved == 0) 1619239268Sgonzo panic("add_bounce_page: map doesn't need any pages"); 1620239268Sgonzo map->pagesreserved--; 1621239268Sgonzo 1622239268Sgonzo mtx_lock(&bounce_lock); 1623239268Sgonzo bpage = STAILQ_FIRST(&bz->bounce_page_list); 1624239268Sgonzo if (bpage == NULL) 1625239268Sgonzo panic("add_bounce_page: free page list is empty"); 1626239268Sgonzo 1627239268Sgonzo STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links); 1628239268Sgonzo bz->reserved_bpages--; 1629239268Sgonzo bz->active_bpages++; 1630239268Sgonzo mtx_unlock(&bounce_lock); 1631239268Sgonzo 1632239268Sgonzo if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { 1633239268Sgonzo /* Page offset needs to be preserved. */ 1634239268Sgonzo bpage->vaddr |= vaddr & PAGE_MASK; 1635239268Sgonzo bpage->busaddr |= vaddr & PAGE_MASK; 1636239268Sgonzo } 1637239268Sgonzo bpage->datavaddr = vaddr; 1638246713Skib bpage->dataaddr = addr; 1639239268Sgonzo bpage->datacount = size; 1640239268Sgonzo STAILQ_INSERT_TAIL(&(map->bpages), bpage, links); 1641239268Sgonzo return (bpage->busaddr); 1642239268Sgonzo} 1643239268Sgonzo 1644239268Sgonzostatic void 1645239268Sgonzofree_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage) 1646239268Sgonzo{ 1647239268Sgonzo struct bus_dmamap *map; 1648239268Sgonzo struct bounce_zone *bz; 1649239268Sgonzo 1650239268Sgonzo bz = dmat->bounce_zone; 1651239268Sgonzo bpage->datavaddr = 0; 1652239268Sgonzo bpage->datacount = 0; 1653239268Sgonzo if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { 1654239268Sgonzo /* 1655239268Sgonzo * Reset the bounce page to start at offset 0. Other uses 1656239268Sgonzo * of this bounce page may need to store a full page of 1657239268Sgonzo * data and/or assume it starts on a page boundary. 1658239268Sgonzo */ 1659239268Sgonzo bpage->vaddr &= ~PAGE_MASK; 1660239268Sgonzo bpage->busaddr &= ~PAGE_MASK; 1661239268Sgonzo } 1662239268Sgonzo 1663239268Sgonzo mtx_lock(&bounce_lock); 1664239268Sgonzo STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links); 1665239268Sgonzo bz->free_bpages++; 1666239268Sgonzo bz->active_bpages--; 1667239268Sgonzo if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) { 1668239268Sgonzo if (reserve_bounce_pages(map->dmat, map, 1) == 0) { 1669239268Sgonzo STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links); 1670239268Sgonzo STAILQ_INSERT_TAIL(&bounce_map_callbacklist, 1671269209Sian map, links); 1672239268Sgonzo busdma_swi_pending = 1; 1673239268Sgonzo bz->total_deferred++; 1674239268Sgonzo swi_sched(vm_ih, 0); 1675239268Sgonzo } 1676239268Sgonzo } 1677239268Sgonzo mtx_unlock(&bounce_lock); 1678239268Sgonzo} 1679239268Sgonzo 1680239268Sgonzovoid 1681239268Sgonzobusdma_swi(void) 1682239268Sgonzo{ 1683239268Sgonzo bus_dma_tag_t dmat; 1684239268Sgonzo struct bus_dmamap *map; 1685239268Sgonzo 1686239268Sgonzo mtx_lock(&bounce_lock); 1687239268Sgonzo while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) { 1688239268Sgonzo STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links); 1689239268Sgonzo mtx_unlock(&bounce_lock); 1690239268Sgonzo dmat = map->dmat; 1691269209Sian dmat->lockfunc(dmat->lockfuncarg, BUS_DMA_LOCK); 1692246713Skib bus_dmamap_load_mem(map->dmat, map, &map->mem, map->callback, 1693269209Sian map->callback_arg, BUS_DMA_WAITOK); 1694269209Sian dmat->lockfunc(dmat->lockfuncarg, BUS_DMA_UNLOCK); 1695239268Sgonzo mtx_lock(&bounce_lock); 1696239268Sgonzo } 1697239268Sgonzo mtx_unlock(&bounce_lock); 1698239268Sgonzo} 1699