busdma_machdep-v4.c revision 289825
1/*-
2 * Copyright (c) 2012 Ian Lepore
3 * Copyright (c) 2004 Olivier Houchard
4 * Copyright (c) 2002 Peter Grehan
5 * Copyright (c) 1997, 1998 Justin T. Gibbs.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions, and the following disclaimer,
13 *    without modification, immediately at the beginning of the file.
14 * 2. The name of the author may not be used to endorse or promote products
15 *    derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 *   From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
30 */
31
32#include <sys/cdefs.h>
33__FBSDID("$FreeBSD: head/sys/arm/arm/busdma_machdep.c 289825 2015-10-23 12:03:25Z jah $");
34
35/*
36 * ARM bus dma support routines.
37 *
38 * XXX Things to investigate / fix some day...
39 *  - What is the earliest that this API can be called?  Could there be any
40 *    fallout from changing the SYSINIT() order from SI_SUB_VM to SI_SUB_KMEM?
41 *  - The manpage mentions the BUS_DMA_NOWAIT flag only in the context of the
42 *    bus_dmamap_load() function.  This code has historically (and still does)
43 *    honor it in bus_dmamem_alloc().  If we got rid of that we could lose some
44 *    error checking because some resource management calls would become WAITOK
45 *    and thus "cannot fail."
46 *  - The decisions made by _bus_dma_can_bounce() should be made once, at tag
47 *    creation time, and the result stored in the tag.
48 *  - It should be possible to take some shortcuts when mapping a buffer we know
49 *    came from the uma(9) allocators based on what we know about such buffers
50 *    (aligned, contiguous, etc).
51 *  - The allocation of bounce pages could probably be cleaned up, then we could
52 *    retire arm_remap_nocache().
53 */
54
55#define _ARM32_BUS_DMA_PRIVATE
56#include <sys/param.h>
57#include <sys/systm.h>
58#include <sys/malloc.h>
59#include <sys/bus.h>
60#include <sys/busdma_bufalloc.h>
61#include <sys/interrupt.h>
62#include <sys/lock.h>
63#include <sys/proc.h>
64#include <sys/memdesc.h>
65#include <sys/mutex.h>
66#include <sys/ktr.h>
67#include <sys/kernel.h>
68#include <sys/sysctl.h>
69#include <sys/uio.h>
70
71#include <vm/uma.h>
72#include <vm/vm.h>
73#include <vm/vm_extern.h>
74#include <vm/vm_kern.h>
75#include <vm/vm_page.h>
76#include <vm/vm_map.h>
77
78#include <machine/atomic.h>
79#include <machine/bus.h>
80#include <machine/cpufunc.h>
81#include <machine/md_var.h>
82
83#define MAX_BPAGES 64
84#define BUS_DMA_COULD_BOUNCE	BUS_DMA_BUS3
85#define BUS_DMA_MIN_ALLOC_COMP	BUS_DMA_BUS4
86
87struct bounce_zone;
88
89struct bus_dma_tag {
90	bus_dma_tag_t		parent;
91	bus_size_t		alignment;
92	bus_addr_t		boundary;
93	bus_addr_t		lowaddr;
94	bus_addr_t		highaddr;
95	bus_dma_filter_t	*filter;
96	void			*filterarg;
97	bus_size_t		maxsize;
98	u_int			nsegments;
99	bus_size_t		maxsegsz;
100	int			flags;
101	int			ref_count;
102	int			map_count;
103	bus_dma_lock_t		*lockfunc;
104	void			*lockfuncarg;
105	/*
106	 * DMA range for this tag.  If the page doesn't fall within
107	 * one of these ranges, an error is returned.  The caller
108	 * may then decide what to do with the transfer.  If the
109	 * range pointer is NULL, it is ignored.
110	 */
111	struct arm32_dma_range	*ranges;
112	int			_nranges;
113	struct bounce_zone *bounce_zone;
114	/*
115	 * Most tags need one or two segments, and can use the local tagsegs
116	 * array.  For tags with a larger limit, we'll allocate a bigger array
117	 * on first use.
118	 */
119	bus_dma_segment_t	*segments;
120	bus_dma_segment_t	tagsegs[2];
121};
122
123struct bounce_page {
124	vm_offset_t	vaddr;		/* kva of bounce buffer */
125	bus_addr_t	busaddr;	/* Physical address */
126	vm_offset_t	datavaddr;	/* kva of client data */
127	vm_page_t	datapage;	/* physical page of client data */
128	vm_offset_t	dataoffs;	/* page offset of client data */
129	bus_size_t	datacount;	/* client data count */
130	STAILQ_ENTRY(bounce_page) links;
131};
132
133struct sync_list {
134	vm_offset_t	vaddr;		/* kva of client data */
135	vm_page_t	pages;		/* starting page of client data */
136	vm_offset_t	dataoffs;	/* page offset of client data */
137	bus_size_t	datacount;	/* client data count */
138};
139
140int busdma_swi_pending;
141
142struct bounce_zone {
143	STAILQ_ENTRY(bounce_zone) links;
144	STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
145	int		total_bpages;
146	int		free_bpages;
147	int		reserved_bpages;
148	int		active_bpages;
149	int		total_bounced;
150	int		total_deferred;
151	int		map_count;
152	bus_size_t	alignment;
153	bus_addr_t	lowaddr;
154	char		zoneid[8];
155	char		lowaddrid[20];
156	struct sysctl_ctx_list sysctl_tree;
157	struct sysctl_oid *sysctl_tree_top;
158};
159
160static struct mtx bounce_lock;
161static int total_bpages;
162static int busdma_zonecount;
163static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
164
165static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters");
166SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
167	   "Total bounce pages");
168
169#define DMAMAP_COHERENT		0x8
170#define DMAMAP_CACHE_ALIGNED	0x10
171
172struct bus_dmamap {
173	struct bp_list	bpages;
174	int		pagesneeded;
175	int		pagesreserved;
176        bus_dma_tag_t	dmat;
177	struct memdesc	mem;
178	int		flags;
179	STAILQ_ENTRY(bus_dmamap) links;
180	bus_dmamap_callback_t *callback;
181	void		      *callback_arg;
182	int		       sync_count;
183	struct sync_list       *slist;
184};
185
186static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
187static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
188
189static struct mtx busdma_mtx;
190
191MTX_SYSINIT(busdma_mtx, &busdma_mtx, "busdma lock", MTX_DEF);
192
193static void init_bounce_pages(void *dummy);
194static int alloc_bounce_zone(bus_dma_tag_t dmat);
195static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
196static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
197				int commit);
198static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
199				  vm_offset_t vaddr, bus_addr_t addr,
200				  bus_size_t size);
201static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
202static void bus_dmamap_sync_sl(struct sync_list *sl, bus_dmasync_op_t op,
203			       int bufaligned);
204
205/* Default tag, as most drivers provide no parent tag. */
206bus_dma_tag_t arm_root_dma_tag;
207
208/*
209 * ----------------------------------------------------------------------------
210 * Begin block of code useful to transplant to other implementations.
211 */
212
213static uma_zone_t dmamap_zone;	/* Cache of struct bus_dmamap items */
214
215static busdma_bufalloc_t coherent_allocator;	/* Cache of coherent buffers */
216static busdma_bufalloc_t standard_allocator;	/* Cache of standard buffers */
217
218/*
219 * This is the ctor function passed to uma_zcreate() for the pool of dma maps.
220 * It'll need platform-specific changes if this code is copied.
221 */
222static int
223dmamap_ctor(void *mem, int size, void *arg, int flags)
224{
225	bus_dmamap_t map;
226	bus_dma_tag_t dmat;
227
228	map = (bus_dmamap_t)mem;
229	dmat = (bus_dma_tag_t)arg;
230
231	dmat->map_count++;
232
233	map->dmat = dmat;
234	map->flags = 0;
235	STAILQ_INIT(&map->bpages);
236
237	return (0);
238}
239
240/*
241 * This is the dtor function passed to uma_zcreate() for the pool of dma maps.
242 * It may need platform-specific changes if this code is copied              .
243 */
244static void
245dmamap_dtor(void *mem, int size, void *arg)
246{
247	bus_dmamap_t map;
248
249	map = (bus_dmamap_t)mem;
250
251	map->dmat->map_count--;
252}
253
254static void
255busdma_init(void *dummy)
256{
257
258	/* Create a cache of maps for bus_dmamap_create(). */
259	dmamap_zone = uma_zcreate("dma maps", sizeof(struct bus_dmamap),
260	    dmamap_ctor, dmamap_dtor, NULL, NULL, UMA_ALIGN_PTR, 0);
261
262	/* Create a cache of buffers in standard (cacheable) memory. */
263	standard_allocator = busdma_bufalloc_create("buffer",
264	    arm_dcache_align,	/* minimum_alignment */
265	    NULL,		/* uma_alloc func */
266	    NULL,		/* uma_free func */
267	    0);			/* uma_zcreate_flags */
268
269	/*
270	 * Create a cache of buffers in uncacheable memory, to implement the
271	 * BUS_DMA_COHERENT (and potentially BUS_DMA_NOCACHE) flag.
272	 */
273	coherent_allocator = busdma_bufalloc_create("coherent",
274	    arm_dcache_align,	/* minimum_alignment */
275	    busdma_bufalloc_alloc_uncacheable,
276	    busdma_bufalloc_free_uncacheable,
277	    0);			/* uma_zcreate_flags */
278}
279
280/*
281 * This init historically used SI_SUB_VM, but now the init code requires
282 * malloc(9) using M_DEVBUF memory, which is set up later than SI_SUB_VM, by
283 * SI_SUB_KMEM and SI_ORDER_THIRD, so we'll go right after that by using
284 * SI_SUB_KMEM and SI_ORDER_FOURTH.
285 */
286SYSINIT(busdma, SI_SUB_KMEM, SI_ORDER_FOURTH, busdma_init, NULL);
287
288/*
289 * End block of code useful to transplant to other implementations.
290 * ----------------------------------------------------------------------------
291 */
292
293/*
294 * Return true if a match is made.
295 *
296 * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
297 *
298 * If paddr is within the bounds of the dma tag then call the filter callback
299 * to check for a match, if there is no filter callback then assume a match.
300 */
301static int
302run_filter(bus_dma_tag_t dmat, bus_addr_t paddr)
303{
304	int retval;
305
306	retval = 0;
307
308	do {
309		if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
310		 || ((paddr & (dmat->alignment - 1)) != 0))
311		 && (dmat->filter == NULL
312		  || (*dmat->filter)(dmat->filterarg, paddr) != 0))
313			retval = 1;
314
315		dmat = dmat->parent;
316	} while (retval == 0 && dmat != NULL);
317	return (retval);
318}
319
320/*
321 * This routine checks the exclusion zone constraints from a tag against the
322 * physical RAM available on the machine.  If a tag specifies an exclusion zone
323 * but there's no RAM in that zone, then we avoid allocating resources to bounce
324 * a request, and we can use any memory allocator (as opposed to needing
325 * kmem_alloc_contig() just because it can allocate pages in an address range).
326 *
327 * Most tags have BUS_SPACE_MAXADDR or BUS_SPACE_MAXADDR_32BIT (they are the
328 * same value on 32-bit architectures) as their lowaddr constraint, and we can't
329 * possibly have RAM at an address higher than the highest address we can
330 * express, so we take a fast out.
331 */
332static __inline int
333_bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr)
334{
335	int i;
336
337	if (lowaddr >= BUS_SPACE_MAXADDR)
338		return (0);
339
340	for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
341		if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
342		    || (lowaddr < phys_avail[i] &&
343		    highaddr > phys_avail[i]))
344			return (1);
345	}
346	return (0);
347}
348
349static __inline struct arm32_dma_range *
350_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
351    bus_addr_t curaddr)
352{
353	struct arm32_dma_range *dr;
354	int i;
355
356	for (i = 0, dr = ranges; i < nranges; i++, dr++) {
357		if (curaddr >= dr->dr_sysbase &&
358		    round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
359			return (dr);
360	}
361
362	return (NULL);
363}
364/*
365 * Convenience function for manipulating driver locks from busdma (during
366 * busdma_swi, for example).  Drivers that don't provide their own locks
367 * should specify &Giant to dmat->lockfuncarg.  Drivers that use their own
368 * non-mutex locking scheme don't have to use this at all.
369 */
370void
371busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
372{
373	struct mtx *dmtx;
374
375	dmtx = (struct mtx *)arg;
376	switch (op) {
377	case BUS_DMA_LOCK:
378		mtx_lock(dmtx);
379		break;
380	case BUS_DMA_UNLOCK:
381		mtx_unlock(dmtx);
382		break;
383	default:
384		panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
385	}
386}
387
388/*
389 * dflt_lock should never get called.  It gets put into the dma tag when
390 * lockfunc == NULL, which is only valid if the maps that are associated
391 * with the tag are meant to never be defered.
392 * XXX Should have a way to identify which driver is responsible here.
393 */
394static void
395dflt_lock(void *arg, bus_dma_lock_op_t op)
396{
397#ifdef INVARIANTS
398	panic("driver error: busdma dflt_lock called");
399#else
400	printf("DRIVER_ERROR: busdma dflt_lock called\n");
401#endif
402}
403
404/*
405 * Allocate a device specific dma_tag.
406 */
407#define SEG_NB 1024
408
409int
410bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
411		   bus_addr_t boundary, bus_addr_t lowaddr,
412		   bus_addr_t highaddr, bus_dma_filter_t *filter,
413		   void *filterarg, bus_size_t maxsize, int nsegments,
414		   bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
415		   void *lockfuncarg, bus_dma_tag_t *dmat)
416{
417	bus_dma_tag_t newtag;
418	int error = 0;
419	/* Return a NULL tag on failure */
420	*dmat = NULL;
421	if (!parent)
422		parent = arm_root_dma_tag;
423
424	newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT);
425	if (newtag == NULL) {
426		CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
427		    __func__, newtag, 0, error);
428		return (ENOMEM);
429	}
430
431	newtag->parent = parent;
432	newtag->alignment = alignment ? alignment : 1;
433	newtag->boundary = boundary;
434	newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
435	newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1);
436	newtag->filter = filter;
437	newtag->filterarg = filterarg;
438        newtag->maxsize = maxsize;
439        newtag->nsegments = nsegments;
440	newtag->maxsegsz = maxsegsz;
441	newtag->flags = flags;
442	newtag->ref_count = 1; /* Count ourself */
443	newtag->map_count = 0;
444	newtag->ranges = bus_dma_get_range();
445	newtag->_nranges = bus_dma_get_range_nb();
446	if (lockfunc != NULL) {
447		newtag->lockfunc = lockfunc;
448		newtag->lockfuncarg = lockfuncarg;
449	} else {
450		newtag->lockfunc = dflt_lock;
451		newtag->lockfuncarg = NULL;
452	}
453	/*
454	 * If all the segments we need fit into the local tagsegs array, set the
455	 * pointer now.  Otherwise NULL the pointer and an array of segments
456	 * will be allocated later, on first use.  We don't pre-allocate now
457	 * because some tags exist just to pass contraints to children in the
458	 * device hierarchy, and they tend to use BUS_SPACE_UNRESTRICTED and we
459	 * sure don't want to try to allocate an array for that.
460	 */
461	if (newtag->nsegments <= nitems(newtag->tagsegs))
462		newtag->segments = newtag->tagsegs;
463	else
464		newtag->segments = NULL;
465	/*
466	 * Take into account any restrictions imposed by our parent tag
467	 */
468        if (parent != NULL) {
469                newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr);
470                newtag->highaddr = MAX(parent->highaddr, newtag->highaddr);
471		if (newtag->boundary == 0)
472			newtag->boundary = parent->boundary;
473		else if (parent->boundary != 0)
474                	newtag->boundary = MIN(parent->boundary,
475					       newtag->boundary);
476		if ((newtag->filter != NULL) ||
477		    ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0))
478			newtag->flags |= BUS_DMA_COULD_BOUNCE;
479                if (newtag->filter == NULL) {
480                        /*
481                         * Short circuit looking at our parent directly
482                         * since we have encapsulated all of its information
483                         */
484                        newtag->filter = parent->filter;
485                        newtag->filterarg = parent->filterarg;
486                        newtag->parent = parent->parent;
487		}
488		if (newtag->parent != NULL)
489			atomic_add_int(&parent->ref_count, 1);
490	}
491	if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr)
492	 || newtag->alignment > 1)
493		newtag->flags |= BUS_DMA_COULD_BOUNCE;
494
495	if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
496	    (flags & BUS_DMA_ALLOCNOW) != 0) {
497		struct bounce_zone *bz;
498
499		/* Must bounce */
500
501		if ((error = alloc_bounce_zone(newtag)) != 0) {
502			free(newtag, M_DEVBUF);
503			return (error);
504		}
505		bz = newtag->bounce_zone;
506
507		if (ptoa(bz->total_bpages) < maxsize) {
508			int pages;
509
510			pages = atop(maxsize) - bz->total_bpages;
511
512			/* Add pages to our bounce pool */
513			if (alloc_bounce_pages(newtag, pages) < pages)
514				error = ENOMEM;
515		}
516		/* Performed initial allocation */
517		newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
518	} else
519		newtag->bounce_zone = NULL;
520	if (error != 0)
521		free(newtag, M_DEVBUF);
522	else
523		*dmat = newtag;
524	CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
525	    __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
526
527	return (error);
528}
529
530int
531bus_dma_tag_destroy(bus_dma_tag_t dmat)
532{
533#ifdef KTR
534	bus_dma_tag_t dmat_copy = dmat;
535#endif
536
537	if (dmat != NULL) {
538
539                if (dmat->map_count != 0)
540                        return (EBUSY);
541
542                while (dmat != NULL) {
543                        bus_dma_tag_t parent;
544
545                        parent = dmat->parent;
546                        atomic_subtract_int(&dmat->ref_count, 1);
547                        if (dmat->ref_count == 0) {
548				if (dmat->segments != NULL &&
549				    dmat->segments != dmat->tagsegs)
550					free(dmat->segments, M_DEVBUF);
551                                free(dmat, M_DEVBUF);
552                                /*
553                                 * Last reference count, so
554                                 * release our reference
555                                 * count on our parent.
556                                 */
557                                dmat = parent;
558                        } else
559                                dmat = NULL;
560                }
561        }
562	CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy);
563
564        return (0);
565}
566
567#include <sys/kdb.h>
568/*
569 * Allocate a handle for mapping from kva/uva/physical
570 * address space into bus device space.
571 */
572int
573bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
574{
575	struct sync_list *slist;
576	bus_dmamap_t map;
577	int error = 0;
578
579	slist = malloc(sizeof(*slist) * dmat->nsegments, M_DEVBUF, M_NOWAIT);
580	if (slist == NULL)
581		return (ENOMEM);
582
583	map = uma_zalloc_arg(dmamap_zone, dmat, M_NOWAIT);
584	*mapp = map;
585	if (map == NULL) {
586		free(slist, M_DEVBUF);
587		return (ENOMEM);
588	}
589
590	/*
591	 * If the tag's segments haven't been allocated yet we need to do it
592	 * now, because we can't sleep for resources at map load time.
593	 */
594	if (dmat->segments == NULL) {
595		dmat->segments = malloc(dmat->nsegments *
596		    sizeof(*dmat->segments), M_DEVBUF, M_NOWAIT);
597		if (dmat->segments == NULL) {
598			free(slist, M_DEVBUF);
599			uma_zfree(dmamap_zone, map);
600			*mapp = NULL;
601			return (ENOMEM);
602		}
603	}
604
605	/*
606	 * Bouncing might be required if the driver asks for an active
607	 * exclusion region, a data alignment that is stricter than 1, and/or
608	 * an active address boundary.
609	 */
610	if (dmat->flags & BUS_DMA_COULD_BOUNCE) {
611
612		/* Must bounce */
613		struct bounce_zone *bz;
614		int maxpages;
615
616		if (dmat->bounce_zone == NULL) {
617			if ((error = alloc_bounce_zone(dmat)) != 0) {
618				free(slist, M_DEVBUF);
619				uma_zfree(dmamap_zone, map);
620				*mapp = NULL;
621				return (error);
622			}
623		}
624		bz = dmat->bounce_zone;
625
626		/* Initialize the new map */
627		STAILQ_INIT(&((*mapp)->bpages));
628
629		/*
630		 * Attempt to add pages to our pool on a per-instance
631		 * basis up to a sane limit.
632		 */
633		maxpages = MAX_BPAGES;
634		if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
635		 || (bz->map_count > 0 && bz->total_bpages < maxpages)) {
636			int pages;
637
638			pages = MAX(atop(dmat->maxsize), 1);
639			pages = MIN(maxpages - bz->total_bpages, pages);
640			pages = MAX(pages, 1);
641			if (alloc_bounce_pages(dmat, pages) < pages)
642				error = ENOMEM;
643
644			if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) {
645				if (error == 0)
646					dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
647			} else {
648				error = 0;
649			}
650		}
651		bz->map_count++;
652	}
653	map->sync_count = 0;
654	map->slist = slist;
655	CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
656	    __func__, dmat, dmat->flags, error);
657
658	return (0);
659}
660
661/*
662 * Destroy a handle for mapping from kva/uva/physical
663 * address space into bus device space.
664 */
665int
666bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
667{
668
669	if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) {
670		CTR3(KTR_BUSDMA, "%s: tag %p error %d",
671		    __func__, dmat, EBUSY);
672		return (EBUSY);
673	}
674	free(map->slist, M_DEVBUF);
675	uma_zfree(dmamap_zone, map);
676	if (dmat->bounce_zone)
677		dmat->bounce_zone->map_count--;
678	CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
679        return (0);
680}
681
682/*
683 * Allocate a piece of memory that can be efficiently mapped into bus device
684 * space based on the constraints listed in the dma tag.  Returns a pointer to
685 * the allocated memory, and a pointer to an associated bus_dmamap.
686 */
687int
688bus_dmamem_alloc(bus_dma_tag_t dmat, void **vaddrp, int flags,
689                 bus_dmamap_t *mapp)
690{
691	struct sync_list *slist;
692	void * vaddr;
693	struct busdma_bufzone *bufzone;
694	busdma_bufalloc_t ba;
695	bus_dmamap_t map;
696	int mflags;
697	vm_memattr_t memattr;
698
699	if (flags & BUS_DMA_NOWAIT)
700		mflags = M_NOWAIT;
701	else
702		mflags = M_WAITOK;
703	/*
704	 * If the tag's segments haven't been allocated yet we need to do it
705	 * now, because we can't sleep for resources at map load time.
706	 */
707	if (dmat->segments == NULL)
708		dmat->segments = malloc(dmat->nsegments *
709		   sizeof(*dmat->segments), M_DEVBUF, mflags);
710
711	slist = malloc(sizeof(*slist) * dmat->nsegments, M_DEVBUF, M_NOWAIT);
712	if (slist == NULL)
713		return (ENOMEM);
714	map = uma_zalloc_arg(dmamap_zone, dmat, mflags);
715	if (map == NULL) {
716		free(slist, M_DEVBUF);
717		return (ENOMEM);
718	}
719	if (flags & BUS_DMA_COHERENT) {
720		memattr = VM_MEMATTR_UNCACHEABLE;
721		ba = coherent_allocator;
722		map->flags |= DMAMAP_COHERENT;
723	} else {
724		memattr = VM_MEMATTR_DEFAULT;
725		ba = standard_allocator;
726	}
727	/* All buffers we allocate are cache-aligned. */
728	map->flags |= DMAMAP_CACHE_ALIGNED;
729
730	if (flags & BUS_DMA_ZERO)
731		mflags |= M_ZERO;
732
733	/*
734	 * Try to find a bufzone in the allocator that holds a cache of buffers
735	 * of the right size for this request.  If the buffer is too big to be
736	 * held in the allocator cache, this returns NULL.
737	 */
738	bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
739
740	/*
741	 * Allocate the buffer from the uma(9) allocator if...
742	 *  - It's small enough to be in the allocator (bufzone not NULL).
743	 *  - The alignment constraint isn't larger than the allocation size
744	 *    (the allocator aligns buffers to their size boundaries).
745	 *  - There's no need to handle lowaddr/highaddr exclusion zones.
746	 * else allocate non-contiguous pages if...
747	 *  - The page count that could get allocated doesn't exceed nsegments.
748	 *  - The alignment constraint isn't larger than a page boundary.
749	 *  - There are no boundary-crossing constraints.
750	 * else allocate a block of contiguous pages because one or more of the
751	 * constraints is something that only the contig allocator can fulfill.
752	 */
753	if (bufzone != NULL && dmat->alignment <= bufzone->size &&
754	    !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) {
755		vaddr = uma_zalloc(bufzone->umazone, mflags);
756	} else if (dmat->nsegments >= btoc(dmat->maxsize) &&
757	    dmat->alignment <= PAGE_SIZE && dmat->boundary == 0) {
758		vaddr = (void *)kmem_alloc_attr(kernel_arena, dmat->maxsize,
759		    mflags, 0, dmat->lowaddr, memattr);
760	} else {
761		vaddr = (void *)kmem_alloc_contig(kernel_arena, dmat->maxsize,
762		    mflags, 0, dmat->lowaddr, dmat->alignment, dmat->boundary,
763		    memattr);
764	}
765	if (vaddr == NULL) {
766		free(slist, M_DEVBUF);
767		uma_zfree(dmamap_zone, map);
768		map = NULL;
769	} else {
770		map->slist = slist;
771		map->sync_count = 0;
772	}
773	*vaddrp = vaddr;
774	*mapp = map;
775
776	return (vaddr == NULL ? ENOMEM : 0);
777}
778
779/*
780 * Free a piece of memory that was allocated via bus_dmamem_alloc, along with
781 * its associated map.
782 */
783void
784bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
785{
786	struct busdma_bufzone *bufzone;
787	busdma_bufalloc_t ba;
788
789	if (map->flags & DMAMAP_COHERENT)
790		ba = coherent_allocator;
791	else
792		ba = standard_allocator;
793
794	free(map->slist, M_DEVBUF);
795	uma_zfree(dmamap_zone, map);
796
797	bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
798
799	if (bufzone != NULL && dmat->alignment <= bufzone->size &&
800	    !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr))
801		uma_zfree(bufzone->umazone, vaddr);
802	else
803		kmem_free(kernel_arena, (vm_offset_t)vaddr, dmat->maxsize);
804}
805
806static void
807_bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
808    bus_size_t buflen, int flags)
809{
810	bus_addr_t curaddr;
811	bus_size_t sgsize;
812
813	if (map->pagesneeded == 0) {
814		CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
815		    dmat->lowaddr, dmat->boundary, dmat->alignment);
816		CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
817		    map, map->pagesneeded);
818		/*
819		 * Count the number of bounce pages
820		 * needed in order to complete this transfer
821		 */
822		curaddr = buf;
823		while (buflen != 0) {
824			sgsize = MIN(buflen, dmat->maxsegsz);
825			if (run_filter(dmat, curaddr) != 0) {
826				sgsize = MIN(sgsize,
827				    PAGE_SIZE - (curaddr & PAGE_MASK));
828				map->pagesneeded++;
829			}
830			curaddr += sgsize;
831			buflen -= sgsize;
832		}
833		CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
834	}
835}
836
837static void
838_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap,
839    void *buf, bus_size_t buflen, int flags)
840{
841	vm_offset_t vaddr;
842	vm_offset_t vendaddr;
843	bus_addr_t paddr;
844
845	if (map->pagesneeded == 0) {
846		CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
847		    dmat->lowaddr, dmat->boundary, dmat->alignment);
848		CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
849		    map, map->pagesneeded);
850		/*
851		 * Count the number of bounce pages
852		 * needed in order to complete this transfer
853		 */
854		vaddr = trunc_page((vm_offset_t)buf);
855		vendaddr = (vm_offset_t)buf + buflen;
856
857		while (vaddr < vendaddr) {
858			if (__predict_true(pmap == kernel_pmap))
859				paddr = pmap_kextract(vaddr);
860			else
861				paddr = pmap_extract(pmap, vaddr);
862			if (run_filter(dmat, paddr) != 0)
863				map->pagesneeded++;
864			vaddr += PAGE_SIZE;
865		}
866		CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
867	}
868}
869
870static int
871_bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags)
872{
873
874	/* Reserve Necessary Bounce Pages */
875	mtx_lock(&bounce_lock);
876	if (flags & BUS_DMA_NOWAIT) {
877		if (reserve_bounce_pages(dmat, map, 0) != 0) {
878			mtx_unlock(&bounce_lock);
879			return (ENOMEM);
880		}
881	} else {
882		if (reserve_bounce_pages(dmat, map, 1) != 0) {
883			/* Queue us for resources */
884			STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links);
885			mtx_unlock(&bounce_lock);
886			return (EINPROGRESS);
887		}
888	}
889	mtx_unlock(&bounce_lock);
890
891	return (0);
892}
893
894/*
895 * Add a single contiguous physical range to the segment list.
896 */
897static int
898_bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr,
899    bus_size_t sgsize, bus_dma_segment_t *segs, int *segp)
900{
901	bus_addr_t baddr, bmask;
902	int seg;
903
904	/*
905	 * Make sure we don't cross any boundaries.
906	 */
907	bmask = ~(dmat->boundary - 1);
908	if (dmat->boundary > 0) {
909		baddr = (curaddr + dmat->boundary) & bmask;
910		if (sgsize > (baddr - curaddr))
911			sgsize = (baddr - curaddr);
912	}
913	if (dmat->ranges) {
914		struct arm32_dma_range *dr;
915
916		dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges,
917		    curaddr);
918		if (dr == NULL)
919			return (0);
920		/*
921		 * In a valid DMA range.  Translate the physical
922		 * memory address to an address in the DMA window.
923		 */
924		curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
925
926	}
927
928	seg = *segp;
929	/*
930	 * Insert chunk into a segment, coalescing with
931	 * the previous segment if possible.
932	 */
933	if (seg >= 0 &&
934	    curaddr == segs[seg].ds_addr + segs[seg].ds_len &&
935	    (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
936	    (dmat->boundary == 0 ||
937	     (segs[seg].ds_addr & bmask) == (curaddr & bmask))) {
938		segs[seg].ds_len += sgsize;
939	} else {
940		if (++seg >= dmat->nsegments)
941			return (0);
942		segs[seg].ds_addr = curaddr;
943		segs[seg].ds_len = sgsize;
944	}
945	*segp = seg;
946	return (sgsize);
947}
948
949/*
950 * Utility function to load a physical buffer.  segp contains
951 * the starting segment on entrace, and the ending segment on exit.
952 */
953int
954_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
955    bus_size_t buflen, int flags, bus_dma_segment_t *segs, int *segp)
956{
957	struct sync_list *sl;
958	bus_size_t sgsize;
959	bus_addr_t curaddr;
960	bus_addr_t sl_end = 0;
961	int error;
962
963	if (segs == NULL)
964		segs = dmat->segments;
965
966	if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
967		_bus_dmamap_count_phys(dmat, map, buf, buflen, flags);
968		if (map->pagesneeded != 0) {
969			error = _bus_dmamap_reserve_pages(dmat, map, flags);
970			if (error)
971				return (error);
972		}
973	}
974
975	sl = map->slist + map->sync_count - 1;
976
977	while (buflen > 0) {
978		curaddr = buf;
979		sgsize = MIN(buflen, dmat->maxsegsz);
980		if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
981		    map->pagesneeded != 0 && run_filter(dmat, curaddr)) {
982			sgsize = MIN(sgsize, PAGE_SIZE - (curaddr & PAGE_MASK));
983			curaddr = add_bounce_page(dmat, map, 0, curaddr,
984			    sgsize);
985		} else {
986			if (map->sync_count > 0)
987				sl_end = VM_PAGE_TO_PHYS(sl->pages) +
988				    sl->dataoffs + sl->datacount;
989
990			if (map->sync_count == 0 || curaddr != sl_end) {
991				if (++map->sync_count > dmat->nsegments)
992					break;
993				sl++;
994				sl->vaddr = 0;
995				sl->datacount = sgsize;
996				sl->pages = PHYS_TO_VM_PAGE(curaddr);
997				sl->dataoffs = curaddr & PAGE_MASK;
998			} else
999				sl->datacount += sgsize;
1000		}
1001		sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
1002		    segp);
1003		if (sgsize == 0)
1004			break;
1005		buf += sgsize;
1006		buflen -= sgsize;
1007	}
1008
1009	/*
1010	 * Did we fit?
1011	 */
1012	if (buflen != 0) {
1013		_bus_dmamap_unload(dmat, map);
1014		return (EFBIG); /* XXX better return value here? */
1015	}
1016	return (0);
1017}
1018
1019int
1020_bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map,
1021    struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags,
1022    bus_dma_segment_t *segs, int *segp)
1023{
1024
1025	return (bus_dmamap_load_ma_triv(dmat, map, ma, tlen, ma_offs, flags,
1026	    segs, segp));
1027}
1028
1029/*
1030 * Utility function to load a linear buffer.  segp contains
1031 * the starting segment on entrance, and the ending segment on exit.
1032 */
1033int
1034_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
1035    bus_size_t buflen, struct pmap *pmap, int flags, bus_dma_segment_t *segs,
1036    int *segp)
1037{
1038	bus_size_t sgsize;
1039	bus_addr_t curaddr;
1040	bus_addr_t sl_pend = 0;
1041	struct sync_list *sl;
1042	vm_offset_t kvaddr;
1043	vm_offset_t vaddr = (vm_offset_t)buf;
1044	vm_offset_t sl_vend = 0;
1045	int error = 0;
1046
1047	if (segs == NULL)
1048		segs = dmat->segments;
1049	if ((flags & BUS_DMA_LOAD_MBUF) != 0)
1050		map->flags |= DMAMAP_CACHE_ALIGNED;
1051
1052	if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
1053		_bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags);
1054		if (map->pagesneeded != 0) {
1055			error = _bus_dmamap_reserve_pages(dmat, map, flags);
1056			if (error)
1057				return (error);
1058		}
1059	}
1060	CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, "
1061	    "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment);
1062
1063	sl = map->slist + map->sync_count - 1;
1064
1065	while (buflen > 0) {
1066		/*
1067		 * Get the physical address for this segment.
1068		 */
1069		if (__predict_true(pmap == kernel_pmap)) {
1070			curaddr = pmap_kextract(vaddr);
1071			kvaddr = vaddr;
1072		} else {
1073			curaddr = pmap_extract(pmap, vaddr);
1074			map->flags &= ~DMAMAP_COHERENT;
1075			kvaddr = 0;
1076		}
1077
1078		/*
1079		 * Compute the segment size, and adjust counts.
1080		 */
1081		sgsize = PAGE_SIZE - (curaddr & PAGE_MASK);
1082		if (sgsize > dmat->maxsegsz)
1083			sgsize = dmat->maxsegsz;
1084		if (buflen < sgsize)
1085			sgsize = buflen;
1086
1087		if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
1088		    map->pagesneeded != 0 && run_filter(dmat, curaddr)) {
1089			curaddr = add_bounce_page(dmat, map, kvaddr, curaddr,
1090			    sgsize);
1091		} else {
1092			if (map->sync_count > 0) {
1093				sl_pend = VM_PAGE_TO_PHYS(sl->pages) +
1094				    sl->dataoffs + sl->datacount;
1095				sl_vend = sl->vaddr + sl->datacount;
1096			}
1097
1098			if (map->sync_count == 0 ||
1099			    (kvaddr != 0 && kvaddr != sl_vend) ||
1100			    (kvaddr == 0 && curaddr != sl_pend)) {
1101
1102				if (++map->sync_count > dmat->nsegments)
1103					goto cleanup;
1104				sl++;
1105				sl->vaddr = kvaddr;
1106				sl->datacount = sgsize;
1107				sl->pages = PHYS_TO_VM_PAGE(curaddr);
1108				sl->dataoffs = curaddr & PAGE_MASK;
1109			} else
1110				sl->datacount += sgsize;
1111		}
1112		sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
1113		    segp);
1114		if (sgsize == 0)
1115			break;
1116		vaddr += sgsize;
1117		buflen -= sgsize;
1118	}
1119
1120cleanup:
1121	/*
1122	 * Did we fit?
1123	 */
1124	if (buflen != 0) {
1125		_bus_dmamap_unload(dmat, map);
1126		return (EFBIG); /* XXX better return value here? */
1127	}
1128	return (0);
1129}
1130
1131void
1132__bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map,
1133		    struct memdesc *mem, bus_dmamap_callback_t *callback,
1134		    void *callback_arg)
1135{
1136
1137	KASSERT(dmat != NULL, ("dmatag is NULL"));
1138	KASSERT(map != NULL, ("dmamap is NULL"));
1139	map->mem = *mem;
1140	map->callback = callback;
1141	map->callback_arg = callback_arg;
1142}
1143
1144bus_dma_segment_t *
1145_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
1146		     bus_dma_segment_t *segs, int nsegs, int error)
1147{
1148
1149	if (segs == NULL)
1150		segs = dmat->segments;
1151	return (segs);
1152}
1153
1154/*
1155 * Release the mapping held by map.
1156 */
1157void
1158_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
1159{
1160	struct bounce_page *bpage;
1161
1162	while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1163		STAILQ_REMOVE_HEAD(&map->bpages, links);
1164		free_bounce_page(dmat, bpage);
1165	}
1166	map->sync_count = 0;
1167	return;
1168}
1169
1170static void
1171bus_dmamap_sync_buf(vm_offset_t buf, int len, bus_dmasync_op_t op,
1172    int bufaligned)
1173{
1174	char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align];
1175	register_t s;
1176	int partial;
1177
1178	if ((op & BUS_DMASYNC_PREWRITE) && !(op & BUS_DMASYNC_PREREAD)) {
1179		cpu_dcache_wb_range(buf, len);
1180		cpu_l2cache_wb_range(buf, len);
1181	}
1182
1183	/*
1184	 * If the caller promises the buffer is properly aligned to a cache line
1185	 * (even if the call parms make it look like it isn't) we can avoid
1186	 * attempting to preserve the non-DMA part of the cache line in the
1187	 * POSTREAD case, but we MUST still do a writeback in the PREREAD case.
1188	 *
1189	 * This covers the case of mbufs, where we know how they're aligned and
1190	 * know the CPU doesn't touch the header in front of the DMA data area
1191	 * during the IO, but it may have touched it right before invoking the
1192	 * sync, so a PREREAD writeback is required.
1193	 *
1194	 * It also handles buffers we created in bus_dmamem_alloc(), which are
1195	 * always aligned and padded to cache line size even if the IO length
1196	 * isn't a multiple of cache line size.  In this case the PREREAD
1197	 * writeback probably isn't required, but it's harmless.
1198	 */
1199	partial = (((vm_offset_t)buf) | len) & arm_dcache_align_mask;
1200
1201	if (op & BUS_DMASYNC_PREREAD) {
1202		if (!(op & BUS_DMASYNC_PREWRITE) && !partial) {
1203			cpu_dcache_inv_range(buf, len);
1204			cpu_l2cache_inv_range(buf, len);
1205		} else {
1206		    	cpu_dcache_wbinv_range(buf, len);
1207	    		cpu_l2cache_wbinv_range(buf, len);
1208		}
1209	}
1210	if (op & BUS_DMASYNC_POSTREAD) {
1211		if (partial && !bufaligned) {
1212			s = intr_disable();
1213			if (buf & arm_dcache_align_mask)
1214				memcpy(_tmp_cl, (void *)(buf &
1215				    ~arm_dcache_align_mask),
1216				    buf & arm_dcache_align_mask);
1217			if ((buf + len) & arm_dcache_align_mask)
1218				memcpy(_tmp_clend,
1219				    (void *)(buf + len),
1220				    arm_dcache_align -
1221				    ((buf + len) & arm_dcache_align_mask));
1222		}
1223		cpu_dcache_inv_range(buf, len);
1224		cpu_l2cache_inv_range(buf, len);
1225		if (partial && !bufaligned) {
1226			if (buf & arm_dcache_align_mask)
1227				memcpy((void *)(buf &
1228				    ~arm_dcache_align_mask), _tmp_cl,
1229				    buf & arm_dcache_align_mask);
1230			if ((buf + len) & arm_dcache_align_mask)
1231				memcpy((void *)(buf + len),
1232				    _tmp_clend, arm_dcache_align -
1233				    ((buf + len) & arm_dcache_align_mask));
1234			intr_restore(s);
1235		}
1236	}
1237}
1238
1239static void
1240bus_dmamap_sync_sl(struct sync_list *sl, bus_dmasync_op_t op,
1241    int bufaligned)
1242{
1243	vm_offset_t tempvaddr;
1244	vm_page_t curpage;
1245	size_t npages;
1246
1247	if (sl->vaddr != 0) {
1248		bus_dmamap_sync_buf(sl->vaddr, sl->datacount, op, bufaligned);
1249		return;
1250	}
1251
1252	tempvaddr = 0;
1253	npages = atop(round_page(sl->dataoffs + sl->datacount));
1254
1255	for (curpage = sl->pages; curpage != sl->pages + npages; ++curpage) {
1256		/*
1257		 * If the page is mapped to some other VA that hasn't
1258		 * been supplied to busdma, then pmap_quick_enter_page()
1259		 * will find all duplicate mappings and mark them
1260		 * uncacheable.
1261		 * That will also do any necessary wb/inv.  Otherwise,
1262		 * if the page is truly unmapped, then we don't actually
1263		 * need to do cache maintenance.
1264		 * XXX: May overwrite DMA'ed data in the POSTREAD
1265		 * case where the CPU has written to a cacheline not
1266		 * completely covered by the DMA region.
1267		 */
1268		KASSERT(VM_PAGE_TO_PHYS(curpage) == VM_PAGE_TO_PHYS(sl->pages) +
1269		    ptoa(curpage - sl->pages),
1270		    ("unexpected vm_page_t phys: 0x%08x != 0x%08x",
1271		    VM_PAGE_TO_PHYS(curpage), VM_PAGE_TO_PHYS(sl->pages) +
1272		    ptoa(curpage - sl->pages)));
1273		tempvaddr = pmap_quick_enter_page(curpage);
1274		pmap_quick_remove_page(tempvaddr);
1275	}
1276}
1277
1278static void
1279_bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1280{
1281	struct bounce_page *bpage;
1282	vm_offset_t datavaddr, tempvaddr;
1283
1284	if ((op & (BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTREAD)) == 0)
1285		return;
1286
1287	STAILQ_FOREACH(bpage, &map->bpages, links) {
1288		tempvaddr = 0;
1289		datavaddr = bpage->datavaddr;
1290		if (op & BUS_DMASYNC_PREWRITE) {
1291			if (datavaddr == 0) {
1292				tempvaddr =
1293				    pmap_quick_enter_page(bpage->datapage);
1294				datavaddr = tempvaddr | bpage->dataoffs;
1295			}
1296			bcopy((void *)datavaddr,
1297			    (void *)bpage->vaddr, bpage->datacount);
1298			if (tempvaddr != 0)
1299				pmap_quick_remove_page(tempvaddr);
1300			cpu_dcache_wb_range(bpage->vaddr, bpage->datacount);
1301			cpu_l2cache_wb_range(bpage->vaddr, bpage->datacount);
1302			dmat->bounce_zone->total_bounced++;
1303		}
1304		if (op & BUS_DMASYNC_POSTREAD) {
1305			cpu_dcache_inv_range(bpage->vaddr, bpage->datacount);
1306			cpu_l2cache_inv_range(bpage->vaddr, bpage->datacount);
1307			if (datavaddr == 0) {
1308				tempvaddr =
1309				    pmap_quick_enter_page(bpage->datapage);
1310				datavaddr = tempvaddr | bpage->dataoffs;
1311			}
1312			bcopy((void *)bpage->vaddr,
1313			    (void *)datavaddr, bpage->datacount);
1314			if (tempvaddr != 0)
1315				pmap_quick_remove_page(tempvaddr);
1316			dmat->bounce_zone->total_bounced++;
1317		}
1318	}
1319}
1320
1321void
1322_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1323{
1324	struct sync_list *sl, *end;
1325	int bufaligned;
1326
1327	if (op == BUS_DMASYNC_POSTWRITE)
1328		return;
1329	if (map->flags & DMAMAP_COHERENT)
1330		goto drain;
1331	if (STAILQ_FIRST(&map->bpages))
1332		_bus_dmamap_sync_bp(dmat, map, op);
1333	CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags);
1334	bufaligned = (map->flags & DMAMAP_CACHE_ALIGNED);
1335	if (map->sync_count) {
1336		end = &map->slist[map->sync_count];
1337		for (sl = &map->slist[0]; sl != end; sl++)
1338			bus_dmamap_sync_sl(sl, op, bufaligned);
1339	}
1340
1341drain:
1342
1343	cpu_drain_writebuf();
1344}
1345
1346static void
1347init_bounce_pages(void *dummy __unused)
1348{
1349
1350	total_bpages = 0;
1351	STAILQ_INIT(&bounce_zone_list);
1352	STAILQ_INIT(&bounce_map_waitinglist);
1353	STAILQ_INIT(&bounce_map_callbacklist);
1354	mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
1355}
1356SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
1357
1358static struct sysctl_ctx_list *
1359busdma_sysctl_tree(struct bounce_zone *bz)
1360{
1361	return (&bz->sysctl_tree);
1362}
1363
1364static struct sysctl_oid *
1365busdma_sysctl_tree_top(struct bounce_zone *bz)
1366{
1367	return (bz->sysctl_tree_top);
1368}
1369
1370static int
1371alloc_bounce_zone(bus_dma_tag_t dmat)
1372{
1373	struct bounce_zone *bz;
1374
1375	/* Check to see if we already have a suitable zone */
1376	STAILQ_FOREACH(bz, &bounce_zone_list, links) {
1377		if ((dmat->alignment <= bz->alignment)
1378		 && (dmat->lowaddr >= bz->lowaddr)) {
1379			dmat->bounce_zone = bz;
1380			return (0);
1381		}
1382	}
1383
1384	if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF,
1385	    M_NOWAIT | M_ZERO)) == NULL)
1386		return (ENOMEM);
1387
1388	STAILQ_INIT(&bz->bounce_page_list);
1389	bz->free_bpages = 0;
1390	bz->reserved_bpages = 0;
1391	bz->active_bpages = 0;
1392	bz->lowaddr = dmat->lowaddr;
1393	bz->alignment = MAX(dmat->alignment, PAGE_SIZE);
1394	bz->map_count = 0;
1395	snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount);
1396	busdma_zonecount++;
1397	snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr);
1398	STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links);
1399	dmat->bounce_zone = bz;
1400
1401	sysctl_ctx_init(&bz->sysctl_tree);
1402	bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree,
1403	    SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid,
1404	    CTLFLAG_RD, 0, "");
1405	if (bz->sysctl_tree_top == NULL) {
1406		sysctl_ctx_free(&bz->sysctl_tree);
1407		return (0);	/* XXX error code? */
1408	}
1409
1410	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1411	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1412	    "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0,
1413	    "Total bounce pages");
1414	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1415	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1416	    "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0,
1417	    "Free bounce pages");
1418	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1419	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1420	    "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0,
1421	    "Reserved bounce pages");
1422	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1423	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1424	    "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0,
1425	    "Active bounce pages");
1426	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1427	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1428	    "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0,
1429	    "Total bounce requests");
1430	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1431	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1432	    "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0,
1433	    "Total bounce requests that were deferred");
1434	SYSCTL_ADD_STRING(busdma_sysctl_tree(bz),
1435	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1436	    "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, "");
1437	SYSCTL_ADD_ULONG(busdma_sysctl_tree(bz),
1438	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1439	    "alignment", CTLFLAG_RD, &bz->alignment, "");
1440
1441	return (0);
1442}
1443
1444static int
1445alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
1446{
1447	struct bounce_zone *bz;
1448	int count;
1449
1450	bz = dmat->bounce_zone;
1451	count = 0;
1452	while (numpages > 0) {
1453		struct bounce_page *bpage;
1454
1455		bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF,
1456						     M_NOWAIT | M_ZERO);
1457
1458		if (bpage == NULL)
1459			break;
1460		bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF,
1461							 M_NOWAIT, 0ul,
1462							 bz->lowaddr,
1463							 PAGE_SIZE,
1464							 0);
1465		if (bpage->vaddr == 0) {
1466			free(bpage, M_DEVBUF);
1467			break;
1468		}
1469		bpage->busaddr = pmap_kextract(bpage->vaddr);
1470		mtx_lock(&bounce_lock);
1471		STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
1472		total_bpages++;
1473		bz->total_bpages++;
1474		bz->free_bpages++;
1475		mtx_unlock(&bounce_lock);
1476		count++;
1477		numpages--;
1478	}
1479	return (count);
1480}
1481
1482static int
1483reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
1484{
1485	struct bounce_zone *bz;
1486	int pages;
1487
1488	mtx_assert(&bounce_lock, MA_OWNED);
1489	bz = dmat->bounce_zone;
1490	pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved);
1491	if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
1492		return (map->pagesneeded - (map->pagesreserved + pages));
1493	bz->free_bpages -= pages;
1494	bz->reserved_bpages += pages;
1495	map->pagesreserved += pages;
1496	pages = map->pagesneeded - map->pagesreserved;
1497
1498	return (pages);
1499}
1500
1501static bus_addr_t
1502add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
1503		bus_addr_t addr, bus_size_t size)
1504{
1505	struct bounce_zone *bz;
1506	struct bounce_page *bpage;
1507
1508	KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag"));
1509	KASSERT(map != NULL, ("add_bounce_page: bad map %p", map));
1510
1511	bz = dmat->bounce_zone;
1512	if (map->pagesneeded == 0)
1513		panic("add_bounce_page: map doesn't need any pages");
1514	map->pagesneeded--;
1515
1516	if (map->pagesreserved == 0)
1517		panic("add_bounce_page: map doesn't need any pages");
1518	map->pagesreserved--;
1519
1520	mtx_lock(&bounce_lock);
1521	bpage = STAILQ_FIRST(&bz->bounce_page_list);
1522	if (bpage == NULL)
1523		panic("add_bounce_page: free page list is empty");
1524
1525	STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links);
1526	bz->reserved_bpages--;
1527	bz->active_bpages++;
1528	mtx_unlock(&bounce_lock);
1529
1530	if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1531		/* Page offset needs to be preserved. */
1532		bpage->vaddr |= addr & PAGE_MASK;
1533		bpage->busaddr |= addr & PAGE_MASK;
1534	}
1535	bpage->datavaddr = vaddr;
1536	bpage->datapage = PHYS_TO_VM_PAGE(addr);
1537	bpage->dataoffs = addr & PAGE_MASK;
1538	bpage->datacount = size;
1539	STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
1540	return (bpage->busaddr);
1541}
1542
1543static void
1544free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
1545{
1546	struct bus_dmamap *map;
1547	struct bounce_zone *bz;
1548
1549	bz = dmat->bounce_zone;
1550	bpage->datavaddr = 0;
1551	bpage->datacount = 0;
1552	if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1553		/*
1554		 * Reset the bounce page to start at offset 0.  Other uses
1555		 * of this bounce page may need to store a full page of
1556		 * data and/or assume it starts on a page boundary.
1557		 */
1558		bpage->vaddr &= ~PAGE_MASK;
1559		bpage->busaddr &= ~PAGE_MASK;
1560	}
1561
1562	mtx_lock(&bounce_lock);
1563	STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links);
1564	bz->free_bpages++;
1565	bz->active_bpages--;
1566	if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
1567		if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
1568			STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
1569			STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
1570					   map, links);
1571			busdma_swi_pending = 1;
1572			bz->total_deferred++;
1573			swi_sched(vm_ih, 0);
1574		}
1575	}
1576	mtx_unlock(&bounce_lock);
1577}
1578
1579void
1580busdma_swi(void)
1581{
1582	bus_dma_tag_t dmat;
1583	struct bus_dmamap *map;
1584
1585	mtx_lock(&bounce_lock);
1586	while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
1587		STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
1588		mtx_unlock(&bounce_lock);
1589		dmat = map->dmat;
1590		(dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK);
1591		bus_dmamap_load_mem(map->dmat, map, &map->mem,
1592		    map->callback, map->callback_arg, BUS_DMA_WAITOK);
1593		(dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK);
1594		mtx_lock(&bounce_lock);
1595	}
1596	mtx_unlock(&bounce_lock);
1597}
1598