busdma_machdep-v4.c revision 257201
1/*-
2 * Copyright (c) 2012 Ian Lepore
3 * Copyright (c) 2004 Olivier Houchard
4 * Copyright (c) 2002 Peter Grehan
5 * Copyright (c) 1997, 1998 Justin T. Gibbs.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions, and the following disclaimer,
13 *    without modification, immediately at the beginning of the file.
14 * 2. The name of the author may not be used to endorse or promote products
15 *    derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 *   From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
30 */
31
32#include <sys/cdefs.h>
33__FBSDID("$FreeBSD: head/sys/arm/arm/busdma_machdep.c 257201 2013-10-27 03:13:26Z ian $");
34
35/*
36 * ARM bus dma support routines.
37 *
38 * XXX Things to investigate / fix some day...
39 *  - What is the earliest that this API can be called?  Could there be any
40 *    fallout from changing the SYSINIT() order from SI_SUB_VM to SI_SUB_KMEM?
41 *  - The manpage mentions the BUS_DMA_NOWAIT flag only in the context of the
42 *    bus_dmamap_load() function.  This code has historically (and still does)
43 *    honor it in bus_dmamem_alloc().  If we got rid of that we could lose some
44 *    error checking because some resource management calls would become WAITOK
45 *    and thus "cannot fail."
46 *  - The decisions made by _bus_dma_can_bounce() should be made once, at tag
47 *    creation time, and the result stored in the tag.
48 *  - It should be possible to take some shortcuts when mapping a buffer we know
49 *    came from the uma(9) allocators based on what we know about such buffers
50 *    (aligned, contiguous, etc).
51 *  - The allocation of bounce pages could probably be cleaned up, then we could
52 *    retire arm_remap_nocache().
53 */
54
55#define _ARM32_BUS_DMA_PRIVATE
56#include <sys/param.h>
57#include <sys/systm.h>
58#include <sys/malloc.h>
59#include <sys/bus.h>
60#include <sys/busdma_bufalloc.h>
61#include <sys/interrupt.h>
62#include <sys/lock.h>
63#include <sys/proc.h>
64#include <sys/memdesc.h>
65#include <sys/mutex.h>
66#include <sys/ktr.h>
67#include <sys/kernel.h>
68#include <sys/sysctl.h>
69#include <sys/uio.h>
70
71#include <vm/uma.h>
72#include <vm/vm.h>
73#include <vm/vm_extern.h>
74#include <vm/vm_kern.h>
75#include <vm/vm_page.h>
76#include <vm/vm_map.h>
77
78#include <machine/atomic.h>
79#include <machine/bus.h>
80#include <machine/cpufunc.h>
81#include <machine/md_var.h>
82
83#define MAX_BPAGES 64
84#define BUS_DMA_COULD_BOUNCE	BUS_DMA_BUS3
85#define BUS_DMA_MIN_ALLOC_COMP	BUS_DMA_BUS4
86
87struct bounce_zone;
88
89struct bus_dma_tag {
90	bus_dma_tag_t		parent;
91	bus_size_t		alignment;
92	bus_addr_t		boundary;
93	bus_addr_t		lowaddr;
94	bus_addr_t		highaddr;
95	bus_dma_filter_t	*filter;
96	void			*filterarg;
97	bus_size_t		maxsize;
98	u_int			nsegments;
99	bus_size_t		maxsegsz;
100	int			flags;
101	int			ref_count;
102	int			map_count;
103	bus_dma_lock_t		*lockfunc;
104	void			*lockfuncarg;
105	/*
106	 * DMA range for this tag.  If the page doesn't fall within
107	 * one of these ranges, an error is returned.  The caller
108	 * may then decide what to do with the transfer.  If the
109	 * range pointer is NULL, it is ignored.
110	 */
111	struct arm32_dma_range	*ranges;
112	int			_nranges;
113	struct bounce_zone *bounce_zone;
114	/*
115	 * Most tags need one or two segments, and can use the local tagsegs
116	 * array.  For tags with a larger limit, we'll allocate a bigger array
117	 * on first use.
118	 */
119	bus_dma_segment_t	*segments;
120	bus_dma_segment_t	tagsegs[2];
121};
122
123struct bounce_page {
124	vm_offset_t	vaddr;		/* kva of bounce buffer */
125	bus_addr_t	busaddr;	/* Physical address */
126	vm_offset_t	datavaddr;	/* kva of client data */
127	bus_addr_t	dataaddr;	/* client physical address */
128	bus_size_t	datacount;	/* client data count */
129	STAILQ_ENTRY(bounce_page) links;
130};
131
132struct sync_list {
133	vm_offset_t	vaddr;		/* kva of bounce buffer */
134	bus_addr_t	busaddr;	/* Physical address */
135	bus_size_t	datacount;	/* client data count */
136};
137
138int busdma_swi_pending;
139
140struct bounce_zone {
141	STAILQ_ENTRY(bounce_zone) links;
142	STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
143	int		total_bpages;
144	int		free_bpages;
145	int		reserved_bpages;
146	int		active_bpages;
147	int		total_bounced;
148	int		total_deferred;
149	int		map_count;
150	bus_size_t	alignment;
151	bus_addr_t	lowaddr;
152	char		zoneid[8];
153	char		lowaddrid[20];
154	struct sysctl_ctx_list sysctl_tree;
155	struct sysctl_oid *sysctl_tree_top;
156};
157
158static struct mtx bounce_lock;
159static int total_bpages;
160static int busdma_zonecount;
161static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
162
163static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters");
164SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
165	   "Total bounce pages");
166
167#define DMAMAP_COHERENT		0x8
168#define DMAMAP_CACHE_ALIGNED	0x10
169
170struct bus_dmamap {
171	struct bp_list	bpages;
172	int		pagesneeded;
173	int		pagesreserved;
174        bus_dma_tag_t	dmat;
175	struct memdesc	mem;
176	int		flags;
177	STAILQ_ENTRY(bus_dmamap) links;
178	bus_dmamap_callback_t *callback;
179	void		      *callback_arg;
180	int		       sync_count;
181	struct sync_list       *slist;
182};
183
184static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
185static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
186
187static struct mtx busdma_mtx;
188
189MTX_SYSINIT(busdma_mtx, &busdma_mtx, "busdma lock", MTX_DEF);
190
191static void init_bounce_pages(void *dummy);
192static int alloc_bounce_zone(bus_dma_tag_t dmat);
193static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
194static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
195				int commit);
196static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
197				  vm_offset_t vaddr, bus_addr_t addr,
198				  bus_size_t size);
199static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
200
201/* Default tag, as most drivers provide no parent tag. */
202bus_dma_tag_t arm_root_dma_tag;
203
204/*
205 * ----------------------------------------------------------------------------
206 * Begin block of code useful to transplant to other implementations.
207 */
208
209static uma_zone_t dmamap_zone;	/* Cache of struct bus_dmamap items */
210
211static busdma_bufalloc_t coherent_allocator;	/* Cache of coherent buffers */
212static busdma_bufalloc_t standard_allocator;	/* Cache of standard buffers */
213
214/*
215 * This is the ctor function passed to uma_zcreate() for the pool of dma maps.
216 * It'll need platform-specific changes if this code is copied.
217 */
218static int
219dmamap_ctor(void *mem, int size, void *arg, int flags)
220{
221	bus_dmamap_t map;
222	bus_dma_tag_t dmat;
223
224	map = (bus_dmamap_t)mem;
225	dmat = (bus_dma_tag_t)arg;
226
227	dmat->map_count++;
228
229	map->dmat = dmat;
230	map->flags = 0;
231	STAILQ_INIT(&map->bpages);
232
233	return (0);
234}
235
236/*
237 * This is the dtor function passed to uma_zcreate() for the pool of dma maps.
238 * It may need platform-specific changes if this code is copied              .
239 */
240static void
241dmamap_dtor(void *mem, int size, void *arg)
242{
243	bus_dmamap_t map;
244
245	map = (bus_dmamap_t)mem;
246
247	map->dmat->map_count--;
248}
249
250static void
251busdma_init(void *dummy)
252{
253
254	/* Create a cache of maps for bus_dmamap_create(). */
255	dmamap_zone = uma_zcreate("dma maps", sizeof(struct bus_dmamap),
256	    dmamap_ctor, dmamap_dtor, NULL, NULL, UMA_ALIGN_PTR, 0);
257
258	/* Create a cache of buffers in standard (cacheable) memory. */
259	standard_allocator = busdma_bufalloc_create("buffer",
260	    arm_dcache_align,	/* minimum_alignment */
261	    NULL,		/* uma_alloc func */
262	    NULL,		/* uma_free func */
263	    0);			/* uma_zcreate_flags */
264
265	/*
266	 * Create a cache of buffers in uncacheable memory, to implement the
267	 * BUS_DMA_COHERENT (and potentially BUS_DMA_NOCACHE) flag.
268	 */
269	coherent_allocator = busdma_bufalloc_create("coherent",
270	    arm_dcache_align,	/* minimum_alignment */
271	    busdma_bufalloc_alloc_uncacheable,
272	    busdma_bufalloc_free_uncacheable,
273	    0);			/* uma_zcreate_flags */
274}
275
276/*
277 * This init historically used SI_SUB_VM, but now the init code requires
278 * malloc(9) using M_DEVBUF memory, which is set up later than SI_SUB_VM, by
279 * SI_SUB_KMEM and SI_ORDER_SECOND, so we'll go right after that by using
280 * SI_SUB_KMEM and SI_ORDER_THIRD.
281 */
282SYSINIT(busdma, SI_SUB_KMEM, SI_ORDER_THIRD, busdma_init, NULL);
283
284/*
285 * End block of code useful to transplant to other implementations.
286 * ----------------------------------------------------------------------------
287 */
288
289/*
290 * Return true if a match is made.
291 *
292 * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
293 *
294 * If paddr is within the bounds of the dma tag then call the filter callback
295 * to check for a match, if there is no filter callback then assume a match.
296 */
297static int
298run_filter(bus_dma_tag_t dmat, bus_addr_t paddr)
299{
300	int retval;
301
302	retval = 0;
303
304	do {
305		if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
306		 || ((paddr & (dmat->alignment - 1)) != 0))
307		 && (dmat->filter == NULL
308		  || (*dmat->filter)(dmat->filterarg, paddr) != 0))
309			retval = 1;
310
311		dmat = dmat->parent;
312	} while (retval == 0 && dmat != NULL);
313	return (retval);
314}
315
316/*
317 * This routine checks the exclusion zone constraints from a tag against the
318 * physical RAM available on the machine.  If a tag specifies an exclusion zone
319 * but there's no RAM in that zone, then we avoid allocating resources to bounce
320 * a request, and we can use any memory allocator (as opposed to needing
321 * kmem_alloc_contig() just because it can allocate pages in an address range).
322 *
323 * Most tags have BUS_SPACE_MAXADDR or BUS_SPACE_MAXADDR_32BIT (they are the
324 * same value on 32-bit architectures) as their lowaddr constraint, and we can't
325 * possibly have RAM at an address higher than the highest address we can
326 * express, so we take a fast out.
327 */
328static __inline int
329_bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr)
330{
331	int i;
332
333	if (lowaddr >= BUS_SPACE_MAXADDR)
334		return (0);
335
336	for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
337		if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
338		    || (lowaddr < phys_avail[i] &&
339		    highaddr > phys_avail[i]))
340			return (1);
341	}
342	return (0);
343}
344
345static __inline struct arm32_dma_range *
346_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
347    bus_addr_t curaddr)
348{
349	struct arm32_dma_range *dr;
350	int i;
351
352	for (i = 0, dr = ranges; i < nranges; i++, dr++) {
353		if (curaddr >= dr->dr_sysbase &&
354		    round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
355			return (dr);
356	}
357
358	return (NULL);
359}
360/*
361 * Convenience function for manipulating driver locks from busdma (during
362 * busdma_swi, for example).  Drivers that don't provide their own locks
363 * should specify &Giant to dmat->lockfuncarg.  Drivers that use their own
364 * non-mutex locking scheme don't have to use this at all.
365 */
366void
367busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
368{
369	struct mtx *dmtx;
370
371	dmtx = (struct mtx *)arg;
372	switch (op) {
373	case BUS_DMA_LOCK:
374		mtx_lock(dmtx);
375		break;
376	case BUS_DMA_UNLOCK:
377		mtx_unlock(dmtx);
378		break;
379	default:
380		panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
381	}
382}
383
384/*
385 * dflt_lock should never get called.  It gets put into the dma tag when
386 * lockfunc == NULL, which is only valid if the maps that are associated
387 * with the tag are meant to never be defered.
388 * XXX Should have a way to identify which driver is responsible here.
389 */
390static void
391dflt_lock(void *arg, bus_dma_lock_op_t op)
392{
393#ifdef INVARIANTS
394	panic("driver error: busdma dflt_lock called");
395#else
396	printf("DRIVER_ERROR: busdma dflt_lock called\n");
397#endif
398}
399
400/*
401 * Allocate a device specific dma_tag.
402 */
403#define SEG_NB 1024
404
405int
406bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
407		   bus_addr_t boundary, bus_addr_t lowaddr,
408		   bus_addr_t highaddr, bus_dma_filter_t *filter,
409		   void *filterarg, bus_size_t maxsize, int nsegments,
410		   bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
411		   void *lockfuncarg, bus_dma_tag_t *dmat)
412{
413	bus_dma_tag_t newtag;
414	int error = 0;
415	/* Return a NULL tag on failure */
416	*dmat = NULL;
417	if (!parent)
418		parent = arm_root_dma_tag;
419
420	newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT);
421	if (newtag == NULL) {
422		CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
423		    __func__, newtag, 0, error);
424		return (ENOMEM);
425	}
426
427	newtag->parent = parent;
428	newtag->alignment = alignment ? alignment : 1;
429	newtag->boundary = boundary;
430	newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
431	newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1);
432	newtag->filter = filter;
433	newtag->filterarg = filterarg;
434        newtag->maxsize = maxsize;
435        newtag->nsegments = nsegments;
436	newtag->maxsegsz = maxsegsz;
437	newtag->flags = flags;
438	newtag->ref_count = 1; /* Count ourself */
439	newtag->map_count = 0;
440	newtag->ranges = bus_dma_get_range();
441	newtag->_nranges = bus_dma_get_range_nb();
442	if (lockfunc != NULL) {
443		newtag->lockfunc = lockfunc;
444		newtag->lockfuncarg = lockfuncarg;
445	} else {
446		newtag->lockfunc = dflt_lock;
447		newtag->lockfuncarg = NULL;
448	}
449	/*
450	 * If all the segments we need fit into the local tagsegs array, set the
451	 * pointer now.  Otherwise NULL the pointer and an array of segments
452	 * will be allocated later, on first use.  We don't pre-allocate now
453	 * because some tags exist just to pass contraints to children in the
454	 * device hierarchy, and they tend to use BUS_SPACE_UNRESTRICTED and we
455	 * sure don't want to try to allocate an array for that.
456	 */
457	if (newtag->nsegments <= nitems(newtag->tagsegs))
458		newtag->segments = newtag->tagsegs;
459	else
460		newtag->segments = NULL;
461	/*
462	 * Take into account any restrictions imposed by our parent tag
463	 */
464        if (parent != NULL) {
465                newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr);
466                newtag->highaddr = MAX(parent->highaddr, newtag->highaddr);
467		if (newtag->boundary == 0)
468			newtag->boundary = parent->boundary;
469		else if (parent->boundary != 0)
470                	newtag->boundary = MIN(parent->boundary,
471					       newtag->boundary);
472		if ((newtag->filter != NULL) ||
473		    ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0))
474			newtag->flags |= BUS_DMA_COULD_BOUNCE;
475                if (newtag->filter == NULL) {
476                        /*
477                         * Short circuit looking at our parent directly
478                         * since we have encapsulated all of its information
479                         */
480                        newtag->filter = parent->filter;
481                        newtag->filterarg = parent->filterarg;
482                        newtag->parent = parent->parent;
483		}
484		if (newtag->parent != NULL)
485			atomic_add_int(&parent->ref_count, 1);
486	}
487	if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr)
488	 || newtag->alignment > 1)
489		newtag->flags |= BUS_DMA_COULD_BOUNCE;
490
491	if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
492	    (flags & BUS_DMA_ALLOCNOW) != 0) {
493		struct bounce_zone *bz;
494
495		/* Must bounce */
496
497		if ((error = alloc_bounce_zone(newtag)) != 0) {
498			free(newtag, M_DEVBUF);
499			return (error);
500		}
501		bz = newtag->bounce_zone;
502
503		if (ptoa(bz->total_bpages) < maxsize) {
504			int pages;
505
506			pages = atop(maxsize) - bz->total_bpages;
507
508			/* Add pages to our bounce pool */
509			if (alloc_bounce_pages(newtag, pages) < pages)
510				error = ENOMEM;
511		}
512		/* Performed initial allocation */
513		newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
514	} else
515		newtag->bounce_zone = NULL;
516	if (error != 0)
517		free(newtag, M_DEVBUF);
518	else
519		*dmat = newtag;
520	CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
521	    __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
522
523	return (error);
524}
525
526int
527bus_dma_tag_destroy(bus_dma_tag_t dmat)
528{
529#ifdef KTR
530	bus_dma_tag_t dmat_copy = dmat;
531#endif
532
533	if (dmat != NULL) {
534
535                if (dmat->map_count != 0)
536                        return (EBUSY);
537
538                while (dmat != NULL) {
539                        bus_dma_tag_t parent;
540
541                        parent = dmat->parent;
542                        atomic_subtract_int(&dmat->ref_count, 1);
543                        if (dmat->ref_count == 0) {
544				if (dmat->segments != NULL &&
545				    dmat->segments != dmat->tagsegs)
546					free(dmat->segments, M_DEVBUF);
547                                free(dmat, M_DEVBUF);
548                                /*
549                                 * Last reference count, so
550                                 * release our reference
551                                 * count on our parent.
552                                 */
553                                dmat = parent;
554                        } else
555                                dmat = NULL;
556                }
557        }
558	CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy);
559
560        return (0);
561}
562
563#include <sys/kdb.h>
564/*
565 * Allocate a handle for mapping from kva/uva/physical
566 * address space into bus device space.
567 */
568int
569bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
570{
571	struct sync_list *slist;
572	bus_dmamap_t map;
573	int error = 0;
574
575	slist = malloc(sizeof(*slist) * dmat->nsegments, M_DEVBUF, M_NOWAIT);
576	if (slist == NULL)
577		return (ENOMEM);
578
579	map = uma_zalloc_arg(dmamap_zone, dmat, M_NOWAIT);
580	*mapp = map;
581	if (map == NULL) {
582		free(slist, M_DEVBUF);
583		return (ENOMEM);
584	}
585
586	/*
587	 * If the tag's segments haven't been allocated yet we need to do it
588	 * now, because we can't sleep for resources at map load time.
589	 */
590	if (dmat->segments == NULL) {
591		dmat->segments = malloc(dmat->nsegments *
592		    sizeof(*dmat->segments), M_DEVBUF, M_NOWAIT);
593		if (dmat->segments == NULL) {
594			free(slist, M_DEVBUF);
595			uma_zfree(dmamap_zone, map);
596			*mapp = NULL;
597			return (ENOMEM);
598		}
599	}
600
601	/*
602	 * Bouncing might be required if the driver asks for an active
603	 * exclusion region, a data alignment that is stricter than 1, and/or
604	 * an active address boundary.
605	 */
606	if (dmat->flags & BUS_DMA_COULD_BOUNCE) {
607
608		/* Must bounce */
609		struct bounce_zone *bz;
610		int maxpages;
611
612		if (dmat->bounce_zone == NULL) {
613			if ((error = alloc_bounce_zone(dmat)) != 0) {
614				free(slist, M_DEVBUF);
615				uma_zfree(dmamap_zone, map);
616				*mapp = NULL;
617				return (error);
618			}
619		}
620		bz = dmat->bounce_zone;
621
622		/* Initialize the new map */
623		STAILQ_INIT(&((*mapp)->bpages));
624
625		/*
626		 * Attempt to add pages to our pool on a per-instance
627		 * basis up to a sane limit.
628		 */
629		maxpages = MAX_BPAGES;
630		if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
631		 || (bz->map_count > 0 && bz->total_bpages < maxpages)) {
632			int pages;
633
634			pages = MAX(atop(dmat->maxsize), 1);
635			pages = MIN(maxpages - bz->total_bpages, pages);
636			pages = MAX(pages, 1);
637			if (alloc_bounce_pages(dmat, pages) < pages)
638				error = ENOMEM;
639
640			if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) {
641				if (error == 0)
642					dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
643			} else {
644				error = 0;
645			}
646		}
647		bz->map_count++;
648	}
649	map->sync_count = 0;
650	map->slist = slist;
651	CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
652	    __func__, dmat, dmat->flags, error);
653
654	return (0);
655}
656
657/*
658 * Destroy a handle for mapping from kva/uva/physical
659 * address space into bus device space.
660 */
661int
662bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
663{
664
665	if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) {
666		CTR3(KTR_BUSDMA, "%s: tag %p error %d",
667		    __func__, dmat, EBUSY);
668		return (EBUSY);
669	}
670	free(map->slist, M_DEVBUF);
671	uma_zfree(dmamap_zone, map);
672	if (dmat->bounce_zone)
673		dmat->bounce_zone->map_count--;
674	CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
675        return (0);
676}
677
678/*
679 * Allocate a piece of memory that can be efficiently mapped into bus device
680 * space based on the constraints listed in the dma tag.  Returns a pointer to
681 * the allocated memory, and a pointer to an associated bus_dmamap.
682 */
683int
684bus_dmamem_alloc(bus_dma_tag_t dmat, void **vaddrp, int flags,
685                 bus_dmamap_t *mapp)
686{
687	struct sync_list *slist;
688	void * vaddr;
689	struct busdma_bufzone *bufzone;
690	busdma_bufalloc_t ba;
691	bus_dmamap_t map;
692	int mflags;
693	vm_memattr_t memattr;
694
695	if (flags & BUS_DMA_NOWAIT)
696		mflags = M_NOWAIT;
697	else
698		mflags = M_WAITOK;
699	/*
700	 * If the tag's segments haven't been allocated yet we need to do it
701	 * now, because we can't sleep for resources at map load time.
702	 */
703	if (dmat->segments == NULL)
704		dmat->segments = malloc(dmat->nsegments *
705		   sizeof(*dmat->segments), M_DEVBUF, mflags);
706
707	slist = malloc(sizeof(*slist) * dmat->nsegments, M_DEVBUF, M_NOWAIT);
708	if (slist == NULL)
709		return (ENOMEM);
710	map = uma_zalloc_arg(dmamap_zone, dmat, mflags);
711	if (map == NULL) {
712		free(slist, M_DEVBUF);
713		return (ENOMEM);
714	}
715	if (flags & BUS_DMA_COHERENT) {
716		memattr = VM_MEMATTR_UNCACHEABLE;
717		ba = coherent_allocator;
718		map->flags |= DMAMAP_COHERENT;
719	} else {
720		memattr = VM_MEMATTR_DEFAULT;
721		ba = standard_allocator;
722	}
723	/* All buffers we allocate are cache-aligned. */
724	map->flags |= DMAMAP_CACHE_ALIGNED;
725
726	if (flags & BUS_DMA_ZERO)
727		mflags |= M_ZERO;
728
729	/*
730	 * Try to find a bufzone in the allocator that holds a cache of buffers
731	 * of the right size for this request.  If the buffer is too big to be
732	 * held in the allocator cache, this returns NULL.
733	 */
734	bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
735
736	/*
737	 * Allocate the buffer from the uma(9) allocator if...
738	 *  - It's small enough to be in the allocator (bufzone not NULL).
739	 *  - The alignment constraint isn't larger than the allocation size
740	 *    (the allocator aligns buffers to their size boundaries).
741	 *  - There's no need to handle lowaddr/highaddr exclusion zones.
742	 * else allocate non-contiguous pages if...
743	 *  - The page count that could get allocated doesn't exceed nsegments.
744	 *  - The alignment constraint isn't larger than a page boundary.
745	 *  - There are no boundary-crossing constraints.
746	 * else allocate a block of contiguous pages because one or more of the
747	 * constraints is something that only the contig allocator can fulfill.
748	 */
749	if (bufzone != NULL && dmat->alignment <= bufzone->size &&
750	    !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) {
751		vaddr = uma_zalloc(bufzone->umazone, mflags);
752	} else if (dmat->nsegments >= btoc(dmat->maxsize) &&
753	    dmat->alignment <= PAGE_SIZE && dmat->boundary == 0) {
754		vaddr = (void *)kmem_alloc_attr(kernel_arena, dmat->maxsize,
755		    mflags, 0, dmat->lowaddr, memattr);
756	} else {
757		vaddr = (void *)kmem_alloc_contig(kernel_arena, dmat->maxsize,
758		    mflags, 0, dmat->lowaddr, dmat->alignment, dmat->boundary,
759		    memattr);
760	}
761	if (vaddr == NULL) {
762		free(slist, M_DEVBUF);
763		uma_zfree(dmamap_zone, map);
764		map = NULL;
765	} else {
766		map->slist = slist;
767		map->sync_count = 0;
768	}
769	*vaddrp = vaddr;
770	*mapp = map;
771
772	return (vaddr == NULL ? ENOMEM : 0);
773}
774
775/*
776 * Free a piece of memory that was allocated via bus_dmamem_alloc, along with
777 * its associated map.
778 */
779void
780bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
781{
782	struct busdma_bufzone *bufzone;
783	busdma_bufalloc_t ba;
784
785	if (map->flags & DMAMAP_COHERENT)
786		ba = coherent_allocator;
787	else
788		ba = standard_allocator;
789	uma_zfree(dmamap_zone, map);
790
791	free(map->slist, M_DEVBUF);
792	/* Be careful not to access map from here on. */
793
794	bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
795
796	if (bufzone != NULL && dmat->alignment <= bufzone->size &&
797	    !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr))
798		uma_zfree(bufzone->umazone, vaddr);
799	else
800		kmem_free(kernel_arena, (vm_offset_t)vaddr, dmat->maxsize);
801}
802
803static void
804_bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
805    bus_size_t buflen, int flags)
806{
807	bus_addr_t curaddr;
808	bus_size_t sgsize;
809
810	if ((map->pagesneeded == 0)) {
811		CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
812		    dmat->lowaddr, dmat->boundary, dmat->alignment);
813		CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
814		    map, map->pagesneeded);
815		/*
816		 * Count the number of bounce pages
817		 * needed in order to complete this transfer
818		 */
819		curaddr = buf;
820		while (buflen != 0) {
821			sgsize = MIN(buflen, dmat->maxsegsz);
822			if (run_filter(dmat, curaddr) != 0) {
823				sgsize = MIN(sgsize, PAGE_SIZE);
824				map->pagesneeded++;
825			}
826			curaddr += sgsize;
827			buflen -= sgsize;
828		}
829		CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
830	}
831}
832
833static void
834_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap,
835    void *buf, bus_size_t buflen, int flags)
836{
837	vm_offset_t vaddr;
838	vm_offset_t vendaddr;
839	bus_addr_t paddr;
840
841	if ((map->pagesneeded == 0)) {
842		CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
843		    dmat->lowaddr, dmat->boundary, dmat->alignment);
844		CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
845		    map, map->pagesneeded);
846		/*
847		 * Count the number of bounce pages
848		 * needed in order to complete this transfer
849		 */
850		vaddr = trunc_page((vm_offset_t)buf);
851		vendaddr = (vm_offset_t)buf + buflen;
852
853		while (vaddr < vendaddr) {
854			if (__predict_true(pmap == kernel_pmap))
855				paddr = pmap_kextract(vaddr);
856			else
857				paddr = pmap_extract(pmap, vaddr);
858			if (run_filter(dmat, paddr) != 0)
859				map->pagesneeded++;
860			vaddr += PAGE_SIZE;
861		}
862		CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
863	}
864}
865
866static int
867_bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags)
868{
869
870	/* Reserve Necessary Bounce Pages */
871	mtx_lock(&bounce_lock);
872	if (flags & BUS_DMA_NOWAIT) {
873		if (reserve_bounce_pages(dmat, map, 0) != 0) {
874			mtx_unlock(&bounce_lock);
875			return (ENOMEM);
876		}
877	} else {
878		if (reserve_bounce_pages(dmat, map, 1) != 0) {
879			/* Queue us for resources */
880			STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links);
881			mtx_unlock(&bounce_lock);
882			return (EINPROGRESS);
883		}
884	}
885	mtx_unlock(&bounce_lock);
886
887	return (0);
888}
889
890/*
891 * Add a single contiguous physical range to the segment list.
892 */
893static int
894_bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr,
895    bus_size_t sgsize, bus_dma_segment_t *segs, int *segp)
896{
897	bus_addr_t baddr, bmask;
898	int seg;
899
900	/*
901	 * Make sure we don't cross any boundaries.
902	 */
903	bmask = ~(dmat->boundary - 1);
904	if (dmat->boundary > 0) {
905		baddr = (curaddr + dmat->boundary) & bmask;
906		if (sgsize > (baddr - curaddr))
907			sgsize = (baddr - curaddr);
908	}
909	if (dmat->ranges) {
910		struct arm32_dma_range *dr;
911
912		dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges,
913		    curaddr);
914		if (dr == NULL)
915			return (0);
916		/*
917		 * In a valid DMA range.  Translate the physical
918		 * memory address to an address in the DMA window.
919		 */
920		curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
921
922	}
923
924	seg = *segp;
925	/*
926	 * Insert chunk into a segment, coalescing with
927	 * the previous segment if possible.
928	 */
929	if (seg >= 0 &&
930	    curaddr == segs[seg].ds_addr + segs[seg].ds_len &&
931	    (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
932	    (dmat->boundary == 0 ||
933	     (segs[seg].ds_addr & bmask) == (curaddr & bmask))) {
934		segs[seg].ds_len += sgsize;
935	} else {
936		if (++seg >= dmat->nsegments)
937			return (0);
938		segs[seg].ds_addr = curaddr;
939		segs[seg].ds_len = sgsize;
940	}
941	*segp = seg;
942	return (sgsize);
943}
944
945/*
946 * Utility function to load a physical buffer.  segp contains
947 * the starting segment on entrace, and the ending segment on exit.
948 */
949int
950_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
951    bus_size_t buflen, int flags, bus_dma_segment_t *segs, int *segp)
952{
953	bus_size_t sgsize;
954	bus_addr_t curaddr;
955	int error;
956
957	if (segs == NULL)
958		segs = dmat->segments;
959
960	if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
961		_bus_dmamap_count_phys(dmat, map, buf, buflen, flags);
962		if (map->pagesneeded != 0) {
963			error = _bus_dmamap_reserve_pages(dmat, map, flags);
964			if (error)
965				return (error);
966		}
967	}
968
969	while (buflen > 0) {
970		curaddr = buf;
971		sgsize = MIN(buflen, dmat->maxsegsz);
972		if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
973		    map->pagesneeded != 0 && run_filter(dmat, curaddr)) {
974			sgsize = MIN(sgsize, PAGE_SIZE);
975			curaddr = add_bounce_page(dmat, map, 0, curaddr,
976			    sgsize);
977		}
978		sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
979		    segp);
980		if (sgsize == 0)
981			break;
982		buf += sgsize;
983		buflen -= sgsize;
984	}
985
986	/*
987	 * Did we fit?
988	 */
989	if (buflen != 0) {
990		_bus_dmamap_unload(dmat, map);
991		return (EFBIG); /* XXX better return value here? */
992	}
993	return (0);
994}
995/*
996 * Utility function to load a linear buffer.  segp contains
997 * the starting segment on entrance, and the ending segment on exit.
998 */
999int
1000_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
1001    bus_size_t buflen, struct pmap *pmap, int flags, bus_dma_segment_t *segs,
1002    int *segp)
1003{
1004	bus_size_t sgsize;
1005	bus_addr_t curaddr;
1006	struct sync_list *sl;
1007	vm_offset_t vaddr = (vm_offset_t)buf;
1008	int error = 0;
1009
1010	if (segs == NULL)
1011		segs = dmat->segments;
1012	if ((flags & BUS_DMA_LOAD_MBUF) != 0)
1013		map->flags |= DMAMAP_CACHE_ALIGNED;
1014
1015	if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
1016		_bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags);
1017		if (map->pagesneeded != 0) {
1018			error = _bus_dmamap_reserve_pages(dmat, map, flags);
1019			if (error)
1020				return (error);
1021		}
1022	}
1023	CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, "
1024	    "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment);
1025
1026	while (buflen > 0) {
1027		/*
1028		 * Get the physical address for this segment.
1029		 */
1030		if (__predict_true(pmap == kernel_pmap)) {
1031			curaddr = pmap_kextract(vaddr);
1032		} else {
1033			curaddr = pmap_extract(pmap, vaddr);
1034			map->flags &= ~DMAMAP_COHERENT;
1035		}
1036
1037		/*
1038		 * Compute the segment size, and adjust counts.
1039		 */
1040		sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
1041		if (sgsize > dmat->maxsegsz)
1042			sgsize = dmat->maxsegsz;
1043		if (buflen < sgsize)
1044			sgsize = buflen;
1045
1046		if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
1047		    map->pagesneeded != 0 && run_filter(dmat, curaddr)) {
1048			curaddr = add_bounce_page(dmat, map, vaddr, curaddr,
1049			    sgsize);
1050		} else {
1051			sl = &map->slist[map->sync_count - 1];
1052			if (map->sync_count == 0 ||
1053			    vaddr != sl->vaddr + sl->datacount) {
1054				if (++map->sync_count > dmat->nsegments)
1055					goto cleanup;
1056				sl++;
1057				sl->vaddr = vaddr;
1058				sl->datacount = sgsize;
1059				sl->busaddr = curaddr;
1060			} else
1061				sl->datacount += sgsize;
1062		}
1063		sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
1064		    segp);
1065		if (sgsize == 0)
1066			break;
1067		vaddr += sgsize;
1068		buflen -= sgsize;
1069	}
1070
1071cleanup:
1072	/*
1073	 * Did we fit?
1074	 */
1075	if (buflen != 0) {
1076		_bus_dmamap_unload(dmat, map);
1077		return (EFBIG); /* XXX better return value here? */
1078	}
1079	return (0);
1080}
1081
1082void
1083__bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map,
1084		    struct memdesc *mem, bus_dmamap_callback_t *callback,
1085		    void *callback_arg)
1086{
1087
1088	KASSERT(dmat != NULL, ("dmatag is NULL"));
1089	KASSERT(map != NULL, ("dmamap is NULL"));
1090	map->mem = *mem;
1091	map->callback = callback;
1092	map->callback_arg = callback_arg;
1093}
1094
1095bus_dma_segment_t *
1096_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
1097		     bus_dma_segment_t *segs, int nsegs, int error)
1098{
1099
1100	if (segs == NULL)
1101		segs = dmat->segments;
1102	return (segs);
1103}
1104
1105/*
1106 * Release the mapping held by map.
1107 */
1108void
1109_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
1110{
1111	struct bounce_page *bpage;
1112
1113	while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1114		STAILQ_REMOVE_HEAD(&map->bpages, links);
1115		free_bounce_page(dmat, bpage);
1116	}
1117	map->sync_count = 0;
1118	return;
1119}
1120
1121static void
1122bus_dmamap_sync_buf(vm_offset_t buf, int len, bus_dmasync_op_t op,
1123    int bufaligned)
1124{
1125	char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align];
1126	register_t s;
1127	int partial;
1128
1129	if ((op & BUS_DMASYNC_PREWRITE) && !(op & BUS_DMASYNC_PREREAD)) {
1130		cpu_dcache_wb_range(buf, len);
1131		cpu_l2cache_wb_range(buf, len);
1132	}
1133
1134	/*
1135	 * If the caller promises the buffer is properly aligned to a cache line
1136	 * (even if the call parms make it look like it isn't) we can avoid
1137	 * attempting to preserve the non-DMA part of the cache line in the
1138	 * POSTREAD case, but we MUST still do a writeback in the PREREAD case.
1139	 *
1140	 * This covers the case of mbufs, where we know how they're aligned and
1141	 * know the CPU doesn't touch the header in front of the DMA data area
1142	 * during the IO, but it may have touched it right before invoking the
1143	 * sync, so a PREREAD writeback is required.
1144	 *
1145	 * It also handles buffers we created in bus_dmamem_alloc(), which are
1146	 * always aligned and padded to cache line size even if the IO length
1147	 * isn't a multiple of cache line size.  In this case the PREREAD
1148	 * writeback probably isn't required, but it's harmless.
1149	 */
1150	partial = (((vm_offset_t)buf) | len) & arm_dcache_align_mask;
1151
1152	if (op & BUS_DMASYNC_PREREAD) {
1153		if (!(op & BUS_DMASYNC_PREWRITE) && !partial) {
1154			cpu_dcache_inv_range(buf, len);
1155			cpu_l2cache_inv_range(buf, len);
1156		} else {
1157		    	cpu_dcache_wbinv_range(buf, len);
1158	    		cpu_l2cache_wbinv_range(buf, len);
1159		}
1160	}
1161	if (op & BUS_DMASYNC_POSTREAD) {
1162		if (partial && !bufaligned) {
1163			s = intr_disable();
1164			if (buf & arm_dcache_align_mask)
1165				memcpy(_tmp_cl, (void *)(buf &
1166				    ~arm_dcache_align_mask),
1167				    buf & arm_dcache_align_mask);
1168			if ((buf + len) & arm_dcache_align_mask)
1169				memcpy(_tmp_clend,
1170				    (void *)(buf + len),
1171				    arm_dcache_align -
1172				    ((buf + len) & arm_dcache_align_mask));
1173		}
1174		cpu_dcache_inv_range(buf, len);
1175		cpu_l2cache_inv_range(buf, len);
1176		if (partial && !bufaligned) {
1177			if (buf & arm_dcache_align_mask)
1178				memcpy((void *)(buf &
1179				    ~arm_dcache_align_mask), _tmp_cl,
1180				    buf & arm_dcache_align_mask);
1181			if ((buf + len) & arm_dcache_align_mask)
1182				memcpy((void *)(buf + len),
1183				    _tmp_clend, arm_dcache_align -
1184				    ((buf + len) & arm_dcache_align_mask));
1185			intr_restore(s);
1186		}
1187	}
1188}
1189
1190static void
1191_bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1192{
1193	struct bounce_page *bpage;
1194
1195	STAILQ_FOREACH(bpage, &map->bpages, links) {
1196		if (op & BUS_DMASYNC_PREWRITE) {
1197			if (bpage->datavaddr != 0)
1198				bcopy((void *)bpage->datavaddr,
1199				    (void *)bpage->vaddr, bpage->datacount);
1200			else
1201				physcopyout(bpage->dataaddr,
1202				    (void *)bpage->vaddr,bpage->datacount);
1203			cpu_dcache_wb_range(bpage->vaddr, bpage->datacount);
1204			cpu_l2cache_wb_range(bpage->vaddr, bpage->datacount);
1205			dmat->bounce_zone->total_bounced++;
1206		}
1207		if (op & BUS_DMASYNC_POSTREAD) {
1208			cpu_dcache_inv_range(bpage->vaddr, bpage->datacount);
1209			cpu_l2cache_inv_range(bpage->vaddr, bpage->datacount);
1210			if (bpage->datavaddr != 0)
1211				bcopy((void *)bpage->vaddr,
1212				    (void *)bpage->datavaddr, bpage->datacount);
1213			else
1214				physcopyin((void *)bpage->vaddr,
1215				    bpage->dataaddr, bpage->datacount);
1216			dmat->bounce_zone->total_bounced++;
1217		}
1218	}
1219}
1220
1221void
1222_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1223{
1224	struct sync_list *sl, *end;
1225	int bufaligned;
1226
1227	if (op == BUS_DMASYNC_POSTWRITE)
1228		return;
1229	if (map->flags & DMAMAP_COHERENT)
1230		goto drain;
1231	if (STAILQ_FIRST(&map->bpages))
1232		_bus_dmamap_sync_bp(dmat, map, op);
1233	CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags);
1234	bufaligned = (map->flags & DMAMAP_CACHE_ALIGNED);
1235	if (map->sync_count) {
1236		end = &map->slist[map->sync_count];
1237		for (sl = &map->slist[0]; sl != end; sl++)
1238			bus_dmamap_sync_buf(sl->vaddr, sl->datacount, op,
1239			    bufaligned);
1240	}
1241
1242drain:
1243
1244	cpu_drain_writebuf();
1245}
1246
1247static void
1248init_bounce_pages(void *dummy __unused)
1249{
1250
1251	total_bpages = 0;
1252	STAILQ_INIT(&bounce_zone_list);
1253	STAILQ_INIT(&bounce_map_waitinglist);
1254	STAILQ_INIT(&bounce_map_callbacklist);
1255	mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
1256}
1257SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
1258
1259static struct sysctl_ctx_list *
1260busdma_sysctl_tree(struct bounce_zone *bz)
1261{
1262	return (&bz->sysctl_tree);
1263}
1264
1265static struct sysctl_oid *
1266busdma_sysctl_tree_top(struct bounce_zone *bz)
1267{
1268	return (bz->sysctl_tree_top);
1269}
1270
1271static int
1272alloc_bounce_zone(bus_dma_tag_t dmat)
1273{
1274	struct bounce_zone *bz;
1275
1276	/* Check to see if we already have a suitable zone */
1277	STAILQ_FOREACH(bz, &bounce_zone_list, links) {
1278		if ((dmat->alignment <= bz->alignment)
1279		 && (dmat->lowaddr >= bz->lowaddr)) {
1280			dmat->bounce_zone = bz;
1281			return (0);
1282		}
1283	}
1284
1285	if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF,
1286	    M_NOWAIT | M_ZERO)) == NULL)
1287		return (ENOMEM);
1288
1289	STAILQ_INIT(&bz->bounce_page_list);
1290	bz->free_bpages = 0;
1291	bz->reserved_bpages = 0;
1292	bz->active_bpages = 0;
1293	bz->lowaddr = dmat->lowaddr;
1294	bz->alignment = MAX(dmat->alignment, PAGE_SIZE);
1295	bz->map_count = 0;
1296	snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount);
1297	busdma_zonecount++;
1298	snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr);
1299	STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links);
1300	dmat->bounce_zone = bz;
1301
1302	sysctl_ctx_init(&bz->sysctl_tree);
1303	bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree,
1304	    SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid,
1305	    CTLFLAG_RD, 0, "");
1306	if (bz->sysctl_tree_top == NULL) {
1307		sysctl_ctx_free(&bz->sysctl_tree);
1308		return (0);	/* XXX error code? */
1309	}
1310
1311	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1312	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1313	    "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0,
1314	    "Total bounce pages");
1315	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1316	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1317	    "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0,
1318	    "Free bounce pages");
1319	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1320	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1321	    "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0,
1322	    "Reserved bounce pages");
1323	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1324	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1325	    "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0,
1326	    "Active bounce pages");
1327	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1328	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1329	    "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0,
1330	    "Total bounce requests");
1331	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1332	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1333	    "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0,
1334	    "Total bounce requests that were deferred");
1335	SYSCTL_ADD_STRING(busdma_sysctl_tree(bz),
1336	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1337	    "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, "");
1338	SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1339	    SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1340	    "alignment", CTLFLAG_RD, &bz->alignment, 0, "");
1341
1342	return (0);
1343}
1344
1345static int
1346alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
1347{
1348	struct bounce_zone *bz;
1349	int count;
1350
1351	bz = dmat->bounce_zone;
1352	count = 0;
1353	while (numpages > 0) {
1354		struct bounce_page *bpage;
1355
1356		bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF,
1357						     M_NOWAIT | M_ZERO);
1358
1359		if (bpage == NULL)
1360			break;
1361		bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF,
1362							 M_NOWAIT, 0ul,
1363							 bz->lowaddr,
1364							 PAGE_SIZE,
1365							 0);
1366		if (bpage->vaddr == 0) {
1367			free(bpage, M_DEVBUF);
1368			break;
1369		}
1370		bpage->busaddr = pmap_kextract(bpage->vaddr);
1371		mtx_lock(&bounce_lock);
1372		STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
1373		total_bpages++;
1374		bz->total_bpages++;
1375		bz->free_bpages++;
1376		mtx_unlock(&bounce_lock);
1377		count++;
1378		numpages--;
1379	}
1380	return (count);
1381}
1382
1383static int
1384reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
1385{
1386	struct bounce_zone *bz;
1387	int pages;
1388
1389	mtx_assert(&bounce_lock, MA_OWNED);
1390	bz = dmat->bounce_zone;
1391	pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved);
1392	if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
1393		return (map->pagesneeded - (map->pagesreserved + pages));
1394	bz->free_bpages -= pages;
1395	bz->reserved_bpages += pages;
1396	map->pagesreserved += pages;
1397	pages = map->pagesneeded - map->pagesreserved;
1398
1399	return (pages);
1400}
1401
1402static bus_addr_t
1403add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
1404		bus_addr_t addr, bus_size_t size)
1405{
1406	struct bounce_zone *bz;
1407	struct bounce_page *bpage;
1408
1409	KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag"));
1410	KASSERT(map != NULL, ("add_bounce_page: bad map %p", map));
1411
1412	bz = dmat->bounce_zone;
1413	if (map->pagesneeded == 0)
1414		panic("add_bounce_page: map doesn't need any pages");
1415	map->pagesneeded--;
1416
1417	if (map->pagesreserved == 0)
1418		panic("add_bounce_page: map doesn't need any pages");
1419	map->pagesreserved--;
1420
1421	mtx_lock(&bounce_lock);
1422	bpage = STAILQ_FIRST(&bz->bounce_page_list);
1423	if (bpage == NULL)
1424		panic("add_bounce_page: free page list is empty");
1425
1426	STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links);
1427	bz->reserved_bpages--;
1428	bz->active_bpages++;
1429	mtx_unlock(&bounce_lock);
1430
1431	if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1432		/* Page offset needs to be preserved. */
1433		bpage->vaddr |= vaddr & PAGE_MASK;
1434		bpage->busaddr |= vaddr & PAGE_MASK;
1435	}
1436	bpage->datavaddr = vaddr;
1437	bpage->dataaddr = addr;
1438	bpage->datacount = size;
1439	STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
1440	return (bpage->busaddr);
1441}
1442
1443static void
1444free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
1445{
1446	struct bus_dmamap *map;
1447	struct bounce_zone *bz;
1448
1449	bz = dmat->bounce_zone;
1450	bpage->datavaddr = 0;
1451	bpage->datacount = 0;
1452	if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1453		/*
1454		 * Reset the bounce page to start at offset 0.  Other uses
1455		 * of this bounce page may need to store a full page of
1456		 * data and/or assume it starts on a page boundary.
1457		 */
1458		bpage->vaddr &= ~PAGE_MASK;
1459		bpage->busaddr &= ~PAGE_MASK;
1460	}
1461
1462	mtx_lock(&bounce_lock);
1463	STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links);
1464	bz->free_bpages++;
1465	bz->active_bpages--;
1466	if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
1467		if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
1468			STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
1469			STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
1470					   map, links);
1471			busdma_swi_pending = 1;
1472			bz->total_deferred++;
1473			swi_sched(vm_ih, 0);
1474		}
1475	}
1476	mtx_unlock(&bounce_lock);
1477}
1478
1479void
1480busdma_swi(void)
1481{
1482	bus_dma_tag_t dmat;
1483	struct bus_dmamap *map;
1484
1485	mtx_lock(&bounce_lock);
1486	while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
1487		STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
1488		mtx_unlock(&bounce_lock);
1489		dmat = map->dmat;
1490		(dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK);
1491		bus_dmamap_load_mem(map->dmat, map, &map->mem,
1492		    map->callback, map->callback_arg, BUS_DMA_WAITOK);
1493		(dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK);
1494		mtx_lock(&bounce_lock);
1495	}
1496	mtx_unlock(&bounce_lock);
1497}
1498