busdma_machdep-v4.c revision 143655
1/*- 2 * Copyright (c) 2004 Olivier Houchard 3 * Copyright (c) 2002 Peter Grehan 4 * Copyright (c) 1997, 1998 Justin T. Gibbs. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: head/sys/arm/arm/busdma_machdep.c 143655 2005-03-15 14:57:30Z jmg $"); 33 34/* 35 * MacPPC bus dma support routines 36 */ 37 38#define _ARM32_BUS_DMA_PRIVATE 39#include <sys/param.h> 40#include <sys/systm.h> 41#include <sys/malloc.h> 42#include <sys/bus.h> 43#include <sys/interrupt.h> 44#include <sys/lock.h> 45#include <sys/proc.h> 46#include <sys/mutex.h> 47#include <sys/mbuf.h> 48#include <sys/uio.h> 49#include <sys/ktr.h> 50 51#include <vm/vm.h> 52#include <vm/vm_page.h> 53#include <vm/vm_map.h> 54 55#include <machine/atomic.h> 56#include <machine/bus.h> 57#include <machine/cpufunc.h> 58 59struct bus_dma_tag { 60 bus_dma_tag_t parent; 61 bus_size_t alignment; 62 bus_size_t boundary; 63 bus_addr_t lowaddr; 64 bus_addr_t highaddr; 65 bus_dma_filter_t *filter; 66 void *filterarg; 67 bus_size_t maxsize; 68 u_int nsegments; 69 bus_size_t maxsegsz; 70 int flags; 71 int ref_count; 72 int map_count; 73 bus_dma_lock_t *lockfunc; 74 void *lockfuncarg; 75 /* 76 * DMA range for this tag. If the page doesn't fall within 77 * one of these ranges, an error is returned. The caller 78 * may then decide what to do with the transfer. If the 79 * range pointer is NULL, it is ignored. 80 */ 81 struct arm32_dma_range *ranges; 82 int _nranges; 83}; 84 85#define DMAMAP_LINEAR 0x1 86#define DMAMAP_MBUF 0x2 87#define DMAMAP_UIO 0x4 88#define DMAMAP_TYPE_MASK (DMAMAP_LINEAR|DMAMAP_MBUF|DMAMAP_UIO) 89#define DMAMAP_COHERENT 0x8 90struct bus_dmamap { 91 bus_dma_tag_t dmat; 92 int flags; 93 void *buffer; 94 int len; 95}; 96 97/* 98 * Check to see if the specified page is in an allowed DMA range. 99 */ 100 101static __inline int 102bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs, 103 bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap, 104 int flags, vm_offset_t *lastaddrp, int *segp); 105 106static __inline struct arm32_dma_range * 107_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges, 108 bus_addr_t curaddr) 109{ 110 struct arm32_dma_range *dr; 111 int i; 112 113 for (i = 0, dr = ranges; i < nranges; i++, dr++) { 114 if (curaddr >= dr->dr_sysbase && 115 round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len)) 116 return (dr); 117 } 118 119 return (NULL); 120} 121/* 122 * Convenience function for manipulating driver locks from busdma (during 123 * busdma_swi, for example). Drivers that don't provide their own locks 124 * should specify &Giant to dmat->lockfuncarg. Drivers that use their own 125 * non-mutex locking scheme don't have to use this at all. 126 */ 127void 128busdma_lock_mutex(void *arg, bus_dma_lock_op_t op) 129{ 130 struct mtx *dmtx; 131 132 dmtx = (struct mtx *)arg; 133 switch (op) { 134 case BUS_DMA_LOCK: 135 mtx_lock(dmtx); 136 break; 137 case BUS_DMA_UNLOCK: 138 mtx_unlock(dmtx); 139 break; 140 default: 141 panic("Unknown operation 0x%x for busdma_lock_mutex!", op); 142 } 143} 144 145/* 146 * dflt_lock should never get called. It gets put into the dma tag when 147 * lockfunc == NULL, which is only valid if the maps that are associated 148 * with the tag are meant to never be defered. 149 * XXX Should have a way to identify which driver is responsible here. 150 */ 151static void 152dflt_lock(void *arg, bus_dma_lock_op_t op) 153{ 154#ifdef INVARIANTS 155 panic("driver error: busdma dflt_lock called"); 156#else 157 printf("DRIVER_ERROR: busdma dflt_lock called\n"); 158#endif 159} 160 161/* 162 * Allocate a device specific dma_tag. 163 */ 164#define SEG_NB 1024 165 166int 167bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, 168 bus_size_t boundary, bus_addr_t lowaddr, 169 bus_addr_t highaddr, bus_dma_filter_t *filter, 170 void *filterarg, bus_size_t maxsize, int nsegments, 171 bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, 172 void *lockfuncarg, bus_dma_tag_t *dmat) 173{ 174 bus_dma_tag_t newtag; 175 int error = 0; 176 /* Return a NULL tag on failure */ 177 *dmat = NULL; 178 179 newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT); 180 if (newtag == NULL) { 181 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", 182 __func__, newtag, 0, error); 183 return (ENOMEM); 184 } 185 186 newtag->parent = parent; 187 newtag->alignment = alignment; 188 newtag->boundary = boundary; 189 newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1); 190 newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1); 191 newtag->filter = filter; 192 newtag->filterarg = filterarg; 193 newtag->maxsize = maxsize; 194 newtag->nsegments = nsegments; 195 newtag->maxsegsz = maxsegsz; 196 newtag->flags = flags; 197 newtag->ref_count = 1; /* Count ourself */ 198 newtag->map_count = 0; 199 newtag->ranges = bus_dma_get_range(); 200 newtag->_nranges = bus_dma_get_range_nb(); 201 if (lockfunc != NULL) { 202 newtag->lockfunc = lockfunc; 203 newtag->lockfuncarg = lockfuncarg; 204 } else { 205 newtag->lockfunc = dflt_lock; 206 newtag->lockfuncarg = NULL; 207 } 208 /* 209 * Take into account any restrictions imposed by our parent tag 210 */ 211 if (parent != NULL) { 212 newtag->lowaddr = min(parent->lowaddr, newtag->lowaddr); 213 newtag->highaddr = max(parent->highaddr, newtag->highaddr); 214 if (newtag->boundary == 0) 215 newtag->boundary = parent->boundary; 216 else if (parent->boundary != 0) 217 newtag->boundary = min(parent->boundary, 218 newtag->boundary); 219 if (newtag->filter == NULL) { 220 /* 221 * Short circuit looking at our parent directly 222 * since we have encapsulated all of its information 223 */ 224 newtag->filter = parent->filter; 225 newtag->filterarg = parent->filterarg; 226 newtag->parent = parent->parent; 227 } 228 if (newtag->parent != NULL) 229 atomic_add_int(&parent->ref_count, 1); 230 } 231 232 *dmat = newtag; 233 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", 234 __func__, newtag, (newtag != NULL ? newtag->flags : 0), error); 235 236 return (error); 237} 238 239int 240bus_dma_tag_destroy(bus_dma_tag_t dmat) 241{ 242#ifdef KTR 243 bus_dma_tag_t dmat_copy = dmat; 244#endif 245 246 if (dmat != NULL) { 247 248 if (dmat->map_count != 0) 249 return (EBUSY); 250 251 while (dmat != NULL) { 252 bus_dma_tag_t parent; 253 254 parent = dmat->parent; 255 atomic_subtract_int(&dmat->ref_count, 1); 256 if (dmat->ref_count == 0) { 257 free(dmat, M_DEVBUF); 258 /* 259 * Last reference count, so 260 * release our reference 261 * count on our parent. 262 */ 263 dmat = parent; 264 } else 265 dmat = NULL; 266 } 267 } 268 CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy); 269 270 return (0); 271} 272 273/* 274 * Allocate a handle for mapping from kva/uva/physical 275 * address space into bus device space. 276 */ 277int 278bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) 279{ 280 bus_dmamap_t newmap; 281#ifdef KTR 282 int error = 0; 283#endif 284 285 newmap = malloc(sizeof(*newmap), M_DEVBUF, M_NOWAIT | M_ZERO); 286 if (newmap == NULL) { 287 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM); 288 return (ENOMEM); 289 } 290 *mapp = newmap; 291 newmap->dmat = dmat; 292 newmap->flags = 0; 293 dmat->map_count++; 294 295 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 296 __func__, dmat, dmat->flags, error); 297 298 return (0); 299} 300 301/* 302 * Destroy a handle for mapping from kva/uva/physical 303 * address space into bus device space. 304 */ 305int 306bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) 307{ 308 309 free(map, M_DEVBUF); 310 dmat->map_count--; 311 CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat); 312 return (0); 313} 314 315/* 316 * Allocate a piece of memory that can be efficiently mapped into 317 * bus device space based on the constraints lited in the dma tag. 318 * A dmamap to for use with dmamap_load is also allocated. 319 */ 320int 321bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, 322 bus_dmamap_t *mapp) 323{ 324 bus_dmamap_t newmap = NULL; 325 326 int mflags; 327 328 if (flags & BUS_DMA_NOWAIT) 329 mflags = M_NOWAIT; 330 else 331 mflags = M_WAITOK; 332 if (flags & BUS_DMA_ZERO) 333 mflags |= M_ZERO; 334 335 if (!*mapp) { 336 newmap = malloc(sizeof(*newmap), M_DEVBUF, M_NOWAIT | M_ZERO); 337 if (newmap == NULL) { 338 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 339 __func__, dmat, dmat->flags, ENOMEM); 340 return (ENOMEM); 341 } 342 dmat->map_count++; 343 newmap->flags = 0; 344 *mapp = newmap; 345 newmap->dmat = dmat; 346 } 347 348 if (dmat->maxsize <= PAGE_SIZE) { 349 *vaddr = malloc(dmat->maxsize, M_DEVBUF, mflags); 350 } else { 351 /* 352 * XXX Use Contigmalloc until it is merged into this facility 353 * and handles multi-seg allocations. Nobody is doing 354 * multi-seg allocations yet though. 355 */ 356 *vaddr = contigmalloc(dmat->maxsize, M_DEVBUF, mflags, 357 0ul, dmat->lowaddr, dmat->alignment? dmat->alignment : 1ul, 358 dmat->boundary); 359 } 360 if (*vaddr == NULL) { 361 if (newmap != NULL) { 362 free(newmap, M_DEVBUF); 363 dmat->map_count--; 364 } 365 *mapp = NULL; 366 return (ENOMEM); 367 } 368 return (0); 369} 370 371/* 372 * Free a piece of memory and it's allocated dmamap, that was allocated 373 * via bus_dmamem_alloc. Make the same choice for free/contigfree. 374 */ 375void 376bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) 377{ 378 if (dmat->maxsize <= PAGE_SIZE) 379 free(vaddr, M_DEVBUF); 380 else { 381 contigfree(vaddr, dmat->maxsize, M_DEVBUF); 382 } 383 dmat->map_count--; 384 free(map, M_DEVBUF); 385 CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags); 386} 387 388/* 389 * Utility function to load a linear buffer. lastaddrp holds state 390 * between invocations (for multiple-buffer loads). segp contains 391 * the starting segment on entrance, and the ending segment on exit. 392 * first indicates if this is the first invocation of this function. 393 */ 394static int __inline 395bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs, 396 bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap, 397 int flags, vm_offset_t *lastaddrp, int *segp) 398{ 399 bus_size_t sgsize; 400 bus_addr_t curaddr, lastaddr, baddr, bmask; 401 vm_offset_t vaddr = (vm_offset_t)buf; 402 int seg; 403 int error = 0; 404 pd_entry_t *pde; 405 pt_entry_t pte; 406 pt_entry_t *ptep; 407 408 lastaddr = *lastaddrp; 409 bmask = ~(dmat->boundary - 1); 410 411 CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, " 412 "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment); 413 414 for (seg = *segp; buflen > 0 ; ) { 415 /* 416 * Get the physical address for this segment. 417 * 418 * XXX Don't support checking for coherent mappings 419 * XXX in user address space. 420 */ 421 if (__predict_true(pmap == pmap_kernel())) { 422 (void) pmap_get_pde_pte(pmap, vaddr, &pde, &ptep); 423 if (__predict_false(pmap_pde_section(pde))) { 424 curaddr = (*pde & L1_S_FRAME) | 425 (vaddr & L1_S_OFFSET); 426 if (*pde & L1_S_CACHE_MASK) { 427 map->flags &= 428 ~DMAMAP_COHERENT; 429 } 430 } else { 431 pte = *ptep; 432 KASSERT((pte & L2_TYPE_MASK) != L2_TYPE_INV, 433 ("INV type")); 434 if (__predict_false((pte & L2_TYPE_MASK) 435 == L2_TYPE_L)) { 436 curaddr = (pte & L2_L_FRAME) | 437 (vaddr & L2_L_OFFSET); 438 if (pte & L2_L_CACHE_MASK) { 439 map->flags &= 440 ~DMAMAP_COHERENT; 441 442 } 443 } else { 444 curaddr = (pte & L2_S_FRAME) | 445 (vaddr & L2_S_OFFSET); 446 if (pte & L2_S_CACHE_MASK) { 447 map->flags &= 448 ~DMAMAP_COHERENT; 449 } 450 } 451 } 452 } else { 453 curaddr = pmap_extract(pmap, vaddr); 454 map->flags &= ~DMAMAP_COHERENT; 455 } 456 457 if (dmat->ranges) { 458 struct arm32_dma_range *dr; 459 460 dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges, 461 curaddr); 462 if (dr == NULL) 463 return (EINVAL); 464 /* 465 * In a valid DMA range. Translate the physical 466 * memory address to an address in the DMA window. 467 */ 468 curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase; 469 470 } 471 /* 472 * Compute the segment size, and adjust counts. 473 */ 474 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK); 475 if (buflen < sgsize) 476 sgsize = buflen; 477 478 /* 479 * Make sure we don't cross any boundaries. 480 */ 481 if (dmat->boundary > 0) { 482 baddr = (curaddr + dmat->boundary) & bmask; 483 if (sgsize > (baddr - curaddr)) 484 sgsize = (baddr - curaddr); 485 } 486 487 /* 488 * Insert chunk into a segment, coalescing with 489 * the previous segment if possible. 490 */ 491 if (seg >= 0 && curaddr == lastaddr && 492 (segs[seg].ds_len + sgsize) <= dmat->maxsegsz && 493 (dmat->boundary == 0 || 494 (segs[seg].ds_addr & bmask) == 495 (curaddr & bmask))) { 496 segs[seg].ds_len += sgsize; 497 goto segdone; 498 } else { 499 if (++seg >= dmat->nsegments) 500 break; 501 segs[seg].ds_addr = curaddr; 502 segs[seg].ds_len = sgsize; 503 } 504 if (error) 505 break; 506segdone: 507 lastaddr = curaddr + sgsize; 508 vaddr += sgsize; 509 buflen -= sgsize; 510 } 511 512 *segp = seg; 513 *lastaddrp = lastaddr; 514 515 /* 516 * Did we fit? 517 */ 518 if (buflen != 0) 519 error = EFBIG; /* XXX better return value here? */ 520 return (error); 521} 522 523/* 524 * Map the buffer buf into bus space using the dmamap map. 525 */ 526int 527bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf, 528 bus_size_t buflen, bus_dmamap_callback_t *callback, 529 void *callback_arg, int flags) 530{ 531 vm_offset_t lastaddr = 0; 532 int error, nsegs = -1; 533#ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT 534 bus_dma_segment_t dm_segments[dmat->nsegments]; 535#else 536 bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS]; 537#endif 538 539 map->flags &= ~DMAMAP_TYPE_MASK; 540 map->flags |= DMAMAP_LINEAR|DMAMAP_COHERENT; 541 map->buffer = buf; 542 map->len = buflen; 543 error = bus_dmamap_load_buffer(dmat, 544 dm_segments, map, buf, buflen, kernel_pmap, 545 flags, &lastaddr, &nsegs); 546 if (error) 547 (*callback)(callback_arg, NULL, 0, error); 548 else 549 (*callback)(callback_arg, dm_segments, nsegs + 1, error); 550 551 CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d", 552 __func__, dmat, dmat->flags, nsegs + 1, error); 553 554 return (0); 555} 556 557/* 558 * Like bus_dmamap_load(), but for mbufs. 559 */ 560int 561bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map, struct mbuf *m0, 562 bus_dmamap_callback2_t *callback, void *callback_arg, 563 int flags) 564{ 565#ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT 566 bus_dma_segment_t dm_segments[dmat->nsegments]; 567#else 568 bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS]; 569#endif 570 int nsegs = -1, error = 0; 571 572 M_ASSERTPKTHDR(m0); 573 574 map->flags &= ~DMAMAP_TYPE_MASK; 575 map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT; 576 map->buffer = m0; 577 if (m0->m_pkthdr.len <= dmat->maxsize) { 578 vm_offset_t lastaddr = 0; 579 struct mbuf *m; 580 581 for (m = m0; m != NULL && error == 0; m = m->m_next) { 582 if (m->m_len > 0) 583 error = bus_dmamap_load_buffer(dmat, 584 dm_segments, map, m->m_data, m->m_len, 585 pmap_kernel(), flags, &lastaddr, &nsegs); 586 } 587 } else { 588 error = EINVAL; 589 } 590 591 if (error) { 592 /* 593 * force "no valid mappings" on error in callback. 594 */ 595 (*callback)(callback_arg, dm_segments, 0, 0, error); 596 } else { 597 (*callback)(callback_arg, dm_segments, nsegs + 1, 598 m0->m_pkthdr.len, error); 599 } 600 CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d", 601 __func__, dmat, dmat->flags, error, nsegs + 1); 602 603 return (error); 604} 605 606int 607bus_dmamap_load_mbuf_sg(bus_dma_tag_t dmat, bus_dmamap_t map, 608 struct mbuf *m0, bus_dma_segment_t *segs, int *nsegs, 609 int flags) 610{ 611 int error = 0; 612 M_ASSERTPKTHDR(m0); 613 614 flags |= BUS_DMA_NOWAIT; 615 *nsegs = -1; 616 map->flags &= ~DMAMAP_TYPE_MASK; 617 map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT; 618 map->buffer = m0; 619 if (m0->m_pkthdr.len <= dmat->maxsize) { 620 vm_offset_t lastaddr = 0; 621 struct mbuf *m; 622 623 for (m = m0; m != NULL && error == 0; m = m->m_next) { 624 if (m->m_len > 0) { 625 error = bus_dmamap_load_buffer(dmat, segs, map, 626 m->m_data, m->m_len, 627 pmap_kernel(), flags, &lastaddr, 628 nsegs); 629 } 630 } 631 } else { 632 error = EINVAL; 633 } 634 635 /* XXX FIXME: Having to increment nsegs is really annoying */ 636 ++*nsegs; 637 CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d", 638 __func__, dmat, dmat->flags, error, *nsegs); 639 return (error); 640} 641 642/* 643 * Like bus_dmamap_load(), but for uios. 644 */ 645int 646bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map, struct uio *uio, 647 bus_dmamap_callback2_t *callback, void *callback_arg, 648 int flags) 649{ 650 vm_offset_t lastaddr; 651#ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT 652 bus_dma_segment_t dm_segments[dmat->nsegments]; 653#else 654 bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS]; 655#endif 656 int nsegs, i, error; 657 bus_size_t resid; 658 struct iovec *iov; 659 struct pmap *pmap; 660 661 resid = uio->uio_resid; 662 iov = uio->uio_iov; 663 map->flags &= ~DMAMAP_TYPE_MASK; 664 map->flags |= DMAMAP_UIO|DMAMAP_COHERENT; 665 map->buffer = uio; 666 667 if (uio->uio_segflg == UIO_USERSPACE) { 668 KASSERT(uio->uio_td != NULL, 669 ("bus_dmamap_load_uio: USERSPACE but no proc")); 670 pmap = vmspace_pmap(uio->uio_td->td_proc->p_vmspace); 671 } else 672 pmap = kernel_pmap; 673 674 error = 0; 675 nsegs = -1; 676 for (i = 0; i < uio->uio_iovcnt && resid != 0 && !error; i++) { 677 /* 678 * Now at the first iovec to load. Load each iovec 679 * until we have exhausted the residual count. 680 */ 681 bus_size_t minlen = 682 resid < iov[i].iov_len ? resid : iov[i].iov_len; 683 caddr_t addr = (caddr_t) iov[i].iov_base; 684 685 if (minlen > 0) { 686 error = bus_dmamap_load_buffer(dmat, dm_segments, map, 687 addr, minlen, pmap, flags, &lastaddr, &nsegs); 688 689 resid -= minlen; 690 } 691 } 692 693 if (error) { 694 /* 695 * force "no valid mappings" on error in callback. 696 */ 697 (*callback)(callback_arg, dm_segments, 0, 0, error); 698 } else { 699 (*callback)(callback_arg, dm_segments, nsegs+1, 700 uio->uio_resid, error); 701 } 702 703 CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d", 704 __func__, dmat, dmat->flags, error, nsegs + 1); 705 return (error); 706} 707 708/* 709 * Release the mapping held by map. 710 */ 711void 712_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) 713{ 714 map->flags &= ~DMAMAP_TYPE_MASK; 715 return; 716} 717 718static void 719bus_dmamap_sync_buf(void *buf, int len, bus_dmasync_op_t op) 720{ 721 722 if (op & BUS_DMASYNC_POSTREAD || 723 op == (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) { 724 cpu_dcache_wbinv_range((vm_offset_t)buf, len); 725 return; 726 } 727 if (op & BUS_DMASYNC_PREWRITE) 728 cpu_dcache_wb_range((vm_offset_t)buf, len); 729 if (op & BUS_DMASYNC_PREREAD) { 730 if ((((vm_offset_t)buf | len) & arm_dcache_align_mask) == 0) 731 cpu_dcache_inv_range((vm_offset_t)buf, len); 732 else 733 cpu_dcache_wbinv_range((vm_offset_t)buf, len); 734 } 735} 736 737void 738_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) 739{ 740 struct mbuf *m; 741 struct uio *uio; 742 int resid; 743 struct iovec *iov; 744 745 if (op == BUS_DMASYNC_POSTWRITE) 746 return; 747 if (map->flags & DMAMAP_COHERENT) 748 return; 749 CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags); 750 switch(map->flags & DMAMAP_TYPE_MASK) { 751 case DMAMAP_LINEAR: 752 bus_dmamap_sync_buf(map->buffer, map->len, op); 753 break; 754 case DMAMAP_MBUF: 755 m = map->buffer; 756 while (m) { 757 bus_dmamap_sync_buf(m->m_data, m->m_len, op); 758 m = m->m_next; 759 } 760 break; 761 case DMAMAP_UIO: 762 uio = map->buffer; 763 iov = uio->uio_iov; 764 resid = uio->uio_resid; 765 for (int i = 0; i < uio->uio_iovcnt && resid != 0; i++) { 766 bus_size_t minlen = resid < iov[i].iov_len ? resid : 767 iov[i].iov_len; 768 if (minlen > 0) { 769 bus_dmamap_sync_buf(iov[i].iov_base, minlen, 770 op); 771 resid -= minlen; 772 } 773 } 774 break; 775 default: 776 break; 777 } 778 cpu_drain_writebuf(); 779} 780