alpine_machdep.c revision 295143
1282985Szbb/*- 2282985Szbb * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 3282985Szbb * Copyright (c) 2015 Semihalf 4282985Szbb * All rights reserved. 5282985Szbb * 6282985Szbb * Redistribution and use in source and binary forms, with or without 7282985Szbb * modification, are permitted provided that the following conditions 8282985Szbb * are met: 9282985Szbb * 1. Redistributions of source code must retain the above copyright 10282985Szbb * notice, this list of conditions and the following disclaimer. 11282985Szbb * 2. Redistributions in binary form must reproduce the above copyright 12282985Szbb * notice, this list of conditions and the following disclaimer in the 13282985Szbb * documentation and/or other materials provided with the distribution. 14282985Szbb * 15282985Szbb * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16282985Szbb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17282985Szbb * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18282985Szbb * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19282985Szbb * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20282985Szbb * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21282985Szbb * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22282985Szbb * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23282985Szbb * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24282985Szbb * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25282985Szbb * SUCH DAMAGE. 26282985Szbb * 27282985Szbb */ 28282985Szbb 29282985Szbb#include <sys/cdefs.h> 30282985Szbb__FBSDID("$FreeBSD: head/sys/arm/annapurna/alpine/alpine_machdep.c 295143 2016-02-02 10:32:45Z skra $"); 31282985Szbb 32282985Szbb#define _ARM32_BUS_DMA_PRIVATE 33282985Szbb#include <sys/param.h> 34282985Szbb#include <sys/systm.h> 35282985Szbb#include <sys/bus.h> 36282985Szbb#include <sys/lock.h> 37282985Szbb#include <sys/mutex.h> 38282985Szbb 39282985Szbb#include <vm/vm.h> 40282985Szbb#include <vm/pmap.h> 41282985Szbb 42282985Szbb#include <machine/bus.h> 43282985Szbb#include <machine/frame.h> /* For trapframe_t, used in <machine/machdep.h> */ 44282985Szbb#include <machine/machdep.h> 45282985Szbb#include <machine/pmap.h> 46282985Szbb#include <machine/devmap.h> 47282985Szbb#include <machine/platform.h> 48282985Szbb#include <machine/fdt.h> 49282985Szbb 50282985Szbb#include <dev/fdt/fdt_common.h> 51282985Szbb 52282985Szbb#include "opt_ddb.h" 53282985Szbb#include "opt_platform.h" 54282985Szbb 55282985Szbbstruct mtx al_dbg_lock; 56282985Szbb 57282985Szbb#define DEVMAP_MAX_VA_ADDRESS 0xF0000000 58282985Szbbbus_addr_t al_devmap_pa; 59282985Szbbbus_addr_t al_devmap_size; 60282985Szbb 61282985Szbb#define AL_NB_SERVICE_OFFSET 0x70000 62282985Szbb#define AL_NB_CCU_OFFSET 0x90000 63282985Szbb#define AL_CCU_SNOOP_CONTROL_IOFAB_0_OFFSET 0x4000 64282985Szbb#define AL_CCU_SNOOP_CONTROL_IOFAB_1_OFFSET 0x5000 65282985Szbb#define AL_CCU_SPECULATION_CONTROL_OFFSET 0x4 66282985Szbb 67282985Szbb#define AL_NB_ACF_MISC_OFFSET 0xD0 68282985Szbb#define AL_NB_ACF_MISC_READ_BYPASS (1 << 30) 69282985Szbb 70282985Szbbint alpine_get_devmap_base(bus_addr_t *pa, bus_addr_t *size); 71282985Szbb 72282985Szbbvm_offset_t 73282985Szbbplatform_lastaddr(void) 74282985Szbb{ 75282985Szbb 76282985Szbb return (DEVMAP_MAX_VA_ADDRESS); 77282985Szbb} 78282985Szbb 79282985Szbbvoid 80282985Szbbplatform_probe_and_attach(void) 81282985Szbb{ 82282985Szbb 83282985Szbb} 84282985Szbb 85282985Szbbvoid 86282985Szbbplatform_gpio_init(void) 87282985Szbb{ 88282985Szbb 89282985Szbb} 90282985Szbb 91282985Szbbvoid 92282985Szbbplatform_late_init(void) 93282985Szbb{ 94282985Szbb bus_addr_t reg_baddr; 95282985Szbb uint32_t val; 96282985Szbb 97282985Szbb if (!mtx_initialized(&al_dbg_lock)) 98282985Szbb mtx_init(&al_dbg_lock, "ALDBG", "ALDBG", MTX_SPIN); 99282985Szbb 100282985Szbb /* configure system fabric */ 101282985Szbb if (bus_space_map(fdtbus_bs_tag, al_devmap_pa, al_devmap_size, 0, 102282985Szbb ®_baddr)) 103282985Szbb panic("Couldn't map Register Space area"); 104282985Szbb 105282985Szbb /* do not allow reads to bypass writes to different addresses */ 106282985Szbb val = bus_space_read_4(fdtbus_bs_tag, reg_baddr, 107282985Szbb AL_NB_SERVICE_OFFSET + AL_NB_ACF_MISC_OFFSET); 108282985Szbb val &= ~AL_NB_ACF_MISC_READ_BYPASS; 109282985Szbb bus_space_write_4(fdtbus_bs_tag, reg_baddr, 110282985Szbb AL_NB_SERVICE_OFFSET + AL_NB_ACF_MISC_OFFSET, val); 111282985Szbb 112282985Szbb /* enable cache snoop */ 113282985Szbb bus_space_write_4(fdtbus_bs_tag, reg_baddr, 114282985Szbb AL_NB_CCU_OFFSET + AL_CCU_SNOOP_CONTROL_IOFAB_0_OFFSET, 1); 115282985Szbb bus_space_write_4(fdtbus_bs_tag, reg_baddr, 116282985Szbb AL_NB_CCU_OFFSET + AL_CCU_SNOOP_CONTROL_IOFAB_1_OFFSET, 1); 117282985Szbb 118282985Szbb /* disable speculative fetches from masters */ 119282985Szbb bus_space_write_4(fdtbus_bs_tag, reg_baddr, 120282985Szbb AL_NB_CCU_OFFSET + AL_CCU_SPECULATION_CONTROL_OFFSET, 7); 121282985Szbb 122282985Szbb bus_space_unmap(fdtbus_bs_tag, reg_baddr, al_devmap_size); 123282985Szbb} 124282985Szbb 125282985Szbb/* 126295143Sskra * Construct devmap table with DT-derived config data. 127282985Szbb */ 128282985Szbbint 129282985Szbbplatform_devmap_init(void) 130282985Szbb{ 131282985Szbb alpine_get_devmap_base(&al_devmap_pa, &al_devmap_size); 132282985Szbb arm_devmap_add_entry(al_devmap_pa, al_devmap_size); 133282985Szbb return (0); 134282985Szbb} 135282985Szbb 136282985Szbbstruct arm32_dma_range * 137282985Szbbbus_dma_get_range(void) 138282985Szbb{ 139282985Szbb 140282985Szbb return (NULL); 141282985Szbb} 142282985Szbb 143282985Szbbint 144282985Szbbbus_dma_get_range_nb(void) 145282985Szbb{ 146282985Szbb 147282985Szbb return (0); 148282985Szbb} 149