1282985Szbb/*- 2282985Szbb * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 3282985Szbb * Copyright (c) 2015 Semihalf 4282985Szbb * All rights reserved. 5282985Szbb * 6282985Szbb * Redistribution and use in source and binary forms, with or without 7282985Szbb * modification, are permitted provided that the following conditions 8282985Szbb * are met: 9282985Szbb * 1. Redistributions of source code must retain the above copyright 10282985Szbb * notice, this list of conditions and the following disclaimer. 11282985Szbb * 2. Redistributions in binary form must reproduce the above copyright 12282985Szbb * notice, this list of conditions and the following disclaimer in the 13282985Szbb * documentation and/or other materials provided with the distribution. 14282985Szbb * 15282985Szbb * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16282985Szbb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17282985Szbb * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18282985Szbb * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19282985Szbb * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20282985Szbb * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21282985Szbb * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22282985Szbb * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23282985Szbb * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24282985Szbb * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25282985Szbb * SUCH DAMAGE. 26282985Szbb * 27282985Szbb */ 28282985Szbb 29282985Szbb#include <sys/cdefs.h> 30282985Szbb__FBSDID("$FreeBSD: stable/11/sys/arm/annapurna/alpine/alpine_machdep.c 314506 2017-03-01 19:55:04Z ian $"); 31282985Szbb 32282985Szbb#include <sys/param.h> 33282985Szbb#include <sys/systm.h> 34282985Szbb#include <sys/bus.h> 35282985Szbb#include <sys/lock.h> 36282985Szbb#include <sys/mutex.h> 37298627Sbr#include <sys/devmap.h> 38282985Szbb 39282985Szbb#include <vm/vm.h> 40282985Szbb#include <vm/pmap.h> 41282985Szbb 42282985Szbb#include <machine/bus.h> 43282985Szbb#include <machine/frame.h> /* For trapframe_t, used in <machine/machdep.h> */ 44282985Szbb#include <machine/machdep.h> 45282985Szbb#include <machine/platform.h> 46282985Szbb#include <machine/fdt.h> 47282985Szbb 48282985Szbb#include <dev/fdt/fdt_common.h> 49282985Szbb 50282985Szbb#include "opt_ddb.h" 51282985Szbb#include "opt_platform.h" 52282985Szbb 53282985Szbbstruct mtx al_dbg_lock; 54282985Szbb 55282985Szbb#define DEVMAP_MAX_VA_ADDRESS 0xF0000000 56282985Szbbbus_addr_t al_devmap_pa; 57282985Szbbbus_addr_t al_devmap_size; 58282985Szbb 59282985Szbb#define AL_NB_SERVICE_OFFSET 0x70000 60282985Szbb#define AL_NB_CCU_OFFSET 0x90000 61282985Szbb#define AL_CCU_SNOOP_CONTROL_IOFAB_0_OFFSET 0x4000 62282985Szbb#define AL_CCU_SNOOP_CONTROL_IOFAB_1_OFFSET 0x5000 63282985Szbb#define AL_CCU_SPECULATION_CONTROL_OFFSET 0x4 64282985Szbb 65282985Szbb#define AL_NB_ACF_MISC_OFFSET 0xD0 66282985Szbb#define AL_NB_ACF_MISC_READ_BYPASS (1 << 30) 67282985Szbb 68282985Szbbint alpine_get_devmap_base(bus_addr_t *pa, bus_addr_t *size); 69282985Szbb 70282985Szbbvm_offset_t 71282985Szbbplatform_lastaddr(void) 72282985Szbb{ 73282985Szbb 74282985Szbb return (DEVMAP_MAX_VA_ADDRESS); 75282985Szbb} 76282985Szbb 77282985Szbbvoid 78282985Szbbplatform_probe_and_attach(void) 79282985Szbb{ 80282985Szbb 81282985Szbb} 82282985Szbb 83282985Szbbvoid 84282985Szbbplatform_gpio_init(void) 85282985Szbb{ 86282985Szbb 87282985Szbb} 88282985Szbb 89282985Szbbvoid 90282985Szbbplatform_late_init(void) 91282985Szbb{ 92282985Szbb bus_addr_t reg_baddr; 93282985Szbb uint32_t val; 94282985Szbb 95282985Szbb if (!mtx_initialized(&al_dbg_lock)) 96282985Szbb mtx_init(&al_dbg_lock, "ALDBG", "ALDBG", MTX_SPIN); 97282985Szbb 98282985Szbb /* configure system fabric */ 99282985Szbb if (bus_space_map(fdtbus_bs_tag, al_devmap_pa, al_devmap_size, 0, 100282985Szbb ®_baddr)) 101282985Szbb panic("Couldn't map Register Space area"); 102282985Szbb 103282985Szbb /* do not allow reads to bypass writes to different addresses */ 104282985Szbb val = bus_space_read_4(fdtbus_bs_tag, reg_baddr, 105282985Szbb AL_NB_SERVICE_OFFSET + AL_NB_ACF_MISC_OFFSET); 106282985Szbb val &= ~AL_NB_ACF_MISC_READ_BYPASS; 107282985Szbb bus_space_write_4(fdtbus_bs_tag, reg_baddr, 108282985Szbb AL_NB_SERVICE_OFFSET + AL_NB_ACF_MISC_OFFSET, val); 109282985Szbb 110282985Szbb /* enable cache snoop */ 111282985Szbb bus_space_write_4(fdtbus_bs_tag, reg_baddr, 112282985Szbb AL_NB_CCU_OFFSET + AL_CCU_SNOOP_CONTROL_IOFAB_0_OFFSET, 1); 113282985Szbb bus_space_write_4(fdtbus_bs_tag, reg_baddr, 114282985Szbb AL_NB_CCU_OFFSET + AL_CCU_SNOOP_CONTROL_IOFAB_1_OFFSET, 1); 115282985Szbb 116282985Szbb /* disable speculative fetches from masters */ 117282985Szbb bus_space_write_4(fdtbus_bs_tag, reg_baddr, 118282985Szbb AL_NB_CCU_OFFSET + AL_CCU_SPECULATION_CONTROL_OFFSET, 7); 119282985Szbb 120282985Szbb bus_space_unmap(fdtbus_bs_tag, reg_baddr, al_devmap_size); 121282985Szbb} 122282985Szbb 123282985Szbb/* 124295143Sskra * Construct devmap table with DT-derived config data. 125282985Szbb */ 126282985Szbbint 127282985Szbbplatform_devmap_init(void) 128282985Szbb{ 129282985Szbb alpine_get_devmap_base(&al_devmap_pa, &al_devmap_size); 130298627Sbr devmap_add_entry(al_devmap_pa, al_devmap_size); 131282985Szbb return (0); 132282985Szbb} 133