1221828Sgrehan/*- 2221828Sgrehan * Copyright (c) 2011 NetApp, Inc. 3221828Sgrehan * All rights reserved. 4221828Sgrehan * 5221828Sgrehan * Redistribution and use in source and binary forms, with or without 6221828Sgrehan * modification, are permitted provided that the following conditions 7221828Sgrehan * are met: 8221828Sgrehan * 1. Redistributions of source code must retain the above copyright 9221828Sgrehan * notice, this list of conditions and the following disclaimer. 10221828Sgrehan * 2. Redistributions in binary form must reproduce the above copyright 11221828Sgrehan * notice, this list of conditions and the following disclaimer in the 12221828Sgrehan * documentation and/or other materials provided with the distribution. 13221828Sgrehan * 14221828Sgrehan * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15221828Sgrehan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16221828Sgrehan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17221828Sgrehan * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18221828Sgrehan * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19221828Sgrehan * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20221828Sgrehan * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21221828Sgrehan * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22221828Sgrehan * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23221828Sgrehan * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24221828Sgrehan * SUCH DAMAGE. 25221828Sgrehan * 26221828Sgrehan * $FreeBSD: stable/11/sys/amd64/vmm/intel/vmx.h 331722 2018-03-29 02:50:57Z eadler $ 27221828Sgrehan */ 28221828Sgrehan 29221828Sgrehan#ifndef _VMX_H_ 30221828Sgrehan#define _VMX_H_ 31221828Sgrehan 32221828Sgrehan#include "vmcs.h" 33221828Sgrehan 34256072Sneelstruct pmap; 35256072Sneel 36221828Sgrehanstruct vmxctx { 37221828Sgrehan register_t guest_rdi; /* Guest state */ 38221828Sgrehan register_t guest_rsi; 39221828Sgrehan register_t guest_rdx; 40221828Sgrehan register_t guest_rcx; 41221828Sgrehan register_t guest_r8; 42221828Sgrehan register_t guest_r9; 43221828Sgrehan register_t guest_rax; 44221828Sgrehan register_t guest_rbx; 45221828Sgrehan register_t guest_rbp; 46221828Sgrehan register_t guest_r10; 47221828Sgrehan register_t guest_r11; 48221828Sgrehan register_t guest_r12; 49221828Sgrehan register_t guest_r13; 50221828Sgrehan register_t guest_r14; 51221828Sgrehan register_t guest_r15; 52221828Sgrehan register_t guest_cr2; 53330623Sjhb register_t guest_dr0; 54330623Sjhb register_t guest_dr1; 55330623Sjhb register_t guest_dr2; 56330623Sjhb register_t guest_dr3; 57330623Sjhb register_t guest_dr6; 58221828Sgrehan 59221828Sgrehan register_t host_r15; /* Host state */ 60221828Sgrehan register_t host_r14; 61221828Sgrehan register_t host_r13; 62221828Sgrehan register_t host_r12; 63221828Sgrehan register_t host_rbp; 64221828Sgrehan register_t host_rsp; 65221828Sgrehan register_t host_rbx; 66330623Sjhb register_t host_dr0; 67330623Sjhb register_t host_dr1; 68330623Sjhb register_t host_dr2; 69330623Sjhb register_t host_dr3; 70330623Sjhb register_t host_dr6; 71330623Sjhb register_t host_dr7; 72330623Sjhb uint64_t host_debugctl; 73330623Sjhb int host_tf; 74261453Sneel 75260167Sneel int inst_fail_status; 76256072Sneel 77256072Sneel /* 78266390Sgrehan * The pmap needs to be deactivated in vmx_enter_guest() 79261453Sneel * so keep a copy of the 'pmap' in each vmxctx. 80256072Sneel */ 81256072Sneel struct pmap *pmap; 82221828Sgrehan}; 83221828Sgrehan 84221828Sgrehanstruct vmxcap { 85221828Sgrehan int set; 86221828Sgrehan uint32_t proc_ctls; 87256645Sneel uint32_t proc_ctls2; 88221828Sgrehan}; 89221828Sgrehan 90221828Sgrehanstruct vmxstate { 91276763Sneel uint64_t nextrip; /* next instruction to be executed by guest */ 92221828Sgrehan int lastcpu; /* host cpu that this 'vcpu' last ran on */ 93221828Sgrehan uint16_t vpid; 94221828Sgrehan}; 95221828Sgrehan 96259863Sneelstruct apic_page { 97259863Sneel uint32_t reg[PAGE_SIZE / 4]; 98259863Sneel}; 99259863SneelCTASSERT(sizeof(struct apic_page) == PAGE_SIZE); 100259863Sneel 101260532Sneel/* Posted Interrupt Descriptor (described in section 29.6 of the Intel SDM) */ 102260532Sneelstruct pir_desc { 103260532Sneel uint64_t pir[4]; 104260532Sneel uint64_t pending; 105260532Sneel uint64_t unused[3]; 106260532Sneel} __aligned(64); 107260532SneelCTASSERT(sizeof(struct pir_desc) == 64); 108260532Sneel 109271888Sneel/* Index into the 'guest_msrs[]' array */ 110271888Sneelenum { 111271888Sneel IDX_MSR_LSTAR, 112271888Sneel IDX_MSR_CSTAR, 113271888Sneel IDX_MSR_STAR, 114271888Sneel IDX_MSR_SF_MASK, 115271888Sneel IDX_MSR_KGSBASE, 116279228Sneel IDX_MSR_PAT, 117271888Sneel GUEST_MSR_NUM /* must be the last enumeration */ 118271888Sneel}; 119271888Sneel 120221828Sgrehan/* virtual machine softc */ 121221828Sgrehanstruct vmx { 122221828Sgrehan struct vmcs vmcs[VM_MAXCPU]; /* one vmcs per virtual cpu */ 123259863Sneel struct apic_page apic_page[VM_MAXCPU]; /* one apic page per vcpu */ 124221828Sgrehan char msr_bitmap[PAGE_SIZE]; 125260532Sneel struct pir_desc pir_desc[VM_MAXCPU]; 126271888Sneel uint64_t guest_msrs[VM_MAXCPU][GUEST_MSR_NUM]; 127221828Sgrehan struct vmxctx ctx[VM_MAXCPU]; 128221828Sgrehan struct vmxcap cap[VM_MAXCPU]; 129221828Sgrehan struct vmxstate state[VM_MAXCPU]; 130256072Sneel uint64_t eptp; 131221828Sgrehan struct vm *vm; 132261453Sneel long eptgen[MAXCPU]; /* cached pmap->pm_eptgen */ 133221828Sgrehan}; 134221828SgrehanCTASSERT((offsetof(struct vmx, vmcs) & PAGE_MASK) == 0); 135221828SgrehanCTASSERT((offsetof(struct vmx, msr_bitmap) & PAGE_MASK) == 0); 136260532SneelCTASSERT((offsetof(struct vmx, pir_desc[0]) & 63) == 0); 137221828Sgrehan 138260167Sneel#define VMX_GUEST_VMEXIT 0 139260167Sneel#define VMX_VMRESUME_ERROR 1 140260167Sneel#define VMX_VMLAUNCH_ERROR 2 141260167Sneel#define VMX_INVEPT_ERROR 3 142261453Sneelint vmx_enter_guest(struct vmxctx *ctx, struct vmx *vmx, int launched); 143260531Sneelvoid vmx_call_isr(uintptr_t entry); 144221828Sgrehan 145221828Sgrehanu_long vmx_fix_cr0(u_long cr0); 146221828Sgrehanu_long vmx_fix_cr4(u_long cr4); 147221828Sgrehan 148284174Stychonint vmx_set_tsc_offset(struct vmx *vmx, int vcpu, uint64_t offset); 149284174Stychon 150266390Sgrehanextern char vmx_exit_guest[]; 151330704Stychonextern char vmx_exit_guest_flush_rsb[]; 152266390Sgrehan 153221828Sgrehan#endif 154