vmcs.c revision 276098 
1/*-
2 * Copyright (c) 2011 NetApp, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/amd64/vmm/intel/vmcs.c 276098 2014-12-23 02:14:49Z neel $
27 */
28
29#include "opt_ddb.h"
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/amd64/vmm/intel/vmcs.c 276098 2014-12-23 02:14:49Z neel $");
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/pcpu.h>
37
38#include <vm/vm.h>
39#include <vm/pmap.h>
40
41#include <machine/segments.h>
42#include <machine/vmm.h>
43#include "vmm_host.h"
44#include "vmx_cpufunc.h"
45#include "vmcs.h"
46#include "ept.h"
47#include "vmx.h"
48
49#ifdef DDB
50#include <ddb/ddb.h>
51#endif
52
53static uint64_t
54vmcs_fix_regval(uint32_t encoding, uint64_t val)
55{
56
57	switch (encoding) {
58	case VMCS_GUEST_CR0:
59		val = vmx_fix_cr0(val);
60		break;
61	case VMCS_GUEST_CR4:
62		val = vmx_fix_cr4(val);
63		break;
64	default:
65		break;
66	}
67	return (val);
68}
69
70static uint32_t
71vmcs_field_encoding(int ident)
72{
73	switch (ident) {
74	case VM_REG_GUEST_CR0:
75		return (VMCS_GUEST_CR0);
76	case VM_REG_GUEST_CR3:
77		return (VMCS_GUEST_CR3);
78	case VM_REG_GUEST_CR4:
79		return (VMCS_GUEST_CR4);
80	case VM_REG_GUEST_DR7:
81		return (VMCS_GUEST_DR7);
82	case VM_REG_GUEST_RSP:
83		return (VMCS_GUEST_RSP);
84	case VM_REG_GUEST_RIP:
85		return (VMCS_GUEST_RIP);
86	case VM_REG_GUEST_RFLAGS:
87		return (VMCS_GUEST_RFLAGS);
88	case VM_REG_GUEST_ES:
89		return (VMCS_GUEST_ES_SELECTOR);
90	case VM_REG_GUEST_CS:
91		return (VMCS_GUEST_CS_SELECTOR);
92	case VM_REG_GUEST_SS:
93		return (VMCS_GUEST_SS_SELECTOR);
94	case VM_REG_GUEST_DS:
95		return (VMCS_GUEST_DS_SELECTOR);
96	case VM_REG_GUEST_FS:
97		return (VMCS_GUEST_FS_SELECTOR);
98	case VM_REG_GUEST_GS:
99		return (VMCS_GUEST_GS_SELECTOR);
100	case VM_REG_GUEST_TR:
101		return (VMCS_GUEST_TR_SELECTOR);
102	case VM_REG_GUEST_LDTR:
103		return (VMCS_GUEST_LDTR_SELECTOR);
104	case VM_REG_GUEST_EFER:
105		return (VMCS_GUEST_IA32_EFER);
106	case VM_REG_GUEST_PDPTE0:
107		return (VMCS_GUEST_PDPTE0);
108	case VM_REG_GUEST_PDPTE1:
109		return (VMCS_GUEST_PDPTE1);
110	case VM_REG_GUEST_PDPTE2:
111		return (VMCS_GUEST_PDPTE2);
112	case VM_REG_GUEST_PDPTE3:
113		return (VMCS_GUEST_PDPTE3);
114	default:
115		return (-1);
116	}
117
118}
119
120static int
121vmcs_seg_desc_encoding(int seg, uint32_t *base, uint32_t *lim, uint32_t *acc)
122{
123
124	switch (seg) {
125	case VM_REG_GUEST_ES:
126		*base = VMCS_GUEST_ES_BASE;
127		*lim = VMCS_GUEST_ES_LIMIT;
128		*acc = VMCS_GUEST_ES_ACCESS_RIGHTS;
129		break;
130	case VM_REG_GUEST_CS:
131		*base = VMCS_GUEST_CS_BASE;
132		*lim = VMCS_GUEST_CS_LIMIT;
133		*acc = VMCS_GUEST_CS_ACCESS_RIGHTS;
134		break;
135	case VM_REG_GUEST_SS:
136		*base = VMCS_GUEST_SS_BASE;
137		*lim = VMCS_GUEST_SS_LIMIT;
138		*acc = VMCS_GUEST_SS_ACCESS_RIGHTS;
139		break;
140	case VM_REG_GUEST_DS:
141		*base = VMCS_GUEST_DS_BASE;
142		*lim = VMCS_GUEST_DS_LIMIT;
143		*acc = VMCS_GUEST_DS_ACCESS_RIGHTS;
144		break;
145	case VM_REG_GUEST_FS:
146		*base = VMCS_GUEST_FS_BASE;
147		*lim = VMCS_GUEST_FS_LIMIT;
148		*acc = VMCS_GUEST_FS_ACCESS_RIGHTS;
149		break;
150	case VM_REG_GUEST_GS:
151		*base = VMCS_GUEST_GS_BASE;
152		*lim = VMCS_GUEST_GS_LIMIT;
153		*acc = VMCS_GUEST_GS_ACCESS_RIGHTS;
154		break;
155	case VM_REG_GUEST_TR:
156		*base = VMCS_GUEST_TR_BASE;
157		*lim = VMCS_GUEST_TR_LIMIT;
158		*acc = VMCS_GUEST_TR_ACCESS_RIGHTS;
159		break;
160	case VM_REG_GUEST_LDTR:
161		*base = VMCS_GUEST_LDTR_BASE;
162		*lim = VMCS_GUEST_LDTR_LIMIT;
163		*acc = VMCS_GUEST_LDTR_ACCESS_RIGHTS;
164		break;
165	case VM_REG_GUEST_IDTR:
166		*base = VMCS_GUEST_IDTR_BASE;
167		*lim = VMCS_GUEST_IDTR_LIMIT;
168		*acc = VMCS_INVALID_ENCODING;
169		break;
170	case VM_REG_GUEST_GDTR:
171		*base = VMCS_GUEST_GDTR_BASE;
172		*lim = VMCS_GUEST_GDTR_LIMIT;
173		*acc = VMCS_INVALID_ENCODING;
174		break;
175	default:
176		return (EINVAL);
177	}
178
179	return (0);
180}
181
182int
183vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *retval)
184{
185	int error;
186	uint32_t encoding;
187
188	/*
189	 * If we need to get at vmx-specific state in the VMCS we can bypass
190	 * the translation of 'ident' to 'encoding' by simply setting the
191	 * sign bit. As it so happens the upper 16 bits are reserved (i.e
192	 * set to 0) in the encodings for the VMCS so we are free to use the
193	 * sign bit.
194	 */
195	if (ident < 0)
196		encoding = ident & 0x7fffffff;
197	else
198		encoding = vmcs_field_encoding(ident);
199
200	if (encoding == (uint32_t)-1)
201		return (EINVAL);
202
203	if (!running)
204		VMPTRLD(vmcs);
205
206	error = vmread(encoding, retval);
207
208	if (!running)
209		VMCLEAR(vmcs);
210
211	return (error);
212}
213
214int
215vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val)
216{
217	int error;
218	uint32_t encoding;
219
220	if (ident < 0)
221		encoding = ident & 0x7fffffff;
222	else
223		encoding = vmcs_field_encoding(ident);
224
225	if (encoding == (uint32_t)-1)
226		return (EINVAL);
227
228	val = vmcs_fix_regval(encoding, val);
229
230	if (!running)
231		VMPTRLD(vmcs);
232
233	error = vmwrite(encoding, val);
234
235	if (!running)
236		VMCLEAR(vmcs);
237
238	return (error);
239}
240
241int
242vmcs_setdesc(struct vmcs *vmcs, int running, int seg, struct seg_desc *desc)
243{
244	int error;
245	uint32_t base, limit, access;
246
247	error = vmcs_seg_desc_encoding(seg, &base, &limit, &access);
248	if (error != 0)
249		panic("vmcs_setdesc: invalid segment register %d", seg);
250
251	if (!running)
252		VMPTRLD(vmcs);
253	if ((error = vmwrite(base, desc->base)) != 0)
254		goto done;
255
256	if ((error = vmwrite(limit, desc->limit)) != 0)
257		goto done;
258
259	if (access != VMCS_INVALID_ENCODING) {
260		if ((error = vmwrite(access, desc->access)) != 0)
261			goto done;
262	}
263done:
264	if (!running)
265		VMCLEAR(vmcs);
266	return (error);
267}
268
269int
270vmcs_getdesc(struct vmcs *vmcs, int running, int seg, struct seg_desc *desc)
271{
272	int error;
273	uint32_t base, limit, access;
274	uint64_t u64;
275
276	error = vmcs_seg_desc_encoding(seg, &base, &limit, &access);
277	if (error != 0)
278		panic("vmcs_getdesc: invalid segment register %d", seg);
279
280	if (!running)
281		VMPTRLD(vmcs);
282	if ((error = vmread(base, &u64)) != 0)
283		goto done;
284	desc->base = u64;
285
286	if ((error = vmread(limit, &u64)) != 0)
287		goto done;
288	desc->limit = u64;
289
290	if (access != VMCS_INVALID_ENCODING) {
291		if ((error = vmread(access, &u64)) != 0)
292			goto done;
293		desc->access = u64;
294	}
295done:
296	if (!running)
297		VMCLEAR(vmcs);
298	return (error);
299}
300
301int
302vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count)
303{
304	int error;
305
306	VMPTRLD(vmcs);
307
308	/*
309	 * Guest MSRs are saved in the VM-exit MSR-store area.
310	 * Guest MSRs are loaded from the VM-entry MSR-load area.
311	 * Both areas point to the same location in memory.
312	 */
313	if ((error = vmwrite(VMCS_EXIT_MSR_STORE, g_area)) != 0)
314		goto done;
315	if ((error = vmwrite(VMCS_EXIT_MSR_STORE_COUNT, g_count)) != 0)
316		goto done;
317
318	if ((error = vmwrite(VMCS_ENTRY_MSR_LOAD, g_area)) != 0)
319		goto done;
320	if ((error = vmwrite(VMCS_ENTRY_MSR_LOAD_COUNT, g_count)) != 0)
321		goto done;
322
323	error = 0;
324done:
325	VMCLEAR(vmcs);
326	return (error);
327}
328
329int
330vmcs_init(struct vmcs *vmcs)
331{
332	int error, codesel, datasel, tsssel;
333	u_long cr0, cr4, efer;
334	uint64_t pat, fsbase, idtrbase;
335
336	codesel = vmm_get_host_codesel();
337	datasel = vmm_get_host_datasel();
338	tsssel = vmm_get_host_tsssel();
339
340	/*
341	 * Make sure we have a "current" VMCS to work with.
342	 */
343	VMPTRLD(vmcs);
344
345	/* Initialize guest IA32_PAT MSR with the default value */
346	pat = PAT_VALUE(0, PAT_WRITE_BACK)	|
347	      PAT_VALUE(1, PAT_WRITE_THROUGH)	|
348	      PAT_VALUE(2, PAT_UNCACHED)	|
349	      PAT_VALUE(3, PAT_UNCACHEABLE)	|
350	      PAT_VALUE(4, PAT_WRITE_BACK)	|
351	      PAT_VALUE(5, PAT_WRITE_THROUGH)	|
352	      PAT_VALUE(6, PAT_UNCACHED)	|
353	      PAT_VALUE(7, PAT_UNCACHEABLE);
354	if ((error = vmwrite(VMCS_GUEST_IA32_PAT, pat)) != 0)
355		goto done;
356
357	/* Host state */
358
359	/* Initialize host IA32_PAT MSR */
360	pat = vmm_get_host_pat();
361	if ((error = vmwrite(VMCS_HOST_IA32_PAT, pat)) != 0)
362		goto done;
363
364	/* Load the IA32_EFER MSR */
365	efer = vmm_get_host_efer();
366	if ((error = vmwrite(VMCS_HOST_IA32_EFER, efer)) != 0)
367		goto done;
368
369	/* Load the control registers */
370
371	cr0 = vmm_get_host_cr0();
372	if ((error = vmwrite(VMCS_HOST_CR0, cr0)) != 0)
373		goto done;
374
375	cr4 = vmm_get_host_cr4() | CR4_VMXE;
376	if ((error = vmwrite(VMCS_HOST_CR4, cr4)) != 0)
377		goto done;
378
379	/* Load the segment selectors */
380	if ((error = vmwrite(VMCS_HOST_ES_SELECTOR, datasel)) != 0)
381		goto done;
382
383	if ((error = vmwrite(VMCS_HOST_CS_SELECTOR, codesel)) != 0)
384		goto done;
385
386	if ((error = vmwrite(VMCS_HOST_SS_SELECTOR, datasel)) != 0)
387		goto done;
388
389	if ((error = vmwrite(VMCS_HOST_DS_SELECTOR, datasel)) != 0)
390		goto done;
391
392	if ((error = vmwrite(VMCS_HOST_FS_SELECTOR, datasel)) != 0)
393		goto done;
394
395	if ((error = vmwrite(VMCS_HOST_GS_SELECTOR, datasel)) != 0)
396		goto done;
397
398	if ((error = vmwrite(VMCS_HOST_TR_SELECTOR, tsssel)) != 0)
399		goto done;
400
401	/*
402	 * Load the Base-Address for %fs and idtr.
403	 *
404	 * Note that we exclude %gs, tss and gdtr here because their base
405	 * address is pcpu specific.
406	 */
407	fsbase = vmm_get_host_fsbase();
408	if ((error = vmwrite(VMCS_HOST_FS_BASE, fsbase)) != 0)
409		goto done;
410
411	idtrbase = vmm_get_host_idtrbase();
412	if ((error = vmwrite(VMCS_HOST_IDTR_BASE, idtrbase)) != 0)
413		goto done;
414
415	/* instruction pointer */
416	if ((error = vmwrite(VMCS_HOST_RIP, (u_long)vmx_exit_guest)) != 0)
417		goto done;
418
419	/* link pointer */
420	if ((error = vmwrite(VMCS_LINK_POINTER, ~0)) != 0)
421		goto done;
422done:
423	VMCLEAR(vmcs);
424	return (error);
425}
426
427#ifdef DDB
428extern int vmxon_enabled[];
429
430DB_SHOW_COMMAND(vmcs, db_show_vmcs)
431{
432	uint64_t cur_vmcs, val;
433	uint32_t exit;
434
435	if (!vmxon_enabled[curcpu]) {
436		db_printf("VMX not enabled\n");
437		return;
438	}
439
440	if (have_addr) {
441		db_printf("Only current VMCS supported\n");
442		return;
443	}
444
445	vmptrst(&cur_vmcs);
446	if (cur_vmcs == VMCS_INITIAL) {
447		db_printf("No current VM context\n");
448		return;
449	}
450	db_printf("VMCS: %jx\n", cur_vmcs);
451	db_printf("VPID: %lu\n", vmcs_read(VMCS_VPID));
452	db_printf("Activity: ");
453	val = vmcs_read(VMCS_GUEST_ACTIVITY);
454	switch (val) {
455	case 0:
456		db_printf("Active");
457		break;
458	case 1:
459		db_printf("HLT");
460		break;
461	case 2:
462		db_printf("Shutdown");
463		break;
464	case 3:
465		db_printf("Wait for SIPI");
466		break;
467	default:
468		db_printf("Unknown: %#lx", val);
469	}
470	db_printf("\n");
471	exit = vmcs_read(VMCS_EXIT_REASON);
472	if (exit & 0x80000000)
473		db_printf("Entry Failure Reason: %u\n", exit & 0xffff);
474	else
475		db_printf("Exit Reason: %u\n", exit & 0xffff);
476	db_printf("Qualification: %#lx\n", vmcs_exit_qualification());
477	db_printf("Guest Linear Address: %#lx\n",
478	    vmcs_read(VMCS_GUEST_LINEAR_ADDRESS));
479	switch (exit & 0x8000ffff) {
480	case EXIT_REASON_EXCEPTION:
481	case EXIT_REASON_EXT_INTR:
482		val = vmcs_read(VMCS_EXIT_INTR_INFO);
483		db_printf("Interrupt Type: ");
484		switch (val >> 8 & 0x7) {
485		case 0:
486			db_printf("external");
487			break;
488		case 2:
489			db_printf("NMI");
490			break;
491		case 3:
492			db_printf("HW exception");
493			break;
494		case 4:
495			db_printf("SW exception");
496			break;
497		default:
498			db_printf("?? %lu", val >> 8 & 0x7);
499			break;
500		}
501		db_printf("  Vector: %lu", val & 0xff);
502		if (val & 0x800)
503			db_printf("  Error Code: %lx",
504			    vmcs_read(VMCS_EXIT_INTR_ERRCODE));
505		db_printf("\n");
506		break;
507	case EXIT_REASON_EPT_FAULT:
508	case EXIT_REASON_EPT_MISCONFIG:
509		db_printf("Guest Physical Address: %#lx\n",
510		    vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS));
511		break;
512	}
513	db_printf("VM-instruction error: %#lx\n", vmcs_instruction_error());
514}
515#endif
516