vmm_dev.h revision 262506 
1/*-
2 * Copyright (c) 2011 NetApp, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/amd64/include/vmm_dev.h 262506 2014-02-26 00:52:05Z neel $
27 */
28
29#ifndef	_VMM_DEV_H_
30#define	_VMM_DEV_H_
31
32#ifdef _KERNEL
33void	vmmdev_init(void);
34int	vmmdev_cleanup(void);
35#endif
36
37struct vm_memory_segment {
38	vm_paddr_t	gpa;	/* in */
39	size_t		len;
40	int		wired;
41};
42
43struct vm_register {
44	int		cpuid;
45	int		regnum;		/* enum vm_reg_name */
46	uint64_t	regval;
47};
48
49struct vm_seg_desc {			/* data or code segment */
50	int		cpuid;
51	int		regnum;		/* enum vm_reg_name */
52	struct seg_desc desc;
53};
54
55struct vm_run {
56	int		cpuid;
57	uint64_t	rip;		/* start running here */
58	struct vm_exit	vm_exit;
59};
60
61struct vm_exception {
62	int		cpuid;
63	int		vector;
64	uint32_t	error_code;
65	int		error_code_valid;
66};
67
68struct vm_lapic_msi {
69	uint64_t	msg;
70	uint64_t	addr;
71};
72
73struct vm_lapic_irq {
74	int		cpuid;
75	int		vector;
76};
77
78struct vm_ioapic_irq {
79	int		irq;
80};
81
82struct vm_capability {
83	int		cpuid;
84	enum vm_cap_type captype;
85	int		capval;
86	int		allcpus;
87};
88
89struct vm_pptdev {
90	int		bus;
91	int		slot;
92	int		func;
93};
94
95struct vm_pptdev_mmio {
96	int		bus;
97	int		slot;
98	int		func;
99	vm_paddr_t	gpa;
100	vm_paddr_t	hpa;
101	size_t		len;
102};
103
104struct vm_pptdev_msi {
105	int		vcpu;
106	int		bus;
107	int		slot;
108	int		func;
109	int		numvec;		/* 0 means disabled */
110	uint64_t	msg;
111	uint64_t	addr;
112};
113
114struct vm_pptdev_msix {
115	int		vcpu;
116	int		bus;
117	int		slot;
118	int		func;
119	int		idx;
120	uint64_t	msg;
121	uint32_t	vector_control;
122	uint64_t	addr;
123};
124
125struct vm_nmi {
126	int		cpuid;
127};
128
129#define	MAX_VM_STATS	64
130struct vm_stats {
131	int		cpuid;				/* in */
132	int		num_entries;			/* out */
133	struct timeval	tv;
134	uint64_t	statbuf[MAX_VM_STATS];
135};
136
137struct vm_stat_desc {
138	int		index;				/* in */
139	char		desc[128];			/* out */
140};
141
142struct vm_x2apic {
143	int			cpuid;
144	enum x2apic_state	state;
145};
146
147struct vm_gpa_pte {
148	uint64_t	gpa;				/* in */
149	uint64_t	pte[4];				/* out */
150	int		ptenum;
151};
152
153struct vm_hpet_cap {
154	uint32_t	capabilities;	/* lower 32 bits of HPET capabilities */
155};
156
157enum {
158	/* general routines */
159	IOCNUM_ABIVERS = 0,
160	IOCNUM_RUN = 1,
161	IOCNUM_SET_CAPABILITY = 2,
162	IOCNUM_GET_CAPABILITY = 3,
163
164	/* memory apis */
165	IOCNUM_MAP_MEMORY = 10,
166	IOCNUM_GET_MEMORY_SEG = 11,
167	IOCNUM_GET_GPA_PMAP = 12,
168
169	/* register/state accessors */
170	IOCNUM_SET_REGISTER = 20,
171	IOCNUM_GET_REGISTER = 21,
172	IOCNUM_SET_SEGMENT_DESCRIPTOR = 22,
173	IOCNUM_GET_SEGMENT_DESCRIPTOR = 23,
174
175	/* interrupt injection */
176	IOCNUM_INJECT_EXCEPTION = 30,
177	IOCNUM_LAPIC_IRQ = 31,
178	IOCNUM_INJECT_NMI = 32,
179	IOCNUM_IOAPIC_ASSERT_IRQ = 33,
180	IOCNUM_IOAPIC_DEASSERT_IRQ = 34,
181	IOCNUM_IOAPIC_PULSE_IRQ = 35,
182	IOCNUM_LAPIC_MSI = 36,
183	IOCNUM_LAPIC_LOCAL_IRQ = 37,
184	IOCNUM_IOAPIC_PINCOUNT = 38,
185
186	/* PCI pass-thru */
187	IOCNUM_BIND_PPTDEV = 40,
188	IOCNUM_UNBIND_PPTDEV = 41,
189	IOCNUM_MAP_PPTDEV_MMIO = 42,
190	IOCNUM_PPTDEV_MSI = 43,
191	IOCNUM_PPTDEV_MSIX = 44,
192
193	/* statistics */
194	IOCNUM_VM_STATS = 50,
195	IOCNUM_VM_STAT_DESC = 51,
196
197	/* kernel device state */
198	IOCNUM_SET_X2APIC_STATE = 60,
199	IOCNUM_GET_X2APIC_STATE = 61,
200	IOCNUM_GET_HPET_CAPABILITIES = 62,
201};
202
203#define	VM_RUN		\
204	_IOWR('v', IOCNUM_RUN, struct vm_run)
205#define	VM_MAP_MEMORY	\
206	_IOWR('v', IOCNUM_MAP_MEMORY, struct vm_memory_segment)
207#define	VM_GET_MEMORY_SEG \
208	_IOWR('v', IOCNUM_GET_MEMORY_SEG, struct vm_memory_segment)
209#define	VM_SET_REGISTER \
210	_IOW('v', IOCNUM_SET_REGISTER, struct vm_register)
211#define	VM_GET_REGISTER \
212	_IOWR('v', IOCNUM_GET_REGISTER, struct vm_register)
213#define	VM_SET_SEGMENT_DESCRIPTOR \
214	_IOW('v', IOCNUM_SET_SEGMENT_DESCRIPTOR, struct vm_seg_desc)
215#define	VM_GET_SEGMENT_DESCRIPTOR \
216	_IOWR('v', IOCNUM_GET_SEGMENT_DESCRIPTOR, struct vm_seg_desc)
217#define	VM_INJECT_EXCEPTION	\
218	_IOW('v', IOCNUM_INJECT_EXCEPTION, struct vm_exception)
219#define	VM_LAPIC_IRQ 		\
220	_IOW('v', IOCNUM_LAPIC_IRQ, struct vm_lapic_irq)
221#define	VM_LAPIC_LOCAL_IRQ 	\
222	_IOW('v', IOCNUM_LAPIC_LOCAL_IRQ, struct vm_lapic_irq)
223#define	VM_LAPIC_MSI		\
224	_IOW('v', IOCNUM_LAPIC_MSI, struct vm_lapic_msi)
225#define	VM_IOAPIC_ASSERT_IRQ	\
226	_IOW('v', IOCNUM_IOAPIC_ASSERT_IRQ, struct vm_ioapic_irq)
227#define	VM_IOAPIC_DEASSERT_IRQ	\
228	_IOW('v', IOCNUM_IOAPIC_DEASSERT_IRQ, struct vm_ioapic_irq)
229#define	VM_IOAPIC_PULSE_IRQ	\
230	_IOW('v', IOCNUM_IOAPIC_PULSE_IRQ, struct vm_ioapic_irq)
231#define	VM_IOAPIC_PINCOUNT	\
232	_IOR('v', IOCNUM_IOAPIC_PINCOUNT, int)
233#define	VM_SET_CAPABILITY \
234	_IOW('v', IOCNUM_SET_CAPABILITY, struct vm_capability)
235#define	VM_GET_CAPABILITY \
236	_IOWR('v', IOCNUM_GET_CAPABILITY, struct vm_capability)
237#define	VM_BIND_PPTDEV \
238	_IOW('v', IOCNUM_BIND_PPTDEV, struct vm_pptdev)
239#define	VM_UNBIND_PPTDEV \
240	_IOW('v', IOCNUM_UNBIND_PPTDEV, struct vm_pptdev)
241#define	VM_MAP_PPTDEV_MMIO \
242	_IOW('v', IOCNUM_MAP_PPTDEV_MMIO, struct vm_pptdev_mmio)
243#define	VM_PPTDEV_MSI \
244	_IOW('v', IOCNUM_PPTDEV_MSI, struct vm_pptdev_msi)
245#define	VM_PPTDEV_MSIX \
246	_IOW('v', IOCNUM_PPTDEV_MSIX, struct vm_pptdev_msix)
247#define VM_INJECT_NMI \
248	_IOW('v', IOCNUM_INJECT_NMI, struct vm_nmi)
249#define	VM_STATS \
250	_IOWR('v', IOCNUM_VM_STATS, struct vm_stats)
251#define	VM_STAT_DESC \
252	_IOWR('v', IOCNUM_VM_STAT_DESC, struct vm_stat_desc)
253#define	VM_SET_X2APIC_STATE \
254	_IOW('v', IOCNUM_SET_X2APIC_STATE, struct vm_x2apic)
255#define	VM_GET_X2APIC_STATE \
256	_IOWR('v', IOCNUM_GET_X2APIC_STATE, struct vm_x2apic)
257#define	VM_GET_HPET_CAPABILITIES \
258	_IOR('v', IOCNUM_GET_HPET_CAPABILITIES, struct vm_hpet_cap)
259#define	VM_GET_GPA_PMAP \
260	_IOWR('v', IOCNUM_GET_GPA_PMAP, struct vm_gpa_pte)
261#endif
262