fpu.h revision 621
14Srgrimes/*- 24Srgrimes * Copyright (c) 1990 The Regents of the University of California. 34Srgrimes * All rights reserved. 44Srgrimes * 54Srgrimes * This code is derived from software contributed to Berkeley by 64Srgrimes * William Jolitz. 74Srgrimes * 84Srgrimes * Redistribution and use in source and binary forms, with or without 94Srgrimes * modification, are permitted provided that the following conditions 104Srgrimes * are met: 114Srgrimes * 1. Redistributions of source code must retain the above copyright 124Srgrimes * notice, this list of conditions and the following disclaimer. 134Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 144Srgrimes * notice, this list of conditions and the following disclaimer in the 154Srgrimes * documentation and/or other materials provided with the distribution. 164Srgrimes * 3. All advertising materials mentioning features or use of this software 174Srgrimes * must display the following acknowledgement: 184Srgrimes * This product includes software developed by the University of 194Srgrimes * California, Berkeley and its contributors. 204Srgrimes * 4. Neither the name of the University nor the names of its contributors 214Srgrimes * may be used to endorse or promote products derived from this software 224Srgrimes * without specific prior written permission. 234Srgrimes * 244Srgrimes * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 254Srgrimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 264Srgrimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 274Srgrimes * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 284Srgrimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 294Srgrimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 304Srgrimes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 314Srgrimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 324Srgrimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 334Srgrimes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 344Srgrimes * SUCH DAMAGE. 354Srgrimes * 36621Srgrimes * from: @(#)npx.h 5.3 (Berkeley) 1/18/91 37621Srgrimes * $Id$ 384Srgrimes */ 394Srgrimes 404Srgrimes/* 414Srgrimes * 287/387 NPX Coprocessor Data Structures and Constants 424Srgrimes * W. Jolitz 1/90 434Srgrimes */ 444Srgrimes 454Srgrimes#ifndef ___NPX87___ 464Srgrimes#define ___NPX87___ 474Srgrimes 484Srgrimes/* Environment information of floating point unit */ 494Srgrimesstruct env87 { 504Srgrimes long en_cw; /* control word (16bits) */ 514Srgrimes long en_sw; /* status word (16bits) */ 524Srgrimes long en_tw; /* tag word (16bits) */ 534Srgrimes long en_fip; /* floating point instruction pointer */ 544Srgrimes u_short en_fcs; /* floating code segment selector */ 554Srgrimes u_short en_opcode; /* opcode last executed (11 bits ) */ 564Srgrimes long en_foo; /* floating operand offset */ 574Srgrimes long en_fos; /* floating operand segment selector */ 584Srgrimes}; 594Srgrimes 604Srgrimes/* Contents of each floating point accumulator */ 614Srgrimesstruct fpacc87 { 624Srgrimes#ifdef dontdef /* too unportable */ 634Srgrimes u_long fp_mantlo; /* mantissa low (31:0) */ 644Srgrimes u_long fp_manthi; /* mantissa high (63:32) */ 654Srgrimes int fp_exp:15; /* exponent */ 664Srgrimes int fp_sgn:1; /* mantissa sign */ 674Srgrimes#else 684Srgrimes u_char fp_bytes[10]; 694Srgrimes#endif 704Srgrimes}; 714Srgrimes 724Srgrimes/* Floating point context */ 734Srgrimesstruct save87 { 744Srgrimes struct env87 sv_env; /* floating point control/status */ 754Srgrimes struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */ 764Srgrimes#ifndef dontdef 774Srgrimes u_long sv_ex_sw; /* status word for last exception (was pad) */ 784Srgrimes u_long sv_ex_tw; /* tag word for last exception (was pad) */ 794Srgrimes u_char sv_pad[8 * 2 - 2 * 4]; /* bogus historical padding */ 804Srgrimes#endif 814Srgrimes}; 824Srgrimes 834Srgrimes/* Cyrix EMC memory - mapped coprocessor context switch information */ 844Srgrimesstruct emcsts { 854Srgrimes long em_msw; /* memory mapped status register when swtched */ 864Srgrimes long em_tar; /* memory mapped temp A register when swtched */ 874Srgrimes long em_dl; /* memory mapped D low register when swtched */ 884Srgrimes}; 894Srgrimes 904Srgrimes/* Intel prefers long real (53 bit) precision */ 914Srgrimes#define __iBCS_NPXCW__ 0x262 924Srgrimes/* wfj prefers temporary real (64 bit) precision */ 934Srgrimes#define __386BSD_NPXCW__ 0x362 944Srgrimes/* 954Srgrimes * bde prefers 53 bit precision and all exceptions masked. 964Srgrimes * 974Srgrimes * The standard control word from finit is 0x37F, giving: 984Srgrimes * 994Srgrimes * round to nearest 1004Srgrimes * 64-bit precision 1014Srgrimes * all exceptions masked. 1024Srgrimes * 1034Srgrimes * Now I want: 1044Srgrimes * 1054Srgrimes * affine mode for 287's (if they work at all) (1 in bitfield 1<<12) 1064Srgrimes * 53-bit precision (2 in bitfield 3<<8) 1074Srgrimes * overflow exception unmasked (0 in bitfield 1<<3) 1084Srgrimes * zero divide exception unmasked (0 in bitfield 1<<2) 1094Srgrimes * invalid-operand exception unmasked (0 in bitfield 1<<0). 1104Srgrimes * 1114Srgrimes * 64-bit precision often gives bad results with high level languages 1124Srgrimes * because it makes the results of calculations depend on whether 1134Srgrimes * intermediate values are stored in memory or in FPU registers. 1144Srgrimes * 1154Srgrimes * The "Intel" and wfj control words have: 1164Srgrimes * 1174Srgrimes * underflow exception unmasked (0 in bitfield 1<<4) 1184Srgrimes * 1194Srgrimes * but that causes an unexpected exception in the test program 'paranoia' 1204Srgrimes * and makes denormals useless (DBL_MIN / 2 underflows). It doesn't make 1214Srgrimes * a lot of sense to trap underflow without trapping denormals. 1224Srgrimes * 1234Srgrimes * Later I will want the IEEE default of all exceptions masked. See the 1244Srgrimes * 0.0 math manpage for why this is better. The 0.1 math manpage is empty. 1254Srgrimes */ 1264Srgrimes#define __BDE_NPXCW__ 0x1272 1274Srgrimes#define __BETTER_BDE_NPXCW__ 0x127f 1284Srgrimes 1294Srgrimes#ifdef __BROKEN_NPXCW__ 1304Srgrimes#ifdef __386BSD__ 1314Srgrimes#define __INITIAL_NPXCW__ __386BSD_NPXCW__ 1324Srgrimes#else 1334Srgrimes#define __INITIAL_NPXCW__ __iBCS_NPXCW__ 1344Srgrimes#endif 1354Srgrimes#else 1364Srgrimes#define __INITIAL_NPXCW__ __BDE_NPXCW__ 1374Srgrimes#endif 1384Srgrimes 1394Srgrimes#endif ___NPX87___ 140