mpboot.S revision 30265
1/* 2 * Copyright (c) 1995, Jack F. Vogel 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Jack F. Vogel 16 * 4. The name of the developer may be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * mpboot.s: FreeBSD machine support for the Intel MP Spec 32 * multiprocessor systems. 33 * 34 * $Id: mpboot.s,v 1.5 1997/09/22 05:03:03 peter Exp $ 35 */ 36 37#include "opt_vm86.h" 38 39#include <machine/asmacros.h> /* miscellaneous asm macros */ 40#include <machine/apic.h> 41#include <machine/specialreg.h> 42 43#include "assym.s" 44 45/* 46 * this code MUST be enabled here and in mp_machdep.c 47 * it follows the very early stages of AP boot by placing values in CMOS ram. 48 * it NORMALLY will never be needed and thus the primitive method for enabling. 49 * 50#define CHECK_POINTS 51 */ 52 53#if defined(CHECK_POINTS) 54 55#define CMOS_REG (0x70) 56#define CMOS_DATA (0x71) 57 58#define CHECKPOINT(A,D) \ 59 movb $(A),%al ; \ 60 outb %al,$CMOS_REG ; \ 61 movb $(D),%al ; \ 62 outb %al,$CMOS_DATA 63 64#else 65 66#define CHECKPOINT(A,D) 67 68#endif /* CHECK_POINTS */ 69 70 71/* 72 * the APs enter here from their trampoline code (bootMP, below) 73 */ 74 .p2align 4 75 76NON_GPROF_ENTRY(MPentry) 77 CHECKPOINT(0x36, 3) 78 /* Now enable paging mode */ 79 movl _bootPTD-KERNBASE, %eax 80 movl %eax,%cr3 81 movl %cr0,%eax 82 orl $CR0_PE|CR0_PG,%eax /* enable paging */ 83 movl %eax,%cr0 /* let the games begin! */ 84 movl $_idlestack_top,%esp /* boot stack end loc. */ 85 86 pushl $mp_begin /* jump to high mem */ 87 ret 88 89 /* 90 * Wait for the booting CPU to signal startup 91 */ 92mp_begin: /* now running relocated at KERNBASE */ 93 CHECKPOINT(0x37, 4) 94 call _init_secondary /* load i386 tables */ 95 CHECKPOINT(0x38, 5) 96 97#ifdef VM86 98 /* 99 * If the [BSP] CPU has support for VME, turn it on. 100 */ 101 testl $CPUID_VME, _cpu_feature /* XXX WRONG! BSP! */ 102 jz 1f 103 movl %cr4, %eax 104 orl $CR4_VME, %eax 105 movl %eax, %cr4 1061: 107#endif 108 109 /* disable the APIC, just to be SURE */ 110 movl lapic_svr, %eax /* get spurious vector reg. */ 111 andl $~APIC_SVR_SWEN, %eax /* clear software enable bit */ 112 movl %eax, lapic_svr 113 114 /* signal our startup to the BSP */ 115 movl lapic_ver, %eax /* our version reg contents */ 116 movl %eax, _cpu_apic_versions /* into [ 0 ] */ 117 incl _mp_ncpus /* signal BSP */ 118 119 CHECKPOINT(0x39, 6) 120 121 /* wait till we can get into the kernel */ 122 call _boot_get_mplock 123 124 /* Now, let's prepare for some REAL WORK :-) */ 125 call _ap_init 126 127 /* let her rip! (loads new stack) */ 128 jmp _cpu_switch 129 130/* 131 * This is the embedded trampoline or bootstrap that is 132 * copied into 'real-mode' low memory, it is where the 133 * secondary processor "wakes up". When it is executed 134 * the processor will eventually jump into the routine 135 * MPentry, which resides in normal kernel text above 136 * 1Meg. -jackv 137 */ 138 139#define data32 .byte 0x66 140#define addr32 .byte 0x67 141 142 .data 143 ALIGN_DATA /* just to be sure */ 144 145BOOTMP1: 146 147NON_GPROF_ENTRY(bootMP) 148 cli 149 CHECKPOINT(0x34, 1) 150 /* First guarantee a 'clean slate' */ 151 data32 152 xorl %eax, %eax 153 data32 154 movl %eax, %ebx 155 data32 156 movl %eax, %ecx 157 data32 158 movl %eax, %edx 159 data32 160 movl %eax, %esi 161 data32 162 movl %eax, %edi 163 164 /* set up data segments */ 165 mov %cs, %ax 166 mov %ax, %ds 167 mov %ax, %es 168 mov %ax, %fs 169 mov %ax, %gs 170 mov %ax, %ss 171 mov $(boot_stk-_bootMP), %sp 172 173 /* Now load the global descriptor table */ 174 addr32 175 data32 176 /* XXX: sigh: lgdt MP_GDTptr-_bootMP GAS BUG! */ 177 .byte 0x0f, 0x01, 0x15 /* XXX hand assemble! */ 178 .long MP_GDTptr-_bootMP /* XXX hand assemble! */ 179 180 /* Enable protected mode */ 181 data32 182 movl %cr0, %eax 183 data32 184 orl $CR0_PE, %eax 185 data32 186 movl %eax, %cr0 187 188 /* 189 * make intrasegment jump to flush the processor pipeline and 190 * reload CS register 191 */ 192 data32 193 pushl $0x18 194 data32 195 pushl $(protmode-_bootMP) 196 data32 197 lret 198 199protmode: 200 CHECKPOINT(0x35, 2) 201 202 /* 203 * we are NOW running for the first time with %eip 204 * having the full physical address, BUT we still 205 * are using a segment descriptor with the origin 206 * not matching the booting kernel. 207 * 208 * SO NOW... for the BIG Jump into kernel's segment 209 * and physical text above 1 Meg. 210 */ 211 mov $0x10, %ebx 212 movw %bx, %ds 213 movw %bx, %es 214 movw %bx, %fs 215 movw %bx, %gs 216 movw %bx, %ss 217 218 .globl _bigJump 219_bigJump: 220 /* this will be modified by mpInstallTramp() */ 221 ljmp $0x08, $0 /* far jmp to MPentry() */ 222 223dead: hlt /* We should never get here */ 224 jmp dead 225 226/* 227 * MP boot strap Global Descriptor Table 228 */ 229 .p2align 4 230 .globl _MP_GDT 231 .globl _bootCodeSeg 232 .globl _bootDataSeg 233_MP_GDT: 234 235nulldesc: /* offset = 0x0 */ 236 237 .word 0x0 238 .word 0x0 239 .byte 0x0 240 .byte 0x0 241 .byte 0x0 242 .byte 0x0 243 244kernelcode: /* offset = 0x08 */ 245 246 .word 0xffff /* segment limit 0..15 */ 247 .word 0x0000 /* segment base 0..15 */ 248 .byte 0x0 /* segment base 16..23; set for 0K */ 249 .byte 0x9f /* flags; Type */ 250 .byte 0xcf /* flags; Limit */ 251 .byte 0x0 /* segment base 24..32 */ 252 253kerneldata: /* offset = 0x10 */ 254 255 .word 0xffff /* segment limit 0..15 */ 256 .word 0x0000 /* segment base 0..15 */ 257 .byte 0x0 /* segment base 16..23; set for 0k */ 258 .byte 0x93 /* flags; Type */ 259 .byte 0xcf /* flags; Limit */ 260 .byte 0x0 /* segment base 24..32 */ 261 262bootcode: /* offset = 0x18 */ 263 264 .word 0xffff /* segment limit 0..15 */ 265_bootCodeSeg: /* this will be modified by mpInstallTramp() */ 266 .word 0x0000 /* segment base 0..15 */ 267 .byte 0x00 /* segment base 16...23; set for 0x000xx000 */ 268 .byte 0x9e /* flags; Type */ 269 .byte 0xcf /* flags; Limit */ 270 .byte 0x0 /*segment base 24..32 */ 271 272bootdata: /* offset = 0x20 */ 273 274 .word 0xffff 275_bootDataSeg: /* this will be modified by mpInstallTramp() */ 276 .word 0x0000 /* segment base 0..15 */ 277 .byte 0x00 /* segment base 16...23; set for 0x000xx000 */ 278 .byte 0x92 279 .byte 0xcf 280 .byte 0x0 281 282/* 283 * GDT pointer for the lgdt call 284 */ 285 .globl _mp_gdtbase 286 287MP_GDTptr: 288_mp_gdtlimit: 289 .word 0x0028 290_mp_gdtbase: /* this will be modified by mpInstallTramp() */ 291 .long 0 292 293 .space 0x100 /* space for boot_stk - 1st temporary stack */ 294boot_stk: 295 296BOOTMP2: 297 .globl _bootMP_size 298_bootMP_size: 299 .long BOOTMP2 - BOOTMP1 300