machdep.c revision 90065
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed by the University of
20 *	California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 *    may be used to endorse or promote products derived from this software
23 *    without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 *	from: @(#)machdep.c	7.4 (Berkeley) 6/3/91
38 * $FreeBSD: head/sys/amd64/amd64/machdep.c 90065 2002-02-01 15:44:03Z bde $
39 */
40
41#include "opt_atalk.h"
42#include "opt_compat.h"
43#include "opt_cpu.h"
44#include "opt_ddb.h"
45#include "opt_inet.h"
46#include "opt_ipx.h"
47#include "opt_isa.h"
48#include "opt_maxmem.h"
49#include "opt_msgbuf.h"
50#include "opt_npx.h"
51#include "opt_perfmon.h"
52#include "opt_kstack_pages.h"
53/* #include "opt_userconfig.h" */
54
55#include <sys/param.h>
56#include <sys/systm.h>
57#include <sys/sysproto.h>
58#include <sys/signalvar.h>
59#include <sys/kernel.h>
60#include <sys/ktr.h>
61#include <sys/linker.h>
62#include <sys/lock.h>
63#include <sys/malloc.h>
64#include <sys/mutex.h>
65#include <sys/pcpu.h>
66#include <sys/proc.h>
67#include <sys/bio.h>
68#include <sys/buf.h>
69#include <sys/reboot.h>
70#include <sys/smp.h>
71#include <sys/callout.h>
72#include <sys/msgbuf.h>
73#include <sys/sysent.h>
74#include <sys/sysctl.h>
75#include <sys/vmmeter.h>
76#include <sys/bus.h>
77#include <sys/eventhandler.h>
78
79#include <vm/vm.h>
80#include <vm/vm_param.h>
81#include <sys/lock.h>
82#include <vm/vm_kern.h>
83#include <vm/vm_object.h>
84#include <vm/vm_page.h>
85#include <vm/vm_map.h>
86#include <vm/vm_pager.h>
87#include <vm/vm_extern.h>
88
89#include <sys/user.h>
90#include <sys/exec.h>
91#include <sys/cons.h>
92
93#include <ddb/ddb.h>
94
95#include <net/netisr.h>
96
97#include <machine/cpu.h>
98#include <machine/cputypes.h>
99#include <machine/reg.h>
100#include <machine/clock.h>
101#include <machine/specialreg.h>
102#include <machine/bootinfo.h>
103#include <machine/md_var.h>
104#include <machine/pc/bios.h>
105#include <machine/pcb_ext.h>		/* pcb.h included via sys/user.h */
106#include <machine/proc.h>
107#ifdef PERFMON
108#include <machine/perfmon.h>
109#endif
110#ifdef SMP
111#include <machine/privatespace.h>
112#endif
113
114#include <i386/isa/icu.h>
115#include <i386/isa/intr_machdep.h>
116#include <isa/rtc.h>
117#include <machine/vm86.h>
118#include <sys/ptrace.h>
119#include <machine/sigframe.h>
120
121extern void init386 __P((int first));
122extern void dblfault_handler __P((void));
123
124extern void printcpuinfo(void);	/* XXX header file */
125extern void earlysetcpuclass(void);	/* same header file */
126extern void finishidentcpu(void);
127extern void panicifcpuunsupported(void);
128extern void initializecpu(void);
129
130#define	CS_SECURE(cs)		(ISPL(cs) == SEL_UPL)
131#define	EFL_SECURE(ef, oef)	((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
132
133static void cpu_startup __P((void *));
134#ifdef CPU_ENABLE_SSE
135static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
136static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
137#endif /* CPU_ENABLE_SSE */
138SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
139
140int	_udatasel, _ucodesel;
141u_int	atdevbase;
142
143#if defined(SWTCH_OPTIM_STATS)
144extern int swtch_optim_stats;
145SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
146	CTLFLAG_RD, &swtch_optim_stats, 0, "");
147SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
148	CTLFLAG_RD, &tlb_flush_count, 0, "");
149#endif
150
151#ifdef PC98
152static int	ispc98 = 1;
153#else
154static int	ispc98 = 0;
155#endif
156SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
157
158int physmem = 0;
159int cold = 1;
160
161#ifdef COMPAT_43
162static void osendsig __P((sig_t catcher, int sig, sigset_t *mask, u_long code));
163#endif
164
165static int
166sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
167{
168	int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
169	return (error);
170}
171
172SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
173	0, 0, sysctl_hw_physmem, "IU", "");
174
175static int
176sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
177{
178	int error = sysctl_handle_int(oidp, 0,
179		ctob(physmem - cnt.v_wire_count), req);
180	return (error);
181}
182
183SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
184	0, 0, sysctl_hw_usermem, "IU", "");
185
186static int
187sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
188{
189	int error = sysctl_handle_int(oidp, 0,
190		i386_btop(avail_end - avail_start), req);
191	return (error);
192}
193
194SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
195	0, 0, sysctl_hw_availpages, "I", "");
196
197int Maxmem = 0;
198long dumplo;
199
200vm_offset_t phys_avail[10];
201
202/* must be 2 less so 0 0 can signal end of chunks */
203#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
204
205struct kva_md_info kmi;
206
207static struct trapframe proc0_tf;
208#ifndef SMP
209static struct pcpu __pcpu;
210#endif
211
212struct mtx sched_lock;
213struct mtx Giant;
214struct mtx icu_lock;
215
216static void
217cpu_startup(dummy)
218	void *dummy;
219{
220	/*
221	 * Good {morning,afternoon,evening,night}.
222	 */
223	earlysetcpuclass();
224	startrtclock();
225	printcpuinfo();
226	panicifcpuunsupported();
227#ifdef PERFMON
228	perfmon_init();
229#endif
230	printf("real memory  = %u (%uK bytes)\n", ptoa(Maxmem),
231	    ptoa(Maxmem) / 1024);
232	/*
233	 * Display any holes after the first chunk of extended memory.
234	 */
235	if (bootverbose) {
236		int indx;
237
238		printf("Physical memory chunk(s):\n");
239		for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
240			unsigned int size1;
241
242			size1 = phys_avail[indx + 1] - phys_avail[indx];
243			printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
244			    phys_avail[indx], phys_avail[indx + 1] - 1, size1,
245			    size1 / PAGE_SIZE);
246		}
247	}
248
249	vm_ksubmap_init(&kmi);
250
251#if defined(USERCONFIG)
252	userconfig();
253	cninit();		/* the preferred console may have changed */
254#endif
255
256	printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count),
257	    ptoa(cnt.v_free_count) / 1024);
258
259	/*
260	 * Set up buffers, so they can be used to read disk labels.
261	 */
262	bufinit();
263	vm_pager_bufferinit();
264
265#ifndef SMP
266	/* For SMP, we delay the cpu_setregs() until after SMP startup. */
267	cpu_setregs();
268#endif
269}
270
271/*
272 * Send an interrupt to process.
273 *
274 * Stack is set up to allow sigcode stored
275 * at top to call routine, followed by kcall
276 * to sigreturn routine below.  After sigreturn
277 * resets the signal mask, the stack, and the
278 * frame pointer, it returns to the user
279 * specified pc, psl.
280 */
281#ifdef COMPAT_43
282static void
283osendsig(catcher, sig, mask, code)
284	sig_t catcher;
285	int sig;
286	sigset_t *mask;
287	u_long code;
288{
289	struct osigframe sf;
290	struct osigframe *fp;
291	struct proc *p;
292	struct thread *td;
293	struct sigacts *psp;
294	struct trapframe *regs;
295	int oonstack;
296
297	td = curthread;
298	p = td->td_proc;
299	PROC_LOCK_ASSERT(p, MA_OWNED);
300	psp = p->p_sigacts;
301	regs = td->td_frame;
302	oonstack = sigonstack(regs->tf_esp);
303
304	/* Allocate and validate space for the signal handler context. */
305	if ((p->p_flag & P_ALTSTACK) && !oonstack &&
306	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
307		fp = (struct osigframe *)(p->p_sigstk.ss_sp +
308		    p->p_sigstk.ss_size - sizeof(struct osigframe));
309#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
310		p->p_sigstk.ss_flags |= SS_ONSTACK;
311#endif
312	} else
313		fp = (struct osigframe *)regs->tf_esp - 1;
314	PROC_UNLOCK(p);
315
316	/*
317	 * grow_stack() will return 0 if *fp does not fit inside the stack
318	 * and the stack can not be grown.
319	 * useracc() will return FALSE if access is denied.
320	 */
321	if (grow_stack(p, (int)fp) == 0 ||
322	    !useracc((caddr_t)fp, sizeof(*fp), VM_PROT_WRITE)) {
323		/*
324		 * Process has trashed its stack; give it an illegal
325		 * instruction to halt it in its tracks.
326		 */
327		PROC_LOCK(p);
328		SIGACTION(p, SIGILL) = SIG_DFL;
329		SIGDELSET(p->p_sigignore, SIGILL);
330		SIGDELSET(p->p_sigcatch, SIGILL);
331		SIGDELSET(p->p_sigmask, SIGILL);
332		psignal(p, SIGILL);
333		return;
334	}
335
336	/* Translate the signal if appropriate. */
337	if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
338		sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
339
340	/* Build the argument list for the signal handler. */
341	sf.sf_signum = sig;
342	sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
343	PROC_LOCK(p);
344	if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
345		/* Signal handler installed with SA_SIGINFO. */
346		sf.sf_arg2 = (register_t)&fp->sf_siginfo;
347		sf.sf_siginfo.si_signo = sig;
348		sf.sf_siginfo.si_code = code;
349		sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
350	} else {
351		/* Old FreeBSD-style arguments. */
352		sf.sf_arg2 = code;
353		sf.sf_addr = regs->tf_err;
354		sf.sf_ahu.sf_handler = catcher;
355	}
356	PROC_UNLOCK(p);
357
358	/* Save most if not all of trap frame. */
359	sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
360	sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
361	sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
362	sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
363	sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
364	sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
365	sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
366	sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
367	sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
368	sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
369	sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
370	sf.sf_siginfo.si_sc.sc_gs = rgs();
371	sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
372
373	/* Build the signal context to be used by osigreturn(). */
374	sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
375	SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
376	sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
377	sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
378	sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
379	sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
380	sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
381	sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
382
383	/*
384	 * If we're a vm86 process, we want to save the segment registers.
385	 * We also change eflags to be our emulated eflags, not the actual
386	 * eflags.
387	 */
388	if (regs->tf_eflags & PSL_VM) {
389		/* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
390		struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
391		struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
392
393		sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
394		sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
395		sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
396		sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
397
398		if (vm86->vm86_has_vme == 0)
399			sf.sf_siginfo.si_sc.sc_ps =
400			    (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
401			    (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
402
403		/* See sendsig() for comments. */
404		tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
405	}
406
407	/* Copy the sigframe out to the user's stack. */
408	if (copyout(&sf, fp, sizeof(*fp)) != 0) {
409		/*
410		 * Something is wrong with the stack pointer.
411		 * ...Kill the process.
412		 */
413		PROC_LOCK(p);
414		sigexit(td, SIGILL);
415		/* NOTREACHED */
416	}
417
418	regs->tf_esp = (int)fp;
419	regs->tf_eip = PS_STRINGS - szosigcode;
420	regs->tf_eflags &= ~PSL_T;
421	regs->tf_cs = _ucodesel;
422	regs->tf_ds = _udatasel;
423	regs->tf_es = _udatasel;
424	regs->tf_fs = _udatasel;
425	load_gs(_udatasel);
426	regs->tf_ss = _udatasel;
427	PROC_LOCK(p);
428}
429#endif
430
431void
432sendsig(catcher, sig, mask, code)
433	sig_t catcher;
434	int sig;
435	sigset_t *mask;
436	u_long code;
437{
438	struct sigframe sf;
439	struct proc *p;
440	struct thread *td;
441	struct sigacts *psp;
442	struct trapframe *regs;
443	struct sigframe *sfp;
444	int oonstack;
445
446	td = curthread;
447	p = td->td_proc;
448	PROC_LOCK_ASSERT(p, MA_OWNED);
449	psp = p->p_sigacts;
450#ifdef COMPAT_43
451	if (SIGISMEMBER(psp->ps_osigset, sig)) {
452		osendsig(catcher, sig, mask, code);
453		return;
454	}
455#endif
456	regs = td->td_frame;
457	oonstack = sigonstack(regs->tf_esp);
458
459	/* Save user context. */
460	bzero(&sf, sizeof(sf));
461	sf.sf_uc.uc_sigmask = *mask;
462	sf.sf_uc.uc_stack = p->p_sigstk;
463	sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK)
464	    ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
465	sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
466	sf.sf_uc.uc_mcontext.mc_gs = rgs();
467	sf.sf_uc.uc_mcontext.mc_flags = __UC_MC_VALID;	/* no FP regs */
468	bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
469
470	/* Allocate and validate space for the signal handler context. */
471	if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
472	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
473		sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
474		    p->p_sigstk.ss_size - sizeof(struct sigframe));
475#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
476		p->p_sigstk.ss_flags |= SS_ONSTACK;
477#endif
478	} else
479		sfp = (struct sigframe *)regs->tf_esp - 1;
480	PROC_UNLOCK(p);
481
482	/*
483	 * grow_stack() will return 0 if *sfp does not fit inside the stack
484	 * and the stack can not be grown.
485	 * useracc() will return FALSE if access is denied.
486	 */
487	if (grow_stack(p, (int)sfp) == 0 ||
488	    !useracc((caddr_t)sfp, sizeof(*sfp), VM_PROT_WRITE)) {
489		/*
490		 * Process has trashed its stack; give it an illegal
491		 * instruction to halt it in its tracks.
492		 */
493#ifdef DEBUG
494		printf("process %d has trashed its stack\n", p->p_pid);
495#endif
496		PROC_LOCK(p);
497		SIGACTION(p, SIGILL) = SIG_DFL;
498		SIGDELSET(p->p_sigignore, SIGILL);
499		SIGDELSET(p->p_sigcatch, SIGILL);
500		SIGDELSET(p->p_sigmask, SIGILL);
501		psignal(p, SIGILL);
502		return;
503	}
504
505	/* Translate the signal if appropriate. */
506	if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
507		sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
508
509	/* Build the argument list for the signal handler. */
510	sf.sf_signum = sig;
511	sf.sf_ucontext = (register_t)&sfp->sf_uc;
512	PROC_LOCK(p);
513	if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
514		/* Signal handler installed with SA_SIGINFO. */
515		sf.sf_siginfo = (register_t)&sfp->sf_si;
516		sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
517
518		/* Fill siginfo structure. */
519		sf.sf_si.si_signo = sig;
520		sf.sf_si.si_code = code;
521		sf.sf_si.si_addr = (void *)regs->tf_err;
522	} else {
523		/* Old FreeBSD-style arguments. */
524		sf.sf_siginfo = code;
525		sf.sf_addr = regs->tf_err;
526		sf.sf_ahu.sf_handler = catcher;
527	}
528	PROC_UNLOCK(p);
529
530	/*
531	 * If we're a vm86 process, we want to save the segment registers.
532	 * We also change eflags to be our emulated eflags, not the actual
533	 * eflags.
534	 */
535	if (regs->tf_eflags & PSL_VM) {
536		struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
537		struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
538
539		sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
540		sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
541		sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
542		sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
543
544		if (vm86->vm86_has_vme == 0)
545			sf.sf_uc.uc_mcontext.mc_eflags =
546			    (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
547			    (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
548
549		/*
550		 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
551		 * syscalls made by the signal handler.  This just avoids
552		 * wasting time for our lazy fixup of such faults.  PSL_NT
553		 * does nothing in vm86 mode, but vm86 programs can set it
554		 * almost legitimately in probes for old cpu types.
555		 */
556		tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
557	}
558
559	/* Copy the sigframe out to the user's stack. */
560	if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
561		/*
562		 * Something is wrong with the stack pointer.
563		 * ...Kill the process.
564		 */
565		PROC_LOCK(p);
566		sigexit(td, SIGILL);
567		/* NOTREACHED */
568	}
569
570	regs->tf_esp = (int)sfp;
571	regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
572	regs->tf_eflags &= ~PSL_T;
573	regs->tf_cs = _ucodesel;
574	regs->tf_ds = _udatasel;
575	regs->tf_es = _udatasel;
576	regs->tf_fs = _udatasel;
577	regs->tf_ss = _udatasel;
578	PROC_LOCK(p);
579}
580
581/*
582 * System call to cleanup state after a signal
583 * has been taken.  Reset signal mask and
584 * stack state from context left by sendsig (above).
585 * Return to previous pc and psl as specified by
586 * context left by sendsig. Check carefully to
587 * make sure that the user has not modified the
588 * state to gain improper privileges.
589 */
590int
591osigreturn(td, uap)
592	struct thread *td;
593	struct osigreturn_args /* {
594		struct osigcontext *sigcntxp;
595	} */ *uap;
596{
597	struct trapframe *regs;
598	struct osigcontext *scp;
599	struct proc *p = td->td_proc;
600	int eflags;
601
602	regs = td->td_frame;
603	scp = uap->sigcntxp;
604	if (!useracc((caddr_t)scp, sizeof(*scp), VM_PROT_READ))
605		return (EFAULT);
606	eflags = scp->sc_ps;
607	if (eflags & PSL_VM) {
608		struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
609		struct vm86_kernel *vm86;
610
611		/*
612		 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
613		 * set up the vm86 area, and we can't enter vm86 mode.
614		 */
615		if (td->td_pcb->pcb_ext == 0)
616			return (EINVAL);
617		vm86 = &td->td_pcb->pcb_ext->ext_vm86;
618		if (vm86->vm86_inited == 0)
619			return (EINVAL);
620
621		/* Go back to user mode if both flags are set. */
622		if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
623			trapsignal(p, SIGBUS, 0);
624
625		if (vm86->vm86_has_vme) {
626			eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
627			    (eflags & VME_USERCHANGE) | PSL_VM;
628		} else {
629			vm86->vm86_eflags = eflags;	/* save VIF, VIP */
630			eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
631			    (eflags & VM_USERCHANGE) | PSL_VM;
632		}
633		tf->tf_vm86_ds = scp->sc_ds;
634		tf->tf_vm86_es = scp->sc_es;
635		tf->tf_vm86_fs = scp->sc_fs;
636		tf->tf_vm86_gs = scp->sc_gs;
637		tf->tf_ds = _udatasel;
638		tf->tf_es = _udatasel;
639		tf->tf_fs = _udatasel;
640	} else {
641		/*
642		 * Don't allow users to change privileged or reserved flags.
643		 */
644		/*
645		 * XXX do allow users to change the privileged flag PSL_RF.
646		 * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
647		 * should sometimes set it there too.  tf_eflags is kept in
648		 * the signal context during signal handling and there is no
649		 * other place to remember it, so the PSL_RF bit may be
650		 * corrupted by the signal handler without us knowing.
651		 * Corruption of the PSL_RF bit at worst causes one more or
652		 * one less debugger trap, so allowing it is fairly harmless.
653		 */
654		if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
655	    		return (EINVAL);
656		}
657
658		/*
659		 * Don't allow users to load a valid privileged %cs.  Let the
660		 * hardware check for invalid selectors, excess privilege in
661		 * other selectors, invalid %eip's and invalid %esp's.
662		 */
663		if (!CS_SECURE(scp->sc_cs)) {
664			trapsignal(p, SIGBUS, T_PROTFLT);
665			return (EINVAL);
666		}
667		regs->tf_ds = scp->sc_ds;
668		regs->tf_es = scp->sc_es;
669		regs->tf_fs = scp->sc_fs;
670	}
671
672	/* Restore remaining registers. */
673	regs->tf_eax = scp->sc_eax;
674	regs->tf_ebx = scp->sc_ebx;
675	regs->tf_ecx = scp->sc_ecx;
676	regs->tf_edx = scp->sc_edx;
677	regs->tf_esi = scp->sc_esi;
678	regs->tf_edi = scp->sc_edi;
679	regs->tf_cs = scp->sc_cs;
680	regs->tf_ss = scp->sc_ss;
681	regs->tf_isp = scp->sc_isp;
682
683	PROC_LOCK(p);
684#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
685	if (scp->sc_onstack & 1)
686		p->p_sigstk.ss_flags |= SS_ONSTACK;
687	else
688		p->p_sigstk.ss_flags &= ~SS_ONSTACK;
689#endif
690
691	SIGSETOLD(p->p_sigmask, scp->sc_mask);
692	SIG_CANTMASK(p->p_sigmask);
693	PROC_UNLOCK(p);
694	regs->tf_ebp = scp->sc_fp;
695	regs->tf_esp = scp->sc_sp;
696	regs->tf_eip = scp->sc_pc;
697	regs->tf_eflags = eflags;
698	return (EJUSTRETURN);
699}
700
701int
702sigreturn(td, uap)
703	struct thread *td;
704	struct sigreturn_args /* {
705		ucontext_t *sigcntxp;
706	} */ *uap;
707{
708	struct proc *p = td->td_proc;
709	struct osigcontext *oscp;
710	struct osigreturn_args *ouap;
711	struct trapframe *regs;
712	ucontext_t *ucp;
713	int cs, eflags;
714
715#ifdef COMPAT_43
716	ouap = (struct osigreturn_args *)uap;
717	oscp = ouap->sigcntxp;
718	if (fuword(&oscp->sc_trapno) == 0x01d516)
719		return (osigreturn(td, ouap));
720#endif
721
722	ucp = uap->sigcntxp;
723	if (!useracc((caddr_t)ucp, sizeof(*ucp), VM_PROT_READ))
724		return (EFAULT);
725	regs = td->td_frame;
726	eflags = ucp->uc_mcontext.mc_eflags;
727	if (eflags & PSL_VM) {
728		struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
729		struct vm86_kernel *vm86;
730
731		/*
732		 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
733		 * set up the vm86 area, and we can't enter vm86 mode.
734		 */
735		if (td->td_pcb->pcb_ext == 0)
736			return (EINVAL);
737		vm86 = &td->td_pcb->pcb_ext->ext_vm86;
738		if (vm86->vm86_inited == 0)
739			return (EINVAL);
740
741		/* Go back to user mode if both flags are set. */
742		if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
743			trapsignal(p, SIGBUS, 0);
744
745		if (vm86->vm86_has_vme) {
746			eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
747			    (eflags & VME_USERCHANGE) | PSL_VM;
748		} else {
749			vm86->vm86_eflags = eflags;	/* save VIF, VIP */
750			eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
751			    (eflags & VM_USERCHANGE) | PSL_VM;
752		}
753		bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
754		tf->tf_eflags = eflags;
755		tf->tf_vm86_ds = tf->tf_ds;
756		tf->tf_vm86_es = tf->tf_es;
757		tf->tf_vm86_fs = tf->tf_fs;
758		tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
759		tf->tf_ds = _udatasel;
760		tf->tf_es = _udatasel;
761		tf->tf_fs = _udatasel;
762	} else {
763		/*
764		 * Don't allow users to change privileged or reserved flags.
765		 */
766		/*
767		 * XXX do allow users to change the privileged flag PSL_RF.
768		 * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
769		 * should sometimes set it there too.  tf_eflags is kept in
770		 * the signal context during signal handling and there is no
771		 * other place to remember it, so the PSL_RF bit may be
772		 * corrupted by the signal handler without us knowing.
773		 * Corruption of the PSL_RF bit at worst causes one more or
774		 * one less debugger trap, so allowing it is fairly harmless.
775		 */
776		if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
777			printf("sigreturn: eflags = 0x%x\n", eflags);
778	    		return (EINVAL);
779		}
780
781		/*
782		 * Don't allow users to load a valid privileged %cs.  Let the
783		 * hardware check for invalid selectors, excess privilege in
784		 * other selectors, invalid %eip's and invalid %esp's.
785		 */
786		cs = ucp->uc_mcontext.mc_cs;
787		if (!CS_SECURE(cs)) {
788			printf("sigreturn: cs = 0x%x\n", cs);
789			trapsignal(p, SIGBUS, T_PROTFLT);
790			return (EINVAL);
791		}
792
793		bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
794	}
795
796	PROC_LOCK(p);
797#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
798	if (ucp->uc_mcontext.mc_onstack & 1)
799		p->p_sigstk.ss_flags |= SS_ONSTACK;
800	else
801		p->p_sigstk.ss_flags &= ~SS_ONSTACK;
802#endif
803
804	p->p_sigmask = ucp->uc_sigmask;
805	SIG_CANTMASK(p->p_sigmask);
806	PROC_UNLOCK(p);
807	return (EJUSTRETURN);
808}
809
810/*
811 * Machine dependent boot() routine
812 *
813 * I haven't seen anything to put here yet
814 * Possibly some stuff might be grafted back here from boot()
815 */
816void
817cpu_boot(int howto)
818{
819}
820
821/*
822 * Shutdown the CPU as much as possible
823 */
824void
825cpu_halt(void)
826{
827	for (;;)
828		__asm__ ("hlt");
829}
830
831/*
832 * Hook to idle the CPU when possible.  This currently only works in
833 * the !SMP case, as there is no clean way to ensure that a CPU will be
834 * woken when there is work available for it.
835 */
836static int	cpu_idle_hlt = 1;
837SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
838    &cpu_idle_hlt, 0, "Idle loop HLT enable");
839
840/*
841 * Note that we have to be careful here to avoid a race between checking
842 * procrunnable() and actually halting.  If we don't do this, we may waste
843 * the time between calling hlt and the next interrupt even though there
844 * is a runnable process.
845 */
846void
847cpu_idle(void)
848{
849#ifndef SMP
850	if (cpu_idle_hlt) {
851		disable_intr();
852  		if (procrunnable())
853			enable_intr();
854		else {
855			enable_intr();
856			__asm __volatile("hlt");
857		}
858	}
859#endif
860}
861
862/*
863 * Clear registers on exec
864 */
865void
866setregs(td, entry, stack, ps_strings)
867	struct thread *td;
868	u_long entry;
869	u_long stack;
870	u_long ps_strings;
871{
872	struct trapframe *regs = td->td_frame;
873	struct pcb *pcb = td->td_pcb;
874
875	if (td->td_proc->p_md.md_ldt)
876		user_ldt_free(td);
877
878	bzero((char *)regs, sizeof(struct trapframe));
879	regs->tf_eip = entry;
880	regs->tf_esp = stack;
881	regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
882	regs->tf_ss = _udatasel;
883	regs->tf_ds = _udatasel;
884	regs->tf_es = _udatasel;
885	regs->tf_fs = _udatasel;
886	regs->tf_cs = _ucodesel;
887
888	/* PS_STRINGS value for BSD/OS binaries.  It is 0 for non-BSD/OS. */
889	regs->tf_ebx = ps_strings;
890
891	/* reset %gs as well */
892	if (pcb == PCPU_GET(curpcb))
893		load_gs(_udatasel);
894	else
895		pcb->pcb_gs = _udatasel;
896
897        /*
898         * Reset the hardware debug registers if they were in use.
899         * They won't have any meaning for the newly exec'd process.
900         */
901        if (pcb->pcb_flags & PCB_DBREGS) {
902                pcb->pcb_dr0 = 0;
903                pcb->pcb_dr1 = 0;
904                pcb->pcb_dr2 = 0;
905                pcb->pcb_dr3 = 0;
906                pcb->pcb_dr6 = 0;
907                pcb->pcb_dr7 = 0;
908                if (pcb == PCPU_GET(curpcb)) {
909		        /*
910			 * Clear the debug registers on the running
911			 * CPU, otherwise they will end up affecting
912			 * the next process we switch to.
913			 */
914		        reset_dbregs();
915                }
916                pcb->pcb_flags &= ~PCB_DBREGS;
917        }
918
919	/*
920	 * Initialize the math emulator (if any) for the current process.
921	 * Actually, just clear the bit that says that the emulator has
922	 * been initialized.  Initialization is delayed until the process
923	 * traps to the emulator (if it is done at all) mainly because
924	 * emulators don't provide an entry point for initialization.
925	 */
926	td->td_pcb->pcb_flags &= ~FP_SOFTFP;
927
928	/*
929	 * Arrange to trap the next npx or `fwait' instruction (see npx.c
930	 * for why fwait must be trapped at least if there is an npx or an
931	 * emulator).  This is mainly to handle the case where npx0 is not
932	 * configured, since the npx routines normally set up the trap
933	 * otherwise.  It should be done only at boot time, but doing it
934	 * here allows modifying `npx_exists' for testing the emulator on
935	 * systems with an npx.
936	 */
937	load_cr0(rcr0() | CR0_MP | CR0_TS);
938
939#ifdef DEV_NPX
940	/* Initialize the npx (if any) for the current process. */
941	npxinit(__INITIAL_NPXCW__);
942#endif
943
944	/*
945	 * XXX - Linux emulator
946	 * Make sure sure edx is 0x0 on entry. Linux binaries depend
947	 * on it.
948	 */
949	td->td_retval[1] = 0;
950}
951
952void
953cpu_setregs(void)
954{
955	unsigned int cr0;
956
957	cr0 = rcr0();
958#ifdef SMP
959	cr0 |= CR0_NE;			/* Done by npxinit() */
960#endif
961	cr0 |= CR0_MP | CR0_TS;		/* Done at every execve() too. */
962#ifndef I386_CPU
963	cr0 |= CR0_WP | CR0_AM;
964#endif
965	load_cr0(cr0);
966	load_gs(_udatasel);
967}
968
969static int
970sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
971{
972	int error;
973	error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
974		req);
975	if (!error && req->newptr)
976		resettodr();
977	return (error);
978}
979
980SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
981	&adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
982
983SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
984	CTLFLAG_RW, &disable_rtc_set, 0, "");
985
986SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
987	CTLFLAG_RD, &bootinfo, bootinfo, "");
988
989SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
990	CTLFLAG_RW, &wall_cmos_clock, 0, "");
991
992/*
993 * Initialize 386 and configure to run kernel
994 */
995
996/*
997 * Initialize segments & interrupt table
998 */
999
1000int _default_ldt;
1001union descriptor gdt[NGDT * MAXCPU];	/* global descriptor table */
1002static struct gate_descriptor idt0[NIDT];
1003struct gate_descriptor *idt = &idt0[0];	/* interrupt descriptor table */
1004union descriptor ldt[NLDT];		/* local descriptor table */
1005#ifdef SMP
1006/* table descriptors - used to load tables by microp */
1007struct region_descriptor r_gdt, r_idt;
1008#endif
1009
1010int private_tss;			/* flag indicating private tss */
1011
1012#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1013extern int has_f00f_bug;
1014#endif
1015
1016static struct i386tss dblfault_tss;
1017static char dblfault_stack[PAGE_SIZE];
1018
1019extern  struct user	*proc0uarea;
1020extern  vm_offset_t	proc0kstack;
1021
1022
1023/* software prototypes -- in more palatable form */
1024struct soft_segment_descriptor gdt_segs[] = {
1025/* GNULL_SEL	0 Null Descriptor */
1026{	0x0,			/* segment base address  */
1027	0x0,			/* length */
1028	0,			/* segment type */
1029	0,			/* segment descriptor priority level */
1030	0,			/* segment descriptor present */
1031	0, 0,
1032	0,			/* default 32 vs 16 bit size */
1033	0  			/* limit granularity (byte/page units)*/ },
1034/* GCODE_SEL	1 Code Descriptor for kernel */
1035{	0x0,			/* segment base address  */
1036	0xfffff,		/* length - all address space */
1037	SDT_MEMERA,		/* segment type */
1038	0,			/* segment descriptor priority level */
1039	1,			/* segment descriptor present */
1040	0, 0,
1041	1,			/* default 32 vs 16 bit size */
1042	1  			/* limit granularity (byte/page units)*/ },
1043/* GDATA_SEL	2 Data Descriptor for kernel */
1044{	0x0,			/* segment base address  */
1045	0xfffff,		/* length - all address space */
1046	SDT_MEMRWA,		/* segment type */
1047	0,			/* segment descriptor priority level */
1048	1,			/* segment descriptor present */
1049	0, 0,
1050	1,			/* default 32 vs 16 bit size */
1051	1  			/* limit granularity (byte/page units)*/ },
1052/* GPRIV_SEL	3 SMP Per-Processor Private Data Descriptor */
1053{	0x0,			/* segment base address  */
1054	0xfffff,		/* length - all address space */
1055	SDT_MEMRWA,		/* segment type */
1056	0,			/* segment descriptor priority level */
1057	1,			/* segment descriptor present */
1058	0, 0,
1059	1,			/* default 32 vs 16 bit size */
1060	1  			/* limit granularity (byte/page units)*/ },
1061/* GPROC0_SEL	4 Proc 0 Tss Descriptor */
1062{
1063	0x0,			/* segment base address */
1064	sizeof(struct i386tss)-1,/* length - all address space */
1065	SDT_SYS386TSS,		/* segment type */
1066	0,			/* segment descriptor priority level */
1067	1,			/* segment descriptor present */
1068	0, 0,
1069	0,			/* unused - default 32 vs 16 bit size */
1070	0  			/* limit granularity (byte/page units)*/ },
1071/* GLDT_SEL	5 LDT Descriptor */
1072{	(int) ldt,		/* segment base address  */
1073	sizeof(ldt)-1,		/* length - all address space */
1074	SDT_SYSLDT,		/* segment type */
1075	SEL_UPL,		/* segment descriptor priority level */
1076	1,			/* segment descriptor present */
1077	0, 0,
1078	0,			/* unused - default 32 vs 16 bit size */
1079	0  			/* limit granularity (byte/page units)*/ },
1080/* GUSERLDT_SEL	6 User LDT Descriptor per process */
1081{	(int) ldt,		/* segment base address  */
1082	(512 * sizeof(union descriptor)-1),		/* length */
1083	SDT_SYSLDT,		/* segment type */
1084	0,			/* segment descriptor priority level */
1085	1,			/* segment descriptor present */
1086	0, 0,
1087	0,			/* unused - default 32 vs 16 bit size */
1088	0  			/* limit granularity (byte/page units)*/ },
1089/* GTGATE_SEL	7 Null Descriptor - Placeholder */
1090{	0x0,			/* segment base address  */
1091	0x0,			/* length - all address space */
1092	0,			/* segment type */
1093	0,			/* segment descriptor priority level */
1094	0,			/* segment descriptor present */
1095	0, 0,
1096	0,			/* default 32 vs 16 bit size */
1097	0  			/* limit granularity (byte/page units)*/ },
1098/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1099{	0x400,			/* segment base address */
1100	0xfffff,		/* length */
1101	SDT_MEMRWA,		/* segment type */
1102	0,			/* segment descriptor priority level */
1103	1,			/* segment descriptor present */
1104	0, 0,
1105	1,			/* default 32 vs 16 bit size */
1106	1  			/* limit granularity (byte/page units)*/ },
1107/* GPANIC_SEL	9 Panic Tss Descriptor */
1108{	(int) &dblfault_tss,	/* segment base address  */
1109	sizeof(struct i386tss)-1,/* length - all address space */
1110	SDT_SYS386TSS,		/* segment type */
1111	0,			/* segment descriptor priority level */
1112	1,			/* segment descriptor present */
1113	0, 0,
1114	0,			/* unused - default 32 vs 16 bit size */
1115	0  			/* limit granularity (byte/page units)*/ },
1116/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1117{	0,			/* segment base address (overwritten)  */
1118	0xfffff,		/* length */
1119	SDT_MEMERA,		/* segment type */
1120	0,			/* segment descriptor priority level */
1121	1,			/* segment descriptor present */
1122	0, 0,
1123	0,			/* default 32 vs 16 bit size */
1124	1  			/* limit granularity (byte/page units)*/ },
1125/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1126{	0,			/* segment base address (overwritten)  */
1127	0xfffff,		/* length */
1128	SDT_MEMERA,		/* segment type */
1129	0,			/* segment descriptor priority level */
1130	1,			/* segment descriptor present */
1131	0, 0,
1132	0,			/* default 32 vs 16 bit size */
1133	1  			/* limit granularity (byte/page units)*/ },
1134/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1135{	0,			/* segment base address (overwritten) */
1136	0xfffff,		/* length */
1137	SDT_MEMRWA,		/* segment type */
1138	0,			/* segment descriptor priority level */
1139	1,			/* segment descriptor present */
1140	0, 0,
1141	1,			/* default 32 vs 16 bit size */
1142	1  			/* limit granularity (byte/page units)*/ },
1143/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1144{	0,			/* segment base address (overwritten) */
1145	0xfffff,		/* length */
1146	SDT_MEMRWA,		/* segment type */
1147	0,			/* segment descriptor priority level */
1148	1,			/* segment descriptor present */
1149	0, 0,
1150	0,			/* default 32 vs 16 bit size */
1151	1  			/* limit granularity (byte/page units)*/ },
1152/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1153{	0,			/* segment base address (overwritten) */
1154	0xfffff,		/* length */
1155	SDT_MEMRWA,		/* segment type */
1156	0,			/* segment descriptor priority level */
1157	1,			/* segment descriptor present */
1158	0, 0,
1159	0,			/* default 32 vs 16 bit size */
1160	1  			/* limit granularity (byte/page units)*/ },
1161};
1162
1163static struct soft_segment_descriptor ldt_segs[] = {
1164	/* Null Descriptor - overwritten by call gate */
1165{	0x0,			/* segment base address  */
1166	0x0,			/* length - all address space */
1167	0,			/* segment type */
1168	0,			/* segment descriptor priority level */
1169	0,			/* segment descriptor present */
1170	0, 0,
1171	0,			/* default 32 vs 16 bit size */
1172	0  			/* limit granularity (byte/page units)*/ },
1173	/* Null Descriptor - overwritten by call gate */
1174{	0x0,			/* segment base address  */
1175	0x0,			/* length - all address space */
1176	0,			/* segment type */
1177	0,			/* segment descriptor priority level */
1178	0,			/* segment descriptor present */
1179	0, 0,
1180	0,			/* default 32 vs 16 bit size */
1181	0  			/* limit granularity (byte/page units)*/ },
1182	/* Null Descriptor - overwritten by call gate */
1183{	0x0,			/* segment base address  */
1184	0x0,			/* length - all address space */
1185	0,			/* segment type */
1186	0,			/* segment descriptor priority level */
1187	0,			/* segment descriptor present */
1188	0, 0,
1189	0,			/* default 32 vs 16 bit size */
1190	0  			/* limit granularity (byte/page units)*/ },
1191	/* Code Descriptor for user */
1192{	0x0,			/* segment base address  */
1193	0xfffff,		/* length - all address space */
1194	SDT_MEMERA,		/* segment type */
1195	SEL_UPL,		/* segment descriptor priority level */
1196	1,			/* segment descriptor present */
1197	0, 0,
1198	1,			/* default 32 vs 16 bit size */
1199	1  			/* limit granularity (byte/page units)*/ },
1200	/* Null Descriptor - overwritten by call gate */
1201{	0x0,			/* segment base address  */
1202	0x0,			/* length - all address space */
1203	0,			/* segment type */
1204	0,			/* segment descriptor priority level */
1205	0,			/* segment descriptor present */
1206	0, 0,
1207	0,			/* default 32 vs 16 bit size */
1208	0  			/* limit granularity (byte/page units)*/ },
1209	/* Data Descriptor for user */
1210{	0x0,			/* segment base address  */
1211	0xfffff,		/* length - all address space */
1212	SDT_MEMRWA,		/* segment type */
1213	SEL_UPL,		/* segment descriptor priority level */
1214	1,			/* segment descriptor present */
1215	0, 0,
1216	1,			/* default 32 vs 16 bit size */
1217	1  			/* limit granularity (byte/page units)*/ },
1218};
1219
1220void
1221setidt(idx, func, typ, dpl, selec)
1222	int idx;
1223	inthand_t *func;
1224	int typ;
1225	int dpl;
1226	int selec;
1227{
1228	struct gate_descriptor *ip;
1229
1230	ip = idt + idx;
1231	ip->gd_looffset = (int)func;
1232	ip->gd_selector = selec;
1233	ip->gd_stkcpy = 0;
1234	ip->gd_xx = 0;
1235	ip->gd_type = typ;
1236	ip->gd_dpl = dpl;
1237	ip->gd_p = 1;
1238	ip->gd_hioffset = ((int)func)>>16 ;
1239}
1240
1241#define	IDTVEC(name)	__CONCAT(X,name)
1242
1243extern inthand_t
1244	IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1245	IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1246	IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1247	IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1248	IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1249
1250void
1251sdtossd(sd, ssd)
1252	struct segment_descriptor *sd;
1253	struct soft_segment_descriptor *ssd;
1254{
1255	ssd->ssd_base  = (sd->sd_hibase << 24) | sd->sd_lobase;
1256	ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1257	ssd->ssd_type  = sd->sd_type;
1258	ssd->ssd_dpl   = sd->sd_dpl;
1259	ssd->ssd_p     = sd->sd_p;
1260	ssd->ssd_def32 = sd->sd_def32;
1261	ssd->ssd_gran  = sd->sd_gran;
1262}
1263
1264#define PHYSMAP_SIZE	(2 * 8)
1265
1266/*
1267 * Populate the (physmap) array with base/bound pairs describing the
1268 * available physical memory in the system, then test this memory and
1269 * build the phys_avail array describing the actually-available memory.
1270 *
1271 * If we cannot accurately determine the physical memory map, then use
1272 * value from the 0xE801 call, and failing that, the RTC.
1273 *
1274 * Total memory size may be set by the kernel environment variable
1275 * hw.physmem or the compile-time define MAXMEM.
1276 */
1277static void
1278getmemsize(int first)
1279{
1280	int i, physmap_idx, pa_indx;
1281	u_int basemem, extmem;
1282	struct vm86frame vmf;
1283	struct vm86context vmc;
1284	vm_offset_t pa, physmap[PHYSMAP_SIZE];
1285	pt_entry_t *pte;
1286	const char *cp;
1287	struct bios_smap *smap;
1288
1289	bzero(&vmf, sizeof(struct vm86frame));
1290	bzero(physmap, sizeof(physmap));
1291
1292	/*
1293	 * Perform "base memory" related probes & setup
1294	 */
1295	vm86_intcall(0x12, &vmf);
1296	basemem = vmf.vmf_ax;
1297	if (basemem > 640) {
1298		printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1299			basemem);
1300		basemem = 640;
1301	}
1302
1303	/*
1304	 * XXX if biosbasemem is now < 640, there is a `hole'
1305	 * between the end of base memory and the start of
1306	 * ISA memory.  The hole may be empty or it may
1307	 * contain BIOS code or data.  Map it read/write so
1308	 * that the BIOS can write to it.  (Memory from 0 to
1309	 * the physical end of the kernel is mapped read-only
1310	 * to begin with and then parts of it are remapped.
1311	 * The parts that aren't remapped form holes that
1312	 * remain read-only and are unused by the kernel.
1313	 * The base memory area is below the physical end of
1314	 * the kernel and right now forms a read-only hole.
1315	 * The part of it from PAGE_SIZE to
1316	 * (trunc_page(biosbasemem * 1024) - 1) will be
1317	 * remapped and used by the kernel later.)
1318	 *
1319	 * This code is similar to the code used in
1320	 * pmap_mapdev, but since no memory needs to be
1321	 * allocated we simply change the mapping.
1322	 */
1323	for (pa = trunc_page(basemem * 1024);
1324	     pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1325		pte = vtopte(pa + KERNBASE);
1326		*pte = pa | PG_RW | PG_V;
1327	}
1328
1329	/*
1330	 * if basemem != 640, map pages r/w into vm86 page table so
1331	 * that the bios can scribble on it.
1332	 */
1333	pte = (pt_entry_t *)vm86paddr;
1334	for (i = basemem / 4; i < 160; i++)
1335		pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1336
1337	/*
1338	 * map page 1 R/W into the kernel page table so we can use it
1339	 * as a buffer.  The kernel will unmap this page later.
1340	 */
1341	pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1342	*pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1343
1344	/*
1345	 * get memory map with INT 15:E820
1346	 */
1347	vmc.npages = 0;
1348	smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1349	vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1350
1351	physmap_idx = 0;
1352	vmf.vmf_ebx = 0;
1353	do {
1354		vmf.vmf_eax = 0xE820;
1355		vmf.vmf_edx = SMAP_SIG;
1356		vmf.vmf_ecx = sizeof(struct bios_smap);
1357		i = vm86_datacall(0x15, &vmf, &vmc);
1358		if (i || vmf.vmf_eax != SMAP_SIG)
1359			break;
1360		if (boothowto & RB_VERBOSE)
1361			printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1362				smap->type,
1363				*(u_int32_t *)((char *)&smap->base + 4),
1364				(u_int32_t)smap->base,
1365				*(u_int32_t *)((char *)&smap->length + 4),
1366				(u_int32_t)smap->length);
1367
1368		if (smap->type != 0x01)
1369			goto next_run;
1370
1371		if (smap->length == 0)
1372			goto next_run;
1373
1374		if (smap->base >= 0xffffffff) {
1375			printf("%uK of memory above 4GB ignored\n",
1376			    (u_int)(smap->length / 1024));
1377			goto next_run;
1378		}
1379
1380		for (i = 0; i <= physmap_idx; i += 2) {
1381			if (smap->base < physmap[i + 1]) {
1382				if (boothowto & RB_VERBOSE)
1383					printf(
1384	"Overlapping or non-montonic memory region, ignoring second region\n");
1385				goto next_run;
1386			}
1387		}
1388
1389		if (smap->base == physmap[physmap_idx + 1]) {
1390			physmap[physmap_idx + 1] += smap->length;
1391			goto next_run;
1392		}
1393
1394		physmap_idx += 2;
1395		if (physmap_idx == PHYSMAP_SIZE) {
1396			printf(
1397		"Too many segments in the physical address map, giving up\n");
1398			break;
1399		}
1400		physmap[physmap_idx] = smap->base;
1401		physmap[physmap_idx + 1] = smap->base + smap->length;
1402next_run:
1403	} while (vmf.vmf_ebx != 0);
1404
1405	if (physmap[1] != 0)
1406		goto physmap_done;
1407
1408	/*
1409	 * If we failed above, try memory map with INT 15:E801
1410	 */
1411	vmf.vmf_ax = 0xE801;
1412	if (vm86_intcall(0x15, &vmf) == 0) {
1413		extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1414	} else {
1415#if 0
1416		vmf.vmf_ah = 0x88;
1417		vm86_intcall(0x15, &vmf);
1418		extmem = vmf.vmf_ax;
1419#else
1420		/*
1421		 * Prefer the RTC value for extended memory.
1422		 */
1423		extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1424#endif
1425	}
1426
1427	/*
1428	 * Special hack for chipsets that still remap the 384k hole when
1429	 * there's 16MB of memory - this really confuses people that
1430	 * are trying to use bus mastering ISA controllers with the
1431	 * "16MB limit"; they only have 16MB, but the remapping puts
1432	 * them beyond the limit.
1433	 *
1434	 * If extended memory is between 15-16MB (16-17MB phys address range),
1435	 *	chop it to 15MB.
1436	 */
1437	if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1438		extmem = 15 * 1024;
1439
1440	physmap[0] = 0;
1441	physmap[1] = basemem * 1024;
1442	physmap_idx = 2;
1443	physmap[physmap_idx] = 0x100000;
1444	physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1445
1446physmap_done:
1447	/*
1448	 * Now, physmap contains a map of physical memory.
1449	 */
1450
1451#ifdef SMP
1452	/* make hole for AP bootstrap code */
1453	physmap[1] = mp_bootaddress(physmap[1] / 1024);
1454
1455	/* look for the MP hardware - needed for apic addresses */
1456	i386_mp_probe();
1457#endif
1458
1459	/*
1460	 * Maxmem isn't the "maximum memory", it's one larger than the
1461	 * highest page of the physical address space.  It should be
1462	 * called something like "Maxphyspage".  We may adjust this
1463	 * based on ``hw.physmem'' and the results of the memory test.
1464	 */
1465	Maxmem = atop(physmap[physmap_idx + 1]);
1466
1467#ifdef MAXMEM
1468	Maxmem = MAXMEM / 4;
1469#endif
1470
1471	/*
1472	 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1473	 * for the appropriate modifiers.  This overrides MAXMEM.
1474	 */
1475	if ((cp = getenv("hw.physmem")) != NULL) {
1476		u_int64_t AllowMem, sanity;
1477		char *ep;
1478
1479		sanity = AllowMem = strtouq(cp, &ep, 0);
1480		if ((ep != cp) && (*ep != 0)) {
1481			switch(*ep) {
1482			case 'g':
1483			case 'G':
1484				AllowMem <<= 10;
1485			case 'm':
1486			case 'M':
1487				AllowMem <<= 10;
1488			case 'k':
1489			case 'K':
1490				AllowMem <<= 10;
1491				break;
1492			default:
1493				AllowMem = sanity = 0;
1494			}
1495			if (AllowMem < sanity)
1496				AllowMem = 0;
1497		}
1498		if (AllowMem == 0)
1499			printf("Ignoring invalid memory size of '%s'\n", cp);
1500		else
1501			Maxmem = atop(AllowMem);
1502	}
1503
1504	if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1505	    (boothowto & RB_VERBOSE))
1506		printf("Physical memory use set to %uK\n", Maxmem * 4);
1507
1508	/*
1509	 * If Maxmem has been increased beyond what the system has detected,
1510	 * extend the last memory segment to the new limit.
1511	 */
1512	if (atop(physmap[physmap_idx + 1]) < Maxmem)
1513		physmap[physmap_idx + 1] = ptoa(Maxmem);
1514
1515	/* call pmap initialization to make new kernel address space */
1516	pmap_bootstrap(first, 0);
1517
1518	/*
1519	 * Size up each available chunk of physical memory.
1520	 */
1521	physmap[0] = PAGE_SIZE;		/* mask off page 0 */
1522	pa_indx = 0;
1523	phys_avail[pa_indx++] = physmap[0];
1524	phys_avail[pa_indx] = physmap[0];
1525#if 0
1526	pte = vtopte(KERNBASE);
1527#else
1528	pte = CMAP1;
1529#endif
1530
1531	/*
1532	 * physmap is in bytes, so when converting to page boundaries,
1533	 * round up the start address and round down the end address.
1534	 */
1535	for (i = 0; i <= physmap_idx; i += 2) {
1536		vm_offset_t end;
1537
1538		end = ptoa(Maxmem);
1539		if (physmap[i + 1] < end)
1540			end = trunc_page(physmap[i + 1]);
1541		for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1542			int tmp, page_bad;
1543#if 0
1544			int *ptr = 0;
1545#else
1546			int *ptr = (int *)CADDR1;
1547#endif
1548
1549			/*
1550			 * block out kernel memory as not available.
1551			 */
1552			if (pa >= 0x100000 && pa < first)
1553				continue;
1554
1555			page_bad = FALSE;
1556
1557			/*
1558			 * map page into kernel: valid, read/write,non-cacheable
1559			 */
1560			*pte = pa | PG_V | PG_RW | PG_N;
1561			invltlb();
1562
1563			tmp = *(int *)ptr;
1564			/*
1565			 * Test for alternating 1's and 0's
1566			 */
1567			*(volatile int *)ptr = 0xaaaaaaaa;
1568			if (*(volatile int *)ptr != 0xaaaaaaaa) {
1569				page_bad = TRUE;
1570			}
1571			/*
1572			 * Test for alternating 0's and 1's
1573			 */
1574			*(volatile int *)ptr = 0x55555555;
1575			if (*(volatile int *)ptr != 0x55555555) {
1576			page_bad = TRUE;
1577			}
1578			/*
1579			 * Test for all 1's
1580			 */
1581			*(volatile int *)ptr = 0xffffffff;
1582			if (*(volatile int *)ptr != 0xffffffff) {
1583				page_bad = TRUE;
1584			}
1585			/*
1586			 * Test for all 0's
1587			 */
1588			*(volatile int *)ptr = 0x0;
1589			if (*(volatile int *)ptr != 0x0) {
1590				page_bad = TRUE;
1591			}
1592			/*
1593			 * Restore original value.
1594			 */
1595			*(int *)ptr = tmp;
1596
1597			/*
1598			 * Adjust array of valid/good pages.
1599			 */
1600			if (page_bad == TRUE) {
1601				continue;
1602			}
1603			/*
1604			 * If this good page is a continuation of the
1605			 * previous set of good pages, then just increase
1606			 * the end pointer. Otherwise start a new chunk.
1607			 * Note that "end" points one higher than end,
1608			 * making the range >= start and < end.
1609			 * If we're also doing a speculative memory
1610			 * test and we at or past the end, bump up Maxmem
1611			 * so that we keep going. The first bad page
1612			 * will terminate the loop.
1613			 */
1614			if (phys_avail[pa_indx] == pa) {
1615				phys_avail[pa_indx] += PAGE_SIZE;
1616			} else {
1617				pa_indx++;
1618				if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1619					printf(
1620		"Too many holes in the physical address space, giving up\n");
1621					pa_indx--;
1622					break;
1623				}
1624				phys_avail[pa_indx++] = pa;	/* start */
1625				phys_avail[pa_indx] = pa + PAGE_SIZE;	/* end */
1626			}
1627			physmem++;
1628		}
1629	}
1630	*pte = 0;
1631	invltlb();
1632
1633	/*
1634	 * XXX
1635	 * The last chunk must contain at least one page plus the message
1636	 * buffer to avoid complicating other code (message buffer address
1637	 * calculation, etc.).
1638	 */
1639	while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1640	    round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1641		physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1642		phys_avail[pa_indx--] = 0;
1643		phys_avail[pa_indx--] = 0;
1644	}
1645
1646	Maxmem = atop(phys_avail[pa_indx]);
1647
1648	/* Trim off space for the message buffer. */
1649	phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1650
1651	avail_end = phys_avail[pa_indx];
1652}
1653
1654void
1655init386(first)
1656	int first;
1657{
1658	struct gate_descriptor *gdp;
1659	int gsel_tss, metadata_missing, off, x;
1660#ifndef SMP
1661	/* table descriptors - used to load tables by microp */
1662	struct region_descriptor r_gdt, r_idt;
1663#endif
1664	struct pcpu *pc;
1665
1666	proc_linkup(&proc0);
1667	proc0.p_uarea = proc0uarea;
1668	thread0 = &proc0.p_thread;
1669	thread0->td_kstack = proc0kstack;
1670	thread0->td_pcb = (struct pcb *)
1671	   (thread0->td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
1672	atdevbase = ISA_HOLE_START + KERNBASE;
1673
1674	metadata_missing = 0;
1675	if (bootinfo.bi_modulep) {
1676		preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1677		preload_bootstrap_relocate(KERNBASE);
1678	} else {
1679		metadata_missing = 1;
1680	}
1681	if (envmode == 1)
1682		kern_envp = static_env;
1683	else if (bootinfo.bi_envp)
1684		kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1685
1686	/* Init basic tunables, hz etc */
1687	init_param1();
1688
1689	/*
1690	 * make gdt memory segments, the code segment goes up to end of the
1691	 * page with etext in it, the data segment goes to the end of
1692	 * the address space
1693	 */
1694	/*
1695	 * XXX text protection is temporarily (?) disabled.  The limit was
1696	 * i386_btop(round_page(etext)) - 1.
1697	 */
1698	gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1699	gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1700#ifdef SMP
1701	pc = &SMP_prvspace[0];
1702	gdt_segs[GPRIV_SEL].ssd_limit =
1703		atop(sizeof(struct privatespace) - 1);
1704#else
1705	pc = &__pcpu;
1706	gdt_segs[GPRIV_SEL].ssd_limit =
1707		atop(sizeof(struct pcpu) - 1);
1708#endif
1709	gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
1710	gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
1711
1712	for (x = 0; x < NGDT; x++) {
1713#ifdef BDE_DEBUGGER
1714		/* avoid overwriting db entries with APM ones */
1715		if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1716			continue;
1717#endif
1718		ssdtosd(&gdt_segs[x], &gdt[x].sd);
1719	}
1720
1721	r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1722	r_gdt.rd_base =  (int) gdt;
1723	lgdt(&r_gdt);
1724
1725	pcpu_init(pc, 0, sizeof(struct pcpu));
1726	PCPU_SET(prvspace, pc);
1727
1728	/* setup curproc so that mutexes work */
1729	PCPU_SET(curthread, thread0);
1730
1731	LIST_INIT(&thread0->td_contested);
1732
1733	/*
1734	 * Initialize mutexes.
1735	 */
1736	mtx_init(&Giant, "Giant", MTX_DEF | MTX_RECURSE);
1737	mtx_init(&sched_lock, "sched lock", MTX_SPIN | MTX_RECURSE);
1738	mtx_init(&proc0.p_mtx, "process lock", MTX_DEF);
1739	mtx_init(&clock_lock, "clk", MTX_SPIN | MTX_RECURSE);
1740	mtx_init(&icu_lock, "icu", MTX_SPIN);
1741	mtx_lock(&Giant);
1742
1743	/* make ldt memory segments */
1744	/*
1745	 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max.  And it
1746	 * should be spelled ...MAX_USER...
1747	 */
1748	ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1749	ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1750	for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1751		ssdtosd(&ldt_segs[x], &ldt[x].sd);
1752
1753	_default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1754	lldt(_default_ldt);
1755	PCPU_SET(currentldt, _default_ldt);
1756
1757	/* exceptions */
1758	for (x = 0; x < NIDT; x++)
1759		setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
1760		    GSEL(GCODE_SEL, SEL_KPL));
1761	setidt(0, &IDTVEC(div),  SDT_SYS386TGT, SEL_KPL,
1762	    GSEL(GCODE_SEL, SEL_KPL));
1763	setidt(1, &IDTVEC(dbg),  SDT_SYS386IGT, SEL_KPL,
1764	    GSEL(GCODE_SEL, SEL_KPL));
1765	setidt(2, &IDTVEC(nmi),  SDT_SYS386TGT, SEL_KPL,
1766	    GSEL(GCODE_SEL, SEL_KPL));
1767 	setidt(3, &IDTVEC(bpt),  SDT_SYS386IGT, SEL_UPL,
1768	    GSEL(GCODE_SEL, SEL_KPL));
1769	setidt(4, &IDTVEC(ofl),  SDT_SYS386TGT, SEL_UPL,
1770	    GSEL(GCODE_SEL, SEL_KPL));
1771	setidt(5, &IDTVEC(bnd),  SDT_SYS386TGT, SEL_KPL,
1772	    GSEL(GCODE_SEL, SEL_KPL));
1773	setidt(6, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL,
1774	    GSEL(GCODE_SEL, SEL_KPL));
1775	setidt(7, &IDTVEC(dna),  SDT_SYS386TGT, SEL_KPL
1776	    , GSEL(GCODE_SEL, SEL_KPL));
1777	setidt(8, 0,  SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1778	setidt(9, &IDTVEC(fpusegm),  SDT_SYS386TGT, SEL_KPL,
1779	    GSEL(GCODE_SEL, SEL_KPL));
1780	setidt(10, &IDTVEC(tss),  SDT_SYS386TGT, SEL_KPL,
1781	    GSEL(GCODE_SEL, SEL_KPL));
1782	setidt(11, &IDTVEC(missing),  SDT_SYS386TGT, SEL_KPL,
1783	    GSEL(GCODE_SEL, SEL_KPL));
1784	setidt(12, &IDTVEC(stk),  SDT_SYS386TGT, SEL_KPL,
1785	    GSEL(GCODE_SEL, SEL_KPL));
1786	setidt(13, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL,
1787	    GSEL(GCODE_SEL, SEL_KPL));
1788	setidt(14, &IDTVEC(page),  SDT_SYS386IGT, SEL_KPL,
1789	    GSEL(GCODE_SEL, SEL_KPL));
1790	setidt(15, &IDTVEC(rsvd),  SDT_SYS386TGT, SEL_KPL,
1791	    GSEL(GCODE_SEL, SEL_KPL));
1792	setidt(16, &IDTVEC(fpu),  SDT_SYS386TGT, SEL_KPL,
1793	    GSEL(GCODE_SEL, SEL_KPL));
1794	setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
1795	    GSEL(GCODE_SEL, SEL_KPL));
1796	setidt(18, &IDTVEC(mchk),  SDT_SYS386TGT, SEL_KPL,
1797	    GSEL(GCODE_SEL, SEL_KPL));
1798	setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
1799	    GSEL(GCODE_SEL, SEL_KPL));
1800 	setidt(0x80, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
1801	    GSEL(GCODE_SEL, SEL_KPL));
1802
1803	r_idt.rd_limit = sizeof(idt0) - 1;
1804	r_idt.rd_base = (int) idt;
1805	lidt(&r_idt);
1806
1807	/*
1808	 * Initialize the console before we print anything out.
1809	 */
1810	cninit();
1811
1812	if (metadata_missing)
1813		printf("WARNING: loader(8) metadata is missing!\n");
1814
1815#ifdef DEV_ISA
1816	isa_defaultirq();
1817#endif
1818
1819#ifdef DDB
1820	kdb_init();
1821	if (boothowto & RB_KDB)
1822		Debugger("Boot flags requested debugger");
1823#endif
1824
1825	finishidentcpu();	/* Final stage of CPU initialization */
1826	setidt(6, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL,
1827	    GSEL(GCODE_SEL, SEL_KPL));
1828	setidt(13, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL,
1829	    GSEL(GCODE_SEL, SEL_KPL));
1830	initializecpu();	/* Initialize CPU registers */
1831
1832	/* make an initial tss so cpu can get interrupt stack on syscall! */
1833	/* Note: -16 is so we can grow the trapframe if we came from vm86 */
1834	PCPU_SET(common_tss.tss_esp0, thread0->td_kstack +
1835	    KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
1836	PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
1837	gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1838	private_tss = 0;
1839	PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
1840	PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
1841	PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
1842	ltr(gsel_tss);
1843
1844	dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1845	    dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
1846	dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1847	    dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1848	dblfault_tss.tss_cr3 = (int)IdlePTD;
1849	dblfault_tss.tss_eip = (int)dblfault_handler;
1850	dblfault_tss.tss_eflags = PSL_KERNEL;
1851	dblfault_tss.tss_ds = dblfault_tss.tss_es =
1852	    dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1853	dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1854	dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1855	dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1856
1857	vm86_initialize();
1858	getmemsize(first);
1859	init_param2(physmem);
1860
1861	/* now running on new page tables, configured,and u/iom is accessible */
1862
1863	/* Map the message buffer. */
1864	for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1865		pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1866
1867	msgbufinit(msgbufp, MSGBUF_SIZE);
1868
1869	/* make a call gate to reenter kernel with */
1870	gdp = &ldt[LSYS5CALLS_SEL].gd;
1871
1872	x = (int) &IDTVEC(lcall_syscall);
1873	gdp->gd_looffset = x;
1874	gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1875	gdp->gd_stkcpy = 1;
1876	gdp->gd_type = SDT_SYS386CGT;
1877	gdp->gd_dpl = SEL_UPL;
1878	gdp->gd_p = 1;
1879	gdp->gd_hioffset = x >> 16;
1880
1881	/* XXX does this work? */
1882	ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1883	ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1884
1885	/* transfer to user mode */
1886
1887	_ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1888	_udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1889
1890	/* setup proc 0's pcb */
1891	thread0->td_pcb->pcb_flags = 0; /* XXXKSE */
1892	thread0->td_pcb->pcb_cr3 = (int)IdlePTD;
1893	thread0->td_pcb->pcb_ext = 0;
1894	thread0->td_frame = &proc0_tf;
1895}
1896
1897void
1898cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
1899{
1900}
1901
1902#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1903static void f00f_hack(void *unused);
1904SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
1905
1906static void
1907f00f_hack(void *unused) {
1908	struct gate_descriptor *new_idt;
1909#ifndef SMP
1910	struct region_descriptor r_idt;
1911#endif
1912	vm_offset_t tmp;
1913
1914	if (!has_f00f_bug)
1915		return;
1916
1917	GIANT_REQUIRED;
1918
1919	printf("Intel Pentium detected, installing workaround for F00F bug\n");
1920
1921	r_idt.rd_limit = sizeof(idt0) - 1;
1922
1923	tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
1924	if (tmp == 0)
1925		panic("kmem_alloc returned 0");
1926	if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1927		panic("kmem_alloc returned non-page-aligned memory");
1928	/* Put the first seven entries in the lower page */
1929	new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1930	bcopy(idt, new_idt, sizeof(idt0));
1931	r_idt.rd_base = (int)new_idt;
1932	lidt(&r_idt);
1933	idt = new_idt;
1934	if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
1935			   VM_PROT_READ, FALSE) != KERN_SUCCESS)
1936		panic("vm_map_protect failed");
1937	return;
1938}
1939#endif /* defined(I586_CPU) && !NO_F00F_HACK */
1940
1941int
1942ptrace_set_pc(struct thread *td, unsigned long addr)
1943{
1944	td->td_frame->tf_eip = addr;
1945	return (0);
1946}
1947
1948int
1949ptrace_single_step(struct thread *td)
1950{
1951	td->td_frame->tf_eflags |= PSL_T;
1952	return (0);
1953}
1954
1955int
1956fill_regs(struct thread *td, struct reg *regs)
1957{
1958	struct pcb *pcb;
1959	struct trapframe *tp;
1960
1961	tp = td->td_frame;
1962	regs->r_fs = tp->tf_fs;
1963	regs->r_es = tp->tf_es;
1964	regs->r_ds = tp->tf_ds;
1965	regs->r_edi = tp->tf_edi;
1966	regs->r_esi = tp->tf_esi;
1967	regs->r_ebp = tp->tf_ebp;
1968	regs->r_ebx = tp->tf_ebx;
1969	regs->r_edx = tp->tf_edx;
1970	regs->r_ecx = tp->tf_ecx;
1971	regs->r_eax = tp->tf_eax;
1972	regs->r_eip = tp->tf_eip;
1973	regs->r_cs = tp->tf_cs;
1974	regs->r_eflags = tp->tf_eflags;
1975	regs->r_esp = tp->tf_esp;
1976	regs->r_ss = tp->tf_ss;
1977	pcb = td->td_pcb;
1978	regs->r_gs = pcb->pcb_gs;
1979	return (0);
1980}
1981
1982int
1983set_regs(struct thread *td, struct reg *regs)
1984{
1985	struct pcb *pcb;
1986	struct trapframe *tp;
1987
1988	tp = td->td_frame;
1989	if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
1990	    !CS_SECURE(regs->r_cs))
1991		return (EINVAL);
1992	tp->tf_fs = regs->r_fs;
1993	tp->tf_es = regs->r_es;
1994	tp->tf_ds = regs->r_ds;
1995	tp->tf_edi = regs->r_edi;
1996	tp->tf_esi = regs->r_esi;
1997	tp->tf_ebp = regs->r_ebp;
1998	tp->tf_ebx = regs->r_ebx;
1999	tp->tf_edx = regs->r_edx;
2000	tp->tf_ecx = regs->r_ecx;
2001	tp->tf_eax = regs->r_eax;
2002	tp->tf_eip = regs->r_eip;
2003	tp->tf_cs = regs->r_cs;
2004	tp->tf_eflags = regs->r_eflags;
2005	tp->tf_esp = regs->r_esp;
2006	tp->tf_ss = regs->r_ss;
2007	pcb = td->td_pcb;
2008	pcb->pcb_gs = regs->r_gs;
2009	return (0);
2010}
2011
2012#ifdef CPU_ENABLE_SSE
2013static void
2014fill_fpregs_xmm(sv_xmm, sv_87)
2015	struct savexmm *sv_xmm;
2016	struct save87 *sv_87;
2017{
2018	register struct env87 *penv_87 = &sv_87->sv_env;
2019	register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2020	int i;
2021
2022	/* FPU control/status */
2023	penv_87->en_cw = penv_xmm->en_cw;
2024	penv_87->en_sw = penv_xmm->en_sw;
2025	penv_87->en_tw = penv_xmm->en_tw;
2026	penv_87->en_fip = penv_xmm->en_fip;
2027	penv_87->en_fcs = penv_xmm->en_fcs;
2028	penv_87->en_opcode = penv_xmm->en_opcode;
2029	penv_87->en_foo = penv_xmm->en_foo;
2030	penv_87->en_fos = penv_xmm->en_fos;
2031
2032	/* FPU registers */
2033	for (i = 0; i < 8; ++i)
2034		sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2035
2036	sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2037}
2038
2039static void
2040set_fpregs_xmm(sv_87, sv_xmm)
2041	struct save87 *sv_87;
2042	struct savexmm *sv_xmm;
2043{
2044	register struct env87 *penv_87 = &sv_87->sv_env;
2045	register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2046	int i;
2047
2048	/* FPU control/status */
2049	penv_xmm->en_cw = penv_87->en_cw;
2050	penv_xmm->en_sw = penv_87->en_sw;
2051	penv_xmm->en_tw = penv_87->en_tw;
2052	penv_xmm->en_fip = penv_87->en_fip;
2053	penv_xmm->en_fcs = penv_87->en_fcs;
2054	penv_xmm->en_opcode = penv_87->en_opcode;
2055	penv_xmm->en_foo = penv_87->en_foo;
2056	penv_xmm->en_fos = penv_87->en_fos;
2057
2058	/* FPU registers */
2059	for (i = 0; i < 8; ++i)
2060		sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2061
2062	sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2063}
2064#endif /* CPU_ENABLE_SSE */
2065
2066int
2067fill_fpregs(struct thread *td, struct fpreg *fpregs)
2068{
2069#ifdef CPU_ENABLE_SSE
2070	if (cpu_fxsr) {
2071		fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm,
2072						(struct save87 *)fpregs);
2073		return (0);
2074	}
2075#endif /* CPU_ENABLE_SSE */
2076	bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2077	return (0);
2078}
2079
2080int
2081set_fpregs(struct thread *td, struct fpreg *fpregs)
2082{
2083#ifdef CPU_ENABLE_SSE
2084	if (cpu_fxsr) {
2085		set_fpregs_xmm((struct save87 *)fpregs,
2086					   &td->td_pcb->pcb_save.sv_xmm);
2087		return (0);
2088	}
2089#endif /* CPU_ENABLE_SSE */
2090	bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2091	return (0);
2092}
2093
2094int
2095fill_dbregs(struct thread *td, struct dbreg *dbregs)
2096{
2097	struct pcb *pcb;
2098
2099	if (td == NULL) {
2100		dbregs->dr0 = rdr0();
2101		dbregs->dr1 = rdr1();
2102		dbregs->dr2 = rdr2();
2103		dbregs->dr3 = rdr3();
2104		dbregs->dr4 = rdr4();
2105		dbregs->dr5 = rdr5();
2106		dbregs->dr6 = rdr6();
2107		dbregs->dr7 = rdr7();
2108	} else {
2109		pcb = td->td_pcb;
2110		dbregs->dr0 = pcb->pcb_dr0;
2111		dbregs->dr1 = pcb->pcb_dr1;
2112		dbregs->dr2 = pcb->pcb_dr2;
2113		dbregs->dr3 = pcb->pcb_dr3;
2114		dbregs->dr4 = 0;
2115		dbregs->dr5 = 0;
2116		dbregs->dr6 = pcb->pcb_dr6;
2117		dbregs->dr7 = pcb->pcb_dr7;
2118	}
2119	return (0);
2120}
2121
2122int
2123set_dbregs(struct thread *td, struct dbreg *dbregs)
2124{
2125	struct pcb *pcb;
2126	int i;
2127	u_int32_t mask1, mask2;
2128
2129	if (td == NULL) {
2130		load_dr0(dbregs->dr0);
2131		load_dr1(dbregs->dr1);
2132		load_dr2(dbregs->dr2);
2133		load_dr3(dbregs->dr3);
2134		load_dr4(dbregs->dr4);
2135		load_dr5(dbregs->dr5);
2136		load_dr6(dbregs->dr6);
2137		load_dr7(dbregs->dr7);
2138	} else {
2139		/*
2140		 * Don't let an illegal value for dr7 get set.	Specifically,
2141		 * check for undefined settings.  Setting these bit patterns
2142		 * result in undefined behaviour and can lead to an unexpected
2143		 * TRCTRAP.
2144		 */
2145		for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2146		     i++, mask1 <<= 2, mask2 <<= 2)
2147			if ((dbregs->dr7 & mask1) == mask2)
2148				return (EINVAL);
2149
2150		pcb = td->td_pcb;
2151
2152		/*
2153		 * Don't let a process set a breakpoint that is not within the
2154		 * process's address space.  If a process could do this, it
2155		 * could halt the system by setting a breakpoint in the kernel
2156		 * (if ddb was enabled).  Thus, we need to check to make sure
2157		 * that no breakpoints are being enabled for addresses outside
2158		 * process's address space, unless, perhaps, we were called by
2159		 * uid 0.
2160		 *
2161		 * XXX - what about when the watched area of the user's
2162		 * address space is written into from within the kernel
2163		 * ... wouldn't that still cause a breakpoint to be generated
2164		 * from within kernel mode?
2165		 */
2166
2167		if (suser_td(td) != 0) {
2168			if (dbregs->dr7 & 0x3) {
2169				/* dr0 is enabled */
2170				if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2171					return (EINVAL);
2172			}
2173
2174			if (dbregs->dr7 & (0x3<<2)) {
2175				/* dr1 is enabled */
2176				if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2177					return (EINVAL);
2178			}
2179
2180			if (dbregs->dr7 & (0x3<<4)) {
2181				/* dr2 is enabled */
2182				if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2183					return (EINVAL);
2184			}
2185
2186			if (dbregs->dr7 & (0x3<<6)) {
2187				/* dr3 is enabled */
2188				if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2189					return (EINVAL);
2190			}
2191		}
2192
2193		pcb->pcb_dr0 = dbregs->dr0;
2194		pcb->pcb_dr1 = dbregs->dr1;
2195		pcb->pcb_dr2 = dbregs->dr2;
2196		pcb->pcb_dr3 = dbregs->dr3;
2197		pcb->pcb_dr6 = dbregs->dr6;
2198		pcb->pcb_dr7 = dbregs->dr7;
2199
2200		pcb->pcb_flags |= PCB_DBREGS;
2201	}
2202
2203	return (0);
2204}
2205
2206/*
2207 * Return > 0 if a hardware breakpoint has been hit, and the
2208 * breakpoint was in user space.  Return 0, otherwise.
2209 */
2210int
2211user_dbreg_trap(void)
2212{
2213        u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2214        u_int32_t bp;       /* breakpoint bits extracted from dr6 */
2215        int nbp;            /* number of breakpoints that triggered */
2216        caddr_t addr[4];    /* breakpoint addresses */
2217        int i;
2218
2219        dr7 = rdr7();
2220        if ((dr7 & 0x000000ff) == 0) {
2221                /*
2222                 * all GE and LE bits in the dr7 register are zero,
2223                 * thus the trap couldn't have been caused by the
2224                 * hardware debug registers
2225                 */
2226                return 0;
2227        }
2228
2229        nbp = 0;
2230        dr6 = rdr6();
2231        bp = dr6 & 0x0000000f;
2232
2233        if (!bp) {
2234                /*
2235                 * None of the breakpoint bits are set meaning this
2236                 * trap was not caused by any of the debug registers
2237                 */
2238                return 0;
2239        }
2240
2241        /*
2242         * at least one of the breakpoints were hit, check to see
2243         * which ones and if any of them are user space addresses
2244         */
2245
2246        if (bp & 0x01) {
2247                addr[nbp++] = (caddr_t)rdr0();
2248        }
2249        if (bp & 0x02) {
2250                addr[nbp++] = (caddr_t)rdr1();
2251        }
2252        if (bp & 0x04) {
2253                addr[nbp++] = (caddr_t)rdr2();
2254        }
2255        if (bp & 0x08) {
2256                addr[nbp++] = (caddr_t)rdr3();
2257        }
2258
2259        for (i=0; i<nbp; i++) {
2260                if (addr[i] <
2261                    (caddr_t)VM_MAXUSER_ADDRESS) {
2262                        /*
2263                         * addr[i] is in user space
2264                         */
2265                        return nbp;
2266                }
2267        }
2268
2269        /*
2270         * None of the breakpoints are in user space.
2271         */
2272        return 0;
2273}
2274
2275
2276#ifndef DDB
2277void
2278Debugger(const char *msg)
2279{
2280	printf("Debugger(\"%s\") called.\n", msg);
2281}
2282#endif /* no DDB */
2283
2284#include <sys/disklabel.h>
2285
2286/*
2287 * Determine the size of the transfer, and make sure it is
2288 * within the boundaries of the partition. Adjust transfer
2289 * if needed, and signal errors or early completion.
2290 */
2291int
2292bounds_check_with_label(struct bio *bp, struct disklabel *lp, int wlabel)
2293{
2294        struct partition *p = lp->d_partitions + dkpart(bp->bio_dev);
2295        int labelsect = lp->d_partitions[0].p_offset;
2296        int maxsz = p->p_size,
2297                sz = (bp->bio_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2298
2299        /* overwriting disk label ? */
2300        /* XXX should also protect bootstrap in first 8K */
2301        if (bp->bio_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2302#if LABELSECTOR != 0
2303            bp->bio_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2304#endif
2305            (bp->bio_cmd == BIO_WRITE) && wlabel == 0) {
2306                bp->bio_error = EROFS;
2307                goto bad;
2308        }
2309
2310#if     defined(DOSBBSECTOR) && defined(notyet)
2311        /* overwriting master boot record? */
2312        if (bp->bio_blkno + p->p_offset <= DOSBBSECTOR &&
2313            (bp->bio_cmd == BIO_WRITE) && wlabel == 0) {
2314                bp->bio_error = EROFS;
2315                goto bad;
2316        }
2317#endif
2318
2319        /* beyond partition? */
2320        if (bp->bio_blkno < 0 || bp->bio_blkno + sz > maxsz) {
2321                /* if exactly at end of disk, return an EOF */
2322                if (bp->bio_blkno == maxsz) {
2323                        bp->bio_resid = bp->bio_bcount;
2324                        return(0);
2325                }
2326                /* or truncate if part of it fits */
2327                sz = maxsz - bp->bio_blkno;
2328                if (sz <= 0) {
2329                        bp->bio_error = EINVAL;
2330                        goto bad;
2331                }
2332                bp->bio_bcount = sz << DEV_BSHIFT;
2333        }
2334
2335        bp->bio_pblkno = bp->bio_blkno + p->p_offset;
2336        return(1);
2337
2338bad:
2339        bp->bio_flags |= BIO_ERROR;
2340        return(-1);
2341}
2342
2343#ifdef DDB
2344
2345/*
2346 * Provide inb() and outb() as functions.  They are normally only
2347 * available as macros calling inlined functions, thus cannot be
2348 * called inside DDB.
2349 *
2350 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2351 */
2352
2353#undef inb
2354#undef outb
2355
2356/* silence compiler warnings */
2357u_char inb(u_int);
2358void outb(u_int, u_char);
2359
2360u_char
2361inb(u_int port)
2362{
2363	u_char	data;
2364	/*
2365	 * We use %%dx and not %1 here because i/o is done at %dx and not at
2366	 * %edx, while gcc generates inferior code (movw instead of movl)
2367	 * if we tell it to load (u_short) port.
2368	 */
2369	__asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2370	return (data);
2371}
2372
2373void
2374outb(u_int port, u_char data)
2375{
2376	u_char	al;
2377	/*
2378	 * Use an unnecessary assignment to help gcc's register allocator.
2379	 * This make a large difference for gcc-1.40 and a tiny difference
2380	 * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
2381	 * best results.  gcc-2.6.0 can't handle this.
2382	 */
2383	al = data;
2384	__asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2385}
2386
2387#endif /* DDB */
2388