machdep.c revision 79609
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $FreeBSD: head/sys/amd64/amd64/machdep.c 79609 2001-07-12 06:32:51Z peter $ 39 */ 40 41#include "opt_atalk.h" 42#include "opt_compat.h" 43#include "opt_cpu.h" 44#include "opt_ddb.h" 45#include "opt_inet.h" 46#include "opt_ipx.h" 47#include "opt_isa.h" 48#include "opt_maxmem.h" 49#include "opt_msgbuf.h" 50#include "opt_npx.h" 51#include "opt_perfmon.h" 52/* #include "opt_userconfig.h" */ 53 54#include <sys/param.h> 55#include <sys/systm.h> 56#include <sys/sysproto.h> 57#include <sys/signalvar.h> 58#include <sys/kernel.h> 59#include <sys/ktr.h> 60#include <sys/linker.h> 61#include <sys/lock.h> 62#include <sys/malloc.h> 63#include <sys/mutex.h> 64#include <sys/pcpu.h> 65#include <sys/proc.h> 66#include <sys/bio.h> 67#include <sys/buf.h> 68#include <sys/reboot.h> 69#include <sys/smp.h> 70#include <sys/callout.h> 71#include <sys/msgbuf.h> 72#include <sys/sysent.h> 73#include <sys/sysctl.h> 74#include <sys/vmmeter.h> 75#include <sys/bus.h> 76#include <sys/eventhandler.h> 77 78#include <vm/vm.h> 79#include <vm/vm_param.h> 80#include <sys/lock.h> 81#include <vm/vm_kern.h> 82#include <vm/vm_object.h> 83#include <vm/vm_page.h> 84#include <vm/vm_map.h> 85#include <vm/vm_pager.h> 86#include <vm/vm_extern.h> 87 88#include <sys/user.h> 89#include <sys/exec.h> 90#include <sys/cons.h> 91 92#include <ddb/ddb.h> 93 94#include <net/netisr.h> 95 96#include <machine/cpu.h> 97#include <machine/cputypes.h> 98#include <machine/reg.h> 99#include <machine/clock.h> 100#include <machine/specialreg.h> 101#include <machine/bootinfo.h> 102#include <machine/md_var.h> 103#include <machine/pc/bios.h> 104#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 105#include <machine/globals.h> 106#ifdef PERFMON 107#include <machine/perfmon.h> 108#endif 109 110#include <i386/isa/icu.h> 111#include <i386/isa/intr_machdep.h> 112#include <isa/rtc.h> 113#include <machine/vm86.h> 114#include <sys/ptrace.h> 115#include <machine/sigframe.h> 116 117extern void init386 __P((int first)); 118extern void dblfault_handler __P((void)); 119 120extern void printcpuinfo(void); /* XXX header file */ 121extern void earlysetcpuclass(void); /* same header file */ 122extern void finishidentcpu(void); 123extern void panicifcpuunsupported(void); 124extern void initializecpu(void); 125 126#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 127#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 128 129static void cpu_startup __P((void *)); 130#ifdef CPU_ENABLE_SSE 131static void set_fpregs_xmm __P((struct save87 *, struct savexmm *)); 132static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *)); 133#endif /* CPU_ENABLE_SSE */ 134SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 135 136int _udatasel, _ucodesel; 137u_int atdevbase; 138 139#if defined(SWTCH_OPTIM_STATS) 140extern int swtch_optim_stats; 141SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 142 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 143SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 144 CTLFLAG_RD, &tlb_flush_count, 0, ""); 145#endif 146 147#ifdef PC98 148static int ispc98 = 1; 149#else 150static int ispc98 = 0; 151#endif 152SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 153 154int physmem = 0; 155int cold = 1; 156 157static void osendsig __P((sig_t catcher, int sig, sigset_t *mask, u_long code)); 158 159static int 160sysctl_hw_physmem(SYSCTL_HANDLER_ARGS) 161{ 162 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 163 return (error); 164} 165 166SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 167 0, 0, sysctl_hw_physmem, "IU", ""); 168 169static int 170sysctl_hw_usermem(SYSCTL_HANDLER_ARGS) 171{ 172 int error = sysctl_handle_int(oidp, 0, 173 ctob(physmem - cnt.v_wire_count), req); 174 return (error); 175} 176 177SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 178 0, 0, sysctl_hw_usermem, "IU", ""); 179 180static int 181sysctl_hw_availpages(SYSCTL_HANDLER_ARGS) 182{ 183 int error = sysctl_handle_int(oidp, 0, 184 i386_btop(avail_end - avail_start), req); 185 return (error); 186} 187 188SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD, 189 0, 0, sysctl_hw_availpages, "I", ""); 190 191int Maxmem = 0; 192long dumplo; 193 194vm_offset_t phys_avail[10]; 195 196/* must be 2 less so 0 0 can signal end of chunks */ 197#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 198 199static vm_offset_t buffer_sva, buffer_eva; 200vm_offset_t clean_sva, clean_eva; 201static vm_offset_t pager_sva, pager_eva; 202static struct trapframe proc0_tf; 203#ifndef SMP 204static struct globaldata __globaldata; 205#endif 206 207struct mtx sched_lock; 208struct mtx Giant; 209 210static void 211cpu_startup(dummy) 212 void *dummy; 213{ 214 register unsigned i; 215 register caddr_t v; 216 vm_offset_t maxaddr; 217 vm_size_t size = 0; 218 int firstaddr; 219 vm_offset_t minaddr; 220 int physmem_est; 221 222 /* 223 * Good {morning,afternoon,evening,night}. 224 */ 225 earlysetcpuclass(); 226 startrtclock(); 227 printcpuinfo(); 228 panicifcpuunsupported(); 229#ifdef PERFMON 230 perfmon_init(); 231#endif 232 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 233 /* 234 * Display any holes after the first chunk of extended memory. 235 */ 236 if (bootverbose) { 237 int indx; 238 239 printf("Physical memory chunk(s):\n"); 240 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 241 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx]; 242 243 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n", 244 phys_avail[indx], phys_avail[indx + 1] - 1, size1, 245 size1 / PAGE_SIZE); 246 } 247 } 248 249 /* 250 * Calculate callout wheel size 251 */ 252 for (callwheelsize = 1, callwheelbits = 0; 253 callwheelsize < ncallout; 254 callwheelsize <<= 1, ++callwheelbits) 255 ; 256 callwheelmask = callwheelsize - 1; 257 258 /* 259 * Allocate space for system data structures. 260 * The first available kernel virtual address is in "v". 261 * As pages of kernel virtual memory are allocated, "v" is incremented. 262 * As pages of memory are allocated and cleared, 263 * "firstaddr" is incremented. 264 * An index into the kernel page table corresponding to the 265 * virtual memory address maintained in "v" is kept in "mapaddr". 266 */ 267 268 /* 269 * Make two passes. The first pass calculates how much memory is 270 * needed and allocates it. The second pass assigns virtual 271 * addresses to the various data structures. 272 */ 273 firstaddr = 0; 274again: 275 v = (caddr_t)firstaddr; 276 277#define valloc(name, type, num) \ 278 (name) = (type *)v; v = (caddr_t)((name)+(num)) 279#define valloclim(name, type, num, lim) \ 280 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 281 282 valloc(callout, struct callout, ncallout); 283 valloc(callwheel, struct callout_tailq, callwheelsize); 284 285 /* 286 * Discount the physical memory larger than the size of kernel_map 287 * to avoid eating up all of KVA space. 288 */ 289 if (kernel_map->first_free == NULL) { 290 printf("Warning: no free entries in kernel_map.\n"); 291 physmem_est = physmem; 292 } else 293 physmem_est = min(physmem, kernel_map->max_offset - kernel_map->min_offset); 294 295 /* 296 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE. 297 * For the first 64MB of ram nominally allocate sufficient buffers to 298 * cover 1/4 of our ram. Beyond the first 64MB allocate additional 299 * buffers to cover 1/20 of our ram over 64MB. 300 * 301 * factor represents the 1/4 x ram conversion. 302 */ 303 if (nbuf == 0) { 304 int factor = 4 * BKVASIZE / PAGE_SIZE; 305 306 nbuf = 50; 307 if (physmem_est > 1024) 308 nbuf += min((physmem_est - 1024) / factor, 16384 / factor); 309 if (physmem_est > 16384) 310 nbuf += (physmem_est - 16384) * 2 / (factor * 5); 311 } 312 313 /* 314 * Do not allow the buffer_map to be more then 1/2 the size of the 315 * kernel_map. 316 */ 317 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) / 318 (BKVASIZE * 2)) { 319 nbuf = (kernel_map->max_offset - kernel_map->min_offset) / 320 (BKVASIZE * 2); 321 printf("Warning: nbufs capped at %d\n", nbuf); 322 } 323 324 nswbuf = max(min(nbuf/4, 256), 16); 325 326 valloc(swbuf, struct buf, nswbuf); 327 valloc(buf, struct buf, nbuf); 328 v = bufhashinit(v); 329 330 /* 331 * End of first pass, size has been calculated so allocate memory 332 */ 333 if (firstaddr == 0) { 334 size = (vm_size_t)(v - firstaddr); 335 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 336 if (firstaddr == 0) 337 panic("startup: no room for tables"); 338 goto again; 339 } 340 341 /* 342 * End of second pass, addresses have been assigned 343 */ 344 if ((vm_size_t)(v - firstaddr) != size) 345 panic("startup: table size inconsistency"); 346 347 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 348 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size); 349 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 350 (nbuf*BKVASIZE)); 351 buffer_map->system_map = 1; 352 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 353 (nswbuf*MAXPHYS) + pager_map_size); 354 pager_map->system_map = 1; 355 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 356 (16*(ARG_MAX+(PAGE_SIZE*3)))); 357 358 /* 359 * XXX: Mbuf system machine-specific initializations should 360 * go here, if anywhere. 361 */ 362 363 /* 364 * Initialize callouts 365 */ 366 SLIST_INIT(&callfree); 367 for (i = 0; i < ncallout; i++) { 368 callout_init(&callout[i], 0); 369 callout[i].c_flags = CALLOUT_LOCAL_ALLOC; 370 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle); 371 } 372 373 for (i = 0; i < callwheelsize; i++) { 374 TAILQ_INIT(&callwheel[i]); 375 } 376 377 mtx_init(&callout_lock, "callout", MTX_SPIN | MTX_RECURSE); 378 379#if defined(USERCONFIG) 380 userconfig(); 381 cninit(); /* the preferred console may have changed */ 382#endif 383 384 printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count), 385 ptoa(cnt.v_free_count) / 1024); 386 387 /* 388 * Set up buffers, so they can be used to read disk labels. 389 */ 390 bufinit(); 391 vm_pager_bufferinit(); 392 393 globaldata_register(GLOBALDATA); 394#ifndef SMP 395 /* For SMP, we delay the cpu_setregs() until after SMP startup. */ 396 cpu_setregs(); 397#endif 398} 399 400/* 401 * Send an interrupt to process. 402 * 403 * Stack is set up to allow sigcode stored 404 * at top to call routine, followed by kcall 405 * to sigreturn routine below. After sigreturn 406 * resets the signal mask, the stack, and the 407 * frame pointer, it returns to the user 408 * specified pc, psl. 409 */ 410static void 411osendsig(catcher, sig, mask, code) 412 sig_t catcher; 413 int sig; 414 sigset_t *mask; 415 u_long code; 416{ 417 struct osigframe sf; 418 struct osigframe *fp; 419 struct proc *p; 420 struct sigacts *psp; 421 struct trapframe *regs; 422 int oonstack; 423 424 p = curproc; 425 PROC_LOCK(p); 426 psp = p->p_sigacts; 427 regs = p->p_frame; 428 oonstack = sigonstack(regs->tf_esp); 429 430 /* Allocate and validate space for the signal handler context. */ 431 if ((p->p_flag & P_ALTSTACK) && !oonstack && 432 SIGISMEMBER(psp->ps_sigonstack, sig)) { 433 fp = (struct osigframe *)(p->p_sigstk.ss_sp + 434 p->p_sigstk.ss_size - sizeof(struct osigframe)); 435#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 436 p->p_sigstk.ss_flags |= SS_ONSTACK; 437#endif 438 } else 439 fp = (struct osigframe *)regs->tf_esp - 1; 440 PROC_UNLOCK(p); 441 442 /* 443 * grow_stack() will return 0 if *fp does not fit inside the stack 444 * and the stack can not be grown. 445 * useracc() will return FALSE if access is denied. 446 */ 447 if (grow_stack(p, (int)fp) == 0 || 448 !useracc((caddr_t)fp, sizeof(*fp), VM_PROT_WRITE)) { 449 /* 450 * Process has trashed its stack; give it an illegal 451 * instruction to halt it in its tracks. 452 */ 453 PROC_LOCK(p); 454 SIGACTION(p, SIGILL) = SIG_DFL; 455 SIGDELSET(p->p_sigignore, SIGILL); 456 SIGDELSET(p->p_sigcatch, SIGILL); 457 SIGDELSET(p->p_sigmask, SIGILL); 458 psignal(p, SIGILL); 459 PROC_UNLOCK(p); 460 return; 461 } 462 463 /* Translate the signal if appropriate. */ 464 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 465 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 466 467 /* Build the argument list for the signal handler. */ 468 sf.sf_signum = sig; 469 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 470 PROC_LOCK(p); 471 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) { 472 /* Signal handler installed with SA_SIGINFO. */ 473 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 474 sf.sf_siginfo.si_signo = sig; 475 sf.sf_siginfo.si_code = code; 476 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 477 } else { 478 /* Old FreeBSD-style arguments. */ 479 sf.sf_arg2 = code; 480 sf.sf_addr = regs->tf_err; 481 sf.sf_ahu.sf_handler = catcher; 482 } 483 PROC_UNLOCK(p); 484 485 /* Save most if not all of trap frame. */ 486 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 487 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 488 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 489 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 490 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 491 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 492 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 493 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 494 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 495 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 496 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 497 sf.sf_siginfo.si_sc.sc_gs = rgs(); 498 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 499 500 /* Build the signal context to be used by osigreturn(). */ 501 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 502 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 503 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 504 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 505 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 506 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 507 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 508 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 509 510 /* 511 * If we're a vm86 process, we want to save the segment registers. 512 * We also change eflags to be our emulated eflags, not the actual 513 * eflags. 514 */ 515 if (regs->tf_eflags & PSL_VM) { 516 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 517 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 518 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 519 520 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 521 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 522 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 523 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 524 525 if (vm86->vm86_has_vme == 0) 526 sf.sf_siginfo.si_sc.sc_ps = 527 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 528 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 529 530 /* See sendsig() for comments. */ 531 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_T | PSL_VIF | PSL_VIP); 532 } 533 534 /* Copy the sigframe out to the user's stack. */ 535 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 536 /* 537 * Something is wrong with the stack pointer. 538 * ...Kill the process. 539 */ 540 PROC_LOCK(p); 541 sigexit(p, SIGILL); 542 /* NOTREACHED */ 543 } 544 545 regs->tf_esp = (int)fp; 546 regs->tf_eip = PS_STRINGS - szosigcode; 547 regs->tf_cs = _ucodesel; 548 regs->tf_ds = _udatasel; 549 regs->tf_es = _udatasel; 550 regs->tf_fs = _udatasel; 551 load_gs(_udatasel); 552 regs->tf_ss = _udatasel; 553} 554 555void 556sendsig(catcher, sig, mask, code) 557 sig_t catcher; 558 int sig; 559 sigset_t *mask; 560 u_long code; 561{ 562 struct sigframe sf; 563 struct proc *p; 564 struct sigacts *psp; 565 struct trapframe *regs; 566 struct sigframe *sfp; 567 int oonstack; 568 569 p = curproc; 570 PROC_LOCK(p); 571 psp = p->p_sigacts; 572 if (SIGISMEMBER(psp->ps_osigset, sig)) { 573 PROC_UNLOCK(p); 574 osendsig(catcher, sig, mask, code); 575 return; 576 } 577 regs = p->p_frame; 578 oonstack = sigonstack(regs->tf_esp); 579 580 /* Save user context. */ 581 bzero(&sf, sizeof(sf)); 582 sf.sf_uc.uc_sigmask = *mask; 583 sf.sf_uc.uc_stack = p->p_sigstk; 584 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK) 585 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 586 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 587 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 588 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 589 590 /* Allocate and validate space for the signal handler context. */ 591 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack && 592 SIGISMEMBER(psp->ps_sigonstack, sig)) { 593 sfp = (struct sigframe *)(p->p_sigstk.ss_sp + 594 p->p_sigstk.ss_size - sizeof(struct sigframe)); 595#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 596 p->p_sigstk.ss_flags |= SS_ONSTACK; 597#endif 598 } else 599 sfp = (struct sigframe *)regs->tf_esp - 1; 600 PROC_UNLOCK(p); 601 602 /* 603 * grow_stack() will return 0 if *sfp does not fit inside the stack 604 * and the stack can not be grown. 605 * useracc() will return FALSE if access is denied. 606 */ 607 if (grow_stack(p, (int)sfp) == 0 || 608 !useracc((caddr_t)sfp, sizeof(*sfp), VM_PROT_WRITE)) { 609 /* 610 * Process has trashed its stack; give it an illegal 611 * instruction to halt it in its tracks. 612 */ 613#ifdef DEBUG 614 printf("process %d has trashed its stack\n", p->p_pid); 615#endif 616 PROC_LOCK(p); 617 SIGACTION(p, SIGILL) = SIG_DFL; 618 SIGDELSET(p->p_sigignore, SIGILL); 619 SIGDELSET(p->p_sigcatch, SIGILL); 620 SIGDELSET(p->p_sigmask, SIGILL); 621 psignal(p, SIGILL); 622 PROC_UNLOCK(p); 623 return; 624 } 625 626 /* Translate the signal if appropriate. */ 627 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 628 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 629 630 /* Build the argument list for the signal handler. */ 631 sf.sf_signum = sig; 632 sf.sf_ucontext = (register_t)&sfp->sf_uc; 633 PROC_LOCK(p); 634 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) { 635 /* Signal handler installed with SA_SIGINFO. */ 636 sf.sf_siginfo = (register_t)&sfp->sf_si; 637 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 638 639 /* Fill siginfo structure. */ 640 sf.sf_si.si_signo = sig; 641 sf.sf_si.si_code = code; 642 sf.sf_si.si_addr = (void *)regs->tf_err; 643 } else { 644 /* Old FreeBSD-style arguments. */ 645 sf.sf_siginfo = code; 646 sf.sf_addr = regs->tf_err; 647 sf.sf_ahu.sf_handler = catcher; 648 } 649 PROC_UNLOCK(p); 650 651 /* 652 * If we're a vm86 process, we want to save the segment registers. 653 * We also change eflags to be our emulated eflags, not the actual 654 * eflags. 655 */ 656 if (regs->tf_eflags & PSL_VM) { 657 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 658 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 659 660 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 661 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 662 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 663 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 664 665 if (vm86->vm86_has_vme == 0) 666 sf.sf_uc.uc_mcontext.mc_eflags = 667 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 668 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 669 670 /* 671 * We should never have PSL_T set when returning from vm86 672 * mode. It may be set here if we deliver a signal before 673 * getting to vm86 mode, so turn it off. 674 * 675 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 676 * syscalls made by the signal handler. This just avoids 677 * wasting time for our lazy fixup of such faults. PSL_NT 678 * does nothing in vm86 mode, but vm86 programs can set it 679 * almost legitimately in probes for old cpu types. 680 */ 681 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_T | PSL_VIF | PSL_VIP); 682 } 683 684 /* Copy the sigframe out to the user's stack. */ 685 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 686 /* 687 * Something is wrong with the stack pointer. 688 * ...Kill the process. 689 */ 690 PROC_LOCK(p); 691 sigexit(p, SIGILL); 692 /* NOTREACHED */ 693 } 694 695 regs->tf_esp = (int)sfp; 696 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 697 regs->tf_cs = _ucodesel; 698 regs->tf_ds = _udatasel; 699 regs->tf_es = _udatasel; 700 regs->tf_fs = _udatasel; 701 regs->tf_ss = _udatasel; 702} 703 704/* 705 * System call to cleanup state after a signal 706 * has been taken. Reset signal mask and 707 * stack state from context left by sendsig (above). 708 * Return to previous pc and psl as specified by 709 * context left by sendsig. Check carefully to 710 * make sure that the user has not modified the 711 * state to gain improper privileges. 712 */ 713int 714osigreturn(p, uap) 715 struct proc *p; 716 struct osigreturn_args /* { 717 struct osigcontext *sigcntxp; 718 } */ *uap; 719{ 720 struct trapframe *regs; 721 struct osigcontext *scp; 722 int eflags; 723 724 regs = p->p_frame; 725 scp = uap->sigcntxp; 726 if (!useracc((caddr_t)scp, sizeof(*scp), VM_PROT_READ)) 727 return (EFAULT); 728 eflags = scp->sc_ps; 729 if (eflags & PSL_VM) { 730 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 731 struct vm86_kernel *vm86; 732 733 /* 734 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 735 * set up the vm86 area, and we can't enter vm86 mode. 736 */ 737 if (p->p_addr->u_pcb.pcb_ext == 0) 738 return (EINVAL); 739 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 740 if (vm86->vm86_inited == 0) 741 return (EINVAL); 742 743 /* Go back to user mode if both flags are set. */ 744 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 745 trapsignal(p, SIGBUS, 0); 746 747 if (vm86->vm86_has_vme) { 748 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 749 (eflags & VME_USERCHANGE) | PSL_VM; 750 } else { 751 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 752 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 753 } 754 tf->tf_vm86_ds = scp->sc_ds; 755 tf->tf_vm86_es = scp->sc_es; 756 tf->tf_vm86_fs = scp->sc_fs; 757 tf->tf_vm86_gs = scp->sc_gs; 758 tf->tf_ds = _udatasel; 759 tf->tf_es = _udatasel; 760 tf->tf_fs = _udatasel; 761 } else { 762 /* 763 * Don't allow users to change privileged or reserved flags. 764 */ 765 /* 766 * XXX do allow users to change the privileged flag PSL_RF. 767 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 768 * should sometimes set it there too. tf_eflags is kept in 769 * the signal context during signal handling and there is no 770 * other place to remember it, so the PSL_RF bit may be 771 * corrupted by the signal handler without us knowing. 772 * Corruption of the PSL_RF bit at worst causes one more or 773 * one less debugger trap, so allowing it is fairly harmless. 774 */ 775 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 776 return (EINVAL); 777 } 778 779 /* 780 * Don't allow users to load a valid privileged %cs. Let the 781 * hardware check for invalid selectors, excess privilege in 782 * other selectors, invalid %eip's and invalid %esp's. 783 */ 784 if (!CS_SECURE(scp->sc_cs)) { 785 trapsignal(p, SIGBUS, T_PROTFLT); 786 return (EINVAL); 787 } 788 regs->tf_ds = scp->sc_ds; 789 regs->tf_es = scp->sc_es; 790 regs->tf_fs = scp->sc_fs; 791 } 792 793 /* Restore remaining registers. */ 794 regs->tf_eax = scp->sc_eax; 795 regs->tf_ebx = scp->sc_ebx; 796 regs->tf_ecx = scp->sc_ecx; 797 regs->tf_edx = scp->sc_edx; 798 regs->tf_esi = scp->sc_esi; 799 regs->tf_edi = scp->sc_edi; 800 regs->tf_cs = scp->sc_cs; 801 regs->tf_ss = scp->sc_ss; 802 regs->tf_isp = scp->sc_isp; 803 804 PROC_LOCK(p); 805#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 806 if (scp->sc_onstack & 1) 807 p->p_sigstk.ss_flags |= SS_ONSTACK; 808 else 809 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 810#endif 811 812 SIGSETOLD(p->p_sigmask, scp->sc_mask); 813 SIG_CANTMASK(p->p_sigmask); 814 PROC_UNLOCK(p); 815 regs->tf_ebp = scp->sc_fp; 816 regs->tf_esp = scp->sc_sp; 817 regs->tf_eip = scp->sc_pc; 818 regs->tf_eflags = eflags; 819 return (EJUSTRETURN); 820} 821 822int 823sigreturn(p, uap) 824 struct proc *p; 825 struct sigreturn_args /* { 826 ucontext_t *sigcntxp; 827 } */ *uap; 828{ 829 struct trapframe *regs; 830 ucontext_t *ucp; 831 int cs, eflags; 832 833 ucp = uap->sigcntxp; 834 if (!useracc((caddr_t)ucp, sizeof(struct osigcontext), VM_PROT_READ)) 835 return (EFAULT); 836 if (((struct osigcontext *)ucp)->sc_trapno == 0x01d516) 837 return (osigreturn(p, (struct osigreturn_args *)uap)); 838 839 /* 840 * Since ucp is not an osigcontext but a ucontext_t, we have to 841 * check again if all of it is accessible. A ucontext_t is 842 * much larger, so instead of just checking for the pointer 843 * being valid for the size of an osigcontext, now check for 844 * it being valid for a whole, new-style ucontext_t. 845 */ 846 if (!useracc((caddr_t)ucp, sizeof(*ucp), VM_PROT_READ)) 847 return (EFAULT); 848 849 regs = p->p_frame; 850 eflags = ucp->uc_mcontext.mc_eflags; 851 if (eflags & PSL_VM) { 852 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 853 struct vm86_kernel *vm86; 854 855 /* 856 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 857 * set up the vm86 area, and we can't enter vm86 mode. 858 */ 859 if (p->p_addr->u_pcb.pcb_ext == 0) 860 return (EINVAL); 861 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 862 if (vm86->vm86_inited == 0) 863 return (EINVAL); 864 865 /* Go back to user mode if both flags are set. */ 866 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 867 trapsignal(p, SIGBUS, 0); 868 869 if (vm86->vm86_has_vme) { 870 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 871 (eflags & VME_USERCHANGE) | PSL_VM; 872 } else { 873 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 874 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 875 } 876 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 877 tf->tf_eflags = eflags; 878 tf->tf_vm86_ds = tf->tf_ds; 879 tf->tf_vm86_es = tf->tf_es; 880 tf->tf_vm86_fs = tf->tf_fs; 881 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 882 tf->tf_ds = _udatasel; 883 tf->tf_es = _udatasel; 884 tf->tf_fs = _udatasel; 885 } else { 886 /* 887 * Don't allow users to change privileged or reserved flags. 888 */ 889 /* 890 * XXX do allow users to change the privileged flag PSL_RF. 891 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 892 * should sometimes set it there too. tf_eflags is kept in 893 * the signal context during signal handling and there is no 894 * other place to remember it, so the PSL_RF bit may be 895 * corrupted by the signal handler without us knowing. 896 * Corruption of the PSL_RF bit at worst causes one more or 897 * one less debugger trap, so allowing it is fairly harmless. 898 */ 899 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 900 printf("sigreturn: eflags = 0x%x\n", eflags); 901 return (EINVAL); 902 } 903 904 /* 905 * Don't allow users to load a valid privileged %cs. Let the 906 * hardware check for invalid selectors, excess privilege in 907 * other selectors, invalid %eip's and invalid %esp's. 908 */ 909 cs = ucp->uc_mcontext.mc_cs; 910 if (!CS_SECURE(cs)) { 911 printf("sigreturn: cs = 0x%x\n", cs); 912 trapsignal(p, SIGBUS, T_PROTFLT); 913 return (EINVAL); 914 } 915 916 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 917 } 918 919 PROC_LOCK(p); 920#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 921 if (ucp->uc_mcontext.mc_onstack & 1) 922 p->p_sigstk.ss_flags |= SS_ONSTACK; 923 else 924 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 925#endif 926 927 p->p_sigmask = ucp->uc_sigmask; 928 SIG_CANTMASK(p->p_sigmask); 929 PROC_UNLOCK(p); 930 return (EJUSTRETURN); 931} 932 933/* 934 * Machine dependent boot() routine 935 * 936 * I haven't seen anything to put here yet 937 * Possibly some stuff might be grafted back here from boot() 938 */ 939void 940cpu_boot(int howto) 941{ 942} 943 944/* 945 * Shutdown the CPU as much as possible 946 */ 947void 948cpu_halt(void) 949{ 950 for (;;) 951 __asm__ ("hlt"); 952} 953 954/* 955 * Hook to idle the CPU when possible. This currently only works in 956 * the !SMP case, as there is no clean way to ensure that a CPU will be 957 * woken when there is work available for it. 958 */ 959static int cpu_idle_hlt = 1; 960SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 961 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 962 963/* 964 * Note that we have to be careful here to avoid a race between checking 965 * procrunnable() and actually halting. If we don't do this, we may waste 966 * the time between calling hlt and the next interrupt even though there 967 * is a runnable process. 968 */ 969void 970cpu_idle(void) 971{ 972#ifndef SMP 973 if (cpu_idle_hlt) { 974 disable_intr(); 975 if (procrunnable()) 976 enable_intr(); 977 else { 978 enable_intr(); 979 __asm __volatile("hlt"); 980 } 981 } 982#endif 983} 984 985/* 986 * Clear registers on exec 987 */ 988void 989setregs(p, entry, stack, ps_strings) 990 struct proc *p; 991 u_long entry; 992 u_long stack; 993 u_long ps_strings; 994{ 995 struct trapframe *regs = p->p_frame; 996 struct pcb *pcb = &p->p_addr->u_pcb; 997 998 if (pcb->pcb_ldt) 999 user_ldt_free(pcb); 1000 1001 bzero((char *)regs, sizeof(struct trapframe)); 1002 regs->tf_eip = entry; 1003 regs->tf_esp = stack; 1004 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1005 regs->tf_ss = _udatasel; 1006 regs->tf_ds = _udatasel; 1007 regs->tf_es = _udatasel; 1008 regs->tf_fs = _udatasel; 1009 regs->tf_cs = _ucodesel; 1010 1011 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1012 regs->tf_ebx = ps_strings; 1013 1014 /* reset %gs as well */ 1015 if (pcb == PCPU_GET(curpcb)) 1016 load_gs(_udatasel); 1017 else 1018 pcb->pcb_gs = _udatasel; 1019 1020 /* 1021 * Reset the hardware debug registers if they were in use. 1022 * They won't have any meaning for the newly exec'd process. 1023 */ 1024 if (pcb->pcb_flags & PCB_DBREGS) { 1025 pcb->pcb_dr0 = 0; 1026 pcb->pcb_dr1 = 0; 1027 pcb->pcb_dr2 = 0; 1028 pcb->pcb_dr3 = 0; 1029 pcb->pcb_dr6 = 0; 1030 pcb->pcb_dr7 = 0; 1031 if (pcb == PCPU_GET(curpcb)) { 1032 /* 1033 * Clear the debug registers on the running 1034 * CPU, otherwise they will end up affecting 1035 * the next process we switch to. 1036 */ 1037 reset_dbregs(); 1038 } 1039 pcb->pcb_flags &= ~PCB_DBREGS; 1040 } 1041 1042 /* 1043 * Initialize the math emulator (if any) for the current process. 1044 * Actually, just clear the bit that says that the emulator has 1045 * been initialized. Initialization is delayed until the process 1046 * traps to the emulator (if it is done at all) mainly because 1047 * emulators don't provide an entry point for initialization. 1048 */ 1049 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 1050 1051 /* 1052 * Arrange to trap the next npx or `fwait' instruction (see npx.c 1053 * for why fwait must be trapped at least if there is an npx or an 1054 * emulator). This is mainly to handle the case where npx0 is not 1055 * configured, since the npx routines normally set up the trap 1056 * otherwise. It should be done only at boot time, but doing it 1057 * here allows modifying `npx_exists' for testing the emulator on 1058 * systems with an npx. 1059 */ 1060 load_cr0(rcr0() | CR0_MP | CR0_TS); 1061 1062#ifdef DEV_NPX 1063 /* Initialize the npx (if any) for the current process. */ 1064 npxinit(__INITIAL_NPXCW__); 1065#endif 1066 1067 /* 1068 * XXX - Linux emulator 1069 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1070 * on it. 1071 */ 1072 p->p_retval[1] = 0; 1073} 1074 1075void 1076cpu_setregs(void) 1077{ 1078 unsigned int cr0; 1079 1080 cr0 = rcr0(); 1081 cr0 |= CR0_NE; /* Done by npxinit() */ 1082 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 1083#ifndef I386_CPU 1084 cr0 |= CR0_WP | CR0_AM; 1085#endif 1086 load_cr0(cr0); 1087 load_gs(_udatasel); 1088} 1089 1090static int 1091sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 1092{ 1093 int error; 1094 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 1095 req); 1096 if (!error && req->newptr) 1097 resettodr(); 1098 return (error); 1099} 1100 1101SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 1102 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 1103 1104SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 1105 CTLFLAG_RW, &disable_rtc_set, 0, ""); 1106 1107SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 1108 CTLFLAG_RD, &bootinfo, bootinfo, ""); 1109 1110SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 1111 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 1112 1113/* 1114 * Initialize 386 and configure to run kernel 1115 */ 1116 1117/* 1118 * Initialize segments & interrupt table 1119 */ 1120 1121int _default_ldt; 1122union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1123static struct gate_descriptor idt0[NIDT]; 1124struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1125union descriptor ldt[NLDT]; /* local descriptor table */ 1126#ifdef SMP 1127/* table descriptors - used to load tables by microp */ 1128struct region_descriptor r_gdt, r_idt; 1129#endif 1130 1131int private_tss; /* flag indicating private tss */ 1132 1133#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1134extern int has_f00f_bug; 1135#endif 1136 1137static struct i386tss dblfault_tss; 1138static char dblfault_stack[PAGE_SIZE]; 1139 1140extern struct user *proc0paddr; 1141 1142 1143/* software prototypes -- in more palatable form */ 1144struct soft_segment_descriptor gdt_segs[] = { 1145/* GNULL_SEL 0 Null Descriptor */ 1146{ 0x0, /* segment base address */ 1147 0x0, /* length */ 1148 0, /* segment type */ 1149 0, /* segment descriptor priority level */ 1150 0, /* segment descriptor present */ 1151 0, 0, 1152 0, /* default 32 vs 16 bit size */ 1153 0 /* limit granularity (byte/page units)*/ }, 1154/* GCODE_SEL 1 Code Descriptor for kernel */ 1155{ 0x0, /* segment base address */ 1156 0xfffff, /* length - all address space */ 1157 SDT_MEMERA, /* segment type */ 1158 0, /* segment descriptor priority level */ 1159 1, /* segment descriptor present */ 1160 0, 0, 1161 1, /* default 32 vs 16 bit size */ 1162 1 /* limit granularity (byte/page units)*/ }, 1163/* GDATA_SEL 2 Data Descriptor for kernel */ 1164{ 0x0, /* segment base address */ 1165 0xfffff, /* length - all address space */ 1166 SDT_MEMRWA, /* segment type */ 1167 0, /* segment descriptor priority level */ 1168 1, /* segment descriptor present */ 1169 0, 0, 1170 1, /* default 32 vs 16 bit size */ 1171 1 /* limit granularity (byte/page units)*/ }, 1172/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */ 1173{ 0x0, /* segment base address */ 1174 0xfffff, /* length - all address space */ 1175 SDT_MEMRWA, /* segment type */ 1176 0, /* segment descriptor priority level */ 1177 1, /* segment descriptor present */ 1178 0, 0, 1179 1, /* default 32 vs 16 bit size */ 1180 1 /* limit granularity (byte/page units)*/ }, 1181/* GPROC0_SEL 4 Proc 0 Tss Descriptor */ 1182{ 1183 0x0, /* segment base address */ 1184 sizeof(struct i386tss)-1,/* length - all address space */ 1185 SDT_SYS386TSS, /* segment type */ 1186 0, /* segment descriptor priority level */ 1187 1, /* segment descriptor present */ 1188 0, 0, 1189 0, /* unused - default 32 vs 16 bit size */ 1190 0 /* limit granularity (byte/page units)*/ }, 1191/* GLDT_SEL 5 LDT Descriptor */ 1192{ (int) ldt, /* segment base address */ 1193 sizeof(ldt)-1, /* length - all address space */ 1194 SDT_SYSLDT, /* segment type */ 1195 SEL_UPL, /* segment descriptor priority level */ 1196 1, /* segment descriptor present */ 1197 0, 0, 1198 0, /* unused - default 32 vs 16 bit size */ 1199 0 /* limit granularity (byte/page units)*/ }, 1200/* GUSERLDT_SEL 6 User LDT Descriptor per process */ 1201{ (int) ldt, /* segment base address */ 1202 (512 * sizeof(union descriptor)-1), /* length */ 1203 SDT_SYSLDT, /* segment type */ 1204 0, /* segment descriptor priority level */ 1205 1, /* segment descriptor present */ 1206 0, 0, 1207 0, /* unused - default 32 vs 16 bit size */ 1208 0 /* limit granularity (byte/page units)*/ }, 1209/* GTGATE_SEL 7 Null Descriptor - Placeholder */ 1210{ 0x0, /* segment base address */ 1211 0x0, /* length - all address space */ 1212 0, /* segment type */ 1213 0, /* segment descriptor priority level */ 1214 0, /* segment descriptor present */ 1215 0, 0, 1216 0, /* default 32 vs 16 bit size */ 1217 0 /* limit granularity (byte/page units)*/ }, 1218/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1219{ 0x400, /* segment base address */ 1220 0xfffff, /* length */ 1221 SDT_MEMRWA, /* segment type */ 1222 0, /* segment descriptor priority level */ 1223 1, /* segment descriptor present */ 1224 0, 0, 1225 1, /* default 32 vs 16 bit size */ 1226 1 /* limit granularity (byte/page units)*/ }, 1227/* GPANIC_SEL 9 Panic Tss Descriptor */ 1228{ (int) &dblfault_tss, /* segment base address */ 1229 sizeof(struct i386tss)-1,/* length - all address space */ 1230 SDT_SYS386TSS, /* segment type */ 1231 0, /* segment descriptor priority level */ 1232 1, /* segment descriptor present */ 1233 0, 0, 1234 0, /* unused - default 32 vs 16 bit size */ 1235 0 /* limit granularity (byte/page units)*/ }, 1236/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */ 1237{ 0, /* segment base address (overwritten) */ 1238 0xfffff, /* length */ 1239 SDT_MEMERA, /* segment type */ 1240 0, /* segment descriptor priority level */ 1241 1, /* segment descriptor present */ 1242 0, 0, 1243 0, /* default 32 vs 16 bit size */ 1244 1 /* limit granularity (byte/page units)*/ }, 1245/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */ 1246{ 0, /* segment base address (overwritten) */ 1247 0xfffff, /* length */ 1248 SDT_MEMERA, /* segment type */ 1249 0, /* segment descriptor priority level */ 1250 1, /* segment descriptor present */ 1251 0, 0, 1252 0, /* default 32 vs 16 bit size */ 1253 1 /* limit granularity (byte/page units)*/ }, 1254/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */ 1255{ 0, /* segment base address (overwritten) */ 1256 0xfffff, /* length */ 1257 SDT_MEMRWA, /* segment type */ 1258 0, /* segment descriptor priority level */ 1259 1, /* segment descriptor present */ 1260 0, 0, 1261 1, /* default 32 vs 16 bit size */ 1262 1 /* limit granularity (byte/page units)*/ }, 1263/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */ 1264{ 0, /* segment base address (overwritten) */ 1265 0xfffff, /* length */ 1266 SDT_MEMRWA, /* segment type */ 1267 0, /* segment descriptor priority level */ 1268 1, /* segment descriptor present */ 1269 0, 0, 1270 0, /* default 32 vs 16 bit size */ 1271 1 /* limit granularity (byte/page units)*/ }, 1272/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */ 1273{ 0, /* segment base address (overwritten) */ 1274 0xfffff, /* length */ 1275 SDT_MEMRWA, /* segment type */ 1276 0, /* segment descriptor priority level */ 1277 1, /* segment descriptor present */ 1278 0, 0, 1279 0, /* default 32 vs 16 bit size */ 1280 1 /* limit granularity (byte/page units)*/ }, 1281}; 1282 1283static struct soft_segment_descriptor ldt_segs[] = { 1284 /* Null Descriptor - overwritten by call gate */ 1285{ 0x0, /* segment base address */ 1286 0x0, /* length - all address space */ 1287 0, /* segment type */ 1288 0, /* segment descriptor priority level */ 1289 0, /* segment descriptor present */ 1290 0, 0, 1291 0, /* default 32 vs 16 bit size */ 1292 0 /* limit granularity (byte/page units)*/ }, 1293 /* Null Descriptor - overwritten by call gate */ 1294{ 0x0, /* segment base address */ 1295 0x0, /* length - all address space */ 1296 0, /* segment type */ 1297 0, /* segment descriptor priority level */ 1298 0, /* segment descriptor present */ 1299 0, 0, 1300 0, /* default 32 vs 16 bit size */ 1301 0 /* limit granularity (byte/page units)*/ }, 1302 /* Null Descriptor - overwritten by call gate */ 1303{ 0x0, /* segment base address */ 1304 0x0, /* length - all address space */ 1305 0, /* segment type */ 1306 0, /* segment descriptor priority level */ 1307 0, /* segment descriptor present */ 1308 0, 0, 1309 0, /* default 32 vs 16 bit size */ 1310 0 /* limit granularity (byte/page units)*/ }, 1311 /* Code Descriptor for user */ 1312{ 0x0, /* segment base address */ 1313 0xfffff, /* length - all address space */ 1314 SDT_MEMERA, /* segment type */ 1315 SEL_UPL, /* segment descriptor priority level */ 1316 1, /* segment descriptor present */ 1317 0, 0, 1318 1, /* default 32 vs 16 bit size */ 1319 1 /* limit granularity (byte/page units)*/ }, 1320 /* Null Descriptor - overwritten by call gate */ 1321{ 0x0, /* segment base address */ 1322 0x0, /* length - all address space */ 1323 0, /* segment type */ 1324 0, /* segment descriptor priority level */ 1325 0, /* segment descriptor present */ 1326 0, 0, 1327 0, /* default 32 vs 16 bit size */ 1328 0 /* limit granularity (byte/page units)*/ }, 1329 /* Data Descriptor for user */ 1330{ 0x0, /* segment base address */ 1331 0xfffff, /* length - all address space */ 1332 SDT_MEMRWA, /* segment type */ 1333 SEL_UPL, /* segment descriptor priority level */ 1334 1, /* segment descriptor present */ 1335 0, 0, 1336 1, /* default 32 vs 16 bit size */ 1337 1 /* limit granularity (byte/page units)*/ }, 1338}; 1339 1340void 1341setidt(idx, func, typ, dpl, selec) 1342 int idx; 1343 inthand_t *func; 1344 int typ; 1345 int dpl; 1346 int selec; 1347{ 1348 struct gate_descriptor *ip; 1349 1350 ip = idt + idx; 1351 ip->gd_looffset = (int)func; 1352 ip->gd_selector = selec; 1353 ip->gd_stkcpy = 0; 1354 ip->gd_xx = 0; 1355 ip->gd_type = typ; 1356 ip->gd_dpl = dpl; 1357 ip->gd_p = 1; 1358 ip->gd_hioffset = ((int)func)>>16 ; 1359} 1360 1361#define IDTVEC(name) __CONCAT(X,name) 1362 1363extern inthand_t 1364 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1365 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1366 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1367 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1368 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1369 1370void 1371sdtossd(sd, ssd) 1372 struct segment_descriptor *sd; 1373 struct soft_segment_descriptor *ssd; 1374{ 1375 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1376 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1377 ssd->ssd_type = sd->sd_type; 1378 ssd->ssd_dpl = sd->sd_dpl; 1379 ssd->ssd_p = sd->sd_p; 1380 ssd->ssd_def32 = sd->sd_def32; 1381 ssd->ssd_gran = sd->sd_gran; 1382} 1383 1384#define PHYSMAP_SIZE (2 * 8) 1385 1386/* 1387 * Populate the (physmap) array with base/bound pairs describing the 1388 * available physical memory in the system, then test this memory and 1389 * build the phys_avail array describing the actually-available memory. 1390 * 1391 * If we cannot accurately determine the physical memory map, then use 1392 * value from the 0xE801 call, and failing that, the RTC. 1393 * 1394 * Total memory size may be set by the kernel environment variable 1395 * hw.physmem or the compile-time define MAXMEM. 1396 */ 1397static void 1398getmemsize(int first) 1399{ 1400 int i, physmap_idx, pa_indx; 1401 u_int basemem, extmem; 1402 struct vm86frame vmf; 1403 struct vm86context vmc; 1404 vm_offset_t pa, physmap[PHYSMAP_SIZE]; 1405 pt_entry_t pte; 1406 const char *cp; 1407 struct bios_smap *smap; 1408 1409 bzero(&vmf, sizeof(struct vm86frame)); 1410 bzero(physmap, sizeof(physmap)); 1411 1412 /* 1413 * Perform "base memory" related probes & setup 1414 */ 1415 vm86_intcall(0x12, &vmf); 1416 basemem = vmf.vmf_ax; 1417 if (basemem > 640) { 1418 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1419 basemem); 1420 basemem = 640; 1421 } 1422 1423 /* 1424 * XXX if biosbasemem is now < 640, there is a `hole' 1425 * between the end of base memory and the start of 1426 * ISA memory. The hole may be empty or it may 1427 * contain BIOS code or data. Map it read/write so 1428 * that the BIOS can write to it. (Memory from 0 to 1429 * the physical end of the kernel is mapped read-only 1430 * to begin with and then parts of it are remapped. 1431 * The parts that aren't remapped form holes that 1432 * remain read-only and are unused by the kernel. 1433 * The base memory area is below the physical end of 1434 * the kernel and right now forms a read-only hole. 1435 * The part of it from PAGE_SIZE to 1436 * (trunc_page(biosbasemem * 1024) - 1) will be 1437 * remapped and used by the kernel later.) 1438 * 1439 * This code is similar to the code used in 1440 * pmap_mapdev, but since no memory needs to be 1441 * allocated we simply change the mapping. 1442 */ 1443 for (pa = trunc_page(basemem * 1024); 1444 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1445 pte = (pt_entry_t)vtopte(pa + KERNBASE); 1446 *pte = pa | PG_RW | PG_V; 1447 } 1448 1449 /* 1450 * if basemem != 640, map pages r/w into vm86 page table so 1451 * that the bios can scribble on it. 1452 */ 1453 pte = (pt_entry_t)vm86paddr; 1454 for (i = basemem / 4; i < 160; i++) 1455 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1456 1457 /* 1458 * map page 1 R/W into the kernel page table so we can use it 1459 * as a buffer. The kernel will unmap this page later. 1460 */ 1461 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT)); 1462 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V; 1463 1464 /* 1465 * get memory map with INT 15:E820 1466 */ 1467 vmc.npages = 0; 1468 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT)); 1469 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di); 1470 1471 physmap_idx = 0; 1472 vmf.vmf_ebx = 0; 1473 do { 1474 vmf.vmf_eax = 0xE820; 1475 vmf.vmf_edx = SMAP_SIG; 1476 vmf.vmf_ecx = sizeof(struct bios_smap); 1477 i = vm86_datacall(0x15, &vmf, &vmc); 1478 if (i || vmf.vmf_eax != SMAP_SIG) 1479 break; 1480 if (boothowto & RB_VERBOSE) 1481 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n", 1482 smap->type, 1483 *(u_int32_t *)((char *)&smap->base + 4), 1484 (u_int32_t)smap->base, 1485 *(u_int32_t *)((char *)&smap->length + 4), 1486 (u_int32_t)smap->length); 1487 1488 if (smap->type != 0x01) 1489 goto next_run; 1490 1491 if (smap->length == 0) 1492 goto next_run; 1493 1494 if (smap->base >= 0xffffffff) { 1495 printf("%uK of memory above 4GB ignored\n", 1496 (u_int)(smap->length / 1024)); 1497 goto next_run; 1498 } 1499 1500 for (i = 0; i <= physmap_idx; i += 2) { 1501 if (smap->base < physmap[i + 1]) { 1502 if (boothowto & RB_VERBOSE) 1503 printf( 1504 "Overlapping or non-montonic memory region, ignoring second region\n"); 1505 goto next_run; 1506 } 1507 } 1508 1509 if (smap->base == physmap[physmap_idx + 1]) { 1510 physmap[physmap_idx + 1] += smap->length; 1511 goto next_run; 1512 } 1513 1514 physmap_idx += 2; 1515 if (physmap_idx == PHYSMAP_SIZE) { 1516 printf( 1517 "Too many segments in the physical address map, giving up\n"); 1518 break; 1519 } 1520 physmap[physmap_idx] = smap->base; 1521 physmap[physmap_idx + 1] = smap->base + smap->length; 1522next_run: 1523 } while (vmf.vmf_ebx != 0); 1524 1525 if (physmap[1] != 0) 1526 goto physmap_done; 1527 1528 /* 1529 * If we failed above, try memory map with INT 15:E801 1530 */ 1531 vmf.vmf_ax = 0xE801; 1532 if (vm86_intcall(0x15, &vmf) == 0) { 1533 extmem = vmf.vmf_cx + vmf.vmf_dx * 64; 1534 } else { 1535#if 0 1536 vmf.vmf_ah = 0x88; 1537 vm86_intcall(0x15, &vmf); 1538 extmem = vmf.vmf_ax; 1539#else 1540 /* 1541 * Prefer the RTC value for extended memory. 1542 */ 1543 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 1544#endif 1545 } 1546 1547 /* 1548 * Special hack for chipsets that still remap the 384k hole when 1549 * there's 16MB of memory - this really confuses people that 1550 * are trying to use bus mastering ISA controllers with the 1551 * "16MB limit"; they only have 16MB, but the remapping puts 1552 * them beyond the limit. 1553 * 1554 * If extended memory is between 15-16MB (16-17MB phys address range), 1555 * chop it to 15MB. 1556 */ 1557 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 1558 extmem = 15 * 1024; 1559 1560 physmap[0] = 0; 1561 physmap[1] = basemem * 1024; 1562 physmap_idx = 2; 1563 physmap[physmap_idx] = 0x100000; 1564 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1565 1566physmap_done: 1567 /* 1568 * Now, physmap contains a map of physical memory. 1569 */ 1570 1571#ifdef SMP 1572 /* make hole for AP bootstrap code */ 1573 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1574 1575 /* look for the MP hardware - needed for apic addresses */ 1576 i386_mp_probe(); 1577#endif 1578 1579 /* 1580 * Maxmem isn't the "maximum memory", it's one larger than the 1581 * highest page of the physical address space. It should be 1582 * called something like "Maxphyspage". We may adjust this 1583 * based on ``hw.physmem'' and the results of the memory test. 1584 */ 1585 Maxmem = atop(physmap[physmap_idx + 1]); 1586 1587#ifdef MAXMEM 1588 Maxmem = MAXMEM / 4; 1589#endif 1590 1591 /* 1592 * hw.maxmem is a size in bytes; we also allow k, m, and g suffixes 1593 * for the appropriate modifiers. This overrides MAXMEM. 1594 */ 1595 if ((cp = getenv("hw.physmem")) != NULL) { 1596 u_int64_t AllowMem, sanity; 1597 char *ep; 1598 1599 sanity = AllowMem = strtouq(cp, &ep, 0); 1600 if ((ep != cp) && (*ep != 0)) { 1601 switch(*ep) { 1602 case 'g': 1603 case 'G': 1604 AllowMem <<= 10; 1605 case 'm': 1606 case 'M': 1607 AllowMem <<= 10; 1608 case 'k': 1609 case 'K': 1610 AllowMem <<= 10; 1611 break; 1612 default: 1613 AllowMem = sanity = 0; 1614 } 1615 if (AllowMem < sanity) 1616 AllowMem = 0; 1617 } 1618 if (AllowMem == 0) 1619 printf("Ignoring invalid memory size of '%s'\n", cp); 1620 else 1621 Maxmem = atop(AllowMem); 1622 } 1623 1624 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1625 (boothowto & RB_VERBOSE)) 1626 printf("Physical memory use set to %uK\n", Maxmem * 4); 1627 1628 /* 1629 * If Maxmem has been increased beyond what the system has detected, 1630 * extend the last memory segment to the new limit. 1631 */ 1632 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1633 physmap[physmap_idx + 1] = ptoa(Maxmem); 1634 1635 /* call pmap initialization to make new kernel address space */ 1636 pmap_bootstrap(first, 0); 1637 1638 /* 1639 * Size up each available chunk of physical memory. 1640 */ 1641 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1642 pa_indx = 0; 1643 phys_avail[pa_indx++] = physmap[0]; 1644 phys_avail[pa_indx] = physmap[0]; 1645#if 0 1646 pte = (pt_entry_t)vtopte(KERNBASE); 1647#else 1648 pte = (pt_entry_t)CMAP1; 1649#endif 1650 1651 /* 1652 * physmap is in bytes, so when converting to page boundaries, 1653 * round up the start address and round down the end address. 1654 */ 1655 for (i = 0; i <= physmap_idx; i += 2) { 1656 vm_offset_t end; 1657 1658 end = ptoa(Maxmem); 1659 if (physmap[i + 1] < end) 1660 end = trunc_page(physmap[i + 1]); 1661 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1662 int tmp, page_bad; 1663#if 0 1664 int *ptr = 0; 1665#else 1666 int *ptr = (int *)CADDR1; 1667#endif 1668 1669 /* 1670 * block out kernel memory as not available. 1671 */ 1672 if (pa >= 0x100000 && pa < first) 1673 continue; 1674 1675 page_bad = FALSE; 1676 1677 /* 1678 * map page into kernel: valid, read/write,non-cacheable 1679 */ 1680 *pte = pa | PG_V | PG_RW | PG_N; 1681 invltlb(); 1682 1683 tmp = *(int *)ptr; 1684 /* 1685 * Test for alternating 1's and 0's 1686 */ 1687 *(volatile int *)ptr = 0xaaaaaaaa; 1688 if (*(volatile int *)ptr != 0xaaaaaaaa) { 1689 page_bad = TRUE; 1690 } 1691 /* 1692 * Test for alternating 0's and 1's 1693 */ 1694 *(volatile int *)ptr = 0x55555555; 1695 if (*(volatile int *)ptr != 0x55555555) { 1696 page_bad = TRUE; 1697 } 1698 /* 1699 * Test for all 1's 1700 */ 1701 *(volatile int *)ptr = 0xffffffff; 1702 if (*(volatile int *)ptr != 0xffffffff) { 1703 page_bad = TRUE; 1704 } 1705 /* 1706 * Test for all 0's 1707 */ 1708 *(volatile int *)ptr = 0x0; 1709 if (*(volatile int *)ptr != 0x0) { 1710 page_bad = TRUE; 1711 } 1712 /* 1713 * Restore original value. 1714 */ 1715 *(int *)ptr = tmp; 1716 1717 /* 1718 * Adjust array of valid/good pages. 1719 */ 1720 if (page_bad == TRUE) { 1721 continue; 1722 } 1723 /* 1724 * If this good page is a continuation of the 1725 * previous set of good pages, then just increase 1726 * the end pointer. Otherwise start a new chunk. 1727 * Note that "end" points one higher than end, 1728 * making the range >= start and < end. 1729 * If we're also doing a speculative memory 1730 * test and we at or past the end, bump up Maxmem 1731 * so that we keep going. The first bad page 1732 * will terminate the loop. 1733 */ 1734 if (phys_avail[pa_indx] == pa) { 1735 phys_avail[pa_indx] += PAGE_SIZE; 1736 } else { 1737 pa_indx++; 1738 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1739 printf("Too many holes in the physical address space, giving up\n"); 1740 pa_indx--; 1741 break; 1742 } 1743 phys_avail[pa_indx++] = pa; /* start */ 1744 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1745 } 1746 physmem++; 1747 } 1748 } 1749 *pte = 0; 1750 invltlb(); 1751 1752 /* 1753 * XXX 1754 * The last chunk must contain at least one page plus the message 1755 * buffer to avoid complicating other code (message buffer address 1756 * calculation, etc.). 1757 */ 1758 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1759 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1760 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1761 phys_avail[pa_indx--] = 0; 1762 phys_avail[pa_indx--] = 0; 1763 } 1764 1765 Maxmem = atop(phys_avail[pa_indx]); 1766 1767 /* Trim off space for the message buffer. */ 1768 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1769 1770 avail_end = phys_avail[pa_indx]; 1771} 1772 1773void 1774init386(first) 1775 int first; 1776{ 1777 int x; 1778 struct gate_descriptor *gdp; 1779 int gsel_tss; 1780#ifndef SMP 1781 /* table descriptors - used to load tables by microp */ 1782 struct region_descriptor r_gdt, r_idt; 1783#endif 1784 int off; 1785 1786 proc0.p_addr = proc0paddr; 1787 1788 atdevbase = ISA_HOLE_START + KERNBASE; 1789 1790 if (bootinfo.bi_modulep) { 1791 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1792 preload_bootstrap_relocate(KERNBASE); 1793 } else { 1794 printf("WARNING: loader(8) metadata is missing!\n"); 1795 } 1796 if (bootinfo.bi_envp) 1797 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1798 1799 /* 1800 * make gdt memory segments, the code segment goes up to end of the 1801 * page with etext in it, the data segment goes to the end of 1802 * the address space 1803 */ 1804 /* 1805 * XXX text protection is temporarily (?) disabled. The limit was 1806 * i386_btop(round_page(etext)) - 1. 1807 */ 1808 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1809 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1810#ifdef SMP 1811 gdt_segs[GPRIV_SEL].ssd_limit = 1812 i386_btop(sizeof(struct privatespace)) - 1; 1813 gdt_segs[GPRIV_SEL].ssd_base = (int) &SMP_prvspace[0]; 1814 gdt_segs[GPROC0_SEL].ssd_base = 1815 (int) &SMP_prvspace[0].globaldata.gd_common_tss; 1816 SMP_prvspace[0].globaldata.gd_prvspace = &SMP_prvspace[0].globaldata; 1817#else 1818 gdt_segs[GPRIV_SEL].ssd_limit = 1819 i386_btop(sizeof(struct globaldata)) - 1; 1820 gdt_segs[GPRIV_SEL].ssd_base = (int) &__globaldata; 1821 gdt_segs[GPROC0_SEL].ssd_base = 1822 (int) &__globaldata.gd_common_tss; 1823 __globaldata.gd_prvspace = &__globaldata; 1824#endif 1825 1826 for (x = 0; x < NGDT; x++) { 1827#ifdef BDE_DEBUGGER 1828 /* avoid overwriting db entries with APM ones */ 1829 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL) 1830 continue; 1831#endif 1832 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1833 } 1834 1835 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1836 r_gdt.rd_base = (int) gdt; 1837 lgdt(&r_gdt); 1838 1839 /* setup curproc so that mutexes work */ 1840 PCPU_SET(curproc, &proc0); 1841 PCPU_SET(spinlocks, NULL); 1842 1843 LIST_INIT(&proc0.p_contested); 1844 1845 /* 1846 * Initialize mutexes. 1847 */ 1848 mtx_init(&Giant, "Giant", MTX_DEF | MTX_RECURSE); 1849 mtx_init(&sched_lock, "sched lock", MTX_SPIN | MTX_RECURSE); 1850 mtx_init(&proc0.p_mtx, "process lock", MTX_DEF); 1851 mtx_init(&clock_lock, "clk", MTX_SPIN | MTX_RECURSE); 1852#ifdef SMP 1853 mtx_init(&imen_mtx, "imen", MTX_SPIN); 1854#endif 1855 mtx_lock(&Giant); 1856 1857 /* make ldt memory segments */ 1858 /* 1859 * The data segment limit must not cover the user area because we 1860 * don't want the user area to be writable in copyout() etc. (page 1861 * level protection is lost in kernel mode on 386's). Also, we 1862 * don't want the user area to be writable directly (page level 1863 * protection of the user area is not available on 486's with 1864 * CR0_WP set, because there is no user-read/kernel-write mode). 1865 * 1866 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1867 * should be spelled ...MAX_USER... 1868 */ 1869#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1870 /* 1871 * The code segment limit has to cover the user area until we move 1872 * the signal trampoline out of the user area. This is safe because 1873 * the code segment cannot be written to directly. 1874 */ 1875#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1876 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1877 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1878 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1879 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1880 1881 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1882 lldt(_default_ldt); 1883 PCPU_SET(currentldt, _default_ldt); 1884 1885 /* exceptions */ 1886 for (x = 0; x < NIDT; x++) 1887 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1888 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1889 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1890 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1891 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1892 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1893 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1894 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1895 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1896 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1897 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1898 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1899 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1900 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1901 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1902 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1903 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1904 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1905 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1906 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1907 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1908 setidt(0x80, &IDTVEC(int0x80_syscall), 1909 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1910 1911 r_idt.rd_limit = sizeof(idt0) - 1; 1912 r_idt.rd_base = (int) idt; 1913 lidt(&r_idt); 1914 1915 /* 1916 * Initialize the console before we print anything out. 1917 */ 1918 cninit(); 1919 1920#ifdef DEV_ISA 1921 isa_defaultirq(); 1922#endif 1923 1924#ifdef DDB 1925 kdb_init(); 1926 if (boothowto & RB_KDB) 1927 Debugger("Boot flags requested debugger"); 1928#endif 1929 1930 finishidentcpu(); /* Final stage of CPU initialization */ 1931 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1932 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1933 initializecpu(); /* Initialize CPU registers */ 1934 1935 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1936 PCPU_SET(common_tss.tss_esp0, 1937 (int) proc0.p_addr + UPAGES*PAGE_SIZE - 16); 1938 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 1939 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1940 private_tss = 0; 1941 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 1942 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 1943 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 1944 ltr(gsel_tss); 1945 1946 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1947 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1948 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1949 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1950 dblfault_tss.tss_cr3 = (int)IdlePTD; 1951 dblfault_tss.tss_eip = (int) dblfault_handler; 1952 dblfault_tss.tss_eflags = PSL_KERNEL; 1953 dblfault_tss.tss_ds = dblfault_tss.tss_es = 1954 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1955 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 1956 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1957 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1958 1959 vm86_initialize(); 1960 getmemsize(first); 1961 1962 /* now running on new page tables, configured,and u/iom is accessible */ 1963 1964 /* Map the message buffer. */ 1965 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1966 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 1967 1968 msgbufinit(msgbufp, MSGBUF_SIZE); 1969 1970 /* make a call gate to reenter kernel with */ 1971 gdp = &ldt[LSYS5CALLS_SEL].gd; 1972 1973 x = (int) &IDTVEC(lcall_syscall); 1974 gdp->gd_looffset = x; 1975 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1976 gdp->gd_stkcpy = 1; 1977 gdp->gd_type = SDT_SYS386CGT; 1978 gdp->gd_dpl = SEL_UPL; 1979 gdp->gd_p = 1; 1980 gdp->gd_hioffset = x >> 16; 1981 1982 /* XXX does this work? */ 1983 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1984 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1985 1986 /* transfer to user mode */ 1987 1988 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1989 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1990 1991 /* setup proc 0's pcb */ 1992 proc0.p_addr->u_pcb.pcb_flags = 0; 1993 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1994 proc0.p_addr->u_pcb.pcb_ext = 0; 1995 proc0.p_frame = &proc0_tf; 1996} 1997 1998#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1999static void f00f_hack(void *unused); 2000SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 2001 2002static void 2003f00f_hack(void *unused) { 2004 struct gate_descriptor *new_idt; 2005#ifndef SMP 2006 struct region_descriptor r_idt; 2007#endif 2008 vm_offset_t tmp; 2009 2010 if (!has_f00f_bug) 2011 return; 2012 2013 GIANT_REQUIRED; 2014 2015 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2016 2017 r_idt.rd_limit = sizeof(idt0) - 1; 2018 2019 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2020 if (tmp == 0) 2021 panic("kmem_alloc returned 0"); 2022 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0) 2023 panic("kmem_alloc returned non-page-aligned memory"); 2024 /* Put the first seven entries in the lower page */ 2025 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8)); 2026 bcopy(idt, new_idt, sizeof(idt0)); 2027 r_idt.rd_base = (int)new_idt; 2028 lidt(&r_idt); 2029 idt = new_idt; 2030 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2031 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2032 panic("vm_map_protect failed"); 2033 return; 2034} 2035#endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2036 2037int 2038ptrace_set_pc(p, addr) 2039 struct proc *p; 2040 unsigned long addr; 2041{ 2042 p->p_frame->tf_eip = addr; 2043 return (0); 2044} 2045 2046int 2047ptrace_single_step(p) 2048 struct proc *p; 2049{ 2050 p->p_frame->tf_eflags |= PSL_T; 2051 return (0); 2052} 2053 2054int ptrace_read_u_check(p, addr, len) 2055 struct proc *p; 2056 vm_offset_t addr; 2057 size_t len; 2058{ 2059 vm_offset_t gap; 2060 2061 if ((vm_offset_t) (addr + len) < addr) 2062 return EPERM; 2063 if ((vm_offset_t) (addr + len) <= sizeof(struct user)) 2064 return 0; 2065 2066 gap = (char *) p->p_frame - (char *) p->p_addr; 2067 2068 if ((vm_offset_t) addr < gap) 2069 return EPERM; 2070 if ((vm_offset_t) (addr + len) <= 2071 (vm_offset_t) (gap + sizeof(struct trapframe))) 2072 return 0; 2073 return EPERM; 2074} 2075 2076int ptrace_write_u(p, off, data) 2077 struct proc *p; 2078 vm_offset_t off; 2079 long data; 2080{ 2081 struct trapframe frame_copy; 2082 vm_offset_t min; 2083 struct trapframe *tp; 2084 2085 /* 2086 * Privileged kernel state is scattered all over the user area. 2087 * Only allow write access to parts of regs and to fpregs. 2088 */ 2089 min = (char *)p->p_frame - (char *)p->p_addr; 2090 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 2091 tp = p->p_frame; 2092 frame_copy = *tp; 2093 *(int *)((char *)&frame_copy + (off - min)) = data; 2094 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 2095 !CS_SECURE(frame_copy.tf_cs)) 2096 return (EINVAL); 2097 *(int*)((char *)p->p_addr + off) = data; 2098 return (0); 2099 } 2100 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_save); 2101 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) { 2102 *(int*)((char *)p->p_addr + off) = data; 2103 return (0); 2104 } 2105 return (EFAULT); 2106} 2107 2108int 2109fill_regs(p, regs) 2110 struct proc *p; 2111 struct reg *regs; 2112{ 2113 struct pcb *pcb; 2114 struct trapframe *tp; 2115 2116 tp = p->p_frame; 2117 regs->r_fs = tp->tf_fs; 2118 regs->r_es = tp->tf_es; 2119 regs->r_ds = tp->tf_ds; 2120 regs->r_edi = tp->tf_edi; 2121 regs->r_esi = tp->tf_esi; 2122 regs->r_ebp = tp->tf_ebp; 2123 regs->r_ebx = tp->tf_ebx; 2124 regs->r_edx = tp->tf_edx; 2125 regs->r_ecx = tp->tf_ecx; 2126 regs->r_eax = tp->tf_eax; 2127 regs->r_eip = tp->tf_eip; 2128 regs->r_cs = tp->tf_cs; 2129 regs->r_eflags = tp->tf_eflags; 2130 regs->r_esp = tp->tf_esp; 2131 regs->r_ss = tp->tf_ss; 2132 pcb = &p->p_addr->u_pcb; 2133 regs->r_gs = pcb->pcb_gs; 2134 return (0); 2135} 2136 2137int 2138set_regs(p, regs) 2139 struct proc *p; 2140 struct reg *regs; 2141{ 2142 struct pcb *pcb; 2143 struct trapframe *tp; 2144 2145 tp = p->p_frame; 2146 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2147 !CS_SECURE(regs->r_cs)) 2148 return (EINVAL); 2149 tp->tf_fs = regs->r_fs; 2150 tp->tf_es = regs->r_es; 2151 tp->tf_ds = regs->r_ds; 2152 tp->tf_edi = regs->r_edi; 2153 tp->tf_esi = regs->r_esi; 2154 tp->tf_ebp = regs->r_ebp; 2155 tp->tf_ebx = regs->r_ebx; 2156 tp->tf_edx = regs->r_edx; 2157 tp->tf_ecx = regs->r_ecx; 2158 tp->tf_eax = regs->r_eax; 2159 tp->tf_eip = regs->r_eip; 2160 tp->tf_cs = regs->r_cs; 2161 tp->tf_eflags = regs->r_eflags; 2162 tp->tf_esp = regs->r_esp; 2163 tp->tf_ss = regs->r_ss; 2164 pcb = &p->p_addr->u_pcb; 2165 pcb->pcb_gs = regs->r_gs; 2166 return (0); 2167} 2168 2169#ifdef CPU_ENABLE_SSE 2170static void 2171fill_fpregs_xmm(sv_xmm, sv_87) 2172 struct savexmm *sv_xmm; 2173 struct save87 *sv_87; 2174{ 2175 register struct env87 *penv_87 = &sv_87->sv_env; 2176 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2177 int i; 2178 2179 /* FPU control/status */ 2180 penv_87->en_cw = penv_xmm->en_cw; 2181 penv_87->en_sw = penv_xmm->en_sw; 2182 penv_87->en_tw = penv_xmm->en_tw; 2183 penv_87->en_fip = penv_xmm->en_fip; 2184 penv_87->en_fcs = penv_xmm->en_fcs; 2185 penv_87->en_opcode = penv_xmm->en_opcode; 2186 penv_87->en_foo = penv_xmm->en_foo; 2187 penv_87->en_fos = penv_xmm->en_fos; 2188 2189 /* FPU registers */ 2190 for (i = 0; i < 8; ++i) 2191 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2192 2193 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw; 2194} 2195 2196static void 2197set_fpregs_xmm(sv_87, sv_xmm) 2198 struct save87 *sv_87; 2199 struct savexmm *sv_xmm; 2200{ 2201 register struct env87 *penv_87 = &sv_87->sv_env; 2202 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2203 int i; 2204 2205 /* FPU control/status */ 2206 penv_xmm->en_cw = penv_87->en_cw; 2207 penv_xmm->en_sw = penv_87->en_sw; 2208 penv_xmm->en_tw = penv_87->en_tw; 2209 penv_xmm->en_fip = penv_87->en_fip; 2210 penv_xmm->en_fcs = penv_87->en_fcs; 2211 penv_xmm->en_opcode = penv_87->en_opcode; 2212 penv_xmm->en_foo = penv_87->en_foo; 2213 penv_xmm->en_fos = penv_87->en_fos; 2214 2215 /* FPU registers */ 2216 for (i = 0; i < 8; ++i) 2217 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2218 2219 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw; 2220} 2221#endif /* CPU_ENABLE_SSE */ 2222 2223int 2224fill_fpregs(p, fpregs) 2225 struct proc *p; 2226 struct fpreg *fpregs; 2227{ 2228#ifdef CPU_ENABLE_SSE 2229 if (cpu_fxsr) { 2230 fill_fpregs_xmm(&p->p_addr->u_pcb.pcb_save.sv_xmm, 2231 (struct save87 *)fpregs); 2232 return (0); 2233 } 2234#endif /* CPU_ENABLE_SSE */ 2235 bcopy(&p->p_addr->u_pcb.pcb_save.sv_87, fpregs, sizeof *fpregs); 2236 return (0); 2237} 2238 2239int 2240set_fpregs(p, fpregs) 2241 struct proc *p; 2242 struct fpreg *fpregs; 2243{ 2244#ifdef CPU_ENABLE_SSE 2245 if (cpu_fxsr) { 2246 set_fpregs_xmm((struct save87 *)fpregs, 2247 &p->p_addr->u_pcb.pcb_save.sv_xmm); 2248 return (0); 2249 } 2250#endif /* CPU_ENABLE_SSE */ 2251 bcopy(fpregs, &p->p_addr->u_pcb.pcb_save.sv_87, sizeof *fpregs); 2252 return (0); 2253} 2254 2255int 2256fill_dbregs(p, dbregs) 2257 struct proc *p; 2258 struct dbreg *dbregs; 2259{ 2260 struct pcb *pcb; 2261 2262 if (p == NULL) { 2263 dbregs->dr0 = rdr0(); 2264 dbregs->dr1 = rdr1(); 2265 dbregs->dr2 = rdr2(); 2266 dbregs->dr3 = rdr3(); 2267 dbregs->dr4 = rdr4(); 2268 dbregs->dr5 = rdr5(); 2269 dbregs->dr6 = rdr6(); 2270 dbregs->dr7 = rdr7(); 2271 } 2272 else { 2273 pcb = &p->p_addr->u_pcb; 2274 dbregs->dr0 = pcb->pcb_dr0; 2275 dbregs->dr1 = pcb->pcb_dr1; 2276 dbregs->dr2 = pcb->pcb_dr2; 2277 dbregs->dr3 = pcb->pcb_dr3; 2278 dbregs->dr4 = 0; 2279 dbregs->dr5 = 0; 2280 dbregs->dr6 = pcb->pcb_dr6; 2281 dbregs->dr7 = pcb->pcb_dr7; 2282 } 2283 return (0); 2284} 2285 2286int 2287set_dbregs(p, dbregs) 2288 struct proc *p; 2289 struct dbreg *dbregs; 2290{ 2291 struct pcb *pcb; 2292 int i; 2293 u_int32_t mask1, mask2; 2294 2295 if (p == NULL) { 2296 load_dr0(dbregs->dr0); 2297 load_dr1(dbregs->dr1); 2298 load_dr2(dbregs->dr2); 2299 load_dr3(dbregs->dr3); 2300 load_dr4(dbregs->dr4); 2301 load_dr5(dbregs->dr5); 2302 load_dr6(dbregs->dr6); 2303 load_dr7(dbregs->dr7); 2304 } 2305 else { 2306 /* 2307 * Don't let an illegal value for dr7 get set. Specifically, 2308 * check for undefined settings. Setting these bit patterns 2309 * result in undefined behaviour and can lead to an unexpected 2310 * TRCTRAP. 2311 */ 2312 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 2313 i++, mask1 <<= 2, mask2 <<= 2) 2314 if ((dbregs->dr7 & mask1) == mask2) 2315 return (EINVAL); 2316 2317 if (dbregs->dr7 & 0x0000fc00) 2318 return (EINVAL); 2319 2320 pcb = &p->p_addr->u_pcb; 2321 2322 /* 2323 * Don't let a process set a breakpoint that is not within the 2324 * process's address space. If a process could do this, it 2325 * could halt the system by setting a breakpoint in the kernel 2326 * (if ddb was enabled). Thus, we need to check to make sure 2327 * that no breakpoints are being enabled for addresses outside 2328 * process's address space, unless, perhaps, we were called by 2329 * uid 0. 2330 * 2331 * XXX - what about when the watched area of the user's 2332 * address space is written into from within the kernel 2333 * ... wouldn't that still cause a breakpoint to be generated 2334 * from within kernel mode? 2335 */ 2336 2337 if (suser(p) != 0) { 2338 if (dbregs->dr7 & 0x3) { 2339 /* dr0 is enabled */ 2340 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS) 2341 return (EINVAL); 2342 } 2343 2344 if (dbregs->dr7 & (0x3<<2)) { 2345 /* dr1 is enabled */ 2346 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS) 2347 return (EINVAL); 2348 } 2349 2350 if (dbregs->dr7 & (0x3<<4)) { 2351 /* dr2 is enabled */ 2352 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS) 2353 return (EINVAL); 2354 } 2355 2356 if (dbregs->dr7 & (0x3<<6)) { 2357 /* dr3 is enabled */ 2358 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS) 2359 return (EINVAL); 2360 } 2361 } 2362 2363 pcb->pcb_dr0 = dbregs->dr0; 2364 pcb->pcb_dr1 = dbregs->dr1; 2365 pcb->pcb_dr2 = dbregs->dr2; 2366 pcb->pcb_dr3 = dbregs->dr3; 2367 pcb->pcb_dr6 = dbregs->dr6; 2368 pcb->pcb_dr7 = dbregs->dr7; 2369 2370 pcb->pcb_flags |= PCB_DBREGS; 2371 } 2372 2373 return (0); 2374} 2375 2376/* 2377 * Return > 0 if a hardware breakpoint has been hit, and the 2378 * breakpoint was in user space. Return 0, otherwise. 2379 */ 2380int 2381user_dbreg_trap(void) 2382{ 2383 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2384 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2385 int nbp; /* number of breakpoints that triggered */ 2386 caddr_t addr[4]; /* breakpoint addresses */ 2387 int i; 2388 2389 dr7 = rdr7(); 2390 if ((dr7 & 0x000000ff) == 0) { 2391 /* 2392 * all GE and LE bits in the dr7 register are zero, 2393 * thus the trap couldn't have been caused by the 2394 * hardware debug registers 2395 */ 2396 return 0; 2397 } 2398 2399 nbp = 0; 2400 dr6 = rdr6(); 2401 bp = dr6 & 0x0000000f; 2402 2403 if (!bp) { 2404 /* 2405 * None of the breakpoint bits are set meaning this 2406 * trap was not caused by any of the debug registers 2407 */ 2408 return 0; 2409 } 2410 2411 /* 2412 * at least one of the breakpoints were hit, check to see 2413 * which ones and if any of them are user space addresses 2414 */ 2415 2416 if (bp & 0x01) { 2417 addr[nbp++] = (caddr_t)rdr0(); 2418 } 2419 if (bp & 0x02) { 2420 addr[nbp++] = (caddr_t)rdr1(); 2421 } 2422 if (bp & 0x04) { 2423 addr[nbp++] = (caddr_t)rdr2(); 2424 } 2425 if (bp & 0x08) { 2426 addr[nbp++] = (caddr_t)rdr3(); 2427 } 2428 2429 for (i=0; i<nbp; i++) { 2430 if (addr[i] < 2431 (caddr_t)VM_MAXUSER_ADDRESS) { 2432 /* 2433 * addr[i] is in user space 2434 */ 2435 return nbp; 2436 } 2437 } 2438 2439 /* 2440 * None of the breakpoints are in user space. 2441 */ 2442 return 0; 2443} 2444 2445 2446#ifndef DDB 2447void 2448Debugger(const char *msg) 2449{ 2450 printf("Debugger(\"%s\") called.\n", msg); 2451} 2452#endif /* no DDB */ 2453 2454#include <sys/disklabel.h> 2455 2456/* 2457 * Determine the size of the transfer, and make sure it is 2458 * within the boundaries of the partition. Adjust transfer 2459 * if needed, and signal errors or early completion. 2460 */ 2461int 2462bounds_check_with_label(struct bio *bp, struct disklabel *lp, int wlabel) 2463{ 2464 struct partition *p = lp->d_partitions + dkpart(bp->bio_dev); 2465 int labelsect = lp->d_partitions[0].p_offset; 2466 int maxsz = p->p_size, 2467 sz = (bp->bio_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 2468 2469 /* overwriting disk label ? */ 2470 /* XXX should also protect bootstrap in first 8K */ 2471 if (bp->bio_blkno + p->p_offset <= LABELSECTOR + labelsect && 2472#if LABELSECTOR != 0 2473 bp->bio_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 2474#endif 2475 (bp->bio_cmd == BIO_WRITE) && wlabel == 0) { 2476 bp->bio_error = EROFS; 2477 goto bad; 2478 } 2479 2480#if defined(DOSBBSECTOR) && defined(notyet) 2481 /* overwriting master boot record? */ 2482 if (bp->bio_blkno + p->p_offset <= DOSBBSECTOR && 2483 (bp->bio_cmd == BIO_WRITE) && wlabel == 0) { 2484 bp->bio_error = EROFS; 2485 goto bad; 2486 } 2487#endif 2488 2489 /* beyond partition? */ 2490 if (bp->bio_blkno < 0 || bp->bio_blkno + sz > maxsz) { 2491 /* if exactly at end of disk, return an EOF */ 2492 if (bp->bio_blkno == maxsz) { 2493 bp->bio_resid = bp->bio_bcount; 2494 return(0); 2495 } 2496 /* or truncate if part of it fits */ 2497 sz = maxsz - bp->bio_blkno; 2498 if (sz <= 0) { 2499 bp->bio_error = EINVAL; 2500 goto bad; 2501 } 2502 bp->bio_bcount = sz << DEV_BSHIFT; 2503 } 2504 2505 bp->bio_pblkno = bp->bio_blkno + p->p_offset; 2506 return(1); 2507 2508bad: 2509 bp->bio_flags |= BIO_ERROR; 2510 return(-1); 2511} 2512 2513#ifdef DDB 2514 2515/* 2516 * Provide inb() and outb() as functions. They are normally only 2517 * available as macros calling inlined functions, thus cannot be 2518 * called inside DDB. 2519 * 2520 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2521 */ 2522 2523#undef inb 2524#undef outb 2525 2526/* silence compiler warnings */ 2527u_char inb(u_int); 2528void outb(u_int, u_char); 2529 2530u_char 2531inb(u_int port) 2532{ 2533 u_char data; 2534 /* 2535 * We use %%dx and not %1 here because i/o is done at %dx and not at 2536 * %edx, while gcc generates inferior code (movw instead of movl) 2537 * if we tell it to load (u_short) port. 2538 */ 2539 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2540 return (data); 2541} 2542 2543void 2544outb(u_int port, u_char data) 2545{ 2546 u_char al; 2547 /* 2548 * Use an unnecessary assignment to help gcc's register allocator. 2549 * This make a large difference for gcc-1.40 and a tiny difference 2550 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2551 * best results. gcc-2.6.0 can't handle this. 2552 */ 2553 al = data; 2554 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2555} 2556 2557#endif /* DDB */ 2558