machdep.c revision 44510
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.326 1999/02/13 17:45:15 bde Exp $ 39 */ 40 41#include "apm.h" 42#include "ether.h" 43#include "npx.h" 44#include "opt_atalk.h" 45#include "opt_cpu.h" 46#include "opt_ddb.h" 47#include "opt_inet.h" 48#include "opt_ipx.h" 49#include "opt_maxmem.h" 50#include "opt_msgbuf.h" 51#include "opt_perfmon.h" 52#include "opt_smp.h" 53#include "opt_sysvipc.h" 54#include "opt_user_ldt.h" 55#include "opt_userconfig.h" 56#include "opt_vm86.h" 57 58#include <sys/param.h> 59#include <sys/systm.h> 60#include <sys/sysproto.h> 61#include <sys/signalvar.h> 62#include <sys/kernel.h> 63#include <sys/linker.h> 64#include <sys/proc.h> 65#include <sys/buf.h> 66#include <sys/reboot.h> 67#include <sys/callout.h> 68#include <sys/malloc.h> 69#include <sys/mbuf.h> 70#include <sys/msgbuf.h> 71#include <sys/sysent.h> 72#include <sys/sysctl.h> 73#include <sys/vmmeter.h> 74 75#ifdef SYSVSHM 76#include <sys/shm.h> 77#endif 78 79#ifdef SYSVMSG 80#include <sys/msg.h> 81#endif 82 83#ifdef SYSVSEM 84#include <sys/sem.h> 85#endif 86 87#include <vm/vm.h> 88#include <vm/vm_param.h> 89#include <vm/vm_prot.h> 90#include <sys/lock.h> 91#include <vm/vm_kern.h> 92#include <vm/vm_object.h> 93#include <vm/vm_page.h> 94#include <vm/vm_map.h> 95#include <vm/vm_pager.h> 96#include <vm/vm_extern.h> 97 98#include <sys/user.h> 99#include <sys/exec.h> 100 101#include <ddb/ddb.h> 102 103#if defined(INET) || defined(IPX) || defined(NATM) || defined(NETATALK) \ 104 || NETHER > 0 || defined(NS) 105#define NETISR 106#endif 107 108#ifdef NETISR 109#include <net/netisr.h> 110#endif 111 112#include <machine/cpu.h> 113#include <machine/reg.h> 114#include <machine/clock.h> 115#include <machine/specialreg.h> 116#include <machine/cons.h> 117#include <machine/bootinfo.h> 118#include <machine/ipl.h> 119#include <machine/md_var.h> 120#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 121#ifdef SMP 122#include <machine/smp.h> 123#endif 124#ifdef PERFMON 125#include <machine/perfmon.h> 126#endif 127 128#include <i386/isa/isa_device.h> 129#include <i386/isa/intr_machdep.h> 130#ifndef VM86 131#include <i386/isa/rtc.h> 132#endif 133#include <machine/random.h> 134#include <sys/ptrace.h> 135 136extern void init386 __P((int first)); 137extern void dblfault_handler __P((void)); 138 139extern void printcpuinfo(void); /* XXX header file */ 140extern void earlysetcpuclass(void); /* same header file */ 141extern void finishidentcpu(void); 142extern void panicifcpuunsupported(void); 143extern void initializecpu(void); 144 145static void cpu_startup __P((void *)); 146SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 147 148static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf"); 149 150int _udatasel, _ucodesel; 151u_int atdevbase; 152 153#if defined(SWTCH_OPTIM_STATS) 154extern int swtch_optim_stats; 155SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 156 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 157SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 158 CTLFLAG_RD, &tlb_flush_count, 0, ""); 159#endif 160 161#ifdef PC98 162static int ispc98 = 1; 163#else 164static int ispc98 = 0; 165#endif 166SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 167 168int physmem = 0; 169int cold = 1; 170 171static int 172sysctl_hw_physmem SYSCTL_HANDLER_ARGS 173{ 174 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 175 return (error); 176} 177 178SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 179 0, 0, sysctl_hw_physmem, "I", ""); 180 181static int 182sysctl_hw_usermem SYSCTL_HANDLER_ARGS 183{ 184 int error = sysctl_handle_int(oidp, 0, 185 ctob(physmem - cnt.v_wire_count), req); 186 return (error); 187} 188 189SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 190 0, 0, sysctl_hw_usermem, "I", ""); 191 192static int 193sysctl_hw_availpages SYSCTL_HANDLER_ARGS 194{ 195 int error = sysctl_handle_int(oidp, 0, 196 i386_btop(avail_end - avail_start), req); 197 return (error); 198} 199 200SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD, 201 0, 0, sysctl_hw_availpages, "I", ""); 202 203static int 204sysctl_machdep_msgbuf SYSCTL_HANDLER_ARGS 205{ 206 int error; 207 208 /* Unwind the buffer, so that it's linear (possibly starting with 209 * some initial nulls). 210 */ 211 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr, 212 msgbufp->msg_size-msgbufp->msg_bufr,req); 213 if(error) return(error); 214 if(msgbufp->msg_bufr>0) { 215 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr, 216 msgbufp->msg_bufr,req); 217 } 218 return(error); 219} 220 221SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD, 222 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer"); 223 224static int msgbuf_clear; 225 226static int 227sysctl_machdep_msgbuf_clear SYSCTL_HANDLER_ARGS 228{ 229 int error; 230 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 231 req); 232 if (!error && req->newptr) { 233 /* Clear the buffer and reset write pointer */ 234 bzero(msgbufp->msg_ptr,msgbufp->msg_size); 235 msgbufp->msg_bufr=msgbufp->msg_bufx=0; 236 msgbuf_clear=0; 237 } 238 return (error); 239} 240 241SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW, 242 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I", 243 "Clear kernel message buffer"); 244 245int bootverbose = 0, Maxmem = 0; 246long dumplo; 247 248vm_offset_t phys_avail[10]; 249 250/* must be 2 less so 0 0 can signal end of chunks */ 251#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 252 253#ifdef NETISR 254static void setup_netisrs __P((struct linker_set *)); 255#endif 256 257static vm_offset_t buffer_sva, buffer_eva; 258vm_offset_t clean_sva, clean_eva; 259static vm_offset_t pager_sva, pager_eva; 260#ifdef NETISR 261extern struct linker_set netisr_set; 262#endif 263#if NNPX > 0 264extern struct isa_driver npxdriver; 265#endif 266 267#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 268 269static void 270cpu_startup(dummy) 271 void *dummy; 272{ 273 register unsigned i; 274 register caddr_t v; 275 vm_offset_t maxaddr; 276 vm_size_t size = 0; 277 int firstaddr; 278 vm_offset_t minaddr; 279 280 if (boothowto & RB_VERBOSE) 281 bootverbose++; 282 283 /* 284 * Good {morning,afternoon,evening,night}. 285 */ 286 printf(version); 287 earlysetcpuclass(); 288 startrtclock(); 289 printcpuinfo(); 290 panicifcpuunsupported(); 291#ifdef PERFMON 292 perfmon_init(); 293#endif 294 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 295 /* 296 * Display any holes after the first chunk of extended memory. 297 */ 298 if (bootverbose) { 299 int indx; 300 301 printf("Physical memory chunk(s):\n"); 302 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 303 int size1 = phys_avail[indx + 1] - phys_avail[indx]; 304 305 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n", 306 phys_avail[indx], phys_avail[indx + 1] - 1, size1, 307 size1 / PAGE_SIZE); 308 } 309 } 310 311#ifdef NETISR 312 /* 313 * Quickly wire in netisrs. 314 */ 315 setup_netisrs(&netisr_set); 316#endif 317 318 /* 319 * Calculate callout wheel size 320 */ 321 for (callwheelsize = 1, callwheelbits = 0; 322 callwheelsize < ncallout; 323 callwheelsize <<= 1, ++callwheelbits) 324 ; 325 callwheelmask = callwheelsize - 1; 326 327 /* 328 * Allocate space for system data structures. 329 * The first available kernel virtual address is in "v". 330 * As pages of kernel virtual memory are allocated, "v" is incremented. 331 * As pages of memory are allocated and cleared, 332 * "firstaddr" is incremented. 333 * An index into the kernel page table corresponding to the 334 * virtual memory address maintained in "v" is kept in "mapaddr". 335 */ 336 337 /* 338 * Make two passes. The first pass calculates how much memory is 339 * needed and allocates it. The second pass assigns virtual 340 * addresses to the various data structures. 341 */ 342 firstaddr = 0; 343again: 344 v = (caddr_t)firstaddr; 345 346#define valloc(name, type, num) \ 347 (name) = (type *)v; v = (caddr_t)((name)+(num)) 348#define valloclim(name, type, num, lim) \ 349 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 350 351 valloc(callout, struct callout, ncallout); 352 valloc(callwheel, struct callout_tailq, callwheelsize); 353#ifdef SYSVSHM 354 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 355#endif 356#ifdef SYSVSEM 357 valloc(sema, struct semid_ds, seminfo.semmni); 358 valloc(sem, struct sem, seminfo.semmns); 359 /* This is pretty disgusting! */ 360 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 361#endif 362#ifdef SYSVMSG 363 valloc(msgpool, char, msginfo.msgmax); 364 valloc(msgmaps, struct msgmap, msginfo.msgseg); 365 valloc(msghdrs, struct msg, msginfo.msgtql); 366 valloc(msqids, struct msqid_ds, msginfo.msgmni); 367#endif 368 369 if (nbuf == 0) { 370 nbuf = 30; 371 if( physmem > 1024) 372 nbuf += min((physmem - 1024) / 8, 2048); 373 } 374 nswbuf = max(min(nbuf/4, 64), 16); 375 376 valloc(swbuf, struct buf, nswbuf); 377 valloc(buf, struct buf, nbuf); 378 379 380 /* 381 * End of first pass, size has been calculated so allocate memory 382 */ 383 if (firstaddr == 0) { 384 size = (vm_size_t)(v - firstaddr); 385 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 386 if (firstaddr == 0) 387 panic("startup: no room for tables"); 388 goto again; 389 } 390 391 /* 392 * End of second pass, addresses have been assigned 393 */ 394 if ((vm_size_t)(v - firstaddr) != size) 395 panic("startup: table size inconsistency"); 396 397 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 398 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size); 399 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 400 (nbuf*BKVASIZE)); 401 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 402 (nswbuf*MAXPHYS) + pager_map_size); 403 pager_map->system_map = 1; 404 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 405 (16*(ARG_MAX+(PAGE_SIZE*3)))); 406 407 /* 408 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 409 * we use the more space efficient malloc in place of kmem_alloc. 410 */ 411 { 412 vm_offset_t mb_map_size; 413 int xclusters; 414 415 /* Allow override of NMBCLUSTERS from the kernel environment */ 416 if (getenv_int("kern.ipc.nmbclusters", &xclusters) && 417 xclusters > nmbclusters) 418 nmbclusters = xclusters; 419 420 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 421 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 422 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 423 bzero(mclrefcnt, mb_map_size / MCLBYTES); 424 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 425 mb_map_size); 426 mb_map->system_map = 1; 427 } 428 429 /* 430 * Initialize callouts 431 */ 432 SLIST_INIT(&callfree); 433 for (i = 0; i < ncallout; i++) { 434 callout_init(&callout[i]); 435 callout[i].c_flags = CALLOUT_LOCAL_ALLOC; 436 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle); 437 } 438 439 for (i = 0; i < callwheelsize; i++) { 440 TAILQ_INIT(&callwheel[i]); 441 } 442 443#if defined(USERCONFIG) 444 userconfig(); 445 cninit(); /* the preferred console may have changed */ 446#endif 447 448 printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count), 449 ptoa(cnt.v_free_count) / 1024); 450 451 /* 452 * Set up buffers, so they can be used to read disk labels. 453 */ 454 bufinit(); 455 vm_pager_bufferinit(); 456 457#ifdef SMP 458 /* 459 * OK, enough kmem_alloc/malloc state should be up, lets get on with it! 460 */ 461 mp_start(); /* fire up the APs and APICs */ 462 mp_announce(); 463#endif /* SMP */ 464} 465 466#ifdef NETISR 467int 468register_netisr(num, handler) 469 int num; 470 netisr_t *handler; 471{ 472 473 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 474 printf("register_netisr: bad isr number: %d\n", num); 475 return (EINVAL); 476 } 477 netisrs[num] = handler; 478 return (0); 479} 480 481static void 482setup_netisrs(ls) 483 struct linker_set *ls; 484{ 485 int i; 486 const struct netisrtab *nit; 487 488 for(i = 0; ls->ls_items[i]; i++) { 489 nit = (const struct netisrtab *)ls->ls_items[i]; 490 register_netisr(nit->nit_num, nit->nit_isr); 491 } 492} 493#endif /* NETISR */ 494 495/* 496 * Send an interrupt to process. 497 * 498 * Stack is set up to allow sigcode stored 499 * at top to call routine, followed by kcall 500 * to sigreturn routine below. After sigreturn 501 * resets the signal mask, the stack, and the 502 * frame pointer, it returns to the user 503 * specified pc, psl. 504 */ 505void 506sendsig(catcher, sig, mask, code) 507 sig_t catcher; 508 int sig, mask; 509 u_long code; 510{ 511 register struct proc *p = curproc; 512 register struct trapframe *regs; 513 register struct sigframe *fp; 514 struct sigframe sf; 515 struct sigacts *psp = p->p_sigacts; 516 int oonstack; 517 518 regs = p->p_md.md_regs; 519 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 520 /* 521 * Allocate and validate space for the signal handler context. 522 */ 523 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 524 (psp->ps_sigonstack & sigmask(sig))) { 525 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 526 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 527 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 528 } else { 529 fp = (struct sigframe *)regs->tf_esp - 1; 530 } 531 532 /* 533 * grow() will return FALSE if the fp will not fit inside the stack 534 * and the stack can not be grown. useracc will return FALSE 535 * if access is denied. 536 */ 537#ifdef VM_STACK 538 if ((grow_stack (p, (int)fp) == FALSE) || 539#else 540 if ((grow(p, (int)fp) == FALSE) || 541#endif 542 (useracc((caddr_t)fp, sizeof(struct sigframe), B_WRITE) == FALSE)) { 543 /* 544 * Process has trashed its stack; give it an illegal 545 * instruction to halt it in its tracks. 546 */ 547 SIGACTION(p, SIGILL) = SIG_DFL; 548 sig = sigmask(SIGILL); 549 p->p_sigignore &= ~sig; 550 p->p_sigcatch &= ~sig; 551 p->p_sigmask &= ~sig; 552 psignal(p, SIGILL); 553 return; 554 } 555 556 /* 557 * Build the argument list for the signal handler. 558 */ 559 if (p->p_sysent->sv_sigtbl) { 560 if (sig < p->p_sysent->sv_sigsize) 561 sig = p->p_sysent->sv_sigtbl[sig]; 562 else 563 sig = p->p_sysent->sv_sigsize + 1; 564 } 565 sf.sf_signum = sig; 566 sf.sf_code = code; 567 sf.sf_scp = &fp->sf_sc; 568 sf.sf_addr = (char *) regs->tf_err; 569 sf.sf_handler = catcher; 570 571 /* save scratch registers */ 572 sf.sf_sc.sc_eax = regs->tf_eax; 573 sf.sf_sc.sc_ebx = regs->tf_ebx; 574 sf.sf_sc.sc_ecx = regs->tf_ecx; 575 sf.sf_sc.sc_edx = regs->tf_edx; 576 sf.sf_sc.sc_esi = regs->tf_esi; 577 sf.sf_sc.sc_edi = regs->tf_edi; 578 sf.sf_sc.sc_cs = regs->tf_cs; 579 sf.sf_sc.sc_ds = regs->tf_ds; 580 sf.sf_sc.sc_ss = regs->tf_ss; 581 sf.sf_sc.sc_es = regs->tf_es; 582 sf.sf_sc.sc_isp = regs->tf_isp; 583 584 /* 585 * Build the signal context to be used by sigreturn. 586 */ 587 sf.sf_sc.sc_onstack = oonstack; 588 sf.sf_sc.sc_mask = mask; 589 sf.sf_sc.sc_sp = regs->tf_esp; 590 sf.sf_sc.sc_fp = regs->tf_ebp; 591 sf.sf_sc.sc_pc = regs->tf_eip; 592 sf.sf_sc.sc_ps = regs->tf_eflags; 593 sf.sf_sc.sc_trapno = regs->tf_trapno; 594 sf.sf_sc.sc_err = regs->tf_err; 595 596#ifdef VM86 597 /* 598 * If we're a vm86 process, we want to save the segment registers. 599 * We also change eflags to be our emulated eflags, not the actual 600 * eflags. 601 */ 602 if (regs->tf_eflags & PSL_VM) { 603 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 604 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 605 606 sf.sf_sc.sc_gs = tf->tf_vm86_gs; 607 sf.sf_sc.sc_fs = tf->tf_vm86_fs; 608 sf.sf_sc.sc_es = tf->tf_vm86_es; 609 sf.sf_sc.sc_ds = tf->tf_vm86_ds; 610 611 if (vm86->vm86_has_vme == 0) 612 sf.sf_sc.sc_ps = (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) 613 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 614 615 /* 616 * We should never have PSL_T set when returning from vm86 617 * mode. It may be set here if we deliver a signal before 618 * getting to vm86 mode, so turn it off. 619 * 620 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 621 * syscalls made by the signal handler. This just avoids 622 * wasting time for our lazy fixup of such faults. PSL_NT 623 * does nothing in vm86 mode, but vm86 programs can set it 624 * almost legitimately in probes for old cpu types. 625 */ 626 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_T | PSL_VIF | PSL_VIP); 627 } 628#endif /* VM86 */ 629 630 /* 631 * Copy the sigframe out to the user's stack. 632 */ 633 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 634 /* 635 * Something is wrong with the stack pointer. 636 * ...Kill the process. 637 */ 638 sigexit(p, SIGILL); 639 } 640 641 regs->tf_esp = (int)fp; 642 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 643 regs->tf_cs = _ucodesel; 644 regs->tf_ds = _udatasel; 645 regs->tf_es = _udatasel; 646 regs->tf_ss = _udatasel; 647} 648 649/* 650 * System call to cleanup state after a signal 651 * has been taken. Reset signal mask and 652 * stack state from context left by sendsig (above). 653 * Return to previous pc and psl as specified by 654 * context left by sendsig. Check carefully to 655 * make sure that the user has not modified the 656 * state to gain improper privileges. 657 */ 658int 659sigreturn(p, uap) 660 struct proc *p; 661 struct sigreturn_args /* { 662 struct sigcontext *sigcntxp; 663 } */ *uap; 664{ 665 register struct sigcontext *scp; 666 register struct sigframe *fp; 667 register struct trapframe *regs = p->p_md.md_regs; 668 int eflags; 669 670 /* 671 * (XXX old comment) regs->tf_esp points to the return address. 672 * The user scp pointer is above that. 673 * The return address is faked in the signal trampoline code 674 * for consistency. 675 */ 676 scp = uap->sigcntxp; 677 fp = (struct sigframe *) 678 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 679 680 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 681 return(EFAULT); 682 683 eflags = scp->sc_ps; 684#ifdef VM86 685 if (eflags & PSL_VM) { 686 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 687 struct vm86_kernel *vm86; 688 689 /* 690 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 691 * set up the vm86 area, and we can't enter vm86 mode. 692 */ 693 if (p->p_addr->u_pcb.pcb_ext == 0) 694 return (EINVAL); 695 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 696 if (vm86->vm86_inited == 0) 697 return (EINVAL); 698 699 /* go back to user mode if both flags are set */ 700 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 701 trapsignal(p, SIGBUS, 0); 702 703 if (vm86->vm86_has_vme) { 704 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 705 (eflags & VME_USERCHANGE) | PSL_VM; 706 } else { 707 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 708 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 709 } 710 tf->tf_vm86_ds = scp->sc_ds; 711 tf->tf_vm86_es = scp->sc_es; 712 tf->tf_vm86_fs = scp->sc_fs; 713 tf->tf_vm86_gs = scp->sc_gs; 714 tf->tf_ds = _udatasel; 715 tf->tf_es = _udatasel; 716 } else { 717#endif /* VM86 */ 718 /* 719 * Don't allow users to change privileged or reserved flags. 720 */ 721#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 722 /* 723 * XXX do allow users to change the privileged flag PSL_RF. 724 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 725 * should sometimes set it there too. tf_eflags is kept in 726 * the signal context during signal handling and there is no 727 * other place to remember it, so the PSL_RF bit may be 728 * corrupted by the signal handler without us knowing. 729 * Corruption of the PSL_RF bit at worst causes one more or 730 * one less debugger trap, so allowing it is fairly harmless. 731 */ 732 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 733#ifdef DEBUG 734 printf("sigreturn: eflags = 0x%x\n", eflags); 735#endif 736 return(EINVAL); 737 } 738 739 /* 740 * Don't allow users to load a valid privileged %cs. Let the 741 * hardware check for invalid selectors, excess privilege in 742 * other selectors, invalid %eip's and invalid %esp's. 743 */ 744#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 745 if (!CS_SECURE(scp->sc_cs)) { 746#ifdef DEBUG 747 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 748#endif 749 trapsignal(p, SIGBUS, T_PROTFLT); 750 return(EINVAL); 751 } 752 regs->tf_ds = scp->sc_ds; 753 regs->tf_es = scp->sc_es; 754#ifdef VM86 755 } 756#endif 757 758 /* restore scratch registers */ 759 regs->tf_eax = scp->sc_eax; 760 regs->tf_ebx = scp->sc_ebx; 761 regs->tf_ecx = scp->sc_ecx; 762 regs->tf_edx = scp->sc_edx; 763 regs->tf_esi = scp->sc_esi; 764 regs->tf_edi = scp->sc_edi; 765 regs->tf_cs = scp->sc_cs; 766 regs->tf_ss = scp->sc_ss; 767 regs->tf_isp = scp->sc_isp; 768 769 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 770 return(EINVAL); 771 772 if (scp->sc_onstack & 01) 773 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 774 else 775 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 776 p->p_sigmask = scp->sc_mask & ~sigcantmask; 777 regs->tf_ebp = scp->sc_fp; 778 regs->tf_esp = scp->sc_sp; 779 regs->tf_eip = scp->sc_pc; 780 regs->tf_eflags = eflags; 781 return(EJUSTRETURN); 782} 783 784/* 785 * Machine dependent boot() routine 786 * 787 * I haven't seen anything to put here yet 788 * Possibly some stuff might be grafted back here from boot() 789 */ 790void 791cpu_boot(int howto) 792{ 793} 794 795/* 796 * Shutdown the CPU as much as possible 797 */ 798void 799cpu_halt(void) 800{ 801 for (;;) 802 __asm__ ("hlt"); 803} 804 805/* 806 * Clear registers on exec 807 */ 808void 809setregs(p, entry, stack) 810 struct proc *p; 811 u_long entry; 812 u_long stack; 813{ 814 struct trapframe *regs = p->p_md.md_regs; 815 struct pcb *pcb = &p->p_addr->u_pcb; 816 817#ifdef USER_LDT 818 /* was i386_user_cleanup() in NetBSD */ 819 if (pcb->pcb_ldt) { 820 if (pcb == curpcb) { 821 lldt(_default_ldt); 822 currentldt = _default_ldt; 823 } 824 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 825 pcb->pcb_ldt_len * sizeof(union descriptor)); 826 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 827 } 828#endif 829 830 bzero((char *)regs, sizeof(struct trapframe)); 831 regs->tf_eip = entry; 832 regs->tf_esp = stack; 833 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 834 regs->tf_ss = _udatasel; 835 regs->tf_ds = _udatasel; 836 regs->tf_es = _udatasel; 837 regs->tf_cs = _ucodesel; 838 839 /* reset %fs and %gs as well */ 840 pcb->pcb_fs = _udatasel; 841 pcb->pcb_gs = _udatasel; 842 if (pcb == curpcb) { 843 __asm("movw %w0,%%fs" : : "r" (_udatasel)); 844 __asm("movw %w0,%%gs" : : "r" (_udatasel)); 845 } 846 847 /* 848 * Initialize the math emulator (if any) for the current process. 849 * Actually, just clear the bit that says that the emulator has 850 * been initialized. Initialization is delayed until the process 851 * traps to the emulator (if it is done at all) mainly because 852 * emulators don't provide an entry point for initialization. 853 */ 854 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 855 856 /* 857 * Arrange to trap the next npx or `fwait' instruction (see npx.c 858 * for why fwait must be trapped at least if there is an npx or an 859 * emulator). This is mainly to handle the case where npx0 is not 860 * configured, since the npx routines normally set up the trap 861 * otherwise. It should be done only at boot time, but doing it 862 * here allows modifying `npx_exists' for testing the emulator on 863 * systems with an npx. 864 */ 865 load_cr0(rcr0() | CR0_MP | CR0_TS); 866 867#if NNPX > 0 868 /* Initialize the npx (if any) for the current process. */ 869 npxinit(__INITIAL_NPXCW__); 870#endif 871 872 /* 873 * XXX - Linux emulator 874 * Make sure sure edx is 0x0 on entry. Linux binaries depend 875 * on it. 876 */ 877 p->p_retval[1] = 0; 878} 879 880static int 881sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 882{ 883 int error; 884 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 885 req); 886 if (!error && req->newptr) 887 resettodr(); 888 return (error); 889} 890 891SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 892 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 893 894SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 895 CTLFLAG_RW, &disable_rtc_set, 0, ""); 896 897SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 898 CTLFLAG_RD, &bootinfo, bootinfo, ""); 899 900SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 901 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 902 903/* 904 * Initialize 386 and configure to run kernel 905 */ 906 907/* 908 * Initialize segments & interrupt table 909 */ 910 911int _default_ldt; 912#ifdef SMP 913union descriptor gdt[NGDT + NCPU]; /* global descriptor table */ 914#else 915union descriptor gdt[NGDT]; /* global descriptor table */ 916#endif 917struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 918union descriptor ldt[NLDT]; /* local descriptor table */ 919#ifdef SMP 920/* table descriptors - used to load tables by microp */ 921struct region_descriptor r_gdt, r_idt; 922#endif 923 924extern struct i386tss common_tss; /* One tss per cpu */ 925#ifdef VM86 926extern struct segment_descriptor common_tssd; 927extern int private_tss; /* flag indicating private tss */ 928extern u_int my_tr; /* which task register setting */ 929#endif /* VM86 */ 930 931#if defined(I586_CPU) && !defined(NO_F00F_HACK) 932struct gate_descriptor *t_idt; 933extern int has_f00f_bug; 934#endif 935 936static struct i386tss dblfault_tss; 937static char dblfault_stack[PAGE_SIZE]; 938 939extern struct user *proc0paddr; 940 941 942/* software prototypes -- in more palatable form */ 943struct soft_segment_descriptor gdt_segs[ 944#ifdef SMP 945 NGDT + NCPU 946#endif 947 ] = { 948/* GNULL_SEL 0 Null Descriptor */ 949{ 0x0, /* segment base address */ 950 0x0, /* length */ 951 0, /* segment type */ 952 0, /* segment descriptor priority level */ 953 0, /* segment descriptor present */ 954 0, 0, 955 0, /* default 32 vs 16 bit size */ 956 0 /* limit granularity (byte/page units)*/ }, 957/* GCODE_SEL 1 Code Descriptor for kernel */ 958{ 0x0, /* segment base address */ 959 0xfffff, /* length - all address space */ 960 SDT_MEMERA, /* segment type */ 961 0, /* segment descriptor priority level */ 962 1, /* segment descriptor present */ 963 0, 0, 964 1, /* default 32 vs 16 bit size */ 965 1 /* limit granularity (byte/page units)*/ }, 966/* GDATA_SEL 2 Data Descriptor for kernel */ 967{ 0x0, /* segment base address */ 968 0xfffff, /* length - all address space */ 969 SDT_MEMRWA, /* segment type */ 970 0, /* segment descriptor priority level */ 971 1, /* segment descriptor present */ 972 0, 0, 973 1, /* default 32 vs 16 bit size */ 974 1 /* limit granularity (byte/page units)*/ }, 975/* GLDT_SEL 3 LDT Descriptor */ 976{ (int) ldt, /* segment base address */ 977 sizeof(ldt)-1, /* length - all address space */ 978 SDT_SYSLDT, /* segment type */ 979 SEL_UPL, /* segment descriptor priority level */ 980 1, /* segment descriptor present */ 981 0, 0, 982 0, /* unused - default 32 vs 16 bit size */ 983 0 /* limit granularity (byte/page units)*/ }, 984/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 985{ 0x0, /* segment base address */ 986 0x0, /* length - all address space */ 987 0, /* segment type */ 988 0, /* segment descriptor priority level */ 989 0, /* segment descriptor present */ 990 0, 0, 991 0, /* default 32 vs 16 bit size */ 992 0 /* limit granularity (byte/page units)*/ }, 993/* GPANIC_SEL 5 Panic Tss Descriptor */ 994{ (int) &dblfault_tss, /* segment base address */ 995 sizeof(struct i386tss)-1,/* length - all address space */ 996 SDT_SYS386TSS, /* segment type */ 997 0, /* segment descriptor priority level */ 998 1, /* segment descriptor present */ 999 0, 0, 1000 0, /* unused - default 32 vs 16 bit size */ 1001 0 /* limit granularity (byte/page units)*/ }, 1002/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 1003{ 1004 (int) &common_tss, /* segment base address */ 1005 sizeof(struct i386tss)-1,/* length - all address space */ 1006 SDT_SYS386TSS, /* segment type */ 1007 0, /* segment descriptor priority level */ 1008 1, /* segment descriptor present */ 1009 0, 0, 1010 0, /* unused - default 32 vs 16 bit size */ 1011 0 /* limit granularity (byte/page units)*/ }, 1012/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 1013{ (int) ldt, /* segment base address */ 1014 (512 * sizeof(union descriptor)-1), /* length */ 1015 SDT_SYSLDT, /* segment type */ 1016 0, /* segment descriptor priority level */ 1017 1, /* segment descriptor present */ 1018 0, 0, 1019 0, /* unused - default 32 vs 16 bit size */ 1020 0 /* limit granularity (byte/page units)*/ }, 1021/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 1022{ 0, /* segment base address (overwritten by APM) */ 1023 0xfffff, /* length */ 1024 SDT_MEMERA, /* segment type */ 1025 0, /* segment descriptor priority level */ 1026 1, /* segment descriptor present */ 1027 0, 0, 1028 1, /* default 32 vs 16 bit size */ 1029 1 /* limit granularity (byte/page units)*/ }, 1030/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 1031{ 0, /* segment base address (overwritten by APM) */ 1032 0xfffff, /* length */ 1033 SDT_MEMERA, /* segment type */ 1034 0, /* segment descriptor priority level */ 1035 1, /* segment descriptor present */ 1036 0, 0, 1037 0, /* default 32 vs 16 bit size */ 1038 1 /* limit granularity (byte/page units)*/ }, 1039/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 1040{ 0, /* segment base address (overwritten by APM) */ 1041 0xfffff, /* length */ 1042 SDT_MEMRWA, /* segment type */ 1043 0, /* segment descriptor priority level */ 1044 1, /* segment descriptor present */ 1045 0, 0, 1046 1, /* default 32 vs 16 bit size */ 1047 1 /* limit granularity (byte/page units)*/ }, 1048}; 1049 1050static struct soft_segment_descriptor ldt_segs[] = { 1051 /* Null Descriptor - overwritten by call gate */ 1052{ 0x0, /* segment base address */ 1053 0x0, /* length - all address space */ 1054 0, /* segment type */ 1055 0, /* segment descriptor priority level */ 1056 0, /* segment descriptor present */ 1057 0, 0, 1058 0, /* default 32 vs 16 bit size */ 1059 0 /* limit granularity (byte/page units)*/ }, 1060 /* Null Descriptor - overwritten by call gate */ 1061{ 0x0, /* segment base address */ 1062 0x0, /* length - all address space */ 1063 0, /* segment type */ 1064 0, /* segment descriptor priority level */ 1065 0, /* segment descriptor present */ 1066 0, 0, 1067 0, /* default 32 vs 16 bit size */ 1068 0 /* limit granularity (byte/page units)*/ }, 1069 /* Null Descriptor - overwritten by call gate */ 1070{ 0x0, /* segment base address */ 1071 0x0, /* length - all address space */ 1072 0, /* segment type */ 1073 0, /* segment descriptor priority level */ 1074 0, /* segment descriptor present */ 1075 0, 0, 1076 0, /* default 32 vs 16 bit size */ 1077 0 /* limit granularity (byte/page units)*/ }, 1078 /* Code Descriptor for user */ 1079{ 0x0, /* segment base address */ 1080 0xfffff, /* length - all address space */ 1081 SDT_MEMERA, /* segment type */ 1082 SEL_UPL, /* segment descriptor priority level */ 1083 1, /* segment descriptor present */ 1084 0, 0, 1085 1, /* default 32 vs 16 bit size */ 1086 1 /* limit granularity (byte/page units)*/ }, 1087 /* Null Descriptor - overwritten by call gate */ 1088{ 0x0, /* segment base address */ 1089 0x0, /* length - all address space */ 1090 0, /* segment type */ 1091 0, /* segment descriptor priority level */ 1092 0, /* segment descriptor present */ 1093 0, 0, 1094 0, /* default 32 vs 16 bit size */ 1095 0 /* limit granularity (byte/page units)*/ }, 1096 /* Data Descriptor for user */ 1097{ 0x0, /* segment base address */ 1098 0xfffff, /* length - all address space */ 1099 SDT_MEMRWA, /* segment type */ 1100 SEL_UPL, /* segment descriptor priority level */ 1101 1, /* segment descriptor present */ 1102 0, 0, 1103 1, /* default 32 vs 16 bit size */ 1104 1 /* limit granularity (byte/page units)*/ }, 1105}; 1106 1107void 1108setidt(idx, func, typ, dpl, selec) 1109 int idx; 1110 inthand_t *func; 1111 int typ; 1112 int dpl; 1113 int selec; 1114{ 1115 struct gate_descriptor *ip; 1116 1117#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1118 ip = (t_idt != NULL ? t_idt : idt) + idx; 1119#else 1120 ip = idt + idx; 1121#endif 1122 ip->gd_looffset = (int)func; 1123 ip->gd_selector = selec; 1124 ip->gd_stkcpy = 0; 1125 ip->gd_xx = 0; 1126 ip->gd_type = typ; 1127 ip->gd_dpl = dpl; 1128 ip->gd_p = 1; 1129 ip->gd_hioffset = ((int)func)>>16 ; 1130} 1131 1132#define IDTVEC(name) __CONCAT(X,name) 1133 1134extern inthand_t 1135 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1136 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1137 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1138 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1139 IDTVEC(syscall), IDTVEC(int0x80_syscall); 1140 1141void 1142sdtossd(sd, ssd) 1143 struct segment_descriptor *sd; 1144 struct soft_segment_descriptor *ssd; 1145{ 1146 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1147 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1148 ssd->ssd_type = sd->sd_type; 1149 ssd->ssd_dpl = sd->sd_dpl; 1150 ssd->ssd_p = sd->sd_p; 1151 ssd->ssd_def32 = sd->sd_def32; 1152 ssd->ssd_gran = sd->sd_gran; 1153} 1154 1155void 1156init386(first) 1157 int first; 1158{ 1159 int x; 1160 unsigned biosbasemem, biosextmem; 1161 struct gate_descriptor *gdp; 1162 int gsel_tss; 1163 1164 struct isa_device *idp; 1165#ifndef SMP 1166 /* table descriptors - used to load tables by microp */ 1167 struct region_descriptor r_gdt, r_idt; 1168#endif 1169 int pagesinbase, pagesinext; 1170 vm_offset_t target_page; 1171 int pa_indx, off; 1172 int speculative_mprobe; 1173 1174 /* 1175 * Prevent lowering of the ipl if we call tsleep() early. 1176 */ 1177 safepri = cpl; 1178 1179 proc0.p_addr = proc0paddr; 1180 1181 atdevbase = ISA_HOLE_START + KERNBASE; 1182 1183 /* 1184 * Initialize the console before we print anything out. 1185 */ 1186 cninit(); 1187 1188 /* 1189 * make gdt memory segments, the code segment goes up to end of the 1190 * page with etext in it, the data segment goes to the end of 1191 * the address space 1192 */ 1193 /* 1194 * XXX text protection is temporarily (?) disabled. The limit was 1195 * i386_btop(round_page(etext)) - 1. 1196 */ 1197 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1198 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1199#ifdef BDE_DEBUGGER 1200#define NGDT1 8 /* avoid overwriting db entries with APM ones */ 1201#else 1202#define NGDT1 (sizeof gdt_segs / sizeof gdt_segs[0]) 1203#endif 1204 for (x = 0; x < NGDT1; x++) 1205 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1206#ifdef VM86 1207 common_tssd = gdt[GPROC0_SEL].sd; 1208#endif /* VM86 */ 1209 1210#ifdef SMP 1211 /* 1212 * Spin these up now. init_secondary() grabs them. We could use 1213 * #for(x,y,z) / #endfor cpp directives if they existed. 1214 */ 1215 for (x = 0; x < NCPU; x++) { 1216 gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL]; 1217 ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd); 1218 } 1219#endif 1220 1221 /* make ldt memory segments */ 1222 /* 1223 * The data segment limit must not cover the user area because we 1224 * don't want the user area to be writable in copyout() etc. (page 1225 * level protection is lost in kernel mode on 386's). Also, we 1226 * don't want the user area to be writable directly (page level 1227 * protection of the user area is not available on 486's with 1228 * CR0_WP set, because there is no user-read/kernel-write mode). 1229 * 1230 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1231 * should be spelled ...MAX_USER... 1232 */ 1233#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1234 /* 1235 * The code segment limit has to cover the user area until we move 1236 * the signal trampoline out of the user area. This is safe because 1237 * the code segment cannot be written to directly. 1238 */ 1239#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1240 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1241 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1242 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1243 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1244 1245 /* exceptions */ 1246 for (x = 0; x < NIDT; x++) 1247 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1248 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1249 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1250 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1251 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1252 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1253 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1254 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1255 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1256 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1257 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1258 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1259 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1260 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1261 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1262 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1263 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1264 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1265 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1266 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1267 setidt(0x80, &IDTVEC(int0x80_syscall), 1268 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1269 1270#include "isa.h" 1271#if NISA >0 1272 isa_defaultirq(); 1273#endif 1274 rand_initialize(); 1275 1276 r_gdt.rd_limit = sizeof(gdt) - 1; 1277 r_gdt.rd_base = (int) gdt; 1278 lgdt(&r_gdt); 1279 1280 r_idt.rd_limit = sizeof(idt) - 1; 1281 r_idt.rd_base = (int) idt; 1282 lidt(&r_idt); 1283 1284 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1285 lldt(_default_ldt); 1286#ifdef USER_LDT 1287 currentldt = _default_ldt; 1288#endif 1289 1290#ifdef DDB 1291 kdb_init(); 1292 if (boothowto & RB_KDB) 1293 Debugger("Boot flags requested debugger"); 1294#endif 1295 1296 finishidentcpu(); /* Final stage of CPU initialization */ 1297 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1298 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1299 initializecpu(); /* Initialize CPU registers */ 1300 1301 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1302#ifdef VM86 1303 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE - 16; 1304#else 1305 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE; 1306#endif /* VM86 */ 1307 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1308 common_tss.tss_ioopt = (sizeof common_tss) << 16; 1309 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1310 ltr(gsel_tss); 1311#ifdef VM86 1312 private_tss = 0; 1313 my_tr = GPROC0_SEL; 1314#endif 1315 1316 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1317 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1318 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1319 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1320 dblfault_tss.tss_cr3 = (int)IdlePTD; 1321 dblfault_tss.tss_eip = (int) dblfault_handler; 1322 dblfault_tss.tss_eflags = PSL_KERNEL; 1323 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = 1324 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1325 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1326 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1327 1328#ifdef VM86 1329 initial_bioscalls(&biosbasemem, &biosextmem); 1330#else 1331 1332 /* Use BIOS values stored in RTC CMOS RAM, since probing 1333 * breaks certain 386 AT relics. 1334 */ 1335 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1336 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1337#endif 1338 1339 /* 1340 * If BIOS tells us that it has more than 640k in the basemem, 1341 * don't believe it - set it to 640k. 1342 */ 1343 if (biosbasemem > 640) { 1344 printf("Preposterous RTC basemem of %uK, truncating to 640K\n", 1345 biosbasemem); 1346 biosbasemem = 640; 1347 } 1348 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1349 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1350 bootinfo.bi_basemem); 1351 bootinfo.bi_basemem = 640; 1352 } 1353 1354 /* 1355 * Warn if the official BIOS interface disagrees with the RTC 1356 * interface used above about the amount of base memory or the 1357 * amount of extended memory. Prefer the BIOS value for the base 1358 * memory. This is necessary for machines that `steal' base 1359 * memory for use as BIOS memory, at least if we are going to use 1360 * the BIOS for apm. Prefer the RTC value for extended memory. 1361 * Eventually the hackish interface shouldn't even be looked at. 1362 */ 1363 if (bootinfo.bi_memsizes_valid) { 1364 if (bootinfo.bi_basemem != biosbasemem) { 1365 vm_offset_t pa; 1366 1367 printf( 1368 "BIOS basemem (%uK) != RTC basemem (%uK), setting to BIOS value\n", 1369 bootinfo.bi_basemem, biosbasemem); 1370 biosbasemem = bootinfo.bi_basemem; 1371 1372 /* 1373 * XXX if biosbasemem is now < 640, there is `hole' 1374 * between the end of base memory and the start of 1375 * ISA memory. The hole may be empty or it may 1376 * contain BIOS code or data. Map it read/write so 1377 * that the BIOS can write to it. (Memory from 0 to 1378 * the physical end of the kernel is mapped read-only 1379 * to begin with and then parts of it are remapped. 1380 * The parts that aren't remapped form holes that 1381 * remain read-only and are unused by the kernel. 1382 * The base memory area is below the physical end of 1383 * the kernel and right now forms a read-only hole. 1384 * The part of it from PAGE_SIZE to 1385 * (trunc_page(biosbasemem * 1024) - 1) will be 1386 * remapped and used by the kernel later.) 1387 * 1388 * This code is similar to the code used in 1389 * pmap_mapdev, but since no memory needs to be 1390 * allocated we simply change the mapping. 1391 */ 1392 for (pa = trunc_page(biosbasemem * 1024); 1393 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1394 unsigned *pte; 1395 1396 pte = (unsigned *)vtopte(pa + KERNBASE); 1397 *pte = pa | PG_RW | PG_V; 1398 } 1399 } 1400 if (bootinfo.bi_extmem != biosextmem) 1401 printf("BIOS extmem (%uK) != RTC extmem (%uK)\n", 1402 bootinfo.bi_extmem, biosextmem); 1403 } 1404 1405#ifdef SMP 1406 /* make hole for AP bootstrap code */ 1407 pagesinbase = mp_bootaddress(biosbasemem) / PAGE_SIZE; 1408#else 1409 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1410#endif 1411 1412 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1413 1414 /* 1415 * Special hack for chipsets that still remap the 384k hole when 1416 * there's 16MB of memory - this really confuses people that 1417 * are trying to use bus mastering ISA controllers with the 1418 * "16MB limit"; they only have 16MB, but the remapping puts 1419 * them beyond the limit. 1420 */ 1421 /* 1422 * If extended memory is between 15-16MB (16-17MB phys address range), 1423 * chop it to 15MB. 1424 */ 1425 if ((pagesinext > 3840) && (pagesinext < 4096)) 1426 pagesinext = 3840; 1427 1428 /* 1429 * Maxmem isn't the "maximum memory", it's one larger than the 1430 * highest page of the physical address space. It should be 1431 * called something like "Maxphyspage". 1432 */ 1433 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1434 /* 1435 * Indicate that we wish to do a speculative search for memory beyond 1436 * the end of the reported size if the indicated amount is 64MB (0x4000 1437 * pages) - which is the largest amount that the BIOS/bootblocks can 1438 * currently report. If a specific amount of memory is indicated via 1439 * the MAXMEM option or the npx0 "msize", then don't do the speculative 1440 * memory probe. 1441 */ 1442 if (Maxmem >= 0x4000) 1443 speculative_mprobe = TRUE; 1444 else 1445 speculative_mprobe = FALSE; 1446 1447#ifdef MAXMEM 1448 Maxmem = MAXMEM/4; 1449 speculative_mprobe = FALSE; 1450#endif 1451 1452#if NNPX > 0 1453 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1454 if (idp != NULL && idp->id_msize != 0) { 1455 Maxmem = idp->id_msize / 4; 1456 speculative_mprobe = FALSE; 1457 } 1458#endif 1459 1460#ifdef SMP 1461 /* look for the MP hardware - needed for apic addresses */ 1462 mp_probe(); 1463#endif 1464 1465 /* call pmap initialization to make new kernel address space */ 1466 pmap_bootstrap (first, 0); 1467 1468 /* 1469 * Size up each available chunk of physical memory. 1470 */ 1471 1472 /* 1473 * We currently don't bother testing base memory. 1474 * XXX ...but we probably should. 1475 */ 1476 pa_indx = 0; 1477 if (pagesinbase > 1) { 1478 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1479 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1480 physmem = pagesinbase - 1; 1481 } else { 1482 /* point at first chunk end */ 1483 pa_indx++; 1484 } 1485 1486 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1487 int tmp, page_bad; 1488 1489 page_bad = FALSE; 1490 1491 /* 1492 * map page into kernel: valid, read/write, non-cacheable 1493 */ 1494 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1495 invltlb(); 1496 1497 tmp = *(int *)CADDR1; 1498 /* 1499 * Test for alternating 1's and 0's 1500 */ 1501 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1502 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1503 page_bad = TRUE; 1504 } 1505 /* 1506 * Test for alternating 0's and 1's 1507 */ 1508 *(volatile int *)CADDR1 = 0x55555555; 1509 if (*(volatile int *)CADDR1 != 0x55555555) { 1510 page_bad = TRUE; 1511 } 1512 /* 1513 * Test for all 1's 1514 */ 1515 *(volatile int *)CADDR1 = 0xffffffff; 1516 if (*(volatile int *)CADDR1 != 0xffffffff) { 1517 page_bad = TRUE; 1518 } 1519 /* 1520 * Test for all 0's 1521 */ 1522 *(volatile int *)CADDR1 = 0x0; 1523 if (*(volatile int *)CADDR1 != 0x0) { 1524 /* 1525 * test of page failed 1526 */ 1527 page_bad = TRUE; 1528 } 1529 /* 1530 * Restore original value. 1531 */ 1532 *(int *)CADDR1 = tmp; 1533 1534 /* 1535 * Adjust array of valid/good pages. 1536 */ 1537 if (page_bad == FALSE) { 1538 /* 1539 * If this good page is a continuation of the 1540 * previous set of good pages, then just increase 1541 * the end pointer. Otherwise start a new chunk. 1542 * Note that "end" points one higher than end, 1543 * making the range >= start and < end. 1544 * If we're also doing a speculative memory 1545 * test and we at or past the end, bump up Maxmem 1546 * so that we keep going. The first bad page 1547 * will terminate the loop. 1548 */ 1549 if (phys_avail[pa_indx] == target_page) { 1550 phys_avail[pa_indx] += PAGE_SIZE; 1551 if (speculative_mprobe == TRUE && 1552 phys_avail[pa_indx] >= (64*1024*1024)) 1553 Maxmem++; 1554 } else { 1555 pa_indx++; 1556 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1557 printf("Too many holes in the physical address space, giving up\n"); 1558 pa_indx--; 1559 break; 1560 } 1561 phys_avail[pa_indx++] = target_page; /* start */ 1562 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1563 } 1564 physmem++; 1565 } 1566 } 1567 1568 *(int *)CMAP1 = 0; 1569 invltlb(); 1570 1571 /* 1572 * XXX 1573 * The last chunk must contain at least one page plus the message 1574 * buffer to avoid complicating other code (message buffer address 1575 * calculation, etc.). 1576 */ 1577 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1578 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1579 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1580 phys_avail[pa_indx--] = 0; 1581 phys_avail[pa_indx--] = 0; 1582 } 1583 1584 Maxmem = atop(phys_avail[pa_indx]); 1585 1586 /* Trim off space for the message buffer. */ 1587 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1588 1589 avail_end = phys_avail[pa_indx]; 1590 1591 /* now running on new page tables, configured,and u/iom is accessible */ 1592 1593 /* Map the message buffer. */ 1594 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1595 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1596 avail_end + off, VM_PROT_ALL, TRUE); 1597 1598 msgbufinit(msgbufp, MSGBUF_SIZE); 1599 1600 /* make a call gate to reenter kernel with */ 1601 gdp = &ldt[LSYS5CALLS_SEL].gd; 1602 1603 x = (int) &IDTVEC(syscall); 1604 gdp->gd_looffset = x++; 1605 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1606 gdp->gd_stkcpy = 1; 1607 gdp->gd_type = SDT_SYS386CGT; 1608 gdp->gd_dpl = SEL_UPL; 1609 gdp->gd_p = 1; 1610 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1611 1612 /* XXX does this work? */ 1613 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1614 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1615 1616 /* transfer to user mode */ 1617 1618 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1619 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1620 1621 /* setup proc 0's pcb */ 1622 proc0.p_addr->u_pcb.pcb_flags = 0; 1623 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1624#ifdef SMP 1625 proc0.p_addr->u_pcb.pcb_mpnest = 1; 1626#endif 1627#ifdef VM86 1628 proc0.p_addr->u_pcb.pcb_ext = 0; 1629#endif 1630 1631 /* Sigh, relocate physical addresses left from bootstrap */ 1632 if (bootinfo.bi_modulep) { 1633 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1634 preload_bootstrap_relocate(KERNBASE); 1635 } 1636 if (bootinfo.bi_envp) 1637 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1638} 1639 1640#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1641static void f00f_hack(void *unused); 1642SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 1643 1644static void 1645f00f_hack(void *unused) { 1646#ifndef SMP 1647 struct region_descriptor r_idt; 1648#endif 1649 vm_offset_t tmp; 1650 1651 if (!has_f00f_bug) 1652 return; 1653 1654 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 1655 1656 r_idt.rd_limit = sizeof(idt) - 1; 1657 1658 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 1659 if (tmp == 0) 1660 panic("kmem_alloc returned 0"); 1661 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0) 1662 panic("kmem_alloc returned non-page-aligned memory"); 1663 /* Put the first seven entries in the lower page */ 1664 t_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8)); 1665 bcopy(idt, t_idt, sizeof(idt)); 1666 r_idt.rd_base = (int)t_idt; 1667 lidt(&r_idt); 1668 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 1669 VM_PROT_READ, FALSE) != KERN_SUCCESS) 1670 panic("vm_map_protect failed"); 1671 return; 1672} 1673#endif /* defined(I586_CPU) && !NO_F00F_HACK */ 1674 1675int 1676ptrace_set_pc(p, addr) 1677 struct proc *p; 1678 unsigned long addr; 1679{ 1680 p->p_md.md_regs->tf_eip = addr; 1681 return (0); 1682} 1683 1684int 1685ptrace_single_step(p) 1686 struct proc *p; 1687{ 1688 p->p_md.md_regs->tf_eflags |= PSL_T; 1689 return (0); 1690} 1691 1692int ptrace_read_u_check(p, addr, len) 1693 struct proc *p; 1694 vm_offset_t addr; 1695 size_t len; 1696{ 1697 vm_offset_t gap; 1698 1699 if ((vm_offset_t) (addr + len) < addr) 1700 return EPERM; 1701 if ((vm_offset_t) (addr + len) <= sizeof(struct user)) 1702 return 0; 1703 1704 gap = (char *) p->p_md.md_regs - (char *) p->p_addr; 1705 1706 if ((vm_offset_t) addr < gap) 1707 return EPERM; 1708 if ((vm_offset_t) (addr + len) <= 1709 (vm_offset_t) (gap + sizeof(struct trapframe))) 1710 return 0; 1711 return EPERM; 1712} 1713 1714int ptrace_write_u(p, off, data) 1715 struct proc *p; 1716 vm_offset_t off; 1717 long data; 1718{ 1719 struct trapframe frame_copy; 1720 vm_offset_t min; 1721 struct trapframe *tp; 1722 1723 /* 1724 * Privileged kernel state is scattered all over the user area. 1725 * Only allow write access to parts of regs and to fpregs. 1726 */ 1727 min = (char *)p->p_md.md_regs - (char *)p->p_addr; 1728 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1729 tp = p->p_md.md_regs; 1730 frame_copy = *tp; 1731 *(int *)((char *)&frame_copy + (off - min)) = data; 1732 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1733 !CS_SECURE(frame_copy.tf_cs)) 1734 return (EINVAL); 1735 *(int*)((char *)p->p_addr + off) = data; 1736 return (0); 1737 } 1738 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1739 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1740 *(int*)((char *)p->p_addr + off) = data; 1741 return (0); 1742 } 1743 return (EFAULT); 1744} 1745 1746int 1747fill_regs(p, regs) 1748 struct proc *p; 1749 struct reg *regs; 1750{ 1751 struct pcb *pcb; 1752 struct trapframe *tp; 1753 1754 tp = p->p_md.md_regs; 1755 regs->r_es = tp->tf_es; 1756 regs->r_ds = tp->tf_ds; 1757 regs->r_edi = tp->tf_edi; 1758 regs->r_esi = tp->tf_esi; 1759 regs->r_ebp = tp->tf_ebp; 1760 regs->r_ebx = tp->tf_ebx; 1761 regs->r_edx = tp->tf_edx; 1762 regs->r_ecx = tp->tf_ecx; 1763 regs->r_eax = tp->tf_eax; 1764 regs->r_eip = tp->tf_eip; 1765 regs->r_cs = tp->tf_cs; 1766 regs->r_eflags = tp->tf_eflags; 1767 regs->r_esp = tp->tf_esp; 1768 regs->r_ss = tp->tf_ss; 1769 pcb = &p->p_addr->u_pcb; 1770 regs->r_fs = pcb->pcb_fs; 1771 regs->r_gs = pcb->pcb_gs; 1772 return (0); 1773} 1774 1775int 1776set_regs(p, regs) 1777 struct proc *p; 1778 struct reg *regs; 1779{ 1780 struct pcb *pcb; 1781 struct trapframe *tp; 1782 1783 tp = p->p_md.md_regs; 1784 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1785 !CS_SECURE(regs->r_cs)) 1786 return (EINVAL); 1787 tp->tf_es = regs->r_es; 1788 tp->tf_ds = regs->r_ds; 1789 tp->tf_edi = regs->r_edi; 1790 tp->tf_esi = regs->r_esi; 1791 tp->tf_ebp = regs->r_ebp; 1792 tp->tf_ebx = regs->r_ebx; 1793 tp->tf_edx = regs->r_edx; 1794 tp->tf_ecx = regs->r_ecx; 1795 tp->tf_eax = regs->r_eax; 1796 tp->tf_eip = regs->r_eip; 1797 tp->tf_cs = regs->r_cs; 1798 tp->tf_eflags = regs->r_eflags; 1799 tp->tf_esp = regs->r_esp; 1800 tp->tf_ss = regs->r_ss; 1801 pcb = &p->p_addr->u_pcb; 1802 pcb->pcb_fs = regs->r_fs; 1803 pcb->pcb_gs = regs->r_gs; 1804 return (0); 1805} 1806 1807int 1808fill_fpregs(p, fpregs) 1809 struct proc *p; 1810 struct fpreg *fpregs; 1811{ 1812 bcopy(&p->p_addr->u_pcb.pcb_savefpu, fpregs, sizeof *fpregs); 1813 return (0); 1814} 1815 1816int 1817set_fpregs(p, fpregs) 1818 struct proc *p; 1819 struct fpreg *fpregs; 1820{ 1821 bcopy(fpregs, &p->p_addr->u_pcb.pcb_savefpu, sizeof *fpregs); 1822 return (0); 1823} 1824 1825#ifndef DDB 1826void 1827Debugger(const char *msg) 1828{ 1829 printf("Debugger(\"%s\") called.\n", msg); 1830} 1831#endif /* no DDB */ 1832 1833#include <sys/disklabel.h> 1834 1835/* 1836 * Determine the size of the transfer, and make sure it is 1837 * within the boundaries of the partition. Adjust transfer 1838 * if needed, and signal errors or early completion. 1839 */ 1840int 1841bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1842{ 1843 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1844 int labelsect = lp->d_partitions[0].p_offset; 1845 int maxsz = p->p_size, 1846 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1847 1848 /* overwriting disk label ? */ 1849 /* XXX should also protect bootstrap in first 8K */ 1850 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1851#if LABELSECTOR != 0 1852 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1853#endif 1854 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1855 bp->b_error = EROFS; 1856 goto bad; 1857 } 1858 1859#if defined(DOSBBSECTOR) && defined(notyet) 1860 /* overwriting master boot record? */ 1861 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1862 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1863 bp->b_error = EROFS; 1864 goto bad; 1865 } 1866#endif 1867 1868 /* beyond partition? */ 1869 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1870 /* if exactly at end of disk, return an EOF */ 1871 if (bp->b_blkno == maxsz) { 1872 bp->b_resid = bp->b_bcount; 1873 return(0); 1874 } 1875 /* or truncate if part of it fits */ 1876 sz = maxsz - bp->b_blkno; 1877 if (sz <= 0) { 1878 bp->b_error = EINVAL; 1879 goto bad; 1880 } 1881 bp->b_bcount = sz << DEV_BSHIFT; 1882 } 1883 1884 bp->b_pblkno = bp->b_blkno + p->p_offset; 1885 return(1); 1886 1887bad: 1888 bp->b_flags |= B_ERROR; 1889 return(-1); 1890} 1891 1892#ifdef DDB 1893 1894/* 1895 * Provide inb() and outb() as functions. They are normally only 1896 * available as macros calling inlined functions, thus cannot be 1897 * called inside DDB. 1898 * 1899 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1900 */ 1901 1902#undef inb 1903#undef outb 1904 1905/* silence compiler warnings */ 1906u_char inb(u_int); 1907void outb(u_int, u_char); 1908 1909u_char 1910inb(u_int port) 1911{ 1912 u_char data; 1913 /* 1914 * We use %%dx and not %1 here because i/o is done at %dx and not at 1915 * %edx, while gcc generates inferior code (movw instead of movl) 1916 * if we tell it to load (u_short) port. 1917 */ 1918 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1919 return (data); 1920} 1921 1922void 1923outb(u_int port, u_char data) 1924{ 1925 u_char al; 1926 /* 1927 * Use an unnecessary assignment to help gcc's register allocator. 1928 * This make a large difference for gcc-1.40 and a tiny difference 1929 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1930 * best results. gcc-2.6.0 can't handle this. 1931 */ 1932 al = data; 1933 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1934} 1935 1936#endif /* DDB */ 1937