machdep.c revision 43564
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.323 1999/01/28 11:45:29 newton Exp $ 39 */ 40 41#include "apm.h" 42#include "ether.h" 43#include "npx.h" 44#include "opt_atalk.h" 45#include "opt_cpu.h" 46#include "opt_ddb.h" 47#include "opt_inet.h" 48#include "opt_ipx.h" 49#include "opt_maxmem.h" 50#include "opt_msgbuf.h" 51#include "opt_perfmon.h" 52#include "opt_smp.h" 53#include "opt_sysvipc.h" 54#include "opt_user_ldt.h" 55#include "opt_userconfig.h" 56#include "opt_vm86.h" 57 58#include <sys/param.h> 59#include <sys/systm.h> 60#include <sys/sysproto.h> 61#include <sys/signalvar.h> 62#include <sys/kernel.h> 63#include <sys/linker.h> 64#include <sys/proc.h> 65#include <sys/buf.h> 66#include <sys/reboot.h> 67#include <sys/callout.h> 68#include <sys/malloc.h> 69#include <sys/mbuf.h> 70#include <sys/msgbuf.h> 71#include <sys/sysent.h> 72#include <sys/sysctl.h> 73#include <sys/vmmeter.h> 74 75#ifdef SYSVSHM 76#include <sys/shm.h> 77#endif 78 79#ifdef SYSVMSG 80#include <sys/msg.h> 81#endif 82 83#ifdef SYSVSEM 84#include <sys/sem.h> 85#endif 86 87#include <vm/vm.h> 88#include <vm/vm_param.h> 89#include <vm/vm_prot.h> 90#include <sys/lock.h> 91#include <vm/vm_kern.h> 92#include <vm/vm_object.h> 93#include <vm/vm_page.h> 94#include <vm/vm_map.h> 95#include <vm/vm_pager.h> 96#include <vm/vm_extern.h> 97 98#include <sys/user.h> 99#include <sys/exec.h> 100 101#include <ddb/ddb.h> 102 103#if defined(INET) || defined(IPX) || defined(NATM) || defined(NETATALK) \ 104 || NETHER > 0 || defined(NS) 105#define NETISR 106#endif 107 108#ifdef NETISR 109#include <net/netisr.h> 110#endif 111 112#include <machine/cpu.h> 113#include <machine/reg.h> 114#include <machine/clock.h> 115#include <machine/specialreg.h> 116#include <machine/cons.h> 117#include <machine/bootinfo.h> 118#include <machine/ipl.h> 119#include <machine/md_var.h> 120#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 121#ifdef SMP 122#include <machine/smp.h> 123#endif 124#ifdef PERFMON 125#include <machine/perfmon.h> 126#endif 127 128#include <i386/isa/isa_device.h> 129#include <i386/isa/intr_machdep.h> 130#ifndef VM86 131#include <i386/isa/rtc.h> 132#endif 133#include <machine/random.h> 134#include <sys/ptrace.h> 135 136extern void init386 __P((int first)); 137extern void dblfault_handler __P((void)); 138 139extern void printcpuinfo(void); /* XXX header file */ 140extern void earlysetcpuclass(void); /* same header file */ 141extern void finishidentcpu(void); 142extern void panicifcpuunsupported(void); 143extern void initializecpu(void); 144 145static void cpu_startup __P((void *)); 146SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 147 148static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf"); 149 150int _udatasel, _ucodesel; 151u_int atdevbase; 152 153#if defined(SWTCH_OPTIM_STATS) 154extern int swtch_optim_stats; 155SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 156 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 157SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 158 CTLFLAG_RD, &tlb_flush_count, 0, ""); 159#endif 160 161#ifdef PC98 162static int ispc98 = 1; 163#else 164static int ispc98 = 0; 165#endif 166SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 167 168int physmem = 0; 169int cold = 1; 170 171static int 172sysctl_hw_physmem SYSCTL_HANDLER_ARGS 173{ 174 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 175 return (error); 176} 177 178SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 179 0, 0, sysctl_hw_physmem, "I", ""); 180 181static int 182sysctl_hw_usermem SYSCTL_HANDLER_ARGS 183{ 184 int error = sysctl_handle_int(oidp, 0, 185 ctob(physmem - cnt.v_wire_count), req); 186 return (error); 187} 188 189SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 190 0, 0, sysctl_hw_usermem, "I", ""); 191 192static int 193sysctl_hw_availpages SYSCTL_HANDLER_ARGS 194{ 195 int error = sysctl_handle_int(oidp, 0, 196 i386_btop(avail_end - avail_start), req); 197 return (error); 198} 199 200SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD, 201 0, 0, sysctl_hw_availpages, "I", ""); 202 203static int 204sysctl_machdep_msgbuf SYSCTL_HANDLER_ARGS 205{ 206 int error; 207 208 /* Unwind the buffer, so that it's linear (possibly starting with 209 * some initial nulls). 210 */ 211 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr, 212 msgbufp->msg_size-msgbufp->msg_bufr,req); 213 if(error) return(error); 214 if(msgbufp->msg_bufr>0) { 215 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr, 216 msgbufp->msg_bufr,req); 217 } 218 return(error); 219} 220 221SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD, 222 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer"); 223 224static int msgbuf_clear; 225 226static int 227sysctl_machdep_msgbuf_clear SYSCTL_HANDLER_ARGS 228{ 229 int error; 230 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 231 req); 232 if (!error && req->newptr) { 233 /* Clear the buffer and reset write pointer */ 234 bzero(msgbufp->msg_ptr,msgbufp->msg_size); 235 msgbufp->msg_bufr=msgbufp->msg_bufx=0; 236 msgbuf_clear=0; 237 } 238 return (error); 239} 240 241SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW, 242 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I", 243 "Clear kernel message buffer"); 244 245int bootverbose = 0, Maxmem = 0; 246long dumplo; 247 248vm_offset_t phys_avail[10]; 249 250/* must be 2 less so 0 0 can signal end of chunks */ 251#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 252 253#ifdef NETISR 254static void setup_netisrs __P((struct linker_set *)); 255#endif 256 257static vm_offset_t buffer_sva, buffer_eva; 258vm_offset_t clean_sva, clean_eva; 259static vm_offset_t pager_sva, pager_eva; 260#ifdef NETISR 261extern struct linker_set netisr_set; 262#endif 263#if NNPX > 0 264extern struct isa_driver npxdriver; 265#endif 266 267#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 268 269static void 270cpu_startup(dummy) 271 void *dummy; 272{ 273 register unsigned i; 274 register caddr_t v; 275 vm_offset_t maxaddr; 276 vm_size_t size = 0; 277 int firstaddr; 278 vm_offset_t minaddr; 279 280 if (boothowto & RB_VERBOSE) 281 bootverbose++; 282 283 /* 284 * Good {morning,afternoon,evening,night}. 285 */ 286 printf(version); 287 earlysetcpuclass(); 288 startrtclock(); 289 printcpuinfo(); 290 panicifcpuunsupported(); 291#ifdef PERFMON 292 perfmon_init(); 293#endif 294 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 295 /* 296 * Display any holes after the first chunk of extended memory. 297 */ 298 if (bootverbose) { 299 int indx; 300 301 printf("Physical memory chunk(s):\n"); 302 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 303 int size1 = phys_avail[indx + 1] - phys_avail[indx]; 304 305 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n", 306 phys_avail[indx], phys_avail[indx + 1] - 1, size1, 307 size1 / PAGE_SIZE); 308 } 309 } 310 311#ifdef NETISR 312 /* 313 * Quickly wire in netisrs. 314 */ 315 setup_netisrs(&netisr_set); 316#endif 317 318 /* 319 * Calculate callout wheel size 320 */ 321 for (callwheelsize = 1, callwheelbits = 0; 322 callwheelsize < ncallout; 323 callwheelsize <<= 1, ++callwheelbits) 324 ; 325 callwheelmask = callwheelsize - 1; 326 327 /* 328 * Allocate space for system data structures. 329 * The first available kernel virtual address is in "v". 330 * As pages of kernel virtual memory are allocated, "v" is incremented. 331 * As pages of memory are allocated and cleared, 332 * "firstaddr" is incremented. 333 * An index into the kernel page table corresponding to the 334 * virtual memory address maintained in "v" is kept in "mapaddr". 335 */ 336 337 /* 338 * Make two passes. The first pass calculates how much memory is 339 * needed and allocates it. The second pass assigns virtual 340 * addresses to the various data structures. 341 */ 342 firstaddr = 0; 343again: 344 v = (caddr_t)firstaddr; 345 346#define valloc(name, type, num) \ 347 (name) = (type *)v; v = (caddr_t)((name)+(num)) 348#define valloclim(name, type, num, lim) \ 349 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 350 351 valloc(callout, struct callout, ncallout); 352 valloc(callwheel, struct callout_tailq, callwheelsize); 353#ifdef SYSVSHM 354 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 355#endif 356#ifdef SYSVSEM 357 valloc(sema, struct semid_ds, seminfo.semmni); 358 valloc(sem, struct sem, seminfo.semmns); 359 /* This is pretty disgusting! */ 360 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 361#endif 362#ifdef SYSVMSG 363 valloc(msgpool, char, msginfo.msgmax); 364 valloc(msgmaps, struct msgmap, msginfo.msgseg); 365 valloc(msghdrs, struct msg, msginfo.msgtql); 366 valloc(msqids, struct msqid_ds, msginfo.msgmni); 367#endif 368 369 if (nbuf == 0) { 370 nbuf = 30; 371 if( physmem > 1024) 372 nbuf += min((physmem - 1024) / 8, 2048); 373 } 374 nswbuf = max(min(nbuf/4, 64), 16); 375 376 valloc(swbuf, struct buf, nswbuf); 377 valloc(buf, struct buf, nbuf); 378 379 380 /* 381 * End of first pass, size has been calculated so allocate memory 382 */ 383 if (firstaddr == 0) { 384 size = (vm_size_t)(v - firstaddr); 385 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 386 if (firstaddr == 0) 387 panic("startup: no room for tables"); 388 goto again; 389 } 390 391 /* 392 * End of second pass, addresses have been assigned 393 */ 394 if ((vm_size_t)(v - firstaddr) != size) 395 panic("startup: table size inconsistency"); 396 397 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 398 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size); 399 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 400 (nbuf*BKVASIZE)); 401 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 402 (nswbuf*MAXPHYS) + pager_map_size); 403 pager_map->system_map = 1; 404 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 405 (16*(ARG_MAX+(PAGE_SIZE*3)))); 406 407 /* 408 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 409 * we use the more space efficient malloc in place of kmem_alloc. 410 */ 411 { 412 vm_offset_t mb_map_size; 413 int xclusters; 414 415 /* Allow override of NMBCLUSTERS from the kernel environment */ 416 if (getenv_int("kern.ipc.nmbclusters", &xclusters) && 417 xclusters > nmbclusters) 418 nmbclusters = xclusters; 419 420 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 421 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 422 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 423 bzero(mclrefcnt, mb_map_size / MCLBYTES); 424 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 425 mb_map_size); 426 mb_map->system_map = 1; 427 } 428 429 /* 430 * Initialize callouts 431 */ 432 SLIST_INIT(&callfree); 433 for (i = 0; i < ncallout; i++) { 434 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle); 435 } 436 437 for (i = 0; i < callwheelsize; i++) { 438 TAILQ_INIT(&callwheel[i]); 439 } 440 441#if defined(USERCONFIG) 442 userconfig(); 443 cninit(); /* the preferred console may have changed */ 444#endif 445 446 printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count), 447 ptoa(cnt.v_free_count) / 1024); 448 449 /* 450 * Set up buffers, so they can be used to read disk labels. 451 */ 452 bufinit(); 453 vm_pager_bufferinit(); 454 455#ifdef SMP 456 /* 457 * OK, enough kmem_alloc/malloc state should be up, lets get on with it! 458 */ 459 mp_start(); /* fire up the APs and APICs */ 460 mp_announce(); 461#endif /* SMP */ 462} 463 464#ifdef NETISR 465int 466register_netisr(num, handler) 467 int num; 468 netisr_t *handler; 469{ 470 471 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 472 printf("register_netisr: bad isr number: %d\n", num); 473 return (EINVAL); 474 } 475 netisrs[num] = handler; 476 return (0); 477} 478 479static void 480setup_netisrs(ls) 481 struct linker_set *ls; 482{ 483 int i; 484 const struct netisrtab *nit; 485 486 for(i = 0; ls->ls_items[i]; i++) { 487 nit = (const struct netisrtab *)ls->ls_items[i]; 488 register_netisr(nit->nit_num, nit->nit_isr); 489 } 490} 491#endif /* NETISR */ 492 493/* 494 * Send an interrupt to process. 495 * 496 * Stack is set up to allow sigcode stored 497 * at top to call routine, followed by kcall 498 * to sigreturn routine below. After sigreturn 499 * resets the signal mask, the stack, and the 500 * frame pointer, it returns to the user 501 * specified pc, psl. 502 */ 503void 504sendsig(catcher, sig, mask, code) 505 sig_t catcher; 506 int sig, mask; 507 u_long code; 508{ 509 register struct proc *p = curproc; 510 register struct trapframe *regs; 511 register struct sigframe *fp; 512 struct sigframe sf; 513 struct sigacts *psp = p->p_sigacts; 514 int oonstack; 515 516 regs = p->p_md.md_regs; 517 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 518 /* 519 * Allocate and validate space for the signal handler context. 520 */ 521 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 522 (psp->ps_sigonstack & sigmask(sig))) { 523 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 524 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 525 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 526 } else { 527 fp = (struct sigframe *)regs->tf_esp - 1; 528 } 529 530 /* 531 * grow() will return FALSE if the fp will not fit inside the stack 532 * and the stack can not be grown. useracc will return FALSE 533 * if access is denied. 534 */ 535#ifdef VM_STACK 536 if ((grow_stack (p, (int)fp) == FALSE) || 537#else 538 if ((grow(p, (int)fp) == FALSE) || 539#endif 540 (useracc((caddr_t)fp, sizeof(struct sigframe), B_WRITE) == FALSE)) { 541 /* 542 * Process has trashed its stack; give it an illegal 543 * instruction to halt it in its tracks. 544 */ 545 SIGACTION(p, SIGILL) = SIG_DFL; 546 sig = sigmask(SIGILL); 547 p->p_sigignore &= ~sig; 548 p->p_sigcatch &= ~sig; 549 p->p_sigmask &= ~sig; 550 psignal(p, SIGILL); 551 return; 552 } 553 554 /* 555 * Build the argument list for the signal handler. 556 */ 557 if (p->p_sysent->sv_sigtbl) { 558 if (sig < p->p_sysent->sv_sigsize) 559 sig = p->p_sysent->sv_sigtbl[sig]; 560 else 561 sig = p->p_sysent->sv_sigsize + 1; 562 } 563 sf.sf_signum = sig; 564 sf.sf_code = code; 565 sf.sf_scp = &fp->sf_sc; 566 sf.sf_addr = (char *) regs->tf_err; 567 sf.sf_handler = catcher; 568 569 /* save scratch registers */ 570 sf.sf_sc.sc_eax = regs->tf_eax; 571 sf.sf_sc.sc_ebx = regs->tf_ebx; 572 sf.sf_sc.sc_ecx = regs->tf_ecx; 573 sf.sf_sc.sc_edx = regs->tf_edx; 574 sf.sf_sc.sc_esi = regs->tf_esi; 575 sf.sf_sc.sc_edi = regs->tf_edi; 576 sf.sf_sc.sc_cs = regs->tf_cs; 577 sf.sf_sc.sc_ds = regs->tf_ds; 578 sf.sf_sc.sc_ss = regs->tf_ss; 579 sf.sf_sc.sc_es = regs->tf_es; 580 sf.sf_sc.sc_isp = regs->tf_isp; 581 582 /* 583 * Build the signal context to be used by sigreturn. 584 */ 585 sf.sf_sc.sc_onstack = oonstack; 586 sf.sf_sc.sc_mask = mask; 587 sf.sf_sc.sc_sp = regs->tf_esp; 588 sf.sf_sc.sc_fp = regs->tf_ebp; 589 sf.sf_sc.sc_pc = regs->tf_eip; 590 sf.sf_sc.sc_ps = regs->tf_eflags; 591 sf.sf_sc.sc_trapno = regs->tf_trapno; 592 sf.sf_sc.sc_err = regs->tf_err; 593 594#ifdef VM86 595 /* 596 * If we're a vm86 process, we want to save the segment registers. 597 * We also change eflags to be our emulated eflags, not the actual 598 * eflags. 599 */ 600 if (regs->tf_eflags & PSL_VM) { 601 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 602 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 603 604 sf.sf_sc.sc_gs = tf->tf_vm86_gs; 605 sf.sf_sc.sc_fs = tf->tf_vm86_fs; 606 sf.sf_sc.sc_es = tf->tf_vm86_es; 607 sf.sf_sc.sc_ds = tf->tf_vm86_ds; 608 609 if (vm86->vm86_has_vme == 0) 610 sf.sf_sc.sc_ps = (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) 611 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 612 613 /* 614 * We should never have PSL_T set when returning from vm86 615 * mode. It may be set here if we deliver a signal before 616 * getting to vm86 mode, so turn it off. 617 */ 618 tf->tf_eflags &= ~(PSL_VM | PSL_T | PSL_VIF | PSL_VIP); 619 } 620#endif /* VM86 */ 621 622 /* 623 * Copy the sigframe out to the user's stack. 624 */ 625 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 626 /* 627 * Something is wrong with the stack pointer. 628 * ...Kill the process. 629 */ 630 sigexit(p, SIGILL); 631 } 632 633 regs->tf_esp = (int)fp; 634 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 635 regs->tf_cs = _ucodesel; 636 regs->tf_ds = _udatasel; 637 regs->tf_es = _udatasel; 638 regs->tf_ss = _udatasel; 639} 640 641/* 642 * System call to cleanup state after a signal 643 * has been taken. Reset signal mask and 644 * stack state from context left by sendsig (above). 645 * Return to previous pc and psl as specified by 646 * context left by sendsig. Check carefully to 647 * make sure that the user has not modified the 648 * state to gain improper privileges. 649 */ 650int 651sigreturn(p, uap) 652 struct proc *p; 653 struct sigreturn_args /* { 654 struct sigcontext *sigcntxp; 655 } */ *uap; 656{ 657 register struct sigcontext *scp; 658 register struct sigframe *fp; 659 register struct trapframe *regs = p->p_md.md_regs; 660 int eflags; 661 662 /* 663 * (XXX old comment) regs->tf_esp points to the return address. 664 * The user scp pointer is above that. 665 * The return address is faked in the signal trampoline code 666 * for consistency. 667 */ 668 scp = uap->sigcntxp; 669 fp = (struct sigframe *) 670 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 671 672 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 673 return(EFAULT); 674 675 eflags = scp->sc_ps; 676#ifdef VM86 677 if (eflags & PSL_VM) { 678 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 679 struct vm86_kernel *vm86; 680 681 /* 682 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 683 * set up the vm86 area, and we can't enter vm86 mode. 684 */ 685 if (p->p_addr->u_pcb.pcb_ext == 0) 686 return (EINVAL); 687 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 688 if (vm86->vm86_inited == 0) 689 return (EINVAL); 690 691 /* go back to user mode if both flags are set */ 692 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 693 trapsignal(p, SIGBUS, 0); 694 695 if (vm86->vm86_has_vme) { 696 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 697 (eflags & VME_USERCHANGE) | PSL_VM; 698 } else { 699 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 700 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 701 } 702 tf->tf_vm86_ds = scp->sc_ds; 703 tf->tf_vm86_es = scp->sc_es; 704 tf->tf_vm86_fs = scp->sc_fs; 705 tf->tf_vm86_gs = scp->sc_gs; 706 tf->tf_ds = _udatasel; 707 tf->tf_es = _udatasel; 708 } else { 709#endif /* VM86 */ 710 /* 711 * Don't allow users to change privileged or reserved flags. 712 */ 713#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 714 /* 715 * XXX do allow users to change the privileged flag PSL_RF. 716 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 717 * should sometimes set it there too. tf_eflags is kept in 718 * the signal context during signal handling and there is no 719 * other place to remember it, so the PSL_RF bit may be 720 * corrupted by the signal handler without us knowing. 721 * Corruption of the PSL_RF bit at worst causes one more or 722 * one less debugger trap, so allowing it is fairly harmless. 723 */ 724 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 725#ifdef DEBUG 726 printf("sigreturn: eflags = 0x%x\n", eflags); 727#endif 728 return(EINVAL); 729 } 730 731 /* 732 * Don't allow users to load a valid privileged %cs. Let the 733 * hardware check for invalid selectors, excess privilege in 734 * other selectors, invalid %eip's and invalid %esp's. 735 */ 736#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 737 if (!CS_SECURE(scp->sc_cs)) { 738#ifdef DEBUG 739 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 740#endif 741 trapsignal(p, SIGBUS, T_PROTFLT); 742 return(EINVAL); 743 } 744 regs->tf_ds = scp->sc_ds; 745 regs->tf_es = scp->sc_es; 746#ifdef VM86 747 } 748#endif 749 750 /* restore scratch registers */ 751 regs->tf_eax = scp->sc_eax; 752 regs->tf_ebx = scp->sc_ebx; 753 regs->tf_ecx = scp->sc_ecx; 754 regs->tf_edx = scp->sc_edx; 755 regs->tf_esi = scp->sc_esi; 756 regs->tf_edi = scp->sc_edi; 757 regs->tf_cs = scp->sc_cs; 758 regs->tf_ss = scp->sc_ss; 759 regs->tf_isp = scp->sc_isp; 760 761 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 762 return(EINVAL); 763 764 if (scp->sc_onstack & 01) 765 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 766 else 767 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 768 p->p_sigmask = scp->sc_mask & ~sigcantmask; 769 regs->tf_ebp = scp->sc_fp; 770 regs->tf_esp = scp->sc_sp; 771 regs->tf_eip = scp->sc_pc; 772 regs->tf_eflags = eflags; 773 return(EJUSTRETURN); 774} 775 776/* 777 * Machine dependent boot() routine 778 * 779 * I haven't seen anything to put here yet 780 * Possibly some stuff might be grafted back here from boot() 781 */ 782void 783cpu_boot(int howto) 784{ 785} 786 787/* 788 * Shutdown the CPU as much as possible 789 */ 790void 791cpu_halt(void) 792{ 793 for (;;) 794 __asm__ ("hlt"); 795} 796 797/* 798 * Clear registers on exec 799 */ 800void 801setregs(p, entry, stack) 802 struct proc *p; 803 u_long entry; 804 u_long stack; 805{ 806 struct trapframe *regs = p->p_md.md_regs; 807 struct pcb *pcb = &p->p_addr->u_pcb; 808 809#ifdef USER_LDT 810 /* was i386_user_cleanup() in NetBSD */ 811 if (pcb->pcb_ldt) { 812 if (pcb == curpcb) { 813 lldt(_default_ldt); 814 currentldt = _default_ldt; 815 } 816 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 817 pcb->pcb_ldt_len * sizeof(union descriptor)); 818 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 819 } 820#endif 821 822 bzero((char *)regs, sizeof(struct trapframe)); 823 regs->tf_eip = entry; 824 regs->tf_esp = stack; 825 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 826 regs->tf_ss = _udatasel; 827 regs->tf_ds = _udatasel; 828 regs->tf_es = _udatasel; 829 regs->tf_cs = _ucodesel; 830 831 /* reset %fs and %gs as well */ 832 pcb->pcb_fs = _udatasel; 833 pcb->pcb_gs = _udatasel; 834 if (pcb == curpcb) { 835 __asm("movw %w0,%%fs" : : "r" (_udatasel)); 836 __asm("movw %w0,%%gs" : : "r" (_udatasel)); 837 } 838 839 /* 840 * Initialize the math emulator (if any) for the current process. 841 * Actually, just clear the bit that says that the emulator has 842 * been initialized. Initialization is delayed until the process 843 * traps to the emulator (if it is done at all) mainly because 844 * emulators don't provide an entry point for initialization. 845 */ 846 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 847 848 /* 849 * Arrange to trap the next npx or `fwait' instruction (see npx.c 850 * for why fwait must be trapped at least if there is an npx or an 851 * emulator). This is mainly to handle the case where npx0 is not 852 * configured, since the npx routines normally set up the trap 853 * otherwise. It should be done only at boot time, but doing it 854 * here allows modifying `npx_exists' for testing the emulator on 855 * systems with an npx. 856 */ 857 load_cr0(rcr0() | CR0_MP | CR0_TS); 858 859#if NNPX > 0 860 /* Initialize the npx (if any) for the current process. */ 861 npxinit(__INITIAL_NPXCW__); 862#endif 863} 864 865static int 866sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 867{ 868 int error; 869 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 870 req); 871 if (!error && req->newptr) 872 resettodr(); 873 return (error); 874} 875 876SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 877 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 878 879SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 880 CTLFLAG_RW, &disable_rtc_set, 0, ""); 881 882SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 883 CTLFLAG_RD, &bootinfo, bootinfo, ""); 884 885SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 886 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 887 888/* 889 * Initialize 386 and configure to run kernel 890 */ 891 892/* 893 * Initialize segments & interrupt table 894 */ 895 896int _default_ldt; 897#ifdef SMP 898union descriptor gdt[NGDT + NCPU]; /* global descriptor table */ 899#else 900union descriptor gdt[NGDT]; /* global descriptor table */ 901#endif 902struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 903union descriptor ldt[NLDT]; /* local descriptor table */ 904#ifdef SMP 905/* table descriptors - used to load tables by microp */ 906struct region_descriptor r_gdt, r_idt; 907#endif 908 909extern struct i386tss common_tss; /* One tss per cpu */ 910#ifdef VM86 911extern struct segment_descriptor common_tssd; 912extern int private_tss; /* flag indicating private tss */ 913extern u_int my_tr; /* which task register setting */ 914#endif /* VM86 */ 915 916#if defined(I586_CPU) && !defined(NO_F00F_HACK) 917struct gate_descriptor *t_idt; 918extern int has_f00f_bug; 919#endif 920 921static struct i386tss dblfault_tss; 922static char dblfault_stack[PAGE_SIZE]; 923 924extern struct user *proc0paddr; 925 926 927/* software prototypes -- in more palatable form */ 928struct soft_segment_descriptor gdt_segs[ 929#ifdef SMP 930 NGDT + NCPU 931#endif 932 ] = { 933/* GNULL_SEL 0 Null Descriptor */ 934{ 0x0, /* segment base address */ 935 0x0, /* length */ 936 0, /* segment type */ 937 0, /* segment descriptor priority level */ 938 0, /* segment descriptor present */ 939 0, 0, 940 0, /* default 32 vs 16 bit size */ 941 0 /* limit granularity (byte/page units)*/ }, 942/* GCODE_SEL 1 Code Descriptor for kernel */ 943{ 0x0, /* segment base address */ 944 0xfffff, /* length - all address space */ 945 SDT_MEMERA, /* segment type */ 946 0, /* segment descriptor priority level */ 947 1, /* segment descriptor present */ 948 0, 0, 949 1, /* default 32 vs 16 bit size */ 950 1 /* limit granularity (byte/page units)*/ }, 951/* GDATA_SEL 2 Data Descriptor for kernel */ 952{ 0x0, /* segment base address */ 953 0xfffff, /* length - all address space */ 954 SDT_MEMRWA, /* segment type */ 955 0, /* segment descriptor priority level */ 956 1, /* segment descriptor present */ 957 0, 0, 958 1, /* default 32 vs 16 bit size */ 959 1 /* limit granularity (byte/page units)*/ }, 960/* GLDT_SEL 3 LDT Descriptor */ 961{ (int) ldt, /* segment base address */ 962 sizeof(ldt)-1, /* length - all address space */ 963 SDT_SYSLDT, /* segment type */ 964 SEL_UPL, /* segment descriptor priority level */ 965 1, /* segment descriptor present */ 966 0, 0, 967 0, /* unused - default 32 vs 16 bit size */ 968 0 /* limit granularity (byte/page units)*/ }, 969/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 970{ 0x0, /* segment base address */ 971 0x0, /* length - all address space */ 972 0, /* segment type */ 973 0, /* segment descriptor priority level */ 974 0, /* segment descriptor present */ 975 0, 0, 976 0, /* default 32 vs 16 bit size */ 977 0 /* limit granularity (byte/page units)*/ }, 978/* GPANIC_SEL 5 Panic Tss Descriptor */ 979{ (int) &dblfault_tss, /* segment base address */ 980 sizeof(struct i386tss)-1,/* length - all address space */ 981 SDT_SYS386TSS, /* segment type */ 982 0, /* segment descriptor priority level */ 983 1, /* segment descriptor present */ 984 0, 0, 985 0, /* unused - default 32 vs 16 bit size */ 986 0 /* limit granularity (byte/page units)*/ }, 987/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 988{ 989 (int) &common_tss, /* segment base address */ 990 sizeof(struct i386tss)-1,/* length - all address space */ 991 SDT_SYS386TSS, /* segment type */ 992 0, /* segment descriptor priority level */ 993 1, /* segment descriptor present */ 994 0, 0, 995 0, /* unused - default 32 vs 16 bit size */ 996 0 /* limit granularity (byte/page units)*/ }, 997/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 998{ (int) ldt, /* segment base address */ 999 (512 * sizeof(union descriptor)-1), /* length */ 1000 SDT_SYSLDT, /* segment type */ 1001 0, /* segment descriptor priority level */ 1002 1, /* segment descriptor present */ 1003 0, 0, 1004 0, /* unused - default 32 vs 16 bit size */ 1005 0 /* limit granularity (byte/page units)*/ }, 1006/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 1007{ 0, /* segment base address (overwritten by APM) */ 1008 0xfffff, /* length */ 1009 SDT_MEMERA, /* segment type */ 1010 0, /* segment descriptor priority level */ 1011 1, /* segment descriptor present */ 1012 0, 0, 1013 1, /* default 32 vs 16 bit size */ 1014 1 /* limit granularity (byte/page units)*/ }, 1015/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 1016{ 0, /* segment base address (overwritten by APM) */ 1017 0xfffff, /* length */ 1018 SDT_MEMERA, /* segment type */ 1019 0, /* segment descriptor priority level */ 1020 1, /* segment descriptor present */ 1021 0, 0, 1022 0, /* default 32 vs 16 bit size */ 1023 1 /* limit granularity (byte/page units)*/ }, 1024/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 1025{ 0, /* segment base address (overwritten by APM) */ 1026 0xfffff, /* length */ 1027 SDT_MEMRWA, /* segment type */ 1028 0, /* segment descriptor priority level */ 1029 1, /* segment descriptor present */ 1030 0, 0, 1031 1, /* default 32 vs 16 bit size */ 1032 1 /* limit granularity (byte/page units)*/ }, 1033}; 1034 1035static struct soft_segment_descriptor ldt_segs[] = { 1036 /* Null Descriptor - overwritten by call gate */ 1037{ 0x0, /* segment base address */ 1038 0x0, /* length - all address space */ 1039 0, /* segment type */ 1040 0, /* segment descriptor priority level */ 1041 0, /* segment descriptor present */ 1042 0, 0, 1043 0, /* default 32 vs 16 bit size */ 1044 0 /* limit granularity (byte/page units)*/ }, 1045 /* Null Descriptor - overwritten by call gate */ 1046{ 0x0, /* segment base address */ 1047 0x0, /* length - all address space */ 1048 0, /* segment type */ 1049 0, /* segment descriptor priority level */ 1050 0, /* segment descriptor present */ 1051 0, 0, 1052 0, /* default 32 vs 16 bit size */ 1053 0 /* limit granularity (byte/page units)*/ }, 1054 /* Null Descriptor - overwritten by call gate */ 1055{ 0x0, /* segment base address */ 1056 0x0, /* length - all address space */ 1057 0, /* segment type */ 1058 0, /* segment descriptor priority level */ 1059 0, /* segment descriptor present */ 1060 0, 0, 1061 0, /* default 32 vs 16 bit size */ 1062 0 /* limit granularity (byte/page units)*/ }, 1063 /* Code Descriptor for user */ 1064{ 0x0, /* segment base address */ 1065 0xfffff, /* length - all address space */ 1066 SDT_MEMERA, /* segment type */ 1067 SEL_UPL, /* segment descriptor priority level */ 1068 1, /* segment descriptor present */ 1069 0, 0, 1070 1, /* default 32 vs 16 bit size */ 1071 1 /* limit granularity (byte/page units)*/ }, 1072 /* Null Descriptor - overwritten by call gate */ 1073{ 0x0, /* segment base address */ 1074 0x0, /* length - all address space */ 1075 0, /* segment type */ 1076 0, /* segment descriptor priority level */ 1077 0, /* segment descriptor present */ 1078 0, 0, 1079 0, /* default 32 vs 16 bit size */ 1080 0 /* limit granularity (byte/page units)*/ }, 1081 /* Data Descriptor for user */ 1082{ 0x0, /* segment base address */ 1083 0xfffff, /* length - all address space */ 1084 SDT_MEMRWA, /* segment type */ 1085 SEL_UPL, /* segment descriptor priority level */ 1086 1, /* segment descriptor present */ 1087 0, 0, 1088 1, /* default 32 vs 16 bit size */ 1089 1 /* limit granularity (byte/page units)*/ }, 1090}; 1091 1092void 1093setidt(idx, func, typ, dpl, selec) 1094 int idx; 1095 inthand_t *func; 1096 int typ; 1097 int dpl; 1098 int selec; 1099{ 1100 struct gate_descriptor *ip; 1101 1102#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1103 ip = (t_idt != NULL ? t_idt : idt) + idx; 1104#else 1105 ip = idt + idx; 1106#endif 1107 ip->gd_looffset = (int)func; 1108 ip->gd_selector = selec; 1109 ip->gd_stkcpy = 0; 1110 ip->gd_xx = 0; 1111 ip->gd_type = typ; 1112 ip->gd_dpl = dpl; 1113 ip->gd_p = 1; 1114 ip->gd_hioffset = ((int)func)>>16 ; 1115} 1116 1117#define IDTVEC(name) __CONCAT(X,name) 1118 1119extern inthand_t 1120 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1121 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1122 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1123 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1124 IDTVEC(syscall), IDTVEC(int0x80_syscall); 1125 1126void 1127sdtossd(sd, ssd) 1128 struct segment_descriptor *sd; 1129 struct soft_segment_descriptor *ssd; 1130{ 1131 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1132 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1133 ssd->ssd_type = sd->sd_type; 1134 ssd->ssd_dpl = sd->sd_dpl; 1135 ssd->ssd_p = sd->sd_p; 1136 ssd->ssd_def32 = sd->sd_def32; 1137 ssd->ssd_gran = sd->sd_gran; 1138} 1139 1140void 1141init386(first) 1142 int first; 1143{ 1144 int x; 1145 unsigned biosbasemem, biosextmem; 1146 struct gate_descriptor *gdp; 1147 int gsel_tss; 1148 1149 struct isa_device *idp; 1150#ifndef SMP 1151 /* table descriptors - used to load tables by microp */ 1152 struct region_descriptor r_gdt, r_idt; 1153#endif 1154 int pagesinbase, pagesinext; 1155 vm_offset_t target_page; 1156 int pa_indx, off; 1157 int speculative_mprobe; 1158 1159 /* 1160 * Prevent lowering of the ipl if we call tsleep() early. 1161 */ 1162 safepri = cpl; 1163 1164 proc0.p_addr = proc0paddr; 1165 1166 atdevbase = ISA_HOLE_START + KERNBASE; 1167 1168 /* 1169 * Initialize the console before we print anything out. 1170 */ 1171 cninit(); 1172 1173 /* 1174 * make gdt memory segments, the code segment goes up to end of the 1175 * page with etext in it, the data segment goes to the end of 1176 * the address space 1177 */ 1178 /* 1179 * XXX text protection is temporarily (?) disabled. The limit was 1180 * i386_btop(round_page(etext)) - 1. 1181 */ 1182 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1183 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1184#ifdef BDE_DEBUGGER 1185#define NGDT1 8 /* avoid overwriting db entries with APM ones */ 1186#else 1187#define NGDT1 (sizeof gdt_segs / sizeof gdt_segs[0]) 1188#endif 1189 for (x = 0; x < NGDT1; x++) 1190 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1191#ifdef VM86 1192 common_tssd = gdt[GPROC0_SEL].sd; 1193#endif /* VM86 */ 1194 1195#ifdef SMP 1196 /* 1197 * Spin these up now. init_secondary() grabs them. We could use 1198 * #for(x,y,z) / #endfor cpp directives if they existed. 1199 */ 1200 for (x = 0; x < NCPU; x++) { 1201 gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL]; 1202 ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd); 1203 } 1204#endif 1205 1206 /* make ldt memory segments */ 1207 /* 1208 * The data segment limit must not cover the user area because we 1209 * don't want the user area to be writable in copyout() etc. (page 1210 * level protection is lost in kernel mode on 386's). Also, we 1211 * don't want the user area to be writable directly (page level 1212 * protection of the user area is not available on 486's with 1213 * CR0_WP set, because there is no user-read/kernel-write mode). 1214 * 1215 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1216 * should be spelled ...MAX_USER... 1217 */ 1218#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1219 /* 1220 * The code segment limit has to cover the user area until we move 1221 * the signal trampoline out of the user area. This is safe because 1222 * the code segment cannot be written to directly. 1223 */ 1224#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1225 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1226 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1227 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1228 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1229 1230 /* exceptions */ 1231 for (x = 0; x < NIDT; x++) 1232 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1233 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1234 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1235 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1236 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1237 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1238 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1239 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1240 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1241 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1242 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1243 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1244 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1245 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1246 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1247 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1248 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1249 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1250 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1251 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1252 setidt(0x80, &IDTVEC(int0x80_syscall), 1253 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1254 1255#include "isa.h" 1256#if NISA >0 1257 isa_defaultirq(); 1258#endif 1259 rand_initialize(); 1260 1261 r_gdt.rd_limit = sizeof(gdt) - 1; 1262 r_gdt.rd_base = (int) gdt; 1263 lgdt(&r_gdt); 1264 1265 r_idt.rd_limit = sizeof(idt) - 1; 1266 r_idt.rd_base = (int) idt; 1267 lidt(&r_idt); 1268 1269 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1270 lldt(_default_ldt); 1271#ifdef USER_LDT 1272 currentldt = _default_ldt; 1273#endif 1274 1275#ifdef DDB 1276 kdb_init(); 1277 if (boothowto & RB_KDB) 1278 Debugger("Boot flags requested debugger"); 1279#endif 1280 1281 finishidentcpu(); /* Final stage of CPU initialization */ 1282 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1283 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1284 initializecpu(); /* Initialize CPU registers */ 1285 1286 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1287#ifdef VM86 1288 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE - 16; 1289#else 1290 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE; 1291#endif /* VM86 */ 1292 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1293 common_tss.tss_ioopt = (sizeof common_tss) << 16; 1294 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1295 ltr(gsel_tss); 1296#ifdef VM86 1297 private_tss = 0; 1298 my_tr = GPROC0_SEL; 1299#endif 1300 1301 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1302 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1303 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1304 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1305 dblfault_tss.tss_cr3 = (int)IdlePTD; 1306 dblfault_tss.tss_eip = (int) dblfault_handler; 1307 dblfault_tss.tss_eflags = PSL_KERNEL; 1308 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = 1309 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1310 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1311 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1312 1313#ifdef VM86 1314 initial_bioscalls(&biosbasemem, &biosextmem); 1315#else 1316 1317 /* Use BIOS values stored in RTC CMOS RAM, since probing 1318 * breaks certain 386 AT relics. 1319 */ 1320 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1321 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1322#endif 1323 1324 /* 1325 * If BIOS tells us that it has more than 640k in the basemem, 1326 * don't believe it - set it to 640k. 1327 */ 1328 if (biosbasemem > 640) { 1329 printf("Preposterous RTC basemem of %uK, truncating to 640K\n", 1330 biosbasemem); 1331 biosbasemem = 640; 1332 } 1333 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1334 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1335 bootinfo.bi_basemem); 1336 bootinfo.bi_basemem = 640; 1337 } 1338 1339 /* 1340 * Warn if the official BIOS interface disagrees with the RTC 1341 * interface used above about the amount of base memory or the 1342 * amount of extended memory. Prefer the BIOS value for the base 1343 * memory. This is necessary for machines that `steal' base 1344 * memory for use as BIOS memory, at least if we are going to use 1345 * the BIOS for apm. Prefer the RTC value for extended memory. 1346 * Eventually the hackish interface shouldn't even be looked at. 1347 */ 1348 if (bootinfo.bi_memsizes_valid) { 1349 if (bootinfo.bi_basemem != biosbasemem) { 1350 vm_offset_t pa; 1351 1352 printf( 1353 "BIOS basemem (%uK) != RTC basemem (%uK), setting to BIOS value\n", 1354 bootinfo.bi_basemem, biosbasemem); 1355 biosbasemem = bootinfo.bi_basemem; 1356 1357 /* 1358 * XXX if biosbasemem is now < 640, there is `hole' 1359 * between the end of base memory and the start of 1360 * ISA memory. The hole may be empty or it may 1361 * contain BIOS code or data. Map it read/write so 1362 * that the BIOS can write to it. (Memory from 0 to 1363 * the physical end of the kernel is mapped read-only 1364 * to begin with and then parts of it are remapped. 1365 * The parts that aren't remapped form holes that 1366 * remain read-only and are unused by the kernel. 1367 * The base memory area is below the physical end of 1368 * the kernel and right now forms a read-only hole. 1369 * The part of it from PAGE_SIZE to 1370 * (trunc_page(biosbasemem * 1024) - 1) will be 1371 * remapped and used by the kernel later.) 1372 * 1373 * This code is similar to the code used in 1374 * pmap_mapdev, but since no memory needs to be 1375 * allocated we simply change the mapping. 1376 */ 1377 for (pa = trunc_page(biosbasemem * 1024); 1378 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1379 unsigned *pte; 1380 1381 pte = (unsigned *)vtopte(pa + KERNBASE); 1382 *pte = pa | PG_RW | PG_V; 1383 } 1384 } 1385 if (bootinfo.bi_extmem != biosextmem) 1386 printf("BIOS extmem (%uK) != RTC extmem (%uK)\n", 1387 bootinfo.bi_extmem, biosextmem); 1388 } 1389 1390#ifdef SMP 1391 /* make hole for AP bootstrap code */ 1392 pagesinbase = mp_bootaddress(biosbasemem) / PAGE_SIZE; 1393#else 1394 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1395#endif 1396 1397 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1398 1399 /* 1400 * Special hack for chipsets that still remap the 384k hole when 1401 * there's 16MB of memory - this really confuses people that 1402 * are trying to use bus mastering ISA controllers with the 1403 * "16MB limit"; they only have 16MB, but the remapping puts 1404 * them beyond the limit. 1405 */ 1406 /* 1407 * If extended memory is between 15-16MB (16-17MB phys address range), 1408 * chop it to 15MB. 1409 */ 1410 if ((pagesinext > 3840) && (pagesinext < 4096)) 1411 pagesinext = 3840; 1412 1413 /* 1414 * Maxmem isn't the "maximum memory", it's one larger than the 1415 * highest page of the physical address space. It should be 1416 * called something like "Maxphyspage". 1417 */ 1418 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1419 /* 1420 * Indicate that we wish to do a speculative search for memory beyond 1421 * the end of the reported size if the indicated amount is 64MB (0x4000 1422 * pages) - which is the largest amount that the BIOS/bootblocks can 1423 * currently report. If a specific amount of memory is indicated via 1424 * the MAXMEM option or the npx0 "msize", then don't do the speculative 1425 * memory probe. 1426 */ 1427 if (Maxmem >= 0x4000) 1428 speculative_mprobe = TRUE; 1429 else 1430 speculative_mprobe = FALSE; 1431 1432#ifdef MAXMEM 1433 Maxmem = MAXMEM/4; 1434 speculative_mprobe = FALSE; 1435#endif 1436 1437#if NNPX > 0 1438 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1439 if (idp != NULL && idp->id_msize != 0) { 1440 Maxmem = idp->id_msize / 4; 1441 speculative_mprobe = FALSE; 1442 } 1443#endif 1444 1445#ifdef SMP 1446 /* look for the MP hardware - needed for apic addresses */ 1447 mp_probe(); 1448#endif 1449 1450 /* call pmap initialization to make new kernel address space */ 1451 pmap_bootstrap (first, 0); 1452 1453 /* 1454 * Size up each available chunk of physical memory. 1455 */ 1456 1457 /* 1458 * We currently don't bother testing base memory. 1459 * XXX ...but we probably should. 1460 */ 1461 pa_indx = 0; 1462 if (pagesinbase > 1) { 1463 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1464 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1465 physmem = pagesinbase - 1; 1466 } else { 1467 /* point at first chunk end */ 1468 pa_indx++; 1469 } 1470 1471 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1472 int tmp, page_bad; 1473 1474 page_bad = FALSE; 1475 1476 /* 1477 * map page into kernel: valid, read/write, non-cacheable 1478 */ 1479 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1480 invltlb(); 1481 1482 tmp = *(int *)CADDR1; 1483 /* 1484 * Test for alternating 1's and 0's 1485 */ 1486 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1487 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1488 page_bad = TRUE; 1489 } 1490 /* 1491 * Test for alternating 0's and 1's 1492 */ 1493 *(volatile int *)CADDR1 = 0x55555555; 1494 if (*(volatile int *)CADDR1 != 0x55555555) { 1495 page_bad = TRUE; 1496 } 1497 /* 1498 * Test for all 1's 1499 */ 1500 *(volatile int *)CADDR1 = 0xffffffff; 1501 if (*(volatile int *)CADDR1 != 0xffffffff) { 1502 page_bad = TRUE; 1503 } 1504 /* 1505 * Test for all 0's 1506 */ 1507 *(volatile int *)CADDR1 = 0x0; 1508 if (*(volatile int *)CADDR1 != 0x0) { 1509 /* 1510 * test of page failed 1511 */ 1512 page_bad = TRUE; 1513 } 1514 /* 1515 * Restore original value. 1516 */ 1517 *(int *)CADDR1 = tmp; 1518 1519 /* 1520 * Adjust array of valid/good pages. 1521 */ 1522 if (page_bad == FALSE) { 1523 /* 1524 * If this good page is a continuation of the 1525 * previous set of good pages, then just increase 1526 * the end pointer. Otherwise start a new chunk. 1527 * Note that "end" points one higher than end, 1528 * making the range >= start and < end. 1529 * If we're also doing a speculative memory 1530 * test and we at or past the end, bump up Maxmem 1531 * so that we keep going. The first bad page 1532 * will terminate the loop. 1533 */ 1534 if (phys_avail[pa_indx] == target_page) { 1535 phys_avail[pa_indx] += PAGE_SIZE; 1536 if (speculative_mprobe == TRUE && 1537 phys_avail[pa_indx] >= (64*1024*1024)) 1538 Maxmem++; 1539 } else { 1540 pa_indx++; 1541 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1542 printf("Too many holes in the physical address space, giving up\n"); 1543 pa_indx--; 1544 break; 1545 } 1546 phys_avail[pa_indx++] = target_page; /* start */ 1547 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1548 } 1549 physmem++; 1550 } 1551 } 1552 1553 *(int *)CMAP1 = 0; 1554 invltlb(); 1555 1556 /* 1557 * XXX 1558 * The last chunk must contain at least one page plus the message 1559 * buffer to avoid complicating other code (message buffer address 1560 * calculation, etc.). 1561 */ 1562 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1563 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1564 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1565 phys_avail[pa_indx--] = 0; 1566 phys_avail[pa_indx--] = 0; 1567 } 1568 1569 Maxmem = atop(phys_avail[pa_indx]); 1570 1571 /* Trim off space for the message buffer. */ 1572 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1573 1574 avail_end = phys_avail[pa_indx]; 1575 1576 /* now running on new page tables, configured,and u/iom is accessible */ 1577 1578 /* Map the message buffer. */ 1579 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1580 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1581 avail_end + off, VM_PROT_ALL, TRUE); 1582 1583 msgbufinit(msgbufp, MSGBUF_SIZE); 1584 1585 /* make a call gate to reenter kernel with */ 1586 gdp = &ldt[LSYS5CALLS_SEL].gd; 1587 1588 x = (int) &IDTVEC(syscall); 1589 gdp->gd_looffset = x++; 1590 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1591 gdp->gd_stkcpy = 1; 1592 gdp->gd_type = SDT_SYS386CGT; 1593 gdp->gd_dpl = SEL_UPL; 1594 gdp->gd_p = 1; 1595 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1596 1597 /* XXX does this work? */ 1598 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1599 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1600 1601 /* transfer to user mode */ 1602 1603 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1604 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1605 1606 /* setup proc 0's pcb */ 1607 proc0.p_addr->u_pcb.pcb_flags = 0; 1608 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1609#ifdef SMP 1610 proc0.p_addr->u_pcb.pcb_mpnest = 1; 1611#endif 1612#ifdef VM86 1613 proc0.p_addr->u_pcb.pcb_ext = 0; 1614#endif 1615 1616 /* Sigh, relocate physical addresses left from bootstrap */ 1617 if (bootinfo.bi_modulep) { 1618 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1619 preload_bootstrap_relocate(KERNBASE); 1620 } 1621 if (bootinfo.bi_envp) 1622 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1623} 1624 1625#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1626static void f00f_hack(void *unused); 1627SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 1628 1629static void 1630f00f_hack(void *unused) { 1631#ifndef SMP 1632 struct region_descriptor r_idt; 1633#endif 1634 vm_offset_t tmp; 1635 1636 if (!has_f00f_bug) 1637 return; 1638 1639 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 1640 1641 r_idt.rd_limit = sizeof(idt) - 1; 1642 1643 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 1644 if (tmp == 0) 1645 panic("kmem_alloc returned 0"); 1646 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0) 1647 panic("kmem_alloc returned non-page-aligned memory"); 1648 /* Put the first seven entries in the lower page */ 1649 t_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8)); 1650 bcopy(idt, t_idt, sizeof(idt)); 1651 r_idt.rd_base = (int)t_idt; 1652 lidt(&r_idt); 1653 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 1654 VM_PROT_READ, FALSE) != KERN_SUCCESS) 1655 panic("vm_map_protect failed"); 1656 return; 1657} 1658#endif /* defined(I586_CPU) && !NO_F00F_HACK */ 1659 1660int 1661ptrace_set_pc(p, addr) 1662 struct proc *p; 1663 unsigned long addr; 1664{ 1665 p->p_md.md_regs->tf_eip = addr; 1666 return (0); 1667} 1668 1669int 1670ptrace_single_step(p) 1671 struct proc *p; 1672{ 1673 p->p_md.md_regs->tf_eflags |= PSL_T; 1674 return (0); 1675} 1676 1677int ptrace_read_u_check(p, addr, len) 1678 struct proc *p; 1679 vm_offset_t addr; 1680 size_t len; 1681{ 1682 vm_offset_t gap; 1683 1684 if ((vm_offset_t) (addr + len) < addr) 1685 return EPERM; 1686 if ((vm_offset_t) (addr + len) <= sizeof(struct user)) 1687 return 0; 1688 1689 gap = (char *) p->p_md.md_regs - (char *) p->p_addr; 1690 1691 if ((vm_offset_t) addr < gap) 1692 return EPERM; 1693 if ((vm_offset_t) (addr + len) <= 1694 (vm_offset_t) (gap + sizeof(struct trapframe))) 1695 return 0; 1696 return EPERM; 1697} 1698 1699int ptrace_write_u(p, off, data) 1700 struct proc *p; 1701 vm_offset_t off; 1702 long data; 1703{ 1704 struct trapframe frame_copy; 1705 vm_offset_t min; 1706 struct trapframe *tp; 1707 1708 /* 1709 * Privileged kernel state is scattered all over the user area. 1710 * Only allow write access to parts of regs and to fpregs. 1711 */ 1712 min = (char *)p->p_md.md_regs - (char *)p->p_addr; 1713 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1714 tp = p->p_md.md_regs; 1715 frame_copy = *tp; 1716 *(int *)((char *)&frame_copy + (off - min)) = data; 1717 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1718 !CS_SECURE(frame_copy.tf_cs)) 1719 return (EINVAL); 1720 *(int*)((char *)p->p_addr + off) = data; 1721 return (0); 1722 } 1723 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1724 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1725 *(int*)((char *)p->p_addr + off) = data; 1726 return (0); 1727 } 1728 return (EFAULT); 1729} 1730 1731int 1732fill_regs(p, regs) 1733 struct proc *p; 1734 struct reg *regs; 1735{ 1736 struct pcb *pcb; 1737 struct trapframe *tp; 1738 1739 tp = p->p_md.md_regs; 1740 regs->r_es = tp->tf_es; 1741 regs->r_ds = tp->tf_ds; 1742 regs->r_edi = tp->tf_edi; 1743 regs->r_esi = tp->tf_esi; 1744 regs->r_ebp = tp->tf_ebp; 1745 regs->r_ebx = tp->tf_ebx; 1746 regs->r_edx = tp->tf_edx; 1747 regs->r_ecx = tp->tf_ecx; 1748 regs->r_eax = tp->tf_eax; 1749 regs->r_eip = tp->tf_eip; 1750 regs->r_cs = tp->tf_cs; 1751 regs->r_eflags = tp->tf_eflags; 1752 regs->r_esp = tp->tf_esp; 1753 regs->r_ss = tp->tf_ss; 1754 pcb = &p->p_addr->u_pcb; 1755 regs->r_fs = pcb->pcb_fs; 1756 regs->r_gs = pcb->pcb_gs; 1757 return (0); 1758} 1759 1760int 1761set_regs(p, regs) 1762 struct proc *p; 1763 struct reg *regs; 1764{ 1765 struct pcb *pcb; 1766 struct trapframe *tp; 1767 1768 tp = p->p_md.md_regs; 1769 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1770 !CS_SECURE(regs->r_cs)) 1771 return (EINVAL); 1772 tp->tf_es = regs->r_es; 1773 tp->tf_ds = regs->r_ds; 1774 tp->tf_edi = regs->r_edi; 1775 tp->tf_esi = regs->r_esi; 1776 tp->tf_ebp = regs->r_ebp; 1777 tp->tf_ebx = regs->r_ebx; 1778 tp->tf_edx = regs->r_edx; 1779 tp->tf_ecx = regs->r_ecx; 1780 tp->tf_eax = regs->r_eax; 1781 tp->tf_eip = regs->r_eip; 1782 tp->tf_cs = regs->r_cs; 1783 tp->tf_eflags = regs->r_eflags; 1784 tp->tf_esp = regs->r_esp; 1785 tp->tf_ss = regs->r_ss; 1786 pcb = &p->p_addr->u_pcb; 1787 pcb->pcb_fs = regs->r_fs; 1788 pcb->pcb_gs = regs->r_gs; 1789 return (0); 1790} 1791 1792int 1793fill_fpregs(p, fpregs) 1794 struct proc *p; 1795 struct fpreg *fpregs; 1796{ 1797 bcopy(&p->p_addr->u_pcb.pcb_savefpu, fpregs, sizeof *fpregs); 1798 return (0); 1799} 1800 1801int 1802set_fpregs(p, fpregs) 1803 struct proc *p; 1804 struct fpreg *fpregs; 1805{ 1806 bcopy(fpregs, &p->p_addr->u_pcb.pcb_savefpu, sizeof *fpregs); 1807 return (0); 1808} 1809 1810#ifndef DDB 1811void 1812Debugger(const char *msg) 1813{ 1814 printf("Debugger(\"%s\") called.\n", msg); 1815} 1816#endif /* no DDB */ 1817 1818#include <sys/disklabel.h> 1819 1820/* 1821 * Determine the size of the transfer, and make sure it is 1822 * within the boundaries of the partition. Adjust transfer 1823 * if needed, and signal errors or early completion. 1824 */ 1825int 1826bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1827{ 1828 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1829 int labelsect = lp->d_partitions[0].p_offset; 1830 int maxsz = p->p_size, 1831 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1832 1833 /* overwriting disk label ? */ 1834 /* XXX should also protect bootstrap in first 8K */ 1835 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1836#if LABELSECTOR != 0 1837 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1838#endif 1839 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1840 bp->b_error = EROFS; 1841 goto bad; 1842 } 1843 1844#if defined(DOSBBSECTOR) && defined(notyet) 1845 /* overwriting master boot record? */ 1846 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1847 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1848 bp->b_error = EROFS; 1849 goto bad; 1850 } 1851#endif 1852 1853 /* beyond partition? */ 1854 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1855 /* if exactly at end of disk, return an EOF */ 1856 if (bp->b_blkno == maxsz) { 1857 bp->b_resid = bp->b_bcount; 1858 return(0); 1859 } 1860 /* or truncate if part of it fits */ 1861 sz = maxsz - bp->b_blkno; 1862 if (sz <= 0) { 1863 bp->b_error = EINVAL; 1864 goto bad; 1865 } 1866 bp->b_bcount = sz << DEV_BSHIFT; 1867 } 1868 1869 bp->b_pblkno = bp->b_blkno + p->p_offset; 1870 return(1); 1871 1872bad: 1873 bp->b_flags |= B_ERROR; 1874 return(-1); 1875} 1876 1877#ifdef DDB 1878 1879/* 1880 * Provide inb() and outb() as functions. They are normally only 1881 * available as macros calling inlined functions, thus cannot be 1882 * called inside DDB. 1883 * 1884 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1885 */ 1886 1887#undef inb 1888#undef outb 1889 1890/* silence compiler warnings */ 1891u_char inb(u_int); 1892void outb(u_int, u_char); 1893 1894u_char 1895inb(u_int port) 1896{ 1897 u_char data; 1898 /* 1899 * We use %%dx and not %1 here because i/o is done at %dx and not at 1900 * %edx, while gcc generates inferior code (movw instead of movl) 1901 * if we tell it to load (u_short) port. 1902 */ 1903 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1904 return (data); 1905} 1906 1907void 1908outb(u_int port, u_char data) 1909{ 1910 u_char al; 1911 /* 1912 * Use an unnecessary assignment to help gcc's register allocator. 1913 * This make a large difference for gcc-1.40 and a tiny difference 1914 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1915 * best results. gcc-2.6.0 can't handle this. 1916 */ 1917 al = data; 1918 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1919} 1920 1921#endif /* DDB */ 1922