machdep.c revision 42437
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.320 1999/01/06 23:05:36 julian Exp $ 39 */ 40 41#include "apm.h" 42#include "ether.h" 43#include "npx.h" 44#include "opt_atalk.h" 45#include "opt_cpu.h" 46#include "opt_ddb.h" 47#include "opt_inet.h" 48#include "opt_ipx.h" 49#include "opt_maxmem.h" 50#include "opt_msgbuf.h" 51#include "opt_perfmon.h" 52#include "opt_smp.h" 53#include "opt_sysvipc.h" 54#include "opt_user_ldt.h" 55#include "opt_userconfig.h" 56#include "opt_vm86.h" 57 58#include <sys/param.h> 59#include <sys/systm.h> 60#include <sys/sysproto.h> 61#include <sys/signalvar.h> 62#include <sys/kernel.h> 63#include <sys/linker.h> 64#include <sys/proc.h> 65#include <sys/buf.h> 66#include <sys/reboot.h> 67#include <sys/callout.h> 68#include <sys/malloc.h> 69#include <sys/mbuf.h> 70#include <sys/msgbuf.h> 71#include <sys/sysent.h> 72#include <sys/sysctl.h> 73#include <sys/vmmeter.h> 74 75#ifdef SYSVSHM 76#include <sys/shm.h> 77#endif 78 79#ifdef SYSVMSG 80#include <sys/msg.h> 81#endif 82 83#ifdef SYSVSEM 84#include <sys/sem.h> 85#endif 86 87#include <vm/vm.h> 88#include <vm/vm_param.h> 89#include <vm/vm_prot.h> 90#include <sys/lock.h> 91#include <vm/vm_kern.h> 92#include <vm/vm_object.h> 93#include <vm/vm_page.h> 94#include <vm/vm_map.h> 95#include <vm/vm_pager.h> 96#include <vm/vm_extern.h> 97 98#include <sys/user.h> 99#include <sys/exec.h> 100 101#include <ddb/ddb.h> 102 103#if defined(INET) || defined(IPX) || defined(NATM) || defined(NETATALK) \ 104 || NETHER > 0 || defined(NS) 105#define NETISR 106#endif 107 108#ifdef NETISR 109#include <net/netisr.h> 110#endif 111 112#include <machine/cpu.h> 113#include <machine/reg.h> 114#include <machine/clock.h> 115#include <machine/specialreg.h> 116#include <machine/cons.h> 117#include <machine/bootinfo.h> 118#include <machine/ipl.h> 119#include <machine/md_var.h> 120#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 121#ifdef SMP 122#include <machine/smp.h> 123#endif 124#ifdef PERFMON 125#include <machine/perfmon.h> 126#endif 127 128#include <i386/isa/isa_device.h> 129#include <i386/isa/intr_machdep.h> 130#ifndef VM86 131#include <i386/isa/rtc.h> 132#endif 133#include <machine/random.h> 134#include <sys/ptrace.h> 135 136extern void init386 __P((int first)); 137extern void dblfault_handler __P((void)); 138 139extern void printcpuinfo(void); /* XXX header file */ 140extern void earlysetcpuclass(void); /* same header file */ 141extern void finishidentcpu(void); 142extern void panicifcpuunsupported(void); 143extern void initializecpu(void); 144 145static void cpu_startup __P((void *)); 146SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 147 148static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf"); 149 150int _udatasel, _ucodesel; 151u_int atdevbase; 152 153#if defined(SWTCH_OPTIM_STATS) 154extern int swtch_optim_stats; 155SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 156 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 157SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 158 CTLFLAG_RD, &tlb_flush_count, 0, ""); 159#endif 160 161#ifdef PC98 162static int ispc98 = 1; 163#else 164static int ispc98 = 0; 165#endif 166SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 167 168int physmem = 0; 169int cold = 1; 170 171static int 172sysctl_hw_physmem SYSCTL_HANDLER_ARGS 173{ 174 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 175 return (error); 176} 177 178SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 179 0, 0, sysctl_hw_physmem, "I", ""); 180 181static int 182sysctl_hw_usermem SYSCTL_HANDLER_ARGS 183{ 184 int error = sysctl_handle_int(oidp, 0, 185 ctob(physmem - cnt.v_wire_count), req); 186 return (error); 187} 188 189SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 190 0, 0, sysctl_hw_usermem, "I", ""); 191 192static int 193sysctl_hw_availpages SYSCTL_HANDLER_ARGS 194{ 195 int error = sysctl_handle_int(oidp, 0, 196 i386_btop(avail_end - avail_start), req); 197 return (error); 198} 199 200SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD, 201 0, 0, sysctl_hw_availpages, "I", ""); 202 203static int 204sysctl_machdep_msgbuf SYSCTL_HANDLER_ARGS 205{ 206 int error; 207 208 /* Unwind the buffer, so that it's linear (possibly starting with 209 * some initial nulls). 210 */ 211 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr, 212 msgbufp->msg_size-msgbufp->msg_bufr,req); 213 if(error) return(error); 214 if(msgbufp->msg_bufr>0) { 215 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr, 216 msgbufp->msg_bufr,req); 217 } 218 return(error); 219} 220 221SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD, 222 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer"); 223 224static int msgbuf_clear; 225 226static int 227sysctl_machdep_msgbuf_clear SYSCTL_HANDLER_ARGS 228{ 229 int error; 230 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 231 req); 232 if (!error && req->newptr) { 233 /* Clear the buffer and reset write pointer */ 234 bzero(msgbufp->msg_ptr,msgbufp->msg_size); 235 msgbufp->msg_bufr=msgbufp->msg_bufx=0; 236 msgbuf_clear=0; 237 } 238 return (error); 239} 240 241SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW, 242 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I", 243 "Clear kernel message buffer"); 244 245int bootverbose = 0, Maxmem = 0; 246long dumplo; 247 248vm_offset_t phys_avail[10]; 249 250/* must be 2 less so 0 0 can signal end of chunks */ 251#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 252 253#ifdef NETISR 254static void setup_netisrs __P((struct linker_set *)); 255#endif 256 257static vm_offset_t buffer_sva, buffer_eva; 258vm_offset_t clean_sva, clean_eva; 259static vm_offset_t pager_sva, pager_eva; 260#ifdef NETISR 261extern struct linker_set netisr_set; 262#endif 263#if NNPX > 0 264extern struct isa_driver npxdriver; 265#endif 266 267#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 268 269static void 270cpu_startup(dummy) 271 void *dummy; 272{ 273 register unsigned i; 274 register caddr_t v; 275 vm_offset_t maxaddr; 276 vm_size_t size = 0; 277 int firstaddr; 278 vm_offset_t minaddr; 279 280 if (boothowto & RB_VERBOSE) 281 bootverbose++; 282 283 /* 284 * Good {morning,afternoon,evening,night}. 285 */ 286 printf(version); 287 earlysetcpuclass(); 288 startrtclock(); 289 printcpuinfo(); 290 panicifcpuunsupported(); 291#ifdef PERFMON 292 perfmon_init(); 293#endif 294 printf("real memory = %d (%dK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 295 /* 296 * Display any holes after the first chunk of extended memory. 297 */ 298 if (bootverbose) { 299 int indx; 300 301 printf("Physical memory chunk(s):\n"); 302 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 303 int size1 = phys_avail[indx + 1] - phys_avail[indx]; 304 305 printf("0x%08x - 0x%08x, %d bytes (%d pages)\n", 306 phys_avail[indx], phys_avail[indx + 1] - 1, size1, 307 size1 / PAGE_SIZE); 308 } 309 } 310 311#ifdef NETISR 312 /* 313 * Quickly wire in netisrs. 314 */ 315 setup_netisrs(&netisr_set); 316#endif 317 318 /* 319 * Calculate callout wheel size 320 */ 321 for (callwheelsize = 1, callwheelbits = 0; 322 callwheelsize < ncallout; 323 callwheelsize <<= 1, ++callwheelbits) 324 ; 325 callwheelmask = callwheelsize - 1; 326 327 /* 328 * Allocate space for system data structures. 329 * The first available kernel virtual address is in "v". 330 * As pages of kernel virtual memory are allocated, "v" is incremented. 331 * As pages of memory are allocated and cleared, 332 * "firstaddr" is incremented. 333 * An index into the kernel page table corresponding to the 334 * virtual memory address maintained in "v" is kept in "mapaddr". 335 */ 336 337 /* 338 * Make two passes. The first pass calculates how much memory is 339 * needed and allocates it. The second pass assigns virtual 340 * addresses to the various data structures. 341 */ 342 firstaddr = 0; 343again: 344 v = (caddr_t)firstaddr; 345 346#define valloc(name, type, num) \ 347 (name) = (type *)v; v = (caddr_t)((name)+(num)) 348#define valloclim(name, type, num, lim) \ 349 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 350 351 valloc(callout, struct callout, ncallout); 352 valloc(callwheel, struct callout_tailq, callwheelsize); 353#ifdef SYSVSHM 354 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 355#endif 356#ifdef SYSVSEM 357 valloc(sema, struct semid_ds, seminfo.semmni); 358 valloc(sem, struct sem, seminfo.semmns); 359 /* This is pretty disgusting! */ 360 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 361#endif 362#ifdef SYSVMSG 363 valloc(msgpool, char, msginfo.msgmax); 364 valloc(msgmaps, struct msgmap, msginfo.msgseg); 365 valloc(msghdrs, struct msg, msginfo.msgtql); 366 valloc(msqids, struct msqid_ds, msginfo.msgmni); 367#endif 368 369 if (nbuf == 0) { 370 nbuf = 30; 371 if( physmem > 1024) 372 nbuf += min((physmem - 1024) / 8, 2048); 373 } 374 nswbuf = max(min(nbuf/4, 64), 16); 375 376 valloc(swbuf, struct buf, nswbuf); 377 valloc(buf, struct buf, nbuf); 378 379 380 /* 381 * End of first pass, size has been calculated so allocate memory 382 */ 383 if (firstaddr == 0) { 384 size = (vm_size_t)(v - firstaddr); 385 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 386 if (firstaddr == 0) 387 panic("startup: no room for tables"); 388 goto again; 389 } 390 391 /* 392 * End of second pass, addresses have been assigned 393 */ 394 if ((vm_size_t)(v - firstaddr) != size) 395 panic("startup: table size inconsistency"); 396 397 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 398 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size); 399 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 400 (nbuf*BKVASIZE)); 401 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 402 (nswbuf*MAXPHYS) + pager_map_size); 403 pager_map->system_map = 1; 404 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 405 (16*(ARG_MAX+(PAGE_SIZE*3)))); 406 407 /* 408 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 409 * we use the more space efficient malloc in place of kmem_alloc. 410 */ 411 { 412 vm_offset_t mb_map_size; 413 414 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 415 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 416 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 417 bzero(mclrefcnt, mb_map_size / MCLBYTES); 418 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 419 mb_map_size); 420 mb_map->system_map = 1; 421 } 422 423 /* 424 * Initialize callouts 425 */ 426 SLIST_INIT(&callfree); 427 for (i = 0; i < ncallout; i++) { 428 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle); 429 } 430 431 for (i = 0; i < callwheelsize; i++) { 432 TAILQ_INIT(&callwheel[i]); 433 } 434 435#if defined(USERCONFIG) 436 userconfig(); 437 cninit(); /* the preferred console may have changed */ 438#endif 439 440 printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count), 441 ptoa(cnt.v_free_count) / 1024); 442 443 /* 444 * Set up buffers, so they can be used to read disk labels. 445 */ 446 bufinit(); 447 vm_pager_bufferinit(); 448 449#ifdef SMP 450 /* 451 * OK, enough kmem_alloc/malloc state should be up, lets get on with it! 452 */ 453 mp_start(); /* fire up the APs and APICs */ 454 mp_announce(); 455#endif /* SMP */ 456} 457 458#ifdef NETISR 459int 460register_netisr(num, handler) 461 int num; 462 netisr_t *handler; 463{ 464 465 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 466 printf("register_netisr: bad isr number: %d\n", num); 467 return (EINVAL); 468 } 469 netisrs[num] = handler; 470 return (0); 471} 472 473static void 474setup_netisrs(ls) 475 struct linker_set *ls; 476{ 477 int i; 478 const struct netisrtab *nit; 479 480 for(i = 0; ls->ls_items[i]; i++) { 481 nit = (const struct netisrtab *)ls->ls_items[i]; 482 register_netisr(nit->nit_num, nit->nit_isr); 483 } 484} 485#endif /* NETISR */ 486 487/* 488 * Send an interrupt to process. 489 * 490 * Stack is set up to allow sigcode stored 491 * at top to call routine, followed by kcall 492 * to sigreturn routine below. After sigreturn 493 * resets the signal mask, the stack, and the 494 * frame pointer, it returns to the user 495 * specified pc, psl. 496 */ 497void 498sendsig(catcher, sig, mask, code) 499 sig_t catcher; 500 int sig, mask; 501 u_long code; 502{ 503 register struct proc *p = curproc; 504 register struct trapframe *regs; 505 register struct sigframe *fp; 506 struct sigframe sf; 507 struct sigacts *psp = p->p_sigacts; 508 int oonstack; 509 510 regs = p->p_md.md_regs; 511 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 512 /* 513 * Allocate and validate space for the signal handler context. 514 */ 515 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 516 (psp->ps_sigonstack & sigmask(sig))) { 517 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 518 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 519 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 520 } else { 521 fp = (struct sigframe *)regs->tf_esp - 1; 522 } 523 524 /* 525 * grow() will return FALSE if the fp will not fit inside the stack 526 * and the stack can not be grown. useracc will return FALSE 527 * if access is denied. 528 */ 529#ifdef VM_STACK 530 if ((grow_stack (p, (int)fp) == FALSE) || 531#else 532 if ((grow(p, (int)fp) == FALSE) || 533#endif 534 (useracc((caddr_t)fp, sizeof(struct sigframe), B_WRITE) == FALSE)) { 535 /* 536 * Process has trashed its stack; give it an illegal 537 * instruction to halt it in its tracks. 538 */ 539 SIGACTION(p, SIGILL) = SIG_DFL; 540 sig = sigmask(SIGILL); 541 p->p_sigignore &= ~sig; 542 p->p_sigcatch &= ~sig; 543 p->p_sigmask &= ~sig; 544 psignal(p, SIGILL); 545 return; 546 } 547 548 /* 549 * Build the argument list for the signal handler. 550 */ 551 if (p->p_sysent->sv_sigtbl) { 552 if (sig < p->p_sysent->sv_sigsize) 553 sig = p->p_sysent->sv_sigtbl[sig]; 554 else 555 sig = p->p_sysent->sv_sigsize + 1; 556 } 557 sf.sf_signum = sig; 558 sf.sf_code = code; 559 sf.sf_scp = &fp->sf_sc; 560 sf.sf_addr = (char *) regs->tf_err; 561 sf.sf_handler = catcher; 562 563 /* save scratch registers */ 564 sf.sf_sc.sc_eax = regs->tf_eax; 565 sf.sf_sc.sc_ebx = regs->tf_ebx; 566 sf.sf_sc.sc_ecx = regs->tf_ecx; 567 sf.sf_sc.sc_edx = regs->tf_edx; 568 sf.sf_sc.sc_esi = regs->tf_esi; 569 sf.sf_sc.sc_edi = regs->tf_edi; 570 sf.sf_sc.sc_cs = regs->tf_cs; 571 sf.sf_sc.sc_ds = regs->tf_ds; 572 sf.sf_sc.sc_ss = regs->tf_ss; 573 sf.sf_sc.sc_es = regs->tf_es; 574 sf.sf_sc.sc_isp = regs->tf_isp; 575 576 /* 577 * Build the signal context to be used by sigreturn. 578 */ 579 sf.sf_sc.sc_onstack = oonstack; 580 sf.sf_sc.sc_mask = mask; 581 sf.sf_sc.sc_sp = regs->tf_esp; 582 sf.sf_sc.sc_fp = regs->tf_ebp; 583 sf.sf_sc.sc_pc = regs->tf_eip; 584 sf.sf_sc.sc_ps = regs->tf_eflags; 585 sf.sf_sc.sc_trapno = regs->tf_trapno; 586 sf.sf_sc.sc_err = regs->tf_err; 587 588#ifdef VM86 589 /* 590 * If we're a vm86 process, we want to save the segment registers. 591 * We also change eflags to be our emulated eflags, not the actual 592 * eflags. 593 */ 594 if (regs->tf_eflags & PSL_VM) { 595 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 596 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 597 598 sf.sf_sc.sc_gs = tf->tf_vm86_gs; 599 sf.sf_sc.sc_fs = tf->tf_vm86_fs; 600 sf.sf_sc.sc_es = tf->tf_vm86_es; 601 sf.sf_sc.sc_ds = tf->tf_vm86_ds; 602 603 if (vm86->vm86_has_vme == 0) 604 sf.sf_sc.sc_ps = (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) 605 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 606 607 /* 608 * We should never have PSL_T set when returning from vm86 609 * mode. It may be set here if we deliver a signal before 610 * getting to vm86 mode, so turn it off. 611 */ 612 tf->tf_eflags &= ~(PSL_VM | PSL_T | PSL_VIF | PSL_VIP); 613 } 614#endif /* VM86 */ 615 616 /* 617 * Copy the sigframe out to the user's stack. 618 */ 619 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 620 /* 621 * Something is wrong with the stack pointer. 622 * ...Kill the process. 623 */ 624 sigexit(p, SIGILL); 625 } 626 627 regs->tf_esp = (int)fp; 628 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 629 regs->tf_cs = _ucodesel; 630 regs->tf_ds = _udatasel; 631 regs->tf_es = _udatasel; 632 regs->tf_ss = _udatasel; 633} 634 635/* 636 * System call to cleanup state after a signal 637 * has been taken. Reset signal mask and 638 * stack state from context left by sendsig (above). 639 * Return to previous pc and psl as specified by 640 * context left by sendsig. Check carefully to 641 * make sure that the user has not modified the 642 * state to gain improper privileges. 643 */ 644int 645sigreturn(p, uap) 646 struct proc *p; 647 struct sigreturn_args /* { 648 struct sigcontext *sigcntxp; 649 } */ *uap; 650{ 651 register struct sigcontext *scp; 652 register struct sigframe *fp; 653 register struct trapframe *regs = p->p_md.md_regs; 654 int eflags; 655 656 /* 657 * (XXX old comment) regs->tf_esp points to the return address. 658 * The user scp pointer is above that. 659 * The return address is faked in the signal trampoline code 660 * for consistency. 661 */ 662 scp = uap->sigcntxp; 663 fp = (struct sigframe *) 664 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 665 666 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 667 return(EFAULT); 668 669 eflags = scp->sc_ps; 670#ifdef VM86 671 if (eflags & PSL_VM) { 672 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 673 struct vm86_kernel *vm86; 674 675 /* 676 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 677 * set up the vm86 area, and we can't enter vm86 mode. 678 */ 679 if (p->p_addr->u_pcb.pcb_ext == 0) 680 return (EINVAL); 681 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 682 if (vm86->vm86_inited == 0) 683 return (EINVAL); 684 685 /* go back to user mode if both flags are set */ 686 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 687 trapsignal(p, SIGBUS, 0); 688 689 if (vm86->vm86_has_vme) { 690 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 691 (eflags & VME_USERCHANGE) | PSL_VM; 692 } else { 693 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 694 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 695 } 696 tf->tf_vm86_ds = scp->sc_ds; 697 tf->tf_vm86_es = scp->sc_es; 698 tf->tf_vm86_fs = scp->sc_fs; 699 tf->tf_vm86_gs = scp->sc_gs; 700 tf->tf_ds = _udatasel; 701 tf->tf_es = _udatasel; 702 } else { 703#endif /* VM86 */ 704 /* 705 * Don't allow users to change privileged or reserved flags. 706 */ 707#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 708 /* 709 * XXX do allow users to change the privileged flag PSL_RF. 710 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 711 * should sometimes set it there too. tf_eflags is kept in 712 * the signal context during signal handling and there is no 713 * other place to remember it, so the PSL_RF bit may be 714 * corrupted by the signal handler without us knowing. 715 * Corruption of the PSL_RF bit at worst causes one more or 716 * one less debugger trap, so allowing it is fairly harmless. 717 */ 718 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 719#ifdef DEBUG 720 printf("sigreturn: eflags = 0x%x\n", eflags); 721#endif 722 return(EINVAL); 723 } 724 725 /* 726 * Don't allow users to load a valid privileged %cs. Let the 727 * hardware check for invalid selectors, excess privilege in 728 * other selectors, invalid %eip's and invalid %esp's. 729 */ 730#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 731 if (!CS_SECURE(scp->sc_cs)) { 732#ifdef DEBUG 733 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 734#endif 735 trapsignal(p, SIGBUS, T_PROTFLT); 736 return(EINVAL); 737 } 738 regs->tf_ds = scp->sc_ds; 739 regs->tf_es = scp->sc_es; 740#ifdef VM86 741 } 742#endif 743 744 /* restore scratch registers */ 745 regs->tf_eax = scp->sc_eax; 746 regs->tf_ebx = scp->sc_ebx; 747 regs->tf_ecx = scp->sc_ecx; 748 regs->tf_edx = scp->sc_edx; 749 regs->tf_esi = scp->sc_esi; 750 regs->tf_edi = scp->sc_edi; 751 regs->tf_cs = scp->sc_cs; 752 regs->tf_ss = scp->sc_ss; 753 regs->tf_isp = scp->sc_isp; 754 755 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 756 return(EINVAL); 757 758 if (scp->sc_onstack & 01) 759 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 760 else 761 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 762 p->p_sigmask = scp->sc_mask & ~sigcantmask; 763 regs->tf_ebp = scp->sc_fp; 764 regs->tf_esp = scp->sc_sp; 765 regs->tf_eip = scp->sc_pc; 766 regs->tf_eflags = eflags; 767 return(EJUSTRETURN); 768} 769 770/* 771 * Machine dependent boot() routine 772 * 773 * I haven't seen anything to put here yet 774 * Possibly some stuff might be grafted back here from boot() 775 */ 776void 777cpu_boot(int howto) 778{ 779} 780 781/* 782 * Shutdown the CPU as much as possible 783 */ 784void 785cpu_halt(void) 786{ 787 for (;;) 788 __asm__ ("hlt"); 789} 790 791/* 792 * Clear registers on exec 793 */ 794void 795setregs(p, entry, stack) 796 struct proc *p; 797 u_long entry; 798 u_long stack; 799{ 800 struct trapframe *regs = p->p_md.md_regs; 801 struct pcb *pcb = &p->p_addr->u_pcb; 802 803#ifdef USER_LDT 804 /* was i386_user_cleanup() in NetBSD */ 805 if (pcb->pcb_ldt) { 806 if (pcb == curpcb) { 807 lldt(_default_ldt); 808 currentldt = _default_ldt; 809 } 810 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 811 pcb->pcb_ldt_len * sizeof(union descriptor)); 812 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 813 } 814#endif 815 816 bzero((char *)regs, sizeof(struct trapframe)); 817 regs->tf_eip = entry; 818 regs->tf_esp = stack; 819 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 820 regs->tf_ss = _udatasel; 821 regs->tf_ds = _udatasel; 822 regs->tf_es = _udatasel; 823 regs->tf_cs = _ucodesel; 824 825 /* reset %fs and %gs as well */ 826 pcb->pcb_fs = _udatasel; 827 pcb->pcb_gs = _udatasel; 828 if (pcb == curpcb) { 829 __asm("movw %w0,%%fs" : : "r" (_udatasel)); 830 __asm("movw %w0,%%gs" : : "r" (_udatasel)); 831 } 832 833 /* 834 * Initialize the math emulator (if any) for the current process. 835 * Actually, just clear the bit that says that the emulator has 836 * been initialized. Initialization is delayed until the process 837 * traps to the emulator (if it is done at all) mainly because 838 * emulators don't provide an entry point for initialization. 839 */ 840 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 841 842 /* 843 * Arrange to trap the next npx or `fwait' instruction (see npx.c 844 * for why fwait must be trapped at least if there is an npx or an 845 * emulator). This is mainly to handle the case where npx0 is not 846 * configured, since the npx routines normally set up the trap 847 * otherwise. It should be done only at boot time, but doing it 848 * here allows modifying `npx_exists' for testing the emulator on 849 * systems with an npx. 850 */ 851 load_cr0(rcr0() | CR0_MP | CR0_TS); 852 853#if NNPX > 0 854 /* Initialize the npx (if any) for the current process. */ 855 npxinit(__INITIAL_NPXCW__); 856#endif 857} 858 859static int 860sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 861{ 862 int error; 863 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 864 req); 865 if (!error && req->newptr) 866 resettodr(); 867 return (error); 868} 869 870SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 871 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 872 873SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 874 CTLFLAG_RW, &disable_rtc_set, 0, ""); 875 876SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 877 CTLFLAG_RD, &bootinfo, bootinfo, ""); 878 879SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 880 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 881 882/* 883 * Initialize 386 and configure to run kernel 884 */ 885 886/* 887 * Initialize segments & interrupt table 888 */ 889 890int _default_ldt; 891#ifdef SMP 892union descriptor gdt[NGDT + NCPU]; /* global descriptor table */ 893#else 894union descriptor gdt[NGDT]; /* global descriptor table */ 895#endif 896struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 897union descriptor ldt[NLDT]; /* local descriptor table */ 898#ifdef SMP 899/* table descriptors - used to load tables by microp */ 900struct region_descriptor r_gdt, r_idt; 901#endif 902 903extern struct i386tss common_tss; /* One tss per cpu */ 904#ifdef VM86 905extern struct segment_descriptor common_tssd; 906extern int private_tss; /* flag indicating private tss */ 907extern u_int my_tr; /* which task register setting */ 908#endif /* VM86 */ 909 910#if defined(I586_CPU) && !defined(NO_F00F_HACK) 911struct gate_descriptor *t_idt; 912extern int has_f00f_bug; 913#endif 914 915static struct i386tss dblfault_tss; 916static char dblfault_stack[PAGE_SIZE]; 917 918extern struct user *proc0paddr; 919 920 921/* software prototypes -- in more palatable form */ 922struct soft_segment_descriptor gdt_segs[ 923#ifdef SMP 924 NGDT + NCPU 925#endif 926 ] = { 927/* GNULL_SEL 0 Null Descriptor */ 928{ 0x0, /* segment base address */ 929 0x0, /* length */ 930 0, /* segment type */ 931 0, /* segment descriptor priority level */ 932 0, /* segment descriptor present */ 933 0, 0, 934 0, /* default 32 vs 16 bit size */ 935 0 /* limit granularity (byte/page units)*/ }, 936/* GCODE_SEL 1 Code Descriptor for kernel */ 937{ 0x0, /* segment base address */ 938 0xfffff, /* length - all address space */ 939 SDT_MEMERA, /* segment type */ 940 0, /* segment descriptor priority level */ 941 1, /* segment descriptor present */ 942 0, 0, 943 1, /* default 32 vs 16 bit size */ 944 1 /* limit granularity (byte/page units)*/ }, 945/* GDATA_SEL 2 Data Descriptor for kernel */ 946{ 0x0, /* segment base address */ 947 0xfffff, /* length - all address space */ 948 SDT_MEMRWA, /* segment type */ 949 0, /* segment descriptor priority level */ 950 1, /* segment descriptor present */ 951 0, 0, 952 1, /* default 32 vs 16 bit size */ 953 1 /* limit granularity (byte/page units)*/ }, 954/* GLDT_SEL 3 LDT Descriptor */ 955{ (int) ldt, /* segment base address */ 956 sizeof(ldt)-1, /* length - all address space */ 957 SDT_SYSLDT, /* segment type */ 958 SEL_UPL, /* segment descriptor priority level */ 959 1, /* segment descriptor present */ 960 0, 0, 961 0, /* unused - default 32 vs 16 bit size */ 962 0 /* limit granularity (byte/page units)*/ }, 963/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 964{ 0x0, /* segment base address */ 965 0x0, /* length - all address space */ 966 0, /* segment type */ 967 0, /* segment descriptor priority level */ 968 0, /* segment descriptor present */ 969 0, 0, 970 0, /* default 32 vs 16 bit size */ 971 0 /* limit granularity (byte/page units)*/ }, 972/* GPANIC_SEL 5 Panic Tss Descriptor */ 973{ (int) &dblfault_tss, /* segment base address */ 974 sizeof(struct i386tss)-1,/* length - all address space */ 975 SDT_SYS386TSS, /* segment type */ 976 0, /* segment descriptor priority level */ 977 1, /* segment descriptor present */ 978 0, 0, 979 0, /* unused - default 32 vs 16 bit size */ 980 0 /* limit granularity (byte/page units)*/ }, 981/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 982{ 983 (int) &common_tss, /* segment base address */ 984 sizeof(struct i386tss)-1,/* length - all address space */ 985 SDT_SYS386TSS, /* segment type */ 986 0, /* segment descriptor priority level */ 987 1, /* segment descriptor present */ 988 0, 0, 989 0, /* unused - default 32 vs 16 bit size */ 990 0 /* limit granularity (byte/page units)*/ }, 991/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 992{ (int) ldt, /* segment base address */ 993 (512 * sizeof(union descriptor)-1), /* length */ 994 SDT_SYSLDT, /* segment type */ 995 0, /* segment descriptor priority level */ 996 1, /* segment descriptor present */ 997 0, 0, 998 0, /* unused - default 32 vs 16 bit size */ 999 0 /* limit granularity (byte/page units)*/ }, 1000/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 1001{ 0, /* segment base address (overwritten by APM) */ 1002 0xfffff, /* length */ 1003 SDT_MEMERA, /* segment type */ 1004 0, /* segment descriptor priority level */ 1005 1, /* segment descriptor present */ 1006 0, 0, 1007 1, /* default 32 vs 16 bit size */ 1008 1 /* limit granularity (byte/page units)*/ }, 1009/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 1010{ 0, /* segment base address (overwritten by APM) */ 1011 0xfffff, /* length */ 1012 SDT_MEMERA, /* segment type */ 1013 0, /* segment descriptor priority level */ 1014 1, /* segment descriptor present */ 1015 0, 0, 1016 0, /* default 32 vs 16 bit size */ 1017 1 /* limit granularity (byte/page units)*/ }, 1018/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 1019{ 0, /* segment base address (overwritten by APM) */ 1020 0xfffff, /* length */ 1021 SDT_MEMRWA, /* segment type */ 1022 0, /* segment descriptor priority level */ 1023 1, /* segment descriptor present */ 1024 0, 0, 1025 1, /* default 32 vs 16 bit size */ 1026 1 /* limit granularity (byte/page units)*/ }, 1027}; 1028 1029static struct soft_segment_descriptor ldt_segs[] = { 1030 /* Null Descriptor - overwritten by call gate */ 1031{ 0x0, /* segment base address */ 1032 0x0, /* length - all address space */ 1033 0, /* segment type */ 1034 0, /* segment descriptor priority level */ 1035 0, /* segment descriptor present */ 1036 0, 0, 1037 0, /* default 32 vs 16 bit size */ 1038 0 /* limit granularity (byte/page units)*/ }, 1039 /* Null Descriptor - overwritten by call gate */ 1040{ 0x0, /* segment base address */ 1041 0x0, /* length - all address space */ 1042 0, /* segment type */ 1043 0, /* segment descriptor priority level */ 1044 0, /* segment descriptor present */ 1045 0, 0, 1046 0, /* default 32 vs 16 bit size */ 1047 0 /* limit granularity (byte/page units)*/ }, 1048 /* Null Descriptor - overwritten by call gate */ 1049{ 0x0, /* segment base address */ 1050 0x0, /* length - all address space */ 1051 0, /* segment type */ 1052 0, /* segment descriptor priority level */ 1053 0, /* segment descriptor present */ 1054 0, 0, 1055 0, /* default 32 vs 16 bit size */ 1056 0 /* limit granularity (byte/page units)*/ }, 1057 /* Code Descriptor for user */ 1058{ 0x0, /* segment base address */ 1059 0xfffff, /* length - all address space */ 1060 SDT_MEMERA, /* segment type */ 1061 SEL_UPL, /* segment descriptor priority level */ 1062 1, /* segment descriptor present */ 1063 0, 0, 1064 1, /* default 32 vs 16 bit size */ 1065 1 /* limit granularity (byte/page units)*/ }, 1066 /* Data Descriptor for user */ 1067{ 0x0, /* segment base address */ 1068 0xfffff, /* length - all address space */ 1069 SDT_MEMRWA, /* segment type */ 1070 SEL_UPL, /* segment descriptor priority level */ 1071 1, /* segment descriptor present */ 1072 0, 0, 1073 1, /* default 32 vs 16 bit size */ 1074 1 /* limit granularity (byte/page units)*/ }, 1075}; 1076 1077void 1078setidt(idx, func, typ, dpl, selec) 1079 int idx; 1080 inthand_t *func; 1081 int typ; 1082 int dpl; 1083 int selec; 1084{ 1085 struct gate_descriptor *ip; 1086 1087#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1088 ip = (t_idt != NULL ? t_idt : idt) + idx; 1089#else 1090 ip = idt + idx; 1091#endif 1092 ip->gd_looffset = (int)func; 1093 ip->gd_selector = selec; 1094 ip->gd_stkcpy = 0; 1095 ip->gd_xx = 0; 1096 ip->gd_type = typ; 1097 ip->gd_dpl = dpl; 1098 ip->gd_p = 1; 1099 ip->gd_hioffset = ((int)func)>>16 ; 1100} 1101 1102#define IDTVEC(name) __CONCAT(X,name) 1103 1104extern inthand_t 1105 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1106 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1107 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1108 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1109 IDTVEC(syscall), IDTVEC(int0x80_syscall); 1110 1111void 1112sdtossd(sd, ssd) 1113 struct segment_descriptor *sd; 1114 struct soft_segment_descriptor *ssd; 1115{ 1116 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1117 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1118 ssd->ssd_type = sd->sd_type; 1119 ssd->ssd_dpl = sd->sd_dpl; 1120 ssd->ssd_p = sd->sd_p; 1121 ssd->ssd_def32 = sd->sd_def32; 1122 ssd->ssd_gran = sd->sd_gran; 1123} 1124 1125void 1126init386(first) 1127 int first; 1128{ 1129 int x; 1130 unsigned biosbasemem, biosextmem; 1131 struct gate_descriptor *gdp; 1132 int gsel_tss; 1133 1134 struct isa_device *idp; 1135#ifndef SMP 1136 /* table descriptors - used to load tables by microp */ 1137 struct region_descriptor r_gdt, r_idt; 1138#endif 1139 int pagesinbase, pagesinext; 1140 int target_page, pa_indx; 1141 int off; 1142 int speculative_mprobe; 1143 1144 /* 1145 * Prevent lowering of the ipl if we call tsleep() early. 1146 */ 1147 safepri = cpl; 1148 1149 proc0.p_addr = proc0paddr; 1150 1151 atdevbase = ISA_HOLE_START + KERNBASE; 1152 1153 /* 1154 * Initialize the console before we print anything out. 1155 */ 1156 cninit(); 1157 1158 /* 1159 * make gdt memory segments, the code segment goes up to end of the 1160 * page with etext in it, the data segment goes to the end of 1161 * the address space 1162 */ 1163 /* 1164 * XXX text protection is temporarily (?) disabled. The limit was 1165 * i386_btop(round_page(etext)) - 1. 1166 */ 1167 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1168 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1169#ifdef BDE_DEBUGGER 1170#define NGDT1 8 /* avoid overwriting db entries with APM ones */ 1171#else 1172#define NGDT1 (sizeof gdt_segs / sizeof gdt_segs[0]) 1173#endif 1174 for (x = 0; x < NGDT1; x++) 1175 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1176#ifdef VM86 1177 common_tssd = gdt[GPROC0_SEL].sd; 1178#endif /* VM86 */ 1179 1180#ifdef SMP 1181 /* 1182 * Spin these up now. init_secondary() grabs them. We could use 1183 * #for(x,y,z) / #endfor cpp directives if they existed. 1184 */ 1185 for (x = 0; x < NCPU; x++) { 1186 gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL]; 1187 ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd); 1188 } 1189#endif 1190 1191 /* make ldt memory segments */ 1192 /* 1193 * The data segment limit must not cover the user area because we 1194 * don't want the user area to be writable in copyout() etc. (page 1195 * level protection is lost in kernel mode on 386's). Also, we 1196 * don't want the user area to be writable directly (page level 1197 * protection of the user area is not available on 486's with 1198 * CR0_WP set, because there is no user-read/kernel-write mode). 1199 * 1200 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1201 * should be spelled ...MAX_USER... 1202 */ 1203#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1204 /* 1205 * The code segment limit has to cover the user area until we move 1206 * the signal trampoline out of the user area. This is safe because 1207 * the code segment cannot be written to directly. 1208 */ 1209#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1210 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1211 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1212 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1213 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1214 1215 /* exceptions */ 1216 for (x = 0; x < NIDT; x++) 1217 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1218 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1219 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1220 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1221 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1222 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1223 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1224 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1225 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1226 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1227 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1228 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1229 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1230 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1231 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1232 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1233 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1234 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1235 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1236 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1237 setidt(0x80, &IDTVEC(int0x80_syscall), 1238 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1239 1240#include "isa.h" 1241#if NISA >0 1242 isa_defaultirq(); 1243#endif 1244 rand_initialize(); 1245 1246 r_gdt.rd_limit = sizeof(gdt) - 1; 1247 r_gdt.rd_base = (int) gdt; 1248 lgdt(&r_gdt); 1249 1250 r_idt.rd_limit = sizeof(idt) - 1; 1251 r_idt.rd_base = (int) idt; 1252 lidt(&r_idt); 1253 1254 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1255 lldt(_default_ldt); 1256#ifdef USER_LDT 1257 currentldt = _default_ldt; 1258#endif 1259 1260#ifdef DDB 1261 kdb_init(); 1262 if (boothowto & RB_KDB) 1263 Debugger("Boot flags requested debugger"); 1264#endif 1265 1266 finishidentcpu(); /* Final stage of CPU initialization */ 1267 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1268 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1269 initializecpu(); /* Initialize CPU registers */ 1270 1271 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1272#ifdef VM86 1273 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE - 16; 1274#else 1275 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE; 1276#endif /* VM86 */ 1277 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1278 common_tss.tss_ioopt = (sizeof common_tss) << 16; 1279 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1280 ltr(gsel_tss); 1281#ifdef VM86 1282 private_tss = 0; 1283 my_tr = GPROC0_SEL; 1284#endif 1285 1286 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1287 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1288 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1289 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1290 dblfault_tss.tss_cr3 = (int)IdlePTD; 1291 dblfault_tss.tss_eip = (int) dblfault_handler; 1292 dblfault_tss.tss_eflags = PSL_KERNEL; 1293 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = 1294 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1295 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1296 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1297 1298#ifdef VM86 1299 initial_bioscalls(&biosbasemem, &biosextmem); 1300#else 1301 1302 /* Use BIOS values stored in RTC CMOS RAM, since probing 1303 * breaks certain 386 AT relics. 1304 */ 1305 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1306 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1307#endif 1308 1309 /* 1310 * If BIOS tells us that it has more than 640k in the basemem, 1311 * don't believe it - set it to 640k. 1312 */ 1313 if (biosbasemem > 640) { 1314 printf("Preposterous RTC basemem of %dK, truncating to 640K\n", 1315 biosbasemem); 1316 biosbasemem = 640; 1317 } 1318 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1319 printf("Preposterous BIOS basemem of %dK, truncating to 640K\n", 1320 bootinfo.bi_basemem); 1321 bootinfo.bi_basemem = 640; 1322 } 1323 1324 /* 1325 * Warn if the official BIOS interface disagrees with the RTC 1326 * interface used above about the amount of base memory or the 1327 * amount of extended memory. Prefer the BIOS value for the base 1328 * memory. This is necessary for machines that `steal' base 1329 * memory for use as BIOS memory, at least if we are going to use 1330 * the BIOS for apm. Prefer the RTC value for extended memory. 1331 * Eventually the hackish interface shouldn't even be looked at. 1332 */ 1333 if (bootinfo.bi_memsizes_valid) { 1334 if (bootinfo.bi_basemem != biosbasemem) { 1335 vm_offset_t pa; 1336 1337 printf( 1338 "BIOS basemem (%uK) != RTC basemem (%uK), setting to BIOS value\n", 1339 bootinfo.bi_basemem, biosbasemem); 1340 biosbasemem = bootinfo.bi_basemem; 1341 1342 /* 1343 * XXX if biosbasemem is now < 640, there is `hole' 1344 * between the end of base memory and the start of 1345 * ISA memory. The hole may be empty or it may 1346 * contain BIOS code or data. Map it read/write so 1347 * that the BIOS can write to it. (Memory from 0 to 1348 * the physical end of the kernel is mapped read-only 1349 * to begin with and then parts of it are remapped. 1350 * The parts that aren't remapped form holes that 1351 * remain read-only and are unused by the kernel. 1352 * The base memory area is below the physical end of 1353 * the kernel and right now forms a read-only hole. 1354 * The part of it from PAGE_SIZE to 1355 * (trunc_page(biosbasemem * 1024) - 1) will be 1356 * remapped and used by the kernel later.) 1357 * 1358 * This code is similar to the code used in 1359 * pmap_mapdev, but since no memory needs to be 1360 * allocated we simply change the mapping. 1361 */ 1362 for (pa = trunc_page(biosbasemem * 1024); 1363 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1364 unsigned *pte; 1365 1366 pte = (unsigned *)vtopte(pa + KERNBASE); 1367 *pte = pa | PG_RW | PG_V; 1368 } 1369 } 1370 if (bootinfo.bi_extmem != biosextmem) 1371 printf("BIOS extmem (%uK) != RTC extmem (%uK)\n", 1372 bootinfo.bi_extmem, biosextmem); 1373 } 1374 1375#ifdef SMP 1376 /* make hole for AP bootstrap code */ 1377 pagesinbase = mp_bootaddress(biosbasemem) / PAGE_SIZE; 1378#else 1379 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1380#endif 1381 1382 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1383 1384 /* 1385 * Special hack for chipsets that still remap the 384k hole when 1386 * there's 16MB of memory - this really confuses people that 1387 * are trying to use bus mastering ISA controllers with the 1388 * "16MB limit"; they only have 16MB, but the remapping puts 1389 * them beyond the limit. 1390 */ 1391 /* 1392 * If extended memory is between 15-16MB (16-17MB phys address range), 1393 * chop it to 15MB. 1394 */ 1395 if ((pagesinext > 3840) && (pagesinext < 4096)) 1396 pagesinext = 3840; 1397 1398 /* 1399 * Maxmem isn't the "maximum memory", it's one larger than the 1400 * highest page of the physical address space. It should be 1401 * called something like "Maxphyspage". 1402 */ 1403 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1404 /* 1405 * Indicate that we wish to do a speculative search for memory beyond 1406 * the end of the reported size if the indicated amount is 64MB (0x4000 1407 * pages) - which is the largest amount that the BIOS/bootblocks can 1408 * currently report. If a specific amount of memory is indicated via 1409 * the MAXMEM option or the npx0 "msize", then don't do the speculative 1410 * memory probe. 1411 */ 1412 if (Maxmem >= 0x4000) 1413 speculative_mprobe = TRUE; 1414 else 1415 speculative_mprobe = FALSE; 1416 1417#ifdef MAXMEM 1418 Maxmem = MAXMEM/4; 1419 speculative_mprobe = FALSE; 1420#endif 1421 1422#if NNPX > 0 1423 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1424 if (idp != NULL && idp->id_msize != 0) { 1425 Maxmem = idp->id_msize / 4; 1426 speculative_mprobe = FALSE; 1427 } 1428#endif 1429 1430#ifdef SMP 1431 /* look for the MP hardware - needed for apic addresses */ 1432 mp_probe(); 1433#endif 1434 1435 /* call pmap initialization to make new kernel address space */ 1436 pmap_bootstrap (first, 0); 1437 1438 /* 1439 * Size up each available chunk of physical memory. 1440 */ 1441 1442 /* 1443 * We currently don't bother testing base memory. 1444 * XXX ...but we probably should. 1445 */ 1446 pa_indx = 0; 1447 if (pagesinbase > 1) { 1448 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1449 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1450 physmem = pagesinbase - 1; 1451 } else { 1452 /* point at first chunk end */ 1453 pa_indx++; 1454 } 1455 1456 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1457 int tmp, page_bad; 1458 1459 page_bad = FALSE; 1460 1461 /* 1462 * map page into kernel: valid, read/write, non-cacheable 1463 */ 1464 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1465 invltlb(); 1466 1467 tmp = *(int *)CADDR1; 1468 /* 1469 * Test for alternating 1's and 0's 1470 */ 1471 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1472 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1473 page_bad = TRUE; 1474 } 1475 /* 1476 * Test for alternating 0's and 1's 1477 */ 1478 *(volatile int *)CADDR1 = 0x55555555; 1479 if (*(volatile int *)CADDR1 != 0x55555555) { 1480 page_bad = TRUE; 1481 } 1482 /* 1483 * Test for all 1's 1484 */ 1485 *(volatile int *)CADDR1 = 0xffffffff; 1486 if (*(volatile int *)CADDR1 != 0xffffffff) { 1487 page_bad = TRUE; 1488 } 1489 /* 1490 * Test for all 0's 1491 */ 1492 *(volatile int *)CADDR1 = 0x0; 1493 if (*(volatile int *)CADDR1 != 0x0) { 1494 /* 1495 * test of page failed 1496 */ 1497 page_bad = TRUE; 1498 } 1499 /* 1500 * Restore original value. 1501 */ 1502 *(int *)CADDR1 = tmp; 1503 1504 /* 1505 * Adjust array of valid/good pages. 1506 */ 1507 if (page_bad == FALSE) { 1508 /* 1509 * If this good page is a continuation of the 1510 * previous set of good pages, then just increase 1511 * the end pointer. Otherwise start a new chunk. 1512 * Note that "end" points one higher than end, 1513 * making the range >= start and < end. 1514 * If we're also doing a speculative memory 1515 * test and we at or past the end, bump up Maxmem 1516 * so that we keep going. The first bad page 1517 * will terminate the loop. 1518 */ 1519 if (phys_avail[pa_indx] == target_page) { 1520 phys_avail[pa_indx] += PAGE_SIZE; 1521 if (speculative_mprobe == TRUE && 1522 phys_avail[pa_indx] >= (64*1024*1024)) 1523 Maxmem++; 1524 } else { 1525 pa_indx++; 1526 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1527 printf("Too many holes in the physical address space, giving up\n"); 1528 pa_indx--; 1529 break; 1530 } 1531 phys_avail[pa_indx++] = target_page; /* start */ 1532 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1533 } 1534 physmem++; 1535 } 1536 } 1537 1538 *(int *)CMAP1 = 0; 1539 invltlb(); 1540 1541 /* 1542 * XXX 1543 * The last chunk must contain at least one page plus the message 1544 * buffer to avoid complicating other code (message buffer address 1545 * calculation, etc.). 1546 */ 1547 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1548 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1549 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1550 phys_avail[pa_indx--] = 0; 1551 phys_avail[pa_indx--] = 0; 1552 } 1553 1554 Maxmem = atop(phys_avail[pa_indx]); 1555 1556 /* Trim off space for the message buffer. */ 1557 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1558 1559 avail_end = phys_avail[pa_indx]; 1560 1561 /* now running on new page tables, configured,and u/iom is accessible */ 1562 1563 /* Map the message buffer. */ 1564 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1565 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1566 avail_end + off, VM_PROT_ALL, TRUE); 1567 1568 msgbufinit(msgbufp, MSGBUF_SIZE); 1569 1570 /* make a call gate to reenter kernel with */ 1571 gdp = &ldt[LSYS5CALLS_SEL].gd; 1572 1573 x = (int) &IDTVEC(syscall); 1574 gdp->gd_looffset = x++; 1575 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1576 gdp->gd_stkcpy = 1; 1577 gdp->gd_type = SDT_SYS386CGT; 1578 gdp->gd_dpl = SEL_UPL; 1579 gdp->gd_p = 1; 1580 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1581 1582 /* XXX does this work? */ 1583 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1584 1585 /* transfer to user mode */ 1586 1587 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1588 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1589 1590 /* setup proc 0's pcb */ 1591 proc0.p_addr->u_pcb.pcb_flags = 0; 1592 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1593#ifdef SMP 1594 proc0.p_addr->u_pcb.pcb_mpnest = 1; 1595#endif 1596#ifdef VM86 1597 proc0.p_addr->u_pcb.pcb_ext = 0; 1598#endif 1599 1600 /* Sigh, relocate physical addresses left from bootstrap */ 1601 if (bootinfo.bi_modulep) { 1602 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1603 preload_bootstrap_relocate(KERNBASE); 1604 } 1605 if (bootinfo.bi_envp) 1606 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1607} 1608 1609#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1610static void f00f_hack(void *unused); 1611SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 1612 1613static void 1614f00f_hack(void *unused) { 1615#ifndef SMP 1616 struct region_descriptor r_idt; 1617#endif 1618 vm_offset_t tmp; 1619 1620 if (!has_f00f_bug) 1621 return; 1622 1623 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 1624 1625 r_idt.rd_limit = sizeof(idt) - 1; 1626 1627 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 1628 if (tmp == 0) 1629 panic("kmem_alloc returned 0"); 1630 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0) 1631 panic("kmem_alloc returned non-page-aligned memory"); 1632 /* Put the first seven entries in the lower page */ 1633 t_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8)); 1634 bcopy(idt, t_idt, sizeof(idt)); 1635 r_idt.rd_base = (int)t_idt; 1636 lidt(&r_idt); 1637 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 1638 VM_PROT_READ, FALSE) != KERN_SUCCESS) 1639 panic("vm_map_protect failed"); 1640 return; 1641} 1642#endif /* defined(I586_CPU) && !NO_F00F_HACK */ 1643 1644int 1645ptrace_set_pc(p, addr) 1646 struct proc *p; 1647 unsigned long addr; 1648{ 1649 p->p_md.md_regs->tf_eip = addr; 1650 return (0); 1651} 1652 1653int 1654ptrace_single_step(p) 1655 struct proc *p; 1656{ 1657 p->p_md.md_regs->tf_eflags |= PSL_T; 1658 return (0); 1659} 1660 1661int ptrace_read_u_check(p, addr, len) 1662 struct proc *p; 1663 vm_offset_t addr; 1664 size_t len; 1665{ 1666 vm_offset_t gap; 1667 1668 if ((vm_offset_t) (addr + len) < addr) 1669 return EPERM; 1670 if ((vm_offset_t) (addr + len) <= sizeof(struct user)) 1671 return 0; 1672 1673 gap = (char *) p->p_md.md_regs - (char *) p->p_addr; 1674 1675 if ((vm_offset_t) addr < gap) 1676 return EPERM; 1677 if ((vm_offset_t) (addr + len) <= 1678 (vm_offset_t) (gap + sizeof(struct trapframe))) 1679 return 0; 1680 return EPERM; 1681} 1682 1683int ptrace_write_u(p, off, data) 1684 struct proc *p; 1685 vm_offset_t off; 1686 long data; 1687{ 1688 struct trapframe frame_copy; 1689 vm_offset_t min; 1690 struct trapframe *tp; 1691 1692 /* 1693 * Privileged kernel state is scattered all over the user area. 1694 * Only allow write access to parts of regs and to fpregs. 1695 */ 1696 min = (char *)p->p_md.md_regs - (char *)p->p_addr; 1697 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1698 tp = p->p_md.md_regs; 1699 frame_copy = *tp; 1700 *(int *)((char *)&frame_copy + (off - min)) = data; 1701 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1702 !CS_SECURE(frame_copy.tf_cs)) 1703 return (EINVAL); 1704 *(int*)((char *)p->p_addr + off) = data; 1705 return (0); 1706 } 1707 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1708 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1709 *(int*)((char *)p->p_addr + off) = data; 1710 return (0); 1711 } 1712 return (EFAULT); 1713} 1714 1715int 1716fill_regs(p, regs) 1717 struct proc *p; 1718 struct reg *regs; 1719{ 1720 struct pcb *pcb; 1721 struct trapframe *tp; 1722 1723 tp = p->p_md.md_regs; 1724 regs->r_es = tp->tf_es; 1725 regs->r_ds = tp->tf_ds; 1726 regs->r_edi = tp->tf_edi; 1727 regs->r_esi = tp->tf_esi; 1728 regs->r_ebp = tp->tf_ebp; 1729 regs->r_ebx = tp->tf_ebx; 1730 regs->r_edx = tp->tf_edx; 1731 regs->r_ecx = tp->tf_ecx; 1732 regs->r_eax = tp->tf_eax; 1733 regs->r_eip = tp->tf_eip; 1734 regs->r_cs = tp->tf_cs; 1735 regs->r_eflags = tp->tf_eflags; 1736 regs->r_esp = tp->tf_esp; 1737 regs->r_ss = tp->tf_ss; 1738 pcb = &p->p_addr->u_pcb; 1739 regs->r_fs = pcb->pcb_fs; 1740 regs->r_gs = pcb->pcb_gs; 1741 return (0); 1742} 1743 1744int 1745set_regs(p, regs) 1746 struct proc *p; 1747 struct reg *regs; 1748{ 1749 struct pcb *pcb; 1750 struct trapframe *tp; 1751 1752 tp = p->p_md.md_regs; 1753 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1754 !CS_SECURE(regs->r_cs)) 1755 return (EINVAL); 1756 tp->tf_es = regs->r_es; 1757 tp->tf_ds = regs->r_ds; 1758 tp->tf_edi = regs->r_edi; 1759 tp->tf_esi = regs->r_esi; 1760 tp->tf_ebp = regs->r_ebp; 1761 tp->tf_ebx = regs->r_ebx; 1762 tp->tf_edx = regs->r_edx; 1763 tp->tf_ecx = regs->r_ecx; 1764 tp->tf_eax = regs->r_eax; 1765 tp->tf_eip = regs->r_eip; 1766 tp->tf_cs = regs->r_cs; 1767 tp->tf_eflags = regs->r_eflags; 1768 tp->tf_esp = regs->r_esp; 1769 tp->tf_ss = regs->r_ss; 1770 pcb = &p->p_addr->u_pcb; 1771 pcb->pcb_fs = regs->r_fs; 1772 pcb->pcb_gs = regs->r_gs; 1773 return (0); 1774} 1775 1776int 1777fill_fpregs(p, fpregs) 1778 struct proc *p; 1779 struct fpreg *fpregs; 1780{ 1781 bcopy(&p->p_addr->u_pcb.pcb_savefpu, fpregs, sizeof *fpregs); 1782 return (0); 1783} 1784 1785int 1786set_fpregs(p, fpregs) 1787 struct proc *p; 1788 struct fpreg *fpregs; 1789{ 1790 bcopy(fpregs, &p->p_addr->u_pcb.pcb_savefpu, sizeof *fpregs); 1791 return (0); 1792} 1793 1794#ifndef DDB 1795void 1796Debugger(const char *msg) 1797{ 1798 printf("Debugger(\"%s\") called.\n", msg); 1799} 1800#endif /* no DDB */ 1801 1802#include <sys/disklabel.h> 1803 1804/* 1805 * Determine the size of the transfer, and make sure it is 1806 * within the boundaries of the partition. Adjust transfer 1807 * if needed, and signal errors or early completion. 1808 */ 1809int 1810bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1811{ 1812 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1813 int labelsect = lp->d_partitions[0].p_offset; 1814 int maxsz = p->p_size, 1815 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1816 1817 /* overwriting disk label ? */ 1818 /* XXX should also protect bootstrap in first 8K */ 1819 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1820#if LABELSECTOR != 0 1821 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1822#endif 1823 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1824 bp->b_error = EROFS; 1825 goto bad; 1826 } 1827 1828#if defined(DOSBBSECTOR) && defined(notyet) 1829 /* overwriting master boot record? */ 1830 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1831 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1832 bp->b_error = EROFS; 1833 goto bad; 1834 } 1835#endif 1836 1837 /* beyond partition? */ 1838 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1839 /* if exactly at end of disk, return an EOF */ 1840 if (bp->b_blkno == maxsz) { 1841 bp->b_resid = bp->b_bcount; 1842 return(0); 1843 } 1844 /* or truncate if part of it fits */ 1845 sz = maxsz - bp->b_blkno; 1846 if (sz <= 0) { 1847 bp->b_error = EINVAL; 1848 goto bad; 1849 } 1850 bp->b_bcount = sz << DEV_BSHIFT; 1851 } 1852 1853 bp->b_pblkno = bp->b_blkno + p->p_offset; 1854 return(1); 1855 1856bad: 1857 bp->b_flags |= B_ERROR; 1858 return(-1); 1859} 1860 1861#ifdef DDB 1862 1863/* 1864 * Provide inb() and outb() as functions. They are normally only 1865 * available as macros calling inlined functions, thus cannot be 1866 * called inside DDB. 1867 * 1868 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1869 */ 1870 1871#undef inb 1872#undef outb 1873 1874/* silence compiler warnings */ 1875u_char inb(u_int); 1876void outb(u_int, u_char); 1877 1878u_char 1879inb(u_int port) 1880{ 1881 u_char data; 1882 /* 1883 * We use %%dx and not %1 here because i/o is done at %dx and not at 1884 * %edx, while gcc generates inferior code (movw instead of movl) 1885 * if we tell it to load (u_short) port. 1886 */ 1887 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1888 return (data); 1889} 1890 1891void 1892outb(u_int port, u_char data) 1893{ 1894 u_char al; 1895 /* 1896 * Use an unnecessary assignment to help gcc's register allocator. 1897 * This make a large difference for gcc-1.40 and a tiny difference 1898 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1899 * best results. gcc-2.6.0 can't handle this. 1900 */ 1901 al = data; 1902 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1903} 1904 1905#endif /* DDB */ 1906