machdep.c revision 31321
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.271 1997/11/07 09:20:15 phk Exp $ 39 */ 40 41#include "apm.h" 42#include "npx.h" 43#include "opt_sysvipc.h" 44#include "opt_ddb.h" 45#include "opt_bounce.h" 46#include "opt_maxmem.h" 47#include "opt_perfmon.h" 48#include "opt_smp.h" 49#include "opt_userconfig.h" 50#include "opt_vm86.h" 51 52#include <sys/param.h> 53#include <sys/systm.h> 54#include <sys/sysproto.h> 55#include <sys/signalvar.h> 56#include <sys/kernel.h> 57#include <sys/proc.h> 58#include <sys/buf.h> 59#include <sys/reboot.h> 60#include <sys/conf.h> 61#include <sys/callout.h> 62#include <sys/malloc.h> 63#include <sys/mbuf.h> 64#include <sys/msgbuf.h> 65#include <sys/sysent.h> 66#include <sys/sysctl.h> 67#include <sys/vmmeter.h> 68 69#ifdef SYSVSHM 70#include <sys/shm.h> 71#endif 72 73#ifdef SYSVMSG 74#include <sys/msg.h> 75#endif 76 77#ifdef SYSVSEM 78#include <sys/sem.h> 79#endif 80 81#include <vm/vm.h> 82#include <vm/vm_param.h> 83#include <vm/vm_prot.h> 84#include <sys/lock.h> 85#include <vm/vm_kern.h> 86#include <vm/vm_object.h> 87#include <vm/vm_page.h> 88#include <vm/vm_map.h> 89#include <vm/vm_pager.h> 90#include <vm/vm_extern.h> 91 92#include <sys/user.h> 93#include <sys/exec.h> 94 95#include <ddb/ddb.h> 96 97#include <net/netisr.h> 98 99#if NAPM > 0 100#include <machine/apm_bios.h> 101#endif 102#include <machine/cpu.h> 103#include <machine/reg.h> 104#include <machine/clock.h> 105#include <machine/specialreg.h> 106#include <machine/cons.h> 107#include <machine/bootinfo.h> 108#include <machine/md_var.h> 109#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 110#ifdef SMP 111#include <machine/smp.h> 112#endif 113#ifdef PERFMON 114#include <machine/perfmon.h> 115#endif 116 117#include <i386/isa/isa_device.h> 118#include <i386/isa/intr_machdep.h> 119#include <i386/isa/rtc.h> 120#include <machine/random.h> 121 122extern void init386 __P((int first)); 123extern int ptrace_set_pc __P((struct proc *p, unsigned int addr)); 124extern int ptrace_single_step __P((struct proc *p)); 125extern int ptrace_write_u __P((struct proc *p, vm_offset_t off, int data)); 126extern void dblfault_handler __P((void)); 127 128extern void printcpuinfo(void); /* XXX header file */ 129extern void earlysetcpuclass(void); /* same header file */ 130extern void finishidentcpu(void); 131extern void panicifcpuunsupported(void); 132extern void initializecpu(void); 133 134static void cpu_startup __P((void *)); 135SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 136 137static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf"); 138 139#ifdef BOUNCE_BUFFERS 140#ifdef BOUNCEPAGES 141int bouncepages = BOUNCEPAGES; 142#else 143int bouncepages = 0; 144#endif 145#endif /* BOUNCE_BUFFERS */ 146 147int msgbufmapped = 0; /* set when safe to use msgbuf */ 148int _udatasel, _ucodesel; 149u_int atdevbase; 150 151 152int physmem = 0; 153int cold = 1; 154 155static int 156sysctl_hw_physmem SYSCTL_HANDLER_ARGS 157{ 158 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 159 return (error); 160} 161 162SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 163 0, 0, sysctl_hw_physmem, "I", ""); 164 165static int 166sysctl_hw_usermem SYSCTL_HANDLER_ARGS 167{ 168 int error = sysctl_handle_int(oidp, 0, 169 ctob(physmem - cnt.v_wire_count), req); 170 return (error); 171} 172 173SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 174 0, 0, sysctl_hw_usermem, "I", ""); 175 176int boothowto = 0, bootverbose = 0, Maxmem = 0; 177long dumplo; 178 179vm_offset_t phys_avail[10]; 180 181/* must be 2 less so 0 0 can signal end of chunks */ 182#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 183 184static void setup_netisrs __P((struct linker_set *)); /* XXX declare elsewhere */ 185 186static vm_offset_t buffer_sva, buffer_eva; 187vm_offset_t clean_sva, clean_eva; 188static vm_offset_t pager_sva, pager_eva; 189extern struct linker_set netisr_set; 190 191#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 192 193static void 194cpu_startup(dummy) 195 void *dummy; 196{ 197 register unsigned i; 198 register caddr_t v; 199 vm_offset_t maxaddr; 200 vm_size_t size = 0; 201 int firstaddr; 202 vm_offset_t minaddr; 203 204 if (boothowto & RB_VERBOSE) 205 bootverbose++; 206 207 /* 208 * Good {morning,afternoon,evening,night}. 209 */ 210 printf(version); 211 earlysetcpuclass(); 212 startrtclock(); 213 printcpuinfo(); 214 panicifcpuunsupported(); 215#ifdef PERFMON 216 perfmon_init(); 217#endif 218 printf("real memory = %d (%dK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 219 /* 220 * Display any holes after the first chunk of extended memory. 221 */ 222 if (bootverbose) { 223 int indx; 224 225 printf("Physical memory chunk(s):\n"); 226 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 227 int size1 = phys_avail[indx + 1] - phys_avail[indx]; 228 229 printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx], 230 phys_avail[indx + 1] - 1, size1, size1 / PAGE_SIZE); 231 } 232 } 233 234 /* 235 * Quickly wire in netisrs. 236 */ 237 setup_netisrs(&netisr_set); 238 239 /* 240 * Calculate callout wheel size 241 */ 242 for (callwheelsize = 1, callwheelbits = 0; 243 callwheelsize < ncallout; 244 callwheelsize <<= 1, ++callwheelbits) 245 ; 246 callwheelmask = callwheelsize - 1; 247 248 /* 249 * Allocate space for system data structures. 250 * The first available kernel virtual address is in "v". 251 * As pages of kernel virtual memory are allocated, "v" is incremented. 252 * As pages of memory are allocated and cleared, 253 * "firstaddr" is incremented. 254 * An index into the kernel page table corresponding to the 255 * virtual memory address maintained in "v" is kept in "mapaddr". 256 */ 257 258 /* 259 * Make two passes. The first pass calculates how much memory is 260 * needed and allocates it. The second pass assigns virtual 261 * addresses to the various data structures. 262 */ 263 firstaddr = 0; 264again: 265 v = (caddr_t)firstaddr; 266 267#define valloc(name, type, num) \ 268 (name) = (type *)v; v = (caddr_t)((name)+(num)) 269#define valloclim(name, type, num, lim) \ 270 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 271 valloc(callout, struct callout, ncallout); 272 valloc(callwheel, struct callout_tailq, callwheelsize); 273#ifdef SYSVSHM 274 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 275#endif 276#ifdef SYSVSEM 277 valloc(sema, struct semid_ds, seminfo.semmni); 278 valloc(sem, struct sem, seminfo.semmns); 279 /* This is pretty disgusting! */ 280 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 281#endif 282#ifdef SYSVMSG 283 valloc(msgpool, char, msginfo.msgmax); 284 valloc(msgmaps, struct msgmap, msginfo.msgseg); 285 valloc(msghdrs, struct msg, msginfo.msgtql); 286 valloc(msqids, struct msqid_ds, msginfo.msgmni); 287#endif 288 289 if (nbuf == 0) { 290 nbuf = 30; 291 if( physmem > 1024) 292 nbuf += min((physmem - 1024) / 8, 2048); 293 } 294 nswbuf = max(min(nbuf/4, 128), 16); 295 296 valloc(swbuf, struct buf, nswbuf); 297 valloc(buf, struct buf, nbuf); 298 299#ifdef BOUNCE_BUFFERS 300 /* 301 * If there is more than 16MB of memory, allocate some bounce buffers 302 */ 303 if (Maxmem > 4096) { 304 if (bouncepages == 0) { 305 bouncepages = 64; 306 bouncepages += ((Maxmem - 4096) / 2048) * 32; 307 if (bouncepages > 128) 308 bouncepages = 128; 309 } 310 v = (caddr_t)((vm_offset_t)round_page(v)); 311 valloc(bouncememory, char, bouncepages * PAGE_SIZE); 312 } 313#endif 314 315 /* 316 * End of first pass, size has been calculated so allocate memory 317 */ 318 if (firstaddr == 0) { 319 size = (vm_size_t)(v - firstaddr); 320 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 321 if (firstaddr == 0) 322 panic("startup: no room for tables"); 323 goto again; 324 } 325 326 /* 327 * End of second pass, addresses have been assigned 328 */ 329 if ((vm_size_t)(v - firstaddr) != size) 330 panic("startup: table size inconsistency"); 331 332#ifdef BOUNCE_BUFFERS 333 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 334 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + 335 maxbkva + pager_map_size, TRUE); 336 io_map = kmem_suballoc(clean_map, &minaddr, &maxaddr, maxbkva, FALSE); 337#else 338 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 339 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size, TRUE); 340#endif 341 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 342 (nbuf*BKVASIZE), TRUE); 343 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 344 (nswbuf*MAXPHYS) + pager_map_size, TRUE); 345 pager_map->system_map = 1; 346 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 347 (16*ARG_MAX), TRUE); 348 u_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 349 (maxproc*UPAGES*PAGE_SIZE), FALSE); 350 351 /* 352 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 353 * we use the more space efficient malloc in place of kmem_alloc. 354 */ 355 { 356 vm_offset_t mb_map_size; 357 358 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 359 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 360 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 361 bzero(mclrefcnt, mb_map_size / MCLBYTES); 362 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 363 mb_map_size, FALSE); 364 mb_map->system_map = 1; 365 } 366 367 /* 368 * Initialize callouts 369 */ 370 SLIST_INIT(&callfree); 371 for (i = 0; i < ncallout; i++) { 372 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle); 373 } 374 375 for (i = 0; i < callwheelsize; i++) { 376 TAILQ_INIT(&callwheel[i]); 377 } 378 379#if defined(USERCONFIG) 380#if defined(USERCONFIG_BOOT) 381 if (1) { 382#else 383 if (boothowto & RB_CONFIG) { 384#endif 385 userconfig(); 386 cninit(); /* the preferred console may have changed */ 387 } 388#endif 389 390#ifdef BOUNCE_BUFFERS 391 /* 392 * init bounce buffers 393 */ 394 vm_bounce_init(); 395#endif 396 397 printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count), 398 ptoa(cnt.v_free_count) / 1024); 399 400 /* 401 * Set up buffers, so they can be used to read disk labels. 402 */ 403 bufinit(); 404 vm_pager_bufferinit(); 405 406#ifdef SMP 407 /* 408 * OK, enough kmem_alloc/malloc state should be up, lets get on with it! 409 */ 410 mp_start(); /* fire up the APs and APICs */ 411 mp_announce(); 412#endif /* SMP */ 413} 414 415int 416register_netisr(num, handler) 417 int num; 418 netisr_t *handler; 419{ 420 421 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 422 printf("register_netisr: bad isr number: %d\n", num); 423 return (EINVAL); 424 } 425 netisrs[num] = handler; 426 return (0); 427} 428 429static void 430setup_netisrs(ls) 431 struct linker_set *ls; 432{ 433 int i; 434 const struct netisrtab *nit; 435 436 for(i = 0; ls->ls_items[i]; i++) { 437 nit = (const struct netisrtab *)ls->ls_items[i]; 438 register_netisr(nit->nit_num, nit->nit_isr); 439 } 440} 441 442/* 443 * Send an interrupt to process. 444 * 445 * Stack is set up to allow sigcode stored 446 * at top to call routine, followed by kcall 447 * to sigreturn routine below. After sigreturn 448 * resets the signal mask, the stack, and the 449 * frame pointer, it returns to the user 450 * specified pc, psl. 451 */ 452void 453sendsig(catcher, sig, mask, code) 454 sig_t catcher; 455 int sig, mask; 456 u_long code; 457{ 458 register struct proc *p = curproc; 459 register struct trapframe *regs; 460 register struct sigframe *fp; 461 struct sigframe sf; 462 struct sigacts *psp = p->p_sigacts; 463 int oonstack; 464 465 regs = p->p_md.md_regs; 466 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 467 /* 468 * Allocate and validate space for the signal handler context. 469 */ 470 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 471 (psp->ps_sigonstack & sigmask(sig))) { 472 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 473 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 474 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 475 } else { 476 fp = (struct sigframe *)regs->tf_esp - 1; 477 } 478 479 /* 480 * grow() will return FALSE if the fp will not fit inside the stack 481 * and the stack can not be grown. useracc will return FALSE 482 * if access is denied. 483 */ 484 if ((grow(p, (int)fp) == FALSE) || 485 (useracc((caddr_t)fp, sizeof(struct sigframe), B_WRITE) == FALSE)) { 486 /* 487 * Process has trashed its stack; give it an illegal 488 * instruction to halt it in its tracks. 489 */ 490 SIGACTION(p, SIGILL) = SIG_DFL; 491 sig = sigmask(SIGILL); 492 p->p_sigignore &= ~sig; 493 p->p_sigcatch &= ~sig; 494 p->p_sigmask &= ~sig; 495 psignal(p, SIGILL); 496 return; 497 } 498 499 /* 500 * Build the argument list for the signal handler. 501 */ 502 if (p->p_sysent->sv_sigtbl) { 503 if (sig < p->p_sysent->sv_sigsize) 504 sig = p->p_sysent->sv_sigtbl[sig]; 505 else 506 sig = p->p_sysent->sv_sigsize + 1; 507 } 508 sf.sf_signum = sig; 509 sf.sf_code = code; 510 sf.sf_scp = &fp->sf_sc; 511 sf.sf_addr = (char *) regs->tf_err; 512 sf.sf_handler = catcher; 513 514 /* save scratch registers */ 515 sf.sf_sc.sc_eax = regs->tf_eax; 516 sf.sf_sc.sc_ebx = regs->tf_ebx; 517 sf.sf_sc.sc_ecx = regs->tf_ecx; 518 sf.sf_sc.sc_edx = regs->tf_edx; 519 sf.sf_sc.sc_esi = regs->tf_esi; 520 sf.sf_sc.sc_edi = regs->tf_edi; 521 sf.sf_sc.sc_cs = regs->tf_cs; 522 sf.sf_sc.sc_ds = regs->tf_ds; 523 sf.sf_sc.sc_ss = regs->tf_ss; 524 sf.sf_sc.sc_es = regs->tf_es; 525 sf.sf_sc.sc_isp = regs->tf_isp; 526 527 /* 528 * Build the signal context to be used by sigreturn. 529 */ 530 sf.sf_sc.sc_onstack = oonstack; 531 sf.sf_sc.sc_mask = mask; 532 sf.sf_sc.sc_sp = regs->tf_esp; 533 sf.sf_sc.sc_fp = regs->tf_ebp; 534 sf.sf_sc.sc_pc = regs->tf_eip; 535 sf.sf_sc.sc_ps = regs->tf_eflags; 536 sf.sf_sc.sc_trapno = regs->tf_trapno; 537 sf.sf_sc.sc_err = regs->tf_err; 538 539 /* 540 * If we're a vm86 process, we want to save the segment registers. 541 * We also change eflags to be our emulated eflags, not the actual 542 * eflags. 543 */ 544 if (regs->tf_eflags & PSL_VM) { 545 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 546 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 547 548 sf.sf_sc.sc_gs = tf->tf_vm86_gs; 549 sf.sf_sc.sc_fs = tf->tf_vm86_fs; 550 sf.sf_sc.sc_es = tf->tf_vm86_es; 551 sf.sf_sc.sc_ds = tf->tf_vm86_ds; 552 553 if (vm86->vm86_has_vme == 0) 554 sf.sf_sc.sc_ps = (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) 555 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 556 557 /* 558 * We should never have PSL_T set when returning from vm86 559 * mode. It may be set here if we deliver a signal before 560 * getting to vm86 mode, so turn it off. 561 */ 562 tf->tf_eflags &= ~(PSL_VM | PSL_T | PSL_VIF | PSL_VIP); 563 } 564 565 /* 566 * Copy the sigframe out to the user's stack. 567 */ 568 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 569 /* 570 * Something is wrong with the stack pointer. 571 * ...Kill the process. 572 */ 573 sigexit(p, SIGILL); 574 } 575 576 regs->tf_esp = (int)fp; 577 regs->tf_eip = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode)); 578 regs->tf_cs = _ucodesel; 579 regs->tf_ds = _udatasel; 580 regs->tf_es = _udatasel; 581 regs->tf_ss = _udatasel; 582} 583 584/* 585 * System call to cleanup state after a signal 586 * has been taken. Reset signal mask and 587 * stack state from context left by sendsig (above). 588 * Return to previous pc and psl as specified by 589 * context left by sendsig. Check carefully to 590 * make sure that the user has not modified the 591 * state to gain improper privileges. 592 */ 593int 594sigreturn(p, uap) 595 struct proc *p; 596 struct sigreturn_args /* { 597 struct sigcontext *sigcntxp; 598 } */ *uap; 599{ 600 register struct sigcontext *scp; 601 register struct sigframe *fp; 602 register struct trapframe *regs = p->p_md.md_regs; 603 int eflags; 604 605 /* 606 * (XXX old comment) regs->tf_esp points to the return address. 607 * The user scp pointer is above that. 608 * The return address is faked in the signal trampoline code 609 * for consistency. 610 */ 611 scp = uap->sigcntxp; 612 fp = (struct sigframe *) 613 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 614 615 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 616 return(EFAULT); 617 618 eflags = scp->sc_ps; 619 if (eflags & PSL_VM) { 620 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 621 struct vm86_kernel *vm86; 622 623 /* 624 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 625 * set up the vm86 area, and we can't enter vm86 mode. 626 */ 627 if (p->p_addr->u_pcb.pcb_ext == 0) 628 return (EINVAL); 629 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 630 if (vm86->vm86_inited == 0) 631 return (EINVAL); 632 633 /* go back to user mode if both flags are set */ 634 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 635 trapsignal(p, SIGBUS, 0); 636 637#define VM_USERCHANGE (PSL_USERCHANGE | PSL_RF) 638#define VME_USERCHANGE (VM_USERCHANGE | PSL_VIP | PSL_VIF) 639 if (vm86->vm86_has_vme) { 640 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 641 (eflags & VME_USERCHANGE) | PSL_VM; 642 } else { 643 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 644 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 645 } 646 tf->tf_vm86_ds = scp->sc_ds; 647 tf->tf_vm86_es = scp->sc_es; 648 tf->tf_vm86_fs = scp->sc_fs; 649 tf->tf_vm86_gs = scp->sc_gs; 650 tf->tf_ds = _udatasel; 651 tf->tf_es = _udatasel; 652 } else { 653 /* 654 * Don't allow users to change privileged or reserved flags. 655 */ 656#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 657 /* 658 * XXX do allow users to change the privileged flag PSL_RF. 659 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 660 * should sometimes set it there too. tf_eflags is kept in 661 * the signal context during signal handling and there is no 662 * other place to remember it, so the PSL_RF bit may be 663 * corrupted by the signal handler without us knowing. 664 * Corruption of the PSL_RF bit at worst causes one more or 665 * one less debugger trap, so allowing it is fairly harmless. 666 */ 667 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 668#ifdef DEBUG 669 printf("sigreturn: eflags = 0x%x\n", eflags); 670#endif 671 return(EINVAL); 672 } 673 674 /* 675 * Don't allow users to load a valid privileged %cs. Let the 676 * hardware check for invalid selectors, excess privilege in 677 * other selectors, invalid %eip's and invalid %esp's. 678 */ 679#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 680 if (!CS_SECURE(scp->sc_cs)) { 681#ifdef DEBUG 682 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 683#endif 684 trapsignal(p, SIGBUS, T_PROTFLT); 685 return(EINVAL); 686 } 687 regs->tf_ds = scp->sc_ds; 688 regs->tf_es = scp->sc_es; 689 } 690 /* restore scratch registers */ 691 regs->tf_eax = scp->sc_eax; 692 regs->tf_ebx = scp->sc_ebx; 693 regs->tf_ecx = scp->sc_ecx; 694 regs->tf_edx = scp->sc_edx; 695 regs->tf_esi = scp->sc_esi; 696 regs->tf_edi = scp->sc_edi; 697 regs->tf_cs = scp->sc_cs; 698 regs->tf_ss = scp->sc_ss; 699 regs->tf_isp = scp->sc_isp; 700 701 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 702 return(EINVAL); 703 704 if (scp->sc_onstack & 01) 705 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 706 else 707 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 708 p->p_sigmask = scp->sc_mask & ~sigcantmask; 709 regs->tf_ebp = scp->sc_fp; 710 regs->tf_esp = scp->sc_sp; 711 regs->tf_eip = scp->sc_pc; 712 regs->tf_eflags = eflags; 713 return(EJUSTRETURN); 714} 715 716/* 717 * Machine dependent boot() routine 718 * 719 * I haven't seen anything to put here yet 720 * Possibly some stuff might be grafted back here from boot() 721 */ 722void 723cpu_boot(int howto) 724{ 725} 726 727/* 728 * Shutdown the CPU as much as possible 729 */ 730void 731cpu_halt(void) 732{ 733 for (;;) 734 __asm__ ("hlt"); 735} 736 737/* 738 * Turn the power off. 739 */ 740void 741cpu_power_down(void) 742{ 743#if NAPM > 0 744 apm_power_off(); 745#endif 746} 747 748/* 749 * Clear registers on exec 750 */ 751void 752setregs(p, entry, stack) 753 struct proc *p; 754 u_long entry; 755 u_long stack; 756{ 757 struct trapframe *regs = p->p_md.md_regs; 758 759#ifdef USER_LDT 760 struct pcb *pcb = &p->p_addr->u_pcb; 761 762 /* was i386_user_cleanup() in NetBSD */ 763 if (pcb->pcb_ldt) { 764 if (pcb == curpcb) 765 lldt(GSEL(GUSERLDT_SEL, SEL_KPL)); 766 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 767 pcb->pcb_ldt_len * sizeof(union descriptor)); 768 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 769 } 770#endif 771 772 bzero((char *)regs, sizeof(struct trapframe)); 773 regs->tf_eip = entry; 774 regs->tf_esp = stack; 775 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 776 regs->tf_ss = _udatasel; 777 regs->tf_ds = _udatasel; 778 regs->tf_es = _udatasel; 779 regs->tf_cs = _ucodesel; 780 781 /* 782 * Initialize the math emulator (if any) for the current process. 783 * Actually, just clear the bit that says that the emulator has 784 * been initialized. Initialization is delayed until the process 785 * traps to the emulator (if it is done at all) mainly because 786 * emulators don't provide an entry point for initialization. 787 */ 788 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 789 790 /* 791 * Arrange to trap the next npx or `fwait' instruction (see npx.c 792 * for why fwait must be trapped at least if there is an npx or an 793 * emulator). This is mainly to handle the case where npx0 is not 794 * configured, since the npx routines normally set up the trap 795 * otherwise. It should be done only at boot time, but doing it 796 * here allows modifying `npx_exists' for testing the emulator on 797 * systems with an npx. 798 */ 799 load_cr0(rcr0() | CR0_MP | CR0_TS); 800 801#if NNPX > 0 802 /* Initialize the npx (if any) for the current process. */ 803 npxinit(__INITIAL_NPXCW__); 804#endif 805} 806 807static int 808sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 809{ 810 int error; 811 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 812 req); 813 if (!error && req->newptr) 814 resettodr(); 815 return (error); 816} 817 818SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 819 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 820 821SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 822 CTLFLAG_RW, &disable_rtc_set, 0, ""); 823 824SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 825 CTLFLAG_RD, &bootinfo, bootinfo, ""); 826 827SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 828 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 829 830/* 831 * Initialize 386 and configure to run kernel 832 */ 833 834/* 835 * Initialize segments & interrupt table 836 */ 837 838int currentldt; 839int _default_ldt; 840#ifdef SMP 841union descriptor gdt[NGDT + NCPU]; /* global descriptor table */ 842#else 843union descriptor gdt[NGDT]; /* global descriptor table */ 844#endif 845struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 846union descriptor ldt[NLDT]; /* local descriptor table */ 847#ifdef SMP 848/* table descriptors - used to load tables by microp */ 849struct region_descriptor r_gdt, r_idt; 850#endif 851 852#ifdef SMP 853extern struct i386tss common_tss; /* One tss per cpu */ 854#ifdef VM86 855extern struct segment_descriptor common_tssd; 856extern int private_tss; 857extern u_int my_tr; 858#endif /* VM86 */ 859#else 860struct i386tss common_tss; 861#ifdef VM86 862struct segment_descriptor common_tssd; 863u_int private_tss; /* flag indicating private tss */ 864u_int my_tr; /* which task register setting */ 865#endif /* VM86 */ 866#endif 867 868static struct i386tss dblfault_tss; 869static char dblfault_stack[PAGE_SIZE]; 870 871extern struct user *proc0paddr; 872 873 874/* software prototypes -- in more palatable form */ 875struct soft_segment_descriptor gdt_segs[ 876#ifdef SMP 877 NGDT + NCPU 878#endif 879 ] = { 880/* GNULL_SEL 0 Null Descriptor */ 881{ 0x0, /* segment base address */ 882 0x0, /* length */ 883 0, /* segment type */ 884 0, /* segment descriptor priority level */ 885 0, /* segment descriptor present */ 886 0, 0, 887 0, /* default 32 vs 16 bit size */ 888 0 /* limit granularity (byte/page units)*/ }, 889/* GCODE_SEL 1 Code Descriptor for kernel */ 890{ 0x0, /* segment base address */ 891 0xfffff, /* length - all address space */ 892 SDT_MEMERA, /* segment type */ 893 0, /* segment descriptor priority level */ 894 1, /* segment descriptor present */ 895 0, 0, 896 1, /* default 32 vs 16 bit size */ 897 1 /* limit granularity (byte/page units)*/ }, 898/* GDATA_SEL 2 Data Descriptor for kernel */ 899{ 0x0, /* segment base address */ 900 0xfffff, /* length - all address space */ 901 SDT_MEMRWA, /* segment type */ 902 0, /* segment descriptor priority level */ 903 1, /* segment descriptor present */ 904 0, 0, 905 1, /* default 32 vs 16 bit size */ 906 1 /* limit granularity (byte/page units)*/ }, 907/* GLDT_SEL 3 LDT Descriptor */ 908{ (int) ldt, /* segment base address */ 909 sizeof(ldt)-1, /* length - all address space */ 910 SDT_SYSLDT, /* segment type */ 911 SEL_UPL, /* segment descriptor priority level */ 912 1, /* segment descriptor present */ 913 0, 0, 914 0, /* unused - default 32 vs 16 bit size */ 915 0 /* limit granularity (byte/page units)*/ }, 916/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 917{ 0x0, /* segment base address */ 918 0x0, /* length - all address space */ 919 0, /* segment type */ 920 0, /* segment descriptor priority level */ 921 0, /* segment descriptor present */ 922 0, 0, 923 0, /* default 32 vs 16 bit size */ 924 0 /* limit granularity (byte/page units)*/ }, 925/* GPANIC_SEL 5 Panic Tss Descriptor */ 926{ (int) &dblfault_tss, /* segment base address */ 927 sizeof(struct i386tss)-1,/* length - all address space */ 928 SDT_SYS386TSS, /* segment type */ 929 0, /* segment descriptor priority level */ 930 1, /* segment descriptor present */ 931 0, 0, 932 0, /* unused - default 32 vs 16 bit size */ 933 0 /* limit granularity (byte/page units)*/ }, 934/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 935{ 936 (int) &common_tss, /* segment base address */ 937 sizeof(struct i386tss)-1,/* length - all address space */ 938 SDT_SYS386TSS, /* segment type */ 939 0, /* segment descriptor priority level */ 940 1, /* segment descriptor present */ 941 0, 0, 942 0, /* unused - default 32 vs 16 bit size */ 943 0 /* limit granularity (byte/page units)*/ }, 944/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 945{ (int) ldt, /* segment base address */ 946 (512 * sizeof(union descriptor)-1), /* length */ 947 SDT_SYSLDT, /* segment type */ 948 0, /* segment descriptor priority level */ 949 1, /* segment descriptor present */ 950 0, 0, 951 0, /* unused - default 32 vs 16 bit size */ 952 0 /* limit granularity (byte/page units)*/ }, 953/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 954{ 0, /* segment base address (overwritten by APM) */ 955 0xfffff, /* length */ 956 SDT_MEMERA, /* segment type */ 957 0, /* segment descriptor priority level */ 958 1, /* segment descriptor present */ 959 0, 0, 960 1, /* default 32 vs 16 bit size */ 961 1 /* limit granularity (byte/page units)*/ }, 962/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 963{ 0, /* segment base address (overwritten by APM) */ 964 0xfffff, /* length */ 965 SDT_MEMERA, /* segment type */ 966 0, /* segment descriptor priority level */ 967 1, /* segment descriptor present */ 968 0, 0, 969 0, /* default 32 vs 16 bit size */ 970 1 /* limit granularity (byte/page units)*/ }, 971/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 972{ 0, /* segment base address (overwritten by APM) */ 973 0xfffff, /* length */ 974 SDT_MEMRWA, /* segment type */ 975 0, /* segment descriptor priority level */ 976 1, /* segment descriptor present */ 977 0, 0, 978 1, /* default 32 vs 16 bit size */ 979 1 /* limit granularity (byte/page units)*/ }, 980}; 981 982static struct soft_segment_descriptor ldt_segs[] = { 983 /* Null Descriptor - overwritten by call gate */ 984{ 0x0, /* segment base address */ 985 0x0, /* length - all address space */ 986 0, /* segment type */ 987 0, /* segment descriptor priority level */ 988 0, /* segment descriptor present */ 989 0, 0, 990 0, /* default 32 vs 16 bit size */ 991 0 /* limit granularity (byte/page units)*/ }, 992 /* Null Descriptor - overwritten by call gate */ 993{ 0x0, /* segment base address */ 994 0x0, /* length - all address space */ 995 0, /* segment type */ 996 0, /* segment descriptor priority level */ 997 0, /* segment descriptor present */ 998 0, 0, 999 0, /* default 32 vs 16 bit size */ 1000 0 /* limit granularity (byte/page units)*/ }, 1001 /* Null Descriptor - overwritten by call gate */ 1002{ 0x0, /* segment base address */ 1003 0x0, /* length - all address space */ 1004 0, /* segment type */ 1005 0, /* segment descriptor priority level */ 1006 0, /* segment descriptor present */ 1007 0, 0, 1008 0, /* default 32 vs 16 bit size */ 1009 0 /* limit granularity (byte/page units)*/ }, 1010 /* Code Descriptor for user */ 1011{ 0x0, /* segment base address */ 1012 0xfffff, /* length - all address space */ 1013 SDT_MEMERA, /* segment type */ 1014 SEL_UPL, /* segment descriptor priority level */ 1015 1, /* segment descriptor present */ 1016 0, 0, 1017 1, /* default 32 vs 16 bit size */ 1018 1 /* limit granularity (byte/page units)*/ }, 1019 /* Data Descriptor for user */ 1020{ 0x0, /* segment base address */ 1021 0xfffff, /* length - all address space */ 1022 SDT_MEMRWA, /* segment type */ 1023 SEL_UPL, /* segment descriptor priority level */ 1024 1, /* segment descriptor present */ 1025 0, 0, 1026 1, /* default 32 vs 16 bit size */ 1027 1 /* limit granularity (byte/page units)*/ }, 1028}; 1029 1030void 1031setidt(idx, func, typ, dpl, selec) 1032 int idx; 1033 inthand_t *func; 1034 int typ; 1035 int dpl; 1036 int selec; 1037{ 1038 struct gate_descriptor *ip = idt + idx; 1039 1040 ip->gd_looffset = (int)func; 1041 ip->gd_selector = selec; 1042 ip->gd_stkcpy = 0; 1043 ip->gd_xx = 0; 1044 ip->gd_type = typ; 1045 ip->gd_dpl = dpl; 1046 ip->gd_p = 1; 1047 ip->gd_hioffset = ((int)func)>>16 ; 1048} 1049 1050#define IDTVEC(name) __CONCAT(X,name) 1051 1052extern inthand_t 1053 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1054 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1055 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1056 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1057 IDTVEC(syscall), IDTVEC(int0x80_syscall); 1058 1059void 1060sdtossd(sd, ssd) 1061 struct segment_descriptor *sd; 1062 struct soft_segment_descriptor *ssd; 1063{ 1064 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1065 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1066 ssd->ssd_type = sd->sd_type; 1067 ssd->ssd_dpl = sd->sd_dpl; 1068 ssd->ssd_p = sd->sd_p; 1069 ssd->ssd_def32 = sd->sd_def32; 1070 ssd->ssd_gran = sd->sd_gran; 1071} 1072 1073void 1074init386(first) 1075 int first; 1076{ 1077 int x; 1078 unsigned biosbasemem, biosextmem; 1079 struct gate_descriptor *gdp; 1080 int gsel_tss; 1081 1082 struct isa_device *idp; 1083#ifndef SMP 1084 /* table descriptors - used to load tables by microp */ 1085 struct region_descriptor r_gdt, r_idt; 1086#endif 1087 int pagesinbase, pagesinext; 1088 int target_page, pa_indx; 1089 int off; 1090 int speculative_mprobe; 1091 1092 proc0.p_addr = proc0paddr; 1093 1094 atdevbase = ISA_HOLE_START + KERNBASE; 1095 1096 /* 1097 * Initialize the console before we print anything out. 1098 */ 1099 cninit(); 1100 1101 /* 1102 * make gdt memory segments, the code segment goes up to end of the 1103 * page with etext in it, the data segment goes to the end of 1104 * the address space 1105 */ 1106 /* 1107 * XXX text protection is temporarily (?) disabled. The limit was 1108 * i386_btop(round_page(etext)) - 1. 1109 */ 1110 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1111 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1112#ifdef BDE_DEBUGGER 1113#define NGDT1 8 /* avoid overwriting db entries with APM ones */ 1114#else 1115#define NGDT1 (sizeof gdt_segs / sizeof gdt_segs[0]) 1116#endif 1117 for (x = 0; x < NGDT1; x++) 1118 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1119#ifdef VM86 1120 common_tssd = gdt[GPROC0_SEL].sd; 1121#endif /* VM86 */ 1122 1123#ifdef SMP 1124 /* 1125 * Spin these up now. init_secondary() grabs them. We could use 1126 * #for(x,y,z) / #endfor cpp directives if they existed. 1127 */ 1128 for (x = 0; x < NCPU; x++) { 1129 gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL]; 1130 ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd); 1131 } 1132#endif 1133 1134 /* make ldt memory segments */ 1135 /* 1136 * The data segment limit must not cover the user area because we 1137 * don't want the user area to be writable in copyout() etc. (page 1138 * level protection is lost in kernel mode on 386's). Also, we 1139 * don't want the user area to be writable directly (page level 1140 * protection of the user area is not available on 486's with 1141 * CR0_WP set, because there is no user-read/kernel-write mode). 1142 * 1143 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1144 * should be spelled ...MAX_USER... 1145 */ 1146#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1147 /* 1148 * The code segment limit has to cover the user area until we move 1149 * the signal trampoline out of the user area. This is safe because 1150 * the code segment cannot be written to directly. 1151 */ 1152#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1153 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1154 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1155 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1156 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1157 1158 /* exceptions */ 1159 for (x = 0; x < NIDT; x++) 1160 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1161 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1162 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1163 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1164 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1165 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1166 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1167 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1168 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1169 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1170 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1171 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1172 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1173 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1174 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1175 setidt(14, &IDTVEC(page), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1176 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1177 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1178 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1179 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1180 setidt(0x80, &IDTVEC(int0x80_syscall), 1181 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1182 1183#include "isa.h" 1184#if NISA >0 1185 isa_defaultirq(); 1186#endif 1187 rand_initialize(); 1188 1189 r_gdt.rd_limit = sizeof(gdt) - 1; 1190 r_gdt.rd_base = (int) gdt; 1191 lgdt(&r_gdt); 1192 1193 r_idt.rd_limit = sizeof(idt) - 1; 1194 r_idt.rd_base = (int) idt; 1195 lidt(&r_idt); 1196 1197 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1198 lldt(_default_ldt); 1199 currentldt = _default_ldt; 1200 1201#ifdef DDB 1202 kdb_init(); 1203 if (boothowto & RB_KDB) 1204 Debugger("Boot flags requested debugger"); 1205#endif 1206 1207 finishidentcpu(); /* Final stage of CPU initialization */ 1208 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1209 initializecpu(); /* Initialize CPU registers */ 1210 1211 /* Use BIOS values stored in RTC CMOS RAM, since probing 1212 * breaks certain 386 AT relics. 1213 */ 1214 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1215 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1216 1217 /* 1218 * If BIOS tells us that it has more than 640k in the basemem, 1219 * don't believe it - set it to 640k. 1220 */ 1221 if (biosbasemem > 640) { 1222 printf("Preposterous RTC basemem of %dK, truncating to 640K\n", 1223 biosbasemem); 1224 biosbasemem = 640; 1225 } 1226 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1227 printf("Preposterous BIOS basemem of %dK, truncating to 640K\n", 1228 bootinfo.bi_basemem); 1229 bootinfo.bi_basemem = 640; 1230 } 1231 1232 /* 1233 * Warn if the official BIOS interface disagrees with the RTC 1234 * interface used above about the amount of base memory or the 1235 * amount of extended memory. Prefer the BIOS value for the base 1236 * memory. This is necessary for machines that `steal' base 1237 * memory for use as BIOS memory, at least if we are going to use 1238 * the BIOS for apm. Prefer the RTC value for extended memory. 1239 * Eventually the hackish interface shouldn't even be looked at. 1240 */ 1241 if (bootinfo.bi_memsizes_valid) { 1242 if (bootinfo.bi_basemem != biosbasemem) { 1243 vm_offset_t pa; 1244 1245 printf( 1246 "BIOS basemem (%ldK) != RTC basemem (%dK), setting to BIOS value\n", 1247 bootinfo.bi_basemem, biosbasemem); 1248 biosbasemem = bootinfo.bi_basemem; 1249 1250 /* 1251 * XXX if biosbasemem is now < 640, there is `hole' 1252 * between the end of base memory and the start of 1253 * ISA memory. The hole may be empty or it may 1254 * contain BIOS code or data. Map it read/write so 1255 * that the BIOS can write to it. (Memory from 0 to 1256 * the physical end of the kernel is mapped read-only 1257 * to begin with and then parts of it are remapped. 1258 * The parts that aren't remapped form holes that 1259 * remain read-only and are unused by the kernel. 1260 * The base memory area is below the physical end of 1261 * the kernel and right now forms a read-only hole. 1262 * The part of it from 0 to 1263 * (trunc_page(biosbasemem * 1024) - 1) will be 1264 * remapped and used by the kernel later.) 1265 * 1266 * This code is similar to the code used in 1267 * pmap_mapdev, but since no memory needs to be 1268 * allocated we simply change the mapping. 1269 */ 1270 for (pa = trunc_page(biosbasemem * 1024); 1271 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1272 unsigned *pte; 1273 1274 pte = (unsigned *)vtopte(pa + KERNBASE); 1275 *pte = pa | PG_RW | PG_V; 1276 } 1277 } 1278 if (bootinfo.bi_extmem != biosextmem) 1279 printf("BIOS extmem (%ldK) != RTC extmem (%dK)\n", 1280 bootinfo.bi_extmem, biosextmem); 1281 } 1282 1283#ifdef SMP 1284 /* make hole for AP bootstrap code */ 1285 pagesinbase = mp_bootaddress(biosbasemem) / PAGE_SIZE; 1286#else 1287 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1288#endif 1289 1290 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1291 1292 /* 1293 * Special hack for chipsets that still remap the 384k hole when 1294 * there's 16MB of memory - this really confuses people that 1295 * are trying to use bus mastering ISA controllers with the 1296 * "16MB limit"; they only have 16MB, but the remapping puts 1297 * them beyond the limit. 1298 */ 1299 /* 1300 * If extended memory is between 15-16MB (16-17MB phys address range), 1301 * chop it to 15MB. 1302 */ 1303 if ((pagesinext > 3840) && (pagesinext < 4096)) 1304 pagesinext = 3840; 1305 1306 /* 1307 * Maxmem isn't the "maximum memory", it's one larger than the 1308 * highest page of the physical address space. It should be 1309 * called something like "Maxphyspage". 1310 */ 1311 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1312 /* 1313 * Indicate that we wish to do a speculative search for memory beyond 1314 * the end of the reported size if the indicated amount is 64MB (0x4000 1315 * pages) - which is the largest amount that the BIOS/bootblocks can 1316 * currently report. If a specific amount of memory is indicated via 1317 * the MAXMEM option or the npx0 "msize", then don't do the speculative 1318 * memory probe. 1319 */ 1320 if (Maxmem >= 0x4000) 1321 speculative_mprobe = TRUE; 1322 else 1323 speculative_mprobe = FALSE; 1324 1325#ifdef MAXMEM 1326 Maxmem = MAXMEM/4; 1327 speculative_mprobe = FALSE; 1328#endif 1329 1330#if NNPX > 0 1331 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1332 if (idp != NULL && idp->id_msize != 0) { 1333 Maxmem = idp->id_msize / 4; 1334 speculative_mprobe = FALSE; 1335 } 1336#endif 1337 1338#ifdef SMP 1339 /* look for the MP hardware - needed for apic addresses */ 1340 mp_probe(); 1341#endif 1342 1343 /* call pmap initialization to make new kernel address space */ 1344 pmap_bootstrap (first, 0); 1345 1346 /* 1347 * Size up each available chunk of physical memory. 1348 */ 1349 1350 /* 1351 * We currently don't bother testing base memory. 1352 * XXX ...but we probably should. 1353 */ 1354 pa_indx = 0; 1355 if (pagesinbase > 1) { 1356 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1357 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1358 physmem = pagesinbase - 1; 1359 } else { 1360 /* point at first chunk end */ 1361 pa_indx++; 1362 } 1363 1364 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1365 int tmp, page_bad; 1366 1367 page_bad = FALSE; 1368 1369 /* 1370 * map page into kernel: valid, read/write, non-cacheable 1371 */ 1372 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1373 invltlb(); 1374 1375 tmp = *(int *)CADDR1; 1376 /* 1377 * Test for alternating 1's and 0's 1378 */ 1379 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1380 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1381 page_bad = TRUE; 1382 } 1383 /* 1384 * Test for alternating 0's and 1's 1385 */ 1386 *(volatile int *)CADDR1 = 0x55555555; 1387 if (*(volatile int *)CADDR1 != 0x55555555) { 1388 page_bad = TRUE; 1389 } 1390 /* 1391 * Test for all 1's 1392 */ 1393 *(volatile int *)CADDR1 = 0xffffffff; 1394 if (*(volatile int *)CADDR1 != 0xffffffff) { 1395 page_bad = TRUE; 1396 } 1397 /* 1398 * Test for all 0's 1399 */ 1400 *(volatile int *)CADDR1 = 0x0; 1401 if (*(volatile int *)CADDR1 != 0x0) { 1402 /* 1403 * test of page failed 1404 */ 1405 page_bad = TRUE; 1406 } 1407 /* 1408 * Restore original value. 1409 */ 1410 *(int *)CADDR1 = tmp; 1411 1412 /* 1413 * Adjust array of valid/good pages. 1414 */ 1415 if (page_bad == FALSE) { 1416 /* 1417 * If this good page is a continuation of the 1418 * previous set of good pages, then just increase 1419 * the end pointer. Otherwise start a new chunk. 1420 * Note that "end" points one higher than end, 1421 * making the range >= start and < end. 1422 * If we're also doing a speculative memory 1423 * test and we at or past the end, bump up Maxmem 1424 * so that we keep going. The first bad page 1425 * will terminate the loop. 1426 */ 1427 if (phys_avail[pa_indx] == target_page) { 1428 phys_avail[pa_indx] += PAGE_SIZE; 1429 if (speculative_mprobe == TRUE && 1430 phys_avail[pa_indx] >= (64*1024*1024)) 1431 Maxmem++; 1432 } else { 1433 pa_indx++; 1434 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1435 printf("Too many holes in the physical address space, giving up\n"); 1436 pa_indx--; 1437 break; 1438 } 1439 phys_avail[pa_indx++] = target_page; /* start */ 1440 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1441 } 1442 physmem++; 1443 } 1444 } 1445 1446 *(int *)CMAP1 = 0; 1447 invltlb(); 1448 1449 /* 1450 * XXX 1451 * The last chunk must contain at least one page plus the message 1452 * buffer to avoid complicating other code (message buffer address 1453 * calculation, etc.). 1454 */ 1455 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1456 round_page(sizeof(struct msgbuf)) >= phys_avail[pa_indx]) { 1457 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1458 phys_avail[pa_indx--] = 0; 1459 phys_avail[pa_indx--] = 0; 1460 } 1461 1462 Maxmem = atop(phys_avail[pa_indx]); 1463 1464 /* Trim off space for the message buffer. */ 1465 phys_avail[pa_indx] -= round_page(sizeof(struct msgbuf)); 1466 1467 avail_end = phys_avail[pa_indx]; 1468 1469 /* now running on new page tables, configured,and u/iom is accessible */ 1470 1471 /* Map the message buffer. */ 1472 for (off = 0; off < round_page(sizeof(struct msgbuf)); off += PAGE_SIZE) 1473 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1474 avail_end + off, VM_PROT_ALL, TRUE); 1475 msgbufmapped = 1; 1476 1477 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1478#ifdef VM86 1479 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE - 16; 1480#else 1481 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE; 1482#endif /* VM86 */ 1483 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1484 common_tss.tss_ioopt = (sizeof common_tss) << 16; 1485 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1486 ltr(gsel_tss); 1487#ifdef VM86 1488 private_tss = 0; 1489 my_tr = GPROC0_SEL; 1490#endif 1491 1492 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1493 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1494 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1495 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1496 dblfault_tss.tss_cr3 = (int)IdlePTD; 1497 dblfault_tss.tss_eip = (int) dblfault_handler; 1498 dblfault_tss.tss_eflags = PSL_KERNEL; 1499 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = 1500 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1501 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1502 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1503 1504 /* make a call gate to reenter kernel with */ 1505 gdp = &ldt[LSYS5CALLS_SEL].gd; 1506 1507 x = (int) &IDTVEC(syscall); 1508 gdp->gd_looffset = x++; 1509 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1510 gdp->gd_stkcpy = 1; 1511 gdp->gd_type = SDT_SYS386CGT; 1512 gdp->gd_dpl = SEL_UPL; 1513 gdp->gd_p = 1; 1514 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1515 1516 /* XXX does this work? */ 1517 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1518 1519 /* transfer to user mode */ 1520 1521 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1522 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1523 1524 /* setup proc 0's pcb */ 1525 proc0.p_addr->u_pcb.pcb_flags = 0; 1526 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1527 proc0.p_addr->u_pcb.pcb_mpnest = 1; 1528 proc0.p_addr->u_pcb.pcb_ext = 0; 1529} 1530 1531int 1532ptrace_set_pc(p, addr) 1533 struct proc *p; 1534 unsigned int addr; 1535{ 1536 p->p_md.md_regs->tf_eip = addr; 1537 return (0); 1538} 1539 1540int 1541ptrace_single_step(p) 1542 struct proc *p; 1543{ 1544 p->p_md.md_regs->tf_eflags |= PSL_T; 1545 return (0); 1546} 1547 1548int ptrace_write_u(p, off, data) 1549 struct proc *p; 1550 vm_offset_t off; 1551 int data; 1552{ 1553 struct trapframe frame_copy; 1554 vm_offset_t min; 1555 struct trapframe *tp; 1556 1557 /* 1558 * Privileged kernel state is scattered all over the user area. 1559 * Only allow write access to parts of regs and to fpregs. 1560 */ 1561 min = (char *)p->p_md.md_regs - (char *)p->p_addr; 1562 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1563 tp = p->p_md.md_regs; 1564 frame_copy = *tp; 1565 *(int *)((char *)&frame_copy + (off - min)) = data; 1566 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1567 !CS_SECURE(frame_copy.tf_cs)) 1568 return (EINVAL); 1569 *(int*)((char *)p->p_addr + off) = data; 1570 return (0); 1571 } 1572 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1573 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1574 *(int*)((char *)p->p_addr + off) = data; 1575 return (0); 1576 } 1577 return (EFAULT); 1578} 1579 1580int 1581fill_regs(p, regs) 1582 struct proc *p; 1583 struct reg *regs; 1584{ 1585 struct pcb *pcb; 1586 struct trapframe *tp; 1587 1588 tp = p->p_md.md_regs; 1589 regs->r_es = tp->tf_es; 1590 regs->r_ds = tp->tf_ds; 1591 regs->r_edi = tp->tf_edi; 1592 regs->r_esi = tp->tf_esi; 1593 regs->r_ebp = tp->tf_ebp; 1594 regs->r_ebx = tp->tf_ebx; 1595 regs->r_edx = tp->tf_edx; 1596 regs->r_ecx = tp->tf_ecx; 1597 regs->r_eax = tp->tf_eax; 1598 regs->r_eip = tp->tf_eip; 1599 regs->r_cs = tp->tf_cs; 1600 regs->r_eflags = tp->tf_eflags; 1601 regs->r_esp = tp->tf_esp; 1602 regs->r_ss = tp->tf_ss; 1603 pcb = &p->p_addr->u_pcb; 1604 regs->r_fs = pcb->pcb_fs; 1605 regs->r_gs = pcb->pcb_gs; 1606 return (0); 1607} 1608 1609int 1610set_regs(p, regs) 1611 struct proc *p; 1612 struct reg *regs; 1613{ 1614 struct pcb *pcb; 1615 struct trapframe *tp; 1616 1617 tp = p->p_md.md_regs; 1618 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1619 !CS_SECURE(regs->r_cs)) 1620 return (EINVAL); 1621 tp->tf_es = regs->r_es; 1622 tp->tf_ds = regs->r_ds; 1623 tp->tf_edi = regs->r_edi; 1624 tp->tf_esi = regs->r_esi; 1625 tp->tf_ebp = regs->r_ebp; 1626 tp->tf_ebx = regs->r_ebx; 1627 tp->tf_edx = regs->r_edx; 1628 tp->tf_ecx = regs->r_ecx; 1629 tp->tf_eax = regs->r_eax; 1630 tp->tf_eip = regs->r_eip; 1631 tp->tf_cs = regs->r_cs; 1632 tp->tf_eflags = regs->r_eflags; 1633 tp->tf_esp = regs->r_esp; 1634 tp->tf_ss = regs->r_ss; 1635 pcb = &p->p_addr->u_pcb; 1636 pcb->pcb_fs = regs->r_fs; 1637 pcb->pcb_gs = regs->r_gs; 1638 return (0); 1639} 1640 1641#ifndef DDB 1642void 1643Debugger(const char *msg) 1644{ 1645 printf("Debugger(\"%s\") called.\n", msg); 1646} 1647#endif /* no DDB */ 1648 1649#include <sys/disklabel.h> 1650 1651/* 1652 * Determine the size of the transfer, and make sure it is 1653 * within the boundaries of the partition. Adjust transfer 1654 * if needed, and signal errors or early completion. 1655 */ 1656int 1657bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1658{ 1659 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1660 int labelsect = lp->d_partitions[0].p_offset; 1661 int maxsz = p->p_size, 1662 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1663 1664 /* overwriting disk label ? */ 1665 /* XXX should also protect bootstrap in first 8K */ 1666 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1667#if LABELSECTOR != 0 1668 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1669#endif 1670 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1671 bp->b_error = EROFS; 1672 goto bad; 1673 } 1674 1675#if defined(DOSBBSECTOR) && defined(notyet) 1676 /* overwriting master boot record? */ 1677 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1678 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1679 bp->b_error = EROFS; 1680 goto bad; 1681 } 1682#endif 1683 1684 /* beyond partition? */ 1685 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1686 /* if exactly at end of disk, return an EOF */ 1687 if (bp->b_blkno == maxsz) { 1688 bp->b_resid = bp->b_bcount; 1689 return(0); 1690 } 1691 /* or truncate if part of it fits */ 1692 sz = maxsz - bp->b_blkno; 1693 if (sz <= 0) { 1694 bp->b_error = EINVAL; 1695 goto bad; 1696 } 1697 bp->b_bcount = sz << DEV_BSHIFT; 1698 } 1699 1700 bp->b_pblkno = bp->b_blkno + p->p_offset; 1701 return(1); 1702 1703bad: 1704 bp->b_flags |= B_ERROR; 1705 return(-1); 1706} 1707 1708#ifdef DDB 1709 1710/* 1711 * Provide inb() and outb() as functions. They are normally only 1712 * available as macros calling inlined functions, thus cannot be 1713 * called inside DDB. 1714 * 1715 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1716 */ 1717 1718#undef inb 1719#undef outb 1720 1721/* silence compiler warnings */ 1722u_char inb(u_int); 1723void outb(u_int, u_char); 1724 1725u_char 1726inb(u_int port) 1727{ 1728 u_char data; 1729 /* 1730 * We use %%dx and not %1 here because i/o is done at %dx and not at 1731 * %edx, while gcc generates inferior code (movw instead of movl) 1732 * if we tell it to load (u_short) port. 1733 */ 1734 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1735 return (data); 1736} 1737 1738void 1739outb(u_int port, u_char data) 1740{ 1741 u_char al; 1742 /* 1743 * Use an unnecessary assignment to help gcc's register allocator. 1744 * This make a large difference for gcc-1.40 and a tiny difference 1745 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1746 * best results. gcc-2.6.0 can't handle this. 1747 */ 1748 al = data; 1749 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1750} 1751 1752#endif /* DDB */ 1753