machdep.c revision 277713
1/*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: head/sys/amd64/amd64/machdep.c 277713 2015-01-25 20:16:45Z jhb $"); 43 44#include "opt_atpic.h" 45#include "opt_compat.h" 46#include "opt_cpu.h" 47#include "opt_ddb.h" 48#include "opt_inet.h" 49#include "opt_isa.h" 50#include "opt_kstack_pages.h" 51#include "opt_maxmem.h" 52#include "opt_mp_watchdog.h" 53#include "opt_perfmon.h" 54#include "opt_platform.h" 55#include "opt_sched.h" 56 57#include <sys/param.h> 58#include <sys/proc.h> 59#include <sys/systm.h> 60#include <sys/bio.h> 61#include <sys/buf.h> 62#include <sys/bus.h> 63#include <sys/callout.h> 64#include <sys/cons.h> 65#include <sys/cpu.h> 66#include <sys/efi.h> 67#include <sys/eventhandler.h> 68#include <sys/exec.h> 69#include <sys/imgact.h> 70#include <sys/kdb.h> 71#include <sys/kernel.h> 72#include <sys/ktr.h> 73#include <sys/linker.h> 74#include <sys/lock.h> 75#include <sys/malloc.h> 76#include <sys/memrange.h> 77#include <sys/msgbuf.h> 78#include <sys/mutex.h> 79#include <sys/pcpu.h> 80#include <sys/ptrace.h> 81#include <sys/reboot.h> 82#include <sys/rwlock.h> 83#include <sys/sched.h> 84#include <sys/signalvar.h> 85#ifdef SMP 86#include <sys/smp.h> 87#endif 88#include <sys/syscallsubr.h> 89#include <sys/sysctl.h> 90#include <sys/sysent.h> 91#include <sys/sysproto.h> 92#include <sys/ucontext.h> 93#include <sys/vmmeter.h> 94 95#include <vm/vm.h> 96#include <vm/vm_extern.h> 97#include <vm/vm_kern.h> 98#include <vm/vm_page.h> 99#include <vm/vm_map.h> 100#include <vm/vm_object.h> 101#include <vm/vm_pager.h> 102#include <vm/vm_param.h> 103 104#ifdef DDB 105#ifndef KDB 106#error KDB must be enabled in order for DDB to work! 107#endif 108#include <ddb/ddb.h> 109#include <ddb/db_sym.h> 110#endif 111 112#include <net/netisr.h> 113 114#include <machine/clock.h> 115#include <machine/cpu.h> 116#include <machine/cputypes.h> 117#include <machine/intr_machdep.h> 118#include <x86/mca.h> 119#include <machine/md_var.h> 120#include <machine/metadata.h> 121#include <machine/mp_watchdog.h> 122#include <machine/pc/bios.h> 123#include <machine/pcb.h> 124#include <machine/proc.h> 125#include <machine/reg.h> 126#include <machine/sigframe.h> 127#include <machine/specialreg.h> 128#ifdef PERFMON 129#include <machine/perfmon.h> 130#endif 131#include <machine/tss.h> 132#ifdef SMP 133#include <machine/smp.h> 134#endif 135#ifdef FDT 136#include <x86/fdt.h> 137#endif 138 139#ifdef DEV_ATPIC 140#include <x86/isa/icu.h> 141#else 142#include <x86/apicvar.h> 143#endif 144 145#include <isa/isareg.h> 146#include <isa/rtc.h> 147#include <x86/init.h> 148 149/* Sanity check for __curthread() */ 150CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 151 152extern u_int64_t hammer_time(u_int64_t, u_int64_t); 153 154#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 155#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 156 157static void cpu_startup(void *); 158static void get_fpcontext(struct thread *td, mcontext_t *mcp, 159 char *xfpusave, size_t xfpusave_len); 160static int set_fpcontext(struct thread *td, const mcontext_t *mcp, 161 char *xfpustate, size_t xfpustate_len); 162SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 163 164/* Preload data parse function */ 165static caddr_t native_parse_preload_data(u_int64_t); 166 167/* Native function to fetch and parse the e820 map */ 168static void native_parse_memmap(caddr_t, vm_paddr_t *, int *); 169 170/* Default init_ops implementation. */ 171struct init_ops init_ops = { 172 .parse_preload_data = native_parse_preload_data, 173 .early_clock_source_init = i8254_init, 174 .early_delay = i8254_delay, 175 .parse_memmap = native_parse_memmap, 176#ifdef SMP 177 .mp_bootaddress = mp_bootaddress, 178 .start_all_aps = native_start_all_aps, 179#endif 180 .msi_init = msi_init, 181}; 182 183/* 184 * The file "conf/ldscript.amd64" defines the symbol "kernphys". Its value is 185 * the physical address at which the kernel is loaded. 186 */ 187extern char kernphys[]; 188 189struct msgbuf *msgbufp; 190 191/* Intel ICH registers */ 192#define ICH_PMBASE 0x400 193#define ICH_SMI_EN ICH_PMBASE + 0x30 194 195int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel; 196 197int cold = 1; 198 199long Maxmem = 0; 200long realmem = 0; 201 202/* 203 * The number of PHYSMAP entries must be one less than the number of 204 * PHYSSEG entries because the PHYSMAP entry that spans the largest 205 * physical address that is accessible by ISA DMA is split into two 206 * PHYSSEG entries. 207 */ 208#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 209 210vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 211vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 212 213/* must be 2 less so 0 0 can signal end of chunks */ 214#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 215#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 216 217struct kva_md_info kmi; 218 219static struct trapframe proc0_tf; 220struct region_descriptor r_gdt, r_idt; 221 222struct pcpu __pcpu[MAXCPU]; 223 224struct mtx icu_lock; 225 226struct mem_range_softc mem_range_softc; 227 228struct mtx dt_lock; /* lock for GDT and LDT */ 229 230void (*vmm_resume_p)(void); 231 232static void 233cpu_startup(dummy) 234 void *dummy; 235{ 236 uintmax_t memsize; 237 char *sysenv; 238 239 /* 240 * On MacBooks, we need to disallow the legacy USB circuit to 241 * generate an SMI# because this can cause several problems, 242 * namely: incorrect CPU frequency detection and failure to 243 * start the APs. 244 * We do this by disabling a bit in the SMI_EN (SMI Control and 245 * Enable register) of the Intel ICH LPC Interface Bridge. 246 */ 247 sysenv = kern_getenv("smbios.system.product"); 248 if (sysenv != NULL) { 249 if (strncmp(sysenv, "MacBook1,1", 10) == 0 || 250 strncmp(sysenv, "MacBook3,1", 10) == 0 || 251 strncmp(sysenv, "MacBook4,1", 10) == 0 || 252 strncmp(sysenv, "MacBookPro1,1", 13) == 0 || 253 strncmp(sysenv, "MacBookPro1,2", 13) == 0 || 254 strncmp(sysenv, "MacBookPro3,1", 13) == 0 || 255 strncmp(sysenv, "MacBookPro4,1", 13) == 0 || 256 strncmp(sysenv, "Macmini1,1", 10) == 0) { 257 if (bootverbose) 258 printf("Disabling LEGACY_USB_EN bit on " 259 "Intel ICH.\n"); 260 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 261 } 262 freeenv(sysenv); 263 } 264 265 /* 266 * Good {morning,afternoon,evening,night}. 267 */ 268 startrtclock(); 269 printcpuinfo(); 270 panicifcpuunsupported(); 271#ifdef PERFMON 272 perfmon_init(); 273#endif 274 275 /* 276 * Display physical memory if SMBIOS reports reasonable amount. 277 */ 278 memsize = 0; 279 sysenv = kern_getenv("smbios.memory.enabled"); 280 if (sysenv != NULL) { 281 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10; 282 freeenv(sysenv); 283 } 284 if (memsize < ptoa((uintmax_t)vm_cnt.v_free_count)) 285 memsize = ptoa((uintmax_t)Maxmem); 286 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20); 287 realmem = atop(memsize); 288 289 /* 290 * Display any holes after the first chunk of extended memory. 291 */ 292 if (bootverbose) { 293 int indx; 294 295 printf("Physical memory chunk(s):\n"); 296 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 297 vm_paddr_t size; 298 299 size = phys_avail[indx + 1] - phys_avail[indx]; 300 printf( 301 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 302 (uintmax_t)phys_avail[indx], 303 (uintmax_t)phys_avail[indx + 1] - 1, 304 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 305 } 306 } 307 308 vm_ksubmap_init(&kmi); 309 310 printf("avail memory = %ju (%ju MB)\n", 311 ptoa((uintmax_t)vm_cnt.v_free_count), 312 ptoa((uintmax_t)vm_cnt.v_free_count) / 1048576); 313 314 /* 315 * Set up buffers, so they can be used to read disk labels. 316 */ 317 bufinit(); 318 vm_pager_bufferinit(); 319 320 cpu_setregs(); 321} 322 323/* 324 * Send an interrupt to process. 325 * 326 * Stack is set up to allow sigcode stored 327 * at top to call routine, followed by call 328 * to sigreturn routine below. After sigreturn 329 * resets the signal mask, the stack, and the 330 * frame pointer, it returns to the user 331 * specified pc, psl. 332 */ 333void 334sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 335{ 336 struct sigframe sf, *sfp; 337 struct pcb *pcb; 338 struct proc *p; 339 struct thread *td; 340 struct sigacts *psp; 341 char *sp; 342 struct trapframe *regs; 343 char *xfpusave; 344 size_t xfpusave_len; 345 int sig; 346 int oonstack; 347 348 td = curthread; 349 pcb = td->td_pcb; 350 p = td->td_proc; 351 PROC_LOCK_ASSERT(p, MA_OWNED); 352 sig = ksi->ksi_signo; 353 psp = p->p_sigacts; 354 mtx_assert(&psp->ps_mtx, MA_OWNED); 355 regs = td->td_frame; 356 oonstack = sigonstack(regs->tf_rsp); 357 358 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) { 359 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu); 360 xfpusave = __builtin_alloca(xfpusave_len); 361 } else { 362 xfpusave_len = 0; 363 xfpusave = NULL; 364 } 365 366 /* Save user context. */ 367 bzero(&sf, sizeof(sf)); 368 sf.sf_uc.uc_sigmask = *mask; 369 sf.sf_uc.uc_stack = td->td_sigstk; 370 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 371 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 372 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 373 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 374 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 375 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len); 376 fpstate_drop(td); 377 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase; 378 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase; 379 bzero(sf.sf_uc.uc_mcontext.mc_spare, 380 sizeof(sf.sf_uc.uc_mcontext.mc_spare)); 381 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__)); 382 383 /* Allocate space for the signal handler context. */ 384 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 385 SIGISMEMBER(psp->ps_sigonstack, sig)) { 386 sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size; 387#if defined(COMPAT_43) 388 td->td_sigstk.ss_flags |= SS_ONSTACK; 389#endif 390 } else 391 sp = (char *)regs->tf_rsp - 128; 392 if (xfpusave != NULL) { 393 sp -= xfpusave_len; 394 sp = (char *)((unsigned long)sp & ~0x3Ful); 395 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp; 396 } 397 sp -= sizeof(struct sigframe); 398 /* Align to 16 bytes. */ 399 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 400 401 /* Translate the signal if appropriate. */ 402 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 403 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 404 405 /* Build the argument list for the signal handler. */ 406 regs->tf_rdi = sig; /* arg 1 in %rdi */ 407 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 408 bzero(&sf.sf_si, sizeof(sf.sf_si)); 409 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 410 /* Signal handler installed with SA_SIGINFO. */ 411 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 412 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 413 414 /* Fill in POSIX parts */ 415 sf.sf_si = ksi->ksi_info; 416 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 417 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 418 } else { 419 /* Old FreeBSD-style arguments. */ 420 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 421 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 422 sf.sf_ahu.sf_handler = catcher; 423 } 424 mtx_unlock(&psp->ps_mtx); 425 PROC_UNLOCK(p); 426 427 /* 428 * Copy the sigframe out to the user's stack. 429 */ 430 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 || 431 (xfpusave != NULL && copyout(xfpusave, 432 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len) 433 != 0)) { 434#ifdef DEBUG 435 printf("process %ld has trashed its stack\n", (long)p->p_pid); 436#endif 437 PROC_LOCK(p); 438 sigexit(td, SIGILL); 439 } 440 441 regs->tf_rsp = (long)sfp; 442 regs->tf_rip = p->p_sysent->sv_sigcode_base; 443 regs->tf_rflags &= ~(PSL_T | PSL_D); 444 regs->tf_cs = _ucodesel; 445 regs->tf_ds = _udatasel; 446 regs->tf_es = _udatasel; 447 regs->tf_fs = _ufssel; 448 regs->tf_gs = _ugssel; 449 regs->tf_flags = TF_HASSEGS; 450 set_pcb_flags(pcb, PCB_FULL_IRET); 451 PROC_LOCK(p); 452 mtx_lock(&psp->ps_mtx); 453} 454 455/* 456 * System call to cleanup state after a signal 457 * has been taken. Reset signal mask and 458 * stack state from context left by sendsig (above). 459 * Return to previous pc and psl as specified by 460 * context left by sendsig. Check carefully to 461 * make sure that the user has not modified the 462 * state to gain improper privileges. 463 * 464 * MPSAFE 465 */ 466int 467sys_sigreturn(td, uap) 468 struct thread *td; 469 struct sigreturn_args /* { 470 const struct __ucontext *sigcntxp; 471 } */ *uap; 472{ 473 ucontext_t uc; 474 struct pcb *pcb; 475 struct proc *p; 476 struct trapframe *regs; 477 ucontext_t *ucp; 478 char *xfpustate; 479 size_t xfpustate_len; 480 long rflags; 481 int cs, error, ret; 482 ksiginfo_t ksi; 483 484 pcb = td->td_pcb; 485 p = td->td_proc; 486 487 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 488 if (error != 0) { 489 uprintf("pid %d (%s): sigreturn copyin failed\n", 490 p->p_pid, td->td_name); 491 return (error); 492 } 493 ucp = &uc; 494 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) { 495 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid, 496 td->td_name, ucp->uc_mcontext.mc_flags); 497 return (EINVAL); 498 } 499 regs = td->td_frame; 500 rflags = ucp->uc_mcontext.mc_rflags; 501 /* 502 * Don't allow users to change privileged or reserved flags. 503 */ 504 if (!EFL_SECURE(rflags, regs->tf_rflags)) { 505 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid, 506 td->td_name, rflags); 507 return (EINVAL); 508 } 509 510 /* 511 * Don't allow users to load a valid privileged %cs. Let the 512 * hardware check for invalid selectors, excess privilege in 513 * other selectors, invalid %eip's and invalid %esp's. 514 */ 515 cs = ucp->uc_mcontext.mc_cs; 516 if (!CS_SECURE(cs)) { 517 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid, 518 td->td_name, cs); 519 ksiginfo_init_trap(&ksi); 520 ksi.ksi_signo = SIGBUS; 521 ksi.ksi_code = BUS_OBJERR; 522 ksi.ksi_trapno = T_PROTFLT; 523 ksi.ksi_addr = (void *)regs->tf_rip; 524 trapsignal(td, &ksi); 525 return (EINVAL); 526 } 527 528 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) { 529 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len; 530 if (xfpustate_len > cpu_max_ext_state_size - 531 sizeof(struct savefpu)) { 532 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n", 533 p->p_pid, td->td_name, xfpustate_len); 534 return (EINVAL); 535 } 536 xfpustate = __builtin_alloca(xfpustate_len); 537 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate, 538 xfpustate, xfpustate_len); 539 if (error != 0) { 540 uprintf( 541 "pid %d (%s): sigreturn copying xfpustate failed\n", 542 p->p_pid, td->td_name); 543 return (error); 544 } 545 } else { 546 xfpustate = NULL; 547 xfpustate_len = 0; 548 } 549 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len); 550 if (ret != 0) { 551 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n", 552 p->p_pid, td->td_name, ret); 553 return (ret); 554 } 555 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 556 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase; 557 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase; 558 559#if defined(COMPAT_43) 560 if (ucp->uc_mcontext.mc_onstack & 1) 561 td->td_sigstk.ss_flags |= SS_ONSTACK; 562 else 563 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 564#endif 565 566 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0); 567 set_pcb_flags(pcb, PCB_FULL_IRET); 568 return (EJUSTRETURN); 569} 570 571#ifdef COMPAT_FREEBSD4 572int 573freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 574{ 575 576 return sys_sigreturn(td, (struct sigreturn_args *)uap); 577} 578#endif 579 580 581/* 582 * Machine dependent boot() routine 583 * 584 * I haven't seen anything to put here yet 585 * Possibly some stuff might be grafted back here from boot() 586 */ 587void 588cpu_boot(int howto) 589{ 590} 591 592/* 593 * Flush the D-cache for non-DMA I/O so that the I-cache can 594 * be made coherent later. 595 */ 596void 597cpu_flush_dcache(void *ptr, size_t len) 598{ 599 /* Not applicable */ 600} 601 602/* Get current clock frequency for the given cpu id. */ 603int 604cpu_est_clockrate(int cpu_id, uint64_t *rate) 605{ 606 uint64_t tsc1, tsc2; 607 uint64_t acnt, mcnt, perf; 608 register_t reg; 609 610 if (pcpu_find(cpu_id) == NULL || rate == NULL) 611 return (EINVAL); 612 613 /* 614 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist, 615 * DELAY(9) based logic fails. 616 */ 617 if (tsc_is_invariant && !tsc_perf_stat) 618 return (EOPNOTSUPP); 619 620#ifdef SMP 621 if (smp_cpus > 1) { 622 /* Schedule ourselves on the indicated cpu. */ 623 thread_lock(curthread); 624 sched_bind(curthread, cpu_id); 625 thread_unlock(curthread); 626 } 627#endif 628 629 /* Calibrate by measuring a short delay. */ 630 reg = intr_disable(); 631 if (tsc_is_invariant) { 632 wrmsr(MSR_MPERF, 0); 633 wrmsr(MSR_APERF, 0); 634 tsc1 = rdtsc(); 635 DELAY(1000); 636 mcnt = rdmsr(MSR_MPERF); 637 acnt = rdmsr(MSR_APERF); 638 tsc2 = rdtsc(); 639 intr_restore(reg); 640 perf = 1000 * acnt / mcnt; 641 *rate = (tsc2 - tsc1) * perf; 642 } else { 643 tsc1 = rdtsc(); 644 DELAY(1000); 645 tsc2 = rdtsc(); 646 intr_restore(reg); 647 *rate = (tsc2 - tsc1) * 1000; 648 } 649 650#ifdef SMP 651 if (smp_cpus > 1) { 652 thread_lock(curthread); 653 sched_unbind(curthread); 654 thread_unlock(curthread); 655 } 656#endif 657 658 return (0); 659} 660 661/* 662 * Shutdown the CPU as much as possible 663 */ 664void 665cpu_halt(void) 666{ 667 for (;;) 668 halt(); 669} 670 671void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */ 672static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */ 673static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */ 674SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RWTUN, &idle_mwait, 675 0, "Use MONITOR/MWAIT for short idle"); 676 677#define STATE_RUNNING 0x0 678#define STATE_MWAIT 0x1 679#define STATE_SLEEPING 0x2 680 681static void 682cpu_idle_acpi(sbintime_t sbt) 683{ 684 int *state; 685 686 state = (int *)PCPU_PTR(monitorbuf); 687 *state = STATE_SLEEPING; 688 689 /* See comments in cpu_idle_hlt(). */ 690 disable_intr(); 691 if (sched_runnable()) 692 enable_intr(); 693 else if (cpu_idle_hook) 694 cpu_idle_hook(sbt); 695 else 696 __asm __volatile("sti; hlt"); 697 *state = STATE_RUNNING; 698} 699 700static void 701cpu_idle_hlt(sbintime_t sbt) 702{ 703 int *state; 704 705 state = (int *)PCPU_PTR(monitorbuf); 706 *state = STATE_SLEEPING; 707 708 /* 709 * Since we may be in a critical section from cpu_idle(), if 710 * an interrupt fires during that critical section we may have 711 * a pending preemption. If the CPU halts, then that thread 712 * may not execute until a later interrupt awakens the CPU. 713 * To handle this race, check for a runnable thread after 714 * disabling interrupts and immediately return if one is 715 * found. Also, we must absolutely guarentee that hlt is 716 * the next instruction after sti. This ensures that any 717 * interrupt that fires after the call to disable_intr() will 718 * immediately awaken the CPU from hlt. Finally, please note 719 * that on x86 this works fine because of interrupts enabled only 720 * after the instruction following sti takes place, while IF is set 721 * to 1 immediately, allowing hlt instruction to acknowledge the 722 * interrupt. 723 */ 724 disable_intr(); 725 if (sched_runnable()) 726 enable_intr(); 727 else 728 __asm __volatile("sti; hlt"); 729 *state = STATE_RUNNING; 730} 731 732/* 733 * MWAIT cpu power states. Lower 4 bits are sub-states. 734 */ 735#define MWAIT_C0 0xf0 736#define MWAIT_C1 0x00 737#define MWAIT_C2 0x10 738#define MWAIT_C3 0x20 739#define MWAIT_C4 0x30 740 741static void 742cpu_idle_mwait(sbintime_t sbt) 743{ 744 int *state; 745 746 state = (int *)PCPU_PTR(monitorbuf); 747 *state = STATE_MWAIT; 748 749 /* See comments in cpu_idle_hlt(). */ 750 disable_intr(); 751 if (sched_runnable()) { 752 enable_intr(); 753 *state = STATE_RUNNING; 754 return; 755 } 756 cpu_monitor(state, 0, 0); 757 if (*state == STATE_MWAIT) 758 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0)); 759 else 760 enable_intr(); 761 *state = STATE_RUNNING; 762} 763 764static void 765cpu_idle_spin(sbintime_t sbt) 766{ 767 int *state; 768 int i; 769 770 state = (int *)PCPU_PTR(monitorbuf); 771 *state = STATE_RUNNING; 772 773 /* 774 * The sched_runnable() call is racy but as long as there is 775 * a loop missing it one time will have just a little impact if any 776 * (and it is much better than missing the check at all). 777 */ 778 for (i = 0; i < 1000; i++) { 779 if (sched_runnable()) 780 return; 781 cpu_spinwait(); 782 } 783} 784 785/* 786 * C1E renders the local APIC timer dead, so we disable it by 787 * reading the Interrupt Pending Message register and clearing 788 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27). 789 * 790 * Reference: 791 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors" 792 * #32559 revision 3.00+ 793 */ 794#define MSR_AMDK8_IPM 0xc0010055 795#define AMDK8_SMIONCMPHALT (1ULL << 27) 796#define AMDK8_C1EONCMPHALT (1ULL << 28) 797#define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT) 798 799static void 800cpu_probe_amdc1e(void) 801{ 802 803 /* 804 * Detect the presence of C1E capability mostly on latest 805 * dual-cores (or future) k8 family. 806 */ 807 if (cpu_vendor_id == CPU_VENDOR_AMD && 808 (cpu_id & 0x00000f00) == 0x00000f00 && 809 (cpu_id & 0x0fff0000) >= 0x00040000) { 810 cpu_ident_amdc1e = 1; 811 } 812} 813 814void (*cpu_idle_fn)(sbintime_t) = cpu_idle_acpi; 815 816void 817cpu_idle(int busy) 818{ 819 uint64_t msr; 820 sbintime_t sbt = -1; 821 822 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", 823 busy, curcpu); 824#ifdef MP_WATCHDOG 825 ap_watchdog(PCPU_GET(cpuid)); 826#endif 827 /* If we are busy - try to use fast methods. */ 828 if (busy) { 829 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) { 830 cpu_idle_mwait(busy); 831 goto out; 832 } 833 } 834 835 /* If we have time - switch timers into idle mode. */ 836 if (!busy) { 837 critical_enter(); 838 sbt = cpu_idleclock(); 839 } 840 841 /* Apply AMD APIC timer C1E workaround. */ 842 if (cpu_ident_amdc1e && cpu_disable_c3_sleep) { 843 msr = rdmsr(MSR_AMDK8_IPM); 844 if (msr & AMDK8_CMPHALT) 845 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT); 846 } 847 848 /* Call main idle method. */ 849 cpu_idle_fn(sbt); 850 851 /* Switch timers back into active mode. */ 852 if (!busy) { 853 cpu_activeclock(); 854 critical_exit(); 855 } 856out: 857 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", 858 busy, curcpu); 859} 860 861int 862cpu_idle_wakeup(int cpu) 863{ 864 struct pcpu *pcpu; 865 int *state; 866 867 pcpu = pcpu_find(cpu); 868 state = (int *)pcpu->pc_monitorbuf; 869 /* 870 * This doesn't need to be atomic since missing the race will 871 * simply result in unnecessary IPIs. 872 */ 873 if (*state == STATE_SLEEPING) 874 return (0); 875 if (*state == STATE_MWAIT) 876 *state = STATE_RUNNING; 877 return (1); 878} 879 880/* 881 * Ordered by speed/power consumption. 882 */ 883struct { 884 void *id_fn; 885 char *id_name; 886} idle_tbl[] = { 887 { cpu_idle_spin, "spin" }, 888 { cpu_idle_mwait, "mwait" }, 889 { cpu_idle_hlt, "hlt" }, 890 { cpu_idle_acpi, "acpi" }, 891 { NULL, NULL } 892}; 893 894static int 895idle_sysctl_available(SYSCTL_HANDLER_ARGS) 896{ 897 char *avail, *p; 898 int error; 899 int i; 900 901 avail = malloc(256, M_TEMP, M_WAITOK); 902 p = avail; 903 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 904 if (strstr(idle_tbl[i].id_name, "mwait") && 905 (cpu_feature2 & CPUID2_MON) == 0) 906 continue; 907 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 && 908 cpu_idle_hook == NULL) 909 continue; 910 p += sprintf(p, "%s%s", p != avail ? ", " : "", 911 idle_tbl[i].id_name); 912 } 913 error = sysctl_handle_string(oidp, avail, 0, req); 914 free(avail, M_TEMP); 915 return (error); 916} 917 918SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD, 919 0, 0, idle_sysctl_available, "A", "list of available idle functions"); 920 921static int 922idle_sysctl(SYSCTL_HANDLER_ARGS) 923{ 924 char buf[16]; 925 int error; 926 char *p; 927 int i; 928 929 p = "unknown"; 930 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 931 if (idle_tbl[i].id_fn == cpu_idle_fn) { 932 p = idle_tbl[i].id_name; 933 break; 934 } 935 } 936 strncpy(buf, p, sizeof(buf)); 937 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 938 if (error != 0 || req->newptr == NULL) 939 return (error); 940 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 941 if (strstr(idle_tbl[i].id_name, "mwait") && 942 (cpu_feature2 & CPUID2_MON) == 0) 943 continue; 944 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 && 945 cpu_idle_hook == NULL) 946 continue; 947 if (strcmp(idle_tbl[i].id_name, buf)) 948 continue; 949 cpu_idle_fn = idle_tbl[i].id_fn; 950 return (0); 951 } 952 return (EINVAL); 953} 954 955SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0, 956 idle_sysctl, "A", "currently selected idle function"); 957 958/* 959 * Reset registers to default values on exec. 960 */ 961void 962exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 963{ 964 struct trapframe *regs = td->td_frame; 965 struct pcb *pcb = td->td_pcb; 966 967 mtx_lock(&dt_lock); 968 if (td->td_proc->p_md.md_ldt != NULL) 969 user_ldt_free(td); 970 else 971 mtx_unlock(&dt_lock); 972 973 pcb->pcb_fsbase = 0; 974 pcb->pcb_gsbase = 0; 975 clear_pcb_flags(pcb, PCB_32BIT); 976 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__; 977 set_pcb_flags(pcb, PCB_FULL_IRET); 978 979 bzero((char *)regs, sizeof(struct trapframe)); 980 regs->tf_rip = imgp->entry_addr; 981 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 982 regs->tf_rdi = stack; /* argv */ 983 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 984 regs->tf_ss = _udatasel; 985 regs->tf_cs = _ucodesel; 986 regs->tf_ds = _udatasel; 987 regs->tf_es = _udatasel; 988 regs->tf_fs = _ufssel; 989 regs->tf_gs = _ugssel; 990 regs->tf_flags = TF_HASSEGS; 991 td->td_retval[1] = 0; 992 993 /* 994 * Reset the hardware debug registers if they were in use. 995 * They won't have any meaning for the newly exec'd process. 996 */ 997 if (pcb->pcb_flags & PCB_DBREGS) { 998 pcb->pcb_dr0 = 0; 999 pcb->pcb_dr1 = 0; 1000 pcb->pcb_dr2 = 0; 1001 pcb->pcb_dr3 = 0; 1002 pcb->pcb_dr6 = 0; 1003 pcb->pcb_dr7 = 0; 1004 if (pcb == curpcb) { 1005 /* 1006 * Clear the debug registers on the running 1007 * CPU, otherwise they will end up affecting 1008 * the next process we switch to. 1009 */ 1010 reset_dbregs(); 1011 } 1012 clear_pcb_flags(pcb, PCB_DBREGS); 1013 } 1014 1015 /* 1016 * Drop the FP state if we hold it, so that the process gets a 1017 * clean FP state if it uses the FPU again. 1018 */ 1019 fpstate_drop(td); 1020} 1021 1022void 1023cpu_setregs(void) 1024{ 1025 register_t cr0; 1026 1027 cr0 = rcr0(); 1028 /* 1029 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 1030 * BSP. See the comments there about why we set them. 1031 */ 1032 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1033 load_cr0(cr0); 1034} 1035 1036/* 1037 * Initialize amd64 and configure to run kernel 1038 */ 1039 1040/* 1041 * Initialize segments & interrupt table 1042 */ 1043 1044struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */ 1045static struct gate_descriptor idt0[NIDT]; 1046struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1047 1048static char dblfault_stack[PAGE_SIZE] __aligned(16); 1049 1050static char nmi0_stack[PAGE_SIZE] __aligned(16); 1051CTASSERT(sizeof(struct nmi_pcpu) == 16); 1052 1053struct amd64tss common_tss[MAXCPU]; 1054 1055/* 1056 * Software prototypes -- in more palatable form. 1057 * 1058 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same 1059 * slots as corresponding segments for i386 kernel. 1060 */ 1061struct soft_segment_descriptor gdt_segs[] = { 1062/* GNULL_SEL 0 Null Descriptor */ 1063{ .ssd_base = 0x0, 1064 .ssd_limit = 0x0, 1065 .ssd_type = 0, 1066 .ssd_dpl = 0, 1067 .ssd_p = 0, 1068 .ssd_long = 0, 1069 .ssd_def32 = 0, 1070 .ssd_gran = 0 }, 1071/* GNULL2_SEL 1 Null Descriptor */ 1072{ .ssd_base = 0x0, 1073 .ssd_limit = 0x0, 1074 .ssd_type = 0, 1075 .ssd_dpl = 0, 1076 .ssd_p = 0, 1077 .ssd_long = 0, 1078 .ssd_def32 = 0, 1079 .ssd_gran = 0 }, 1080/* GUFS32_SEL 2 32 bit %gs Descriptor for user */ 1081{ .ssd_base = 0x0, 1082 .ssd_limit = 0xfffff, 1083 .ssd_type = SDT_MEMRWA, 1084 .ssd_dpl = SEL_UPL, 1085 .ssd_p = 1, 1086 .ssd_long = 0, 1087 .ssd_def32 = 1, 1088 .ssd_gran = 1 }, 1089/* GUGS32_SEL 3 32 bit %fs Descriptor for user */ 1090{ .ssd_base = 0x0, 1091 .ssd_limit = 0xfffff, 1092 .ssd_type = SDT_MEMRWA, 1093 .ssd_dpl = SEL_UPL, 1094 .ssd_p = 1, 1095 .ssd_long = 0, 1096 .ssd_def32 = 1, 1097 .ssd_gran = 1 }, 1098/* GCODE_SEL 4 Code Descriptor for kernel */ 1099{ .ssd_base = 0x0, 1100 .ssd_limit = 0xfffff, 1101 .ssd_type = SDT_MEMERA, 1102 .ssd_dpl = SEL_KPL, 1103 .ssd_p = 1, 1104 .ssd_long = 1, 1105 .ssd_def32 = 0, 1106 .ssd_gran = 1 }, 1107/* GDATA_SEL 5 Data Descriptor for kernel */ 1108{ .ssd_base = 0x0, 1109 .ssd_limit = 0xfffff, 1110 .ssd_type = SDT_MEMRWA, 1111 .ssd_dpl = SEL_KPL, 1112 .ssd_p = 1, 1113 .ssd_long = 1, 1114 .ssd_def32 = 0, 1115 .ssd_gran = 1 }, 1116/* GUCODE32_SEL 6 32 bit Code Descriptor for user */ 1117{ .ssd_base = 0x0, 1118 .ssd_limit = 0xfffff, 1119 .ssd_type = SDT_MEMERA, 1120 .ssd_dpl = SEL_UPL, 1121 .ssd_p = 1, 1122 .ssd_long = 0, 1123 .ssd_def32 = 1, 1124 .ssd_gran = 1 }, 1125/* GUDATA_SEL 7 32/64 bit Data Descriptor for user */ 1126{ .ssd_base = 0x0, 1127 .ssd_limit = 0xfffff, 1128 .ssd_type = SDT_MEMRWA, 1129 .ssd_dpl = SEL_UPL, 1130 .ssd_p = 1, 1131 .ssd_long = 0, 1132 .ssd_def32 = 1, 1133 .ssd_gran = 1 }, 1134/* GUCODE_SEL 8 64 bit Code Descriptor for user */ 1135{ .ssd_base = 0x0, 1136 .ssd_limit = 0xfffff, 1137 .ssd_type = SDT_MEMERA, 1138 .ssd_dpl = SEL_UPL, 1139 .ssd_p = 1, 1140 .ssd_long = 1, 1141 .ssd_def32 = 0, 1142 .ssd_gran = 1 }, 1143/* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1144{ .ssd_base = 0x0, 1145 .ssd_limit = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE - 1, 1146 .ssd_type = SDT_SYSTSS, 1147 .ssd_dpl = SEL_KPL, 1148 .ssd_p = 1, 1149 .ssd_long = 0, 1150 .ssd_def32 = 0, 1151 .ssd_gran = 0 }, 1152/* Actually, the TSS is a system descriptor which is double size */ 1153{ .ssd_base = 0x0, 1154 .ssd_limit = 0x0, 1155 .ssd_type = 0, 1156 .ssd_dpl = 0, 1157 .ssd_p = 0, 1158 .ssd_long = 0, 1159 .ssd_def32 = 0, 1160 .ssd_gran = 0 }, 1161/* GUSERLDT_SEL 11 LDT Descriptor */ 1162{ .ssd_base = 0x0, 1163 .ssd_limit = 0x0, 1164 .ssd_type = 0, 1165 .ssd_dpl = 0, 1166 .ssd_p = 0, 1167 .ssd_long = 0, 1168 .ssd_def32 = 0, 1169 .ssd_gran = 0 }, 1170/* GUSERLDT_SEL 12 LDT Descriptor, double size */ 1171{ .ssd_base = 0x0, 1172 .ssd_limit = 0x0, 1173 .ssd_type = 0, 1174 .ssd_dpl = 0, 1175 .ssd_p = 0, 1176 .ssd_long = 0, 1177 .ssd_def32 = 0, 1178 .ssd_gran = 0 }, 1179}; 1180 1181void 1182setidt(idx, func, typ, dpl, ist) 1183 int idx; 1184 inthand_t *func; 1185 int typ; 1186 int dpl; 1187 int ist; 1188{ 1189 struct gate_descriptor *ip; 1190 1191 ip = idt + idx; 1192 ip->gd_looffset = (uintptr_t)func; 1193 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 1194 ip->gd_ist = ist; 1195 ip->gd_xx = 0; 1196 ip->gd_type = typ; 1197 ip->gd_dpl = dpl; 1198 ip->gd_p = 1; 1199 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 1200} 1201 1202extern inthand_t 1203 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1204 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1205 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1206 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1207 IDTVEC(xmm), IDTVEC(dblfault), 1208#ifdef KDTRACE_HOOKS 1209 IDTVEC(dtrace_ret), 1210#endif 1211#ifdef XENHVM 1212 IDTVEC(xen_intr_upcall), 1213#endif 1214 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 1215 1216#ifdef DDB 1217/* 1218 * Display the index and function name of any IDT entries that don't use 1219 * the default 'rsvd' entry point. 1220 */ 1221DB_SHOW_COMMAND(idt, db_show_idt) 1222{ 1223 struct gate_descriptor *ip; 1224 int idx; 1225 uintptr_t func; 1226 1227 ip = idt; 1228 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1229 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset); 1230 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1231 db_printf("%3d\t", idx); 1232 db_printsym(func, DB_STGY_PROC); 1233 db_printf("\n"); 1234 } 1235 ip++; 1236 } 1237} 1238 1239/* Show privileged registers. */ 1240DB_SHOW_COMMAND(sysregs, db_show_sysregs) 1241{ 1242 struct { 1243 uint16_t limit; 1244 uint64_t base; 1245 } __packed idtr, gdtr; 1246 uint16_t ldt, tr; 1247 1248 __asm __volatile("sidt %0" : "=m" (idtr)); 1249 db_printf("idtr\t0x%016lx/%04x\n", 1250 (u_long)idtr.base, (u_int)idtr.limit); 1251 __asm __volatile("sgdt %0" : "=m" (gdtr)); 1252 db_printf("gdtr\t0x%016lx/%04x\n", 1253 (u_long)gdtr.base, (u_int)gdtr.limit); 1254 __asm __volatile("sldt %0" : "=r" (ldt)); 1255 db_printf("ldtr\t0x%04x\n", ldt); 1256 __asm __volatile("str %0" : "=r" (tr)); 1257 db_printf("tr\t0x%04x\n", tr); 1258 db_printf("cr0\t0x%016lx\n", rcr0()); 1259 db_printf("cr2\t0x%016lx\n", rcr2()); 1260 db_printf("cr3\t0x%016lx\n", rcr3()); 1261 db_printf("cr4\t0x%016lx\n", rcr4()); 1262 db_printf("EFER\t%016lx\n", rdmsr(MSR_EFER)); 1263 db_printf("FEATURES_CTL\t%016lx\n", rdmsr(MSR_IA32_FEATURE_CONTROL)); 1264 db_printf("DEBUG_CTL\t%016lx\n", rdmsr(MSR_DEBUGCTLMSR)); 1265 db_printf("PAT\t%016lx\n", rdmsr(MSR_PAT)); 1266 db_printf("GSBASE\t%016lx\n", rdmsr(MSR_GSBASE)); 1267} 1268#endif 1269 1270void 1271sdtossd(sd, ssd) 1272 struct user_segment_descriptor *sd; 1273 struct soft_segment_descriptor *ssd; 1274{ 1275 1276 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1277 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1278 ssd->ssd_type = sd->sd_type; 1279 ssd->ssd_dpl = sd->sd_dpl; 1280 ssd->ssd_p = sd->sd_p; 1281 ssd->ssd_long = sd->sd_long; 1282 ssd->ssd_def32 = sd->sd_def32; 1283 ssd->ssd_gran = sd->sd_gran; 1284} 1285 1286void 1287ssdtosd(ssd, sd) 1288 struct soft_segment_descriptor *ssd; 1289 struct user_segment_descriptor *sd; 1290{ 1291 1292 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1293 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 1294 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1295 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1296 sd->sd_type = ssd->ssd_type; 1297 sd->sd_dpl = ssd->ssd_dpl; 1298 sd->sd_p = ssd->ssd_p; 1299 sd->sd_long = ssd->ssd_long; 1300 sd->sd_def32 = ssd->ssd_def32; 1301 sd->sd_gran = ssd->ssd_gran; 1302} 1303 1304void 1305ssdtosyssd(ssd, sd) 1306 struct soft_segment_descriptor *ssd; 1307 struct system_segment_descriptor *sd; 1308{ 1309 1310 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1311 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 1312 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1313 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1314 sd->sd_type = ssd->ssd_type; 1315 sd->sd_dpl = ssd->ssd_dpl; 1316 sd->sd_p = ssd->ssd_p; 1317 sd->sd_gran = ssd->ssd_gran; 1318} 1319 1320#if !defined(DEV_ATPIC) && defined(DEV_ISA) 1321#include <isa/isavar.h> 1322#include <isa/isareg.h> 1323/* 1324 * Return a bitmap of the current interrupt requests. This is 8259-specific 1325 * and is only suitable for use at probe time. 1326 * This is only here to pacify sio. It is NOT FATAL if this doesn't work. 1327 * It shouldn't be here. There should probably be an APIC centric 1328 * implementation in the apic driver code, if at all. 1329 */ 1330intrmask_t 1331isa_irq_pending(void) 1332{ 1333 u_char irr1; 1334 u_char irr2; 1335 1336 irr1 = inb(IO_ICU1); 1337 irr2 = inb(IO_ICU2); 1338 return ((irr2 << 8) | irr1); 1339} 1340#endif 1341 1342u_int basemem; 1343 1344static int 1345add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap, 1346 int *physmap_idxp) 1347{ 1348 int i, insert_idx, physmap_idx; 1349 1350 physmap_idx = *physmap_idxp; 1351 1352 if (length == 0) 1353 return (1); 1354 1355 /* 1356 * Find insertion point while checking for overlap. Start off by 1357 * assuming the new entry will be added to the end. 1358 */ 1359 insert_idx = physmap_idx + 2; 1360 for (i = 0; i <= physmap_idx; i += 2) { 1361 if (base < physmap[i + 1]) { 1362 if (base + length <= physmap[i]) { 1363 insert_idx = i; 1364 break; 1365 } 1366 if (boothowto & RB_VERBOSE) 1367 printf( 1368 "Overlapping memory regions, ignoring second region\n"); 1369 return (1); 1370 } 1371 } 1372 1373 /* See if we can prepend to the next entry. */ 1374 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) { 1375 physmap[insert_idx] = base; 1376 return (1); 1377 } 1378 1379 /* See if we can append to the previous entry. */ 1380 if (insert_idx > 0 && base == physmap[insert_idx - 1]) { 1381 physmap[insert_idx - 1] += length; 1382 return (1); 1383 } 1384 1385 physmap_idx += 2; 1386 *physmap_idxp = physmap_idx; 1387 if (physmap_idx == PHYSMAP_SIZE) { 1388 printf( 1389 "Too many segments in the physical address map, giving up\n"); 1390 return (0); 1391 } 1392 1393 /* 1394 * Move the last 'N' entries down to make room for the new 1395 * entry if needed. 1396 */ 1397 for (i = physmap_idx; i > insert_idx; i -= 2) { 1398 physmap[i] = physmap[i - 2]; 1399 physmap[i + 1] = physmap[i - 1]; 1400 } 1401 1402 /* Insert the new entry. */ 1403 physmap[insert_idx] = base; 1404 physmap[insert_idx + 1] = base + length; 1405 return (1); 1406} 1407 1408void 1409bios_add_smap_entries(struct bios_smap *smapbase, u_int32_t smapsize, 1410 vm_paddr_t *physmap, int *physmap_idx) 1411{ 1412 struct bios_smap *smap, *smapend; 1413 1414 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 1415 1416 for (smap = smapbase; smap < smapend; smap++) { 1417 if (boothowto & RB_VERBOSE) 1418 printf("SMAP type=%02x base=%016lx len=%016lx\n", 1419 smap->type, smap->base, smap->length); 1420 1421 if (smap->type != SMAP_TYPE_MEMORY) 1422 continue; 1423 1424 if (!add_physmap_entry(smap->base, smap->length, physmap, 1425 physmap_idx)) 1426 break; 1427 } 1428} 1429 1430#define efi_next_descriptor(ptr, size) \ 1431 ((struct efi_md *)(((uint8_t *) ptr) + size)) 1432 1433static void 1434add_efi_map_entries(struct efi_map_header *efihdr, vm_paddr_t *physmap, 1435 int *physmap_idx) 1436{ 1437 struct efi_md *map, *p; 1438 const char *type; 1439 size_t efisz; 1440 int ndesc, i; 1441 1442 static const char *types[] = { 1443 "Reserved", 1444 "LoaderCode", 1445 "LoaderData", 1446 "BootServicesCode", 1447 "BootServicesData", 1448 "RuntimeServicesCode", 1449 "RuntimeServicesData", 1450 "ConventionalMemory", 1451 "UnusableMemory", 1452 "ACPIReclaimMemory", 1453 "ACPIMemoryNVS", 1454 "MemoryMappedIO", 1455 "MemoryMappedIOPortSpace", 1456 "PalCode" 1457 }; 1458 1459 /* 1460 * Memory map data provided by UEFI via the GetMemoryMap 1461 * Boot Services API. 1462 */ 1463 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf; 1464 map = (struct efi_md *)((uint8_t *)efihdr + efisz); 1465 1466 if (efihdr->descriptor_size == 0) 1467 return; 1468 ndesc = efihdr->memory_size / efihdr->descriptor_size; 1469 1470 if (boothowto & RB_VERBOSE) 1471 printf("%23s %12s %12s %8s %4s\n", 1472 "Type", "Physical", "Virtual", "#Pages", "Attr"); 1473 1474 for (i = 0, p = map; i < ndesc; i++, 1475 p = efi_next_descriptor(p, efihdr->descriptor_size)) { 1476 if (boothowto & RB_VERBOSE) { 1477 if (p->md_type <= EFI_MD_TYPE_PALCODE) 1478 type = types[p->md_type]; 1479 else 1480 type = "<INVALID>"; 1481 printf("%23s %012lx %12p %08lx ", type, p->md_phys, 1482 p->md_virt, p->md_pages); 1483 if (p->md_attr & EFI_MD_ATTR_UC) 1484 printf("UC "); 1485 if (p->md_attr & EFI_MD_ATTR_WC) 1486 printf("WC "); 1487 if (p->md_attr & EFI_MD_ATTR_WT) 1488 printf("WT "); 1489 if (p->md_attr & EFI_MD_ATTR_WB) 1490 printf("WB "); 1491 if (p->md_attr & EFI_MD_ATTR_UCE) 1492 printf("UCE "); 1493 if (p->md_attr & EFI_MD_ATTR_WP) 1494 printf("WP "); 1495 if (p->md_attr & EFI_MD_ATTR_RP) 1496 printf("RP "); 1497 if (p->md_attr & EFI_MD_ATTR_XP) 1498 printf("XP "); 1499 if (p->md_attr & EFI_MD_ATTR_RT) 1500 printf("RUNTIME"); 1501 printf("\n"); 1502 } 1503 1504 switch (p->md_type) { 1505 case EFI_MD_TYPE_CODE: 1506 case EFI_MD_TYPE_DATA: 1507 case EFI_MD_TYPE_BS_CODE: 1508 case EFI_MD_TYPE_BS_DATA: 1509 case EFI_MD_TYPE_FREE: 1510 /* 1511 * We're allowed to use any entry with these types. 1512 */ 1513 break; 1514 default: 1515 continue; 1516 } 1517 1518 if (!add_physmap_entry(p->md_phys, (p->md_pages * PAGE_SIZE), 1519 physmap, physmap_idx)) 1520 break; 1521 } 1522} 1523 1524static char bootmethod[16] = ""; 1525SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0, 1526 "System firmware boot method"); 1527 1528static void 1529native_parse_memmap(caddr_t kmdp, vm_paddr_t *physmap, int *physmap_idx) 1530{ 1531 struct bios_smap *smap; 1532 struct efi_map_header *efihdr; 1533 u_int32_t size; 1534 1535 /* 1536 * Memory map from INT 15:E820. 1537 * 1538 * subr_module.c says: 1539 * "Consumer may safely assume that size value precedes data." 1540 * ie: an int32_t immediately precedes smap. 1541 */ 1542 1543 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1544 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1545 smap = (struct bios_smap *)preload_search_info(kmdp, 1546 MODINFO_METADATA | MODINFOMD_SMAP); 1547 if (efihdr == NULL && smap == NULL) 1548 panic("No BIOS smap or EFI map info from loader!"); 1549 1550 if (efihdr != NULL) { 1551 add_efi_map_entries(efihdr, physmap, physmap_idx); 1552 strlcpy(bootmethod, "UEFI", sizeof(bootmethod)); 1553 } else { 1554 size = *((u_int32_t *)smap - 1); 1555 bios_add_smap_entries(smap, size, physmap, physmap_idx); 1556 strlcpy(bootmethod, "BIOS", sizeof(bootmethod)); 1557 } 1558} 1559 1560#define PAGES_PER_GB (1024 * 1024 * 1024 / PAGE_SIZE) 1561 1562/* 1563 * Populate the (physmap) array with base/bound pairs describing the 1564 * available physical memory in the system, then test this memory and 1565 * build the phys_avail array describing the actually-available memory. 1566 * 1567 * Total memory size may be set by the kernel environment variable 1568 * hw.physmem or the compile-time define MAXMEM. 1569 * 1570 * XXX first should be vm_paddr_t. 1571 */ 1572static void 1573getmemsize(caddr_t kmdp, u_int64_t first) 1574{ 1575 int i, physmap_idx, pa_indx, da_indx; 1576 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1577 u_long physmem_start, physmem_tunable, memtest; 1578 pt_entry_t *pte; 1579 quad_t dcons_addr, dcons_size; 1580 int page_counter; 1581 1582 bzero(physmap, sizeof(physmap)); 1583 basemem = 0; 1584 physmap_idx = 0; 1585 1586 init_ops.parse_memmap(kmdp, physmap, &physmap_idx); 1587 1588 /* 1589 * Find the 'base memory' segment for SMP 1590 */ 1591 basemem = 0; 1592 for (i = 0; i <= physmap_idx; i += 2) { 1593 if (physmap[i] == 0x00000000) { 1594 basemem = physmap[i + 1] / 1024; 1595 break; 1596 } 1597 } 1598 if (basemem == 0) 1599 panic("BIOS smap did not include a basemem segment!"); 1600 1601 /* 1602 * Make hole for "AP -> long mode" bootstrap code. The 1603 * mp_bootaddress vector is only available when the kernel 1604 * is configured to support APs and APs for the system start 1605 * in 32bit mode (e.g. SMP bare metal). 1606 */ 1607 if (init_ops.mp_bootaddress) 1608 physmap[1] = init_ops.mp_bootaddress(physmap[1] / 1024); 1609 1610 /* 1611 * Maxmem isn't the "maximum memory", it's one larger than the 1612 * highest page of the physical address space. It should be 1613 * called something like "Maxphyspage". We may adjust this 1614 * based on ``hw.physmem'' and the results of the memory test. 1615 */ 1616 Maxmem = atop(physmap[physmap_idx + 1]); 1617 1618#ifdef MAXMEM 1619 Maxmem = MAXMEM / 4; 1620#endif 1621 1622 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1623 Maxmem = atop(physmem_tunable); 1624 1625 /* 1626 * The boot memory test is disabled by default, as it takes a 1627 * significant amount of time on large-memory systems, and is 1628 * unfriendly to virtual machines as it unnecessarily touches all 1629 * pages. 1630 * 1631 * A general name is used as the code may be extended to support 1632 * additional tests beyond the current "page present" test. 1633 */ 1634 memtest = 0; 1635 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest); 1636 1637 /* 1638 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 1639 * in the system. 1640 */ 1641 if (Maxmem > atop(physmap[physmap_idx + 1])) 1642 Maxmem = atop(physmap[physmap_idx + 1]); 1643 1644 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1645 (boothowto & RB_VERBOSE)) 1646 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1647 1648 /* call pmap initialization to make new kernel address space */ 1649 pmap_bootstrap(&first); 1650 1651 /* 1652 * Size up each available chunk of physical memory. 1653 * 1654 * XXX Some BIOSes corrupt low 64KB between suspend and resume. 1655 * By default, mask off the first 16 pages unless we appear to be 1656 * running in a VM. 1657 */ 1658 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT; 1659 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start); 1660 if (physmem_start < PAGE_SIZE) 1661 physmap[0] = PAGE_SIZE; 1662 else if (physmem_start >= physmap[1]) 1663 physmap[0] = round_page(physmap[1] - PAGE_SIZE); 1664 else 1665 physmap[0] = round_page(physmem_start); 1666 pa_indx = 0; 1667 da_indx = 1; 1668 phys_avail[pa_indx++] = physmap[0]; 1669 phys_avail[pa_indx] = physmap[0]; 1670 dump_avail[da_indx] = physmap[0]; 1671 pte = CMAP1; 1672 1673 /* 1674 * Get dcons buffer address 1675 */ 1676 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1677 getenv_quad("dcons.size", &dcons_size) == 0) 1678 dcons_addr = 0; 1679 1680 /* 1681 * physmap is in bytes, so when converting to page boundaries, 1682 * round up the start address and round down the end address. 1683 */ 1684 page_counter = 0; 1685 if (memtest != 0) 1686 printf("Testing system memory"); 1687 for (i = 0; i <= physmap_idx; i += 2) { 1688 vm_paddr_t end; 1689 1690 end = ptoa((vm_paddr_t)Maxmem); 1691 if (physmap[i + 1] < end) 1692 end = trunc_page(physmap[i + 1]); 1693 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1694 int tmp, page_bad, full; 1695 int *ptr = (int *)CADDR1; 1696 1697 full = FALSE; 1698 /* 1699 * block out kernel memory as not available. 1700 */ 1701 if (pa >= (vm_paddr_t)kernphys && pa < first) 1702 goto do_dump_avail; 1703 1704 /* 1705 * block out dcons buffer 1706 */ 1707 if (dcons_addr > 0 1708 && pa >= trunc_page(dcons_addr) 1709 && pa < dcons_addr + dcons_size) 1710 goto do_dump_avail; 1711 1712 page_bad = FALSE; 1713 if (memtest == 0) 1714 goto skip_memtest; 1715 1716 /* 1717 * Print a "." every GB to show we're making 1718 * progress. 1719 */ 1720 page_counter++; 1721 if ((page_counter % PAGES_PER_GB) == 0) 1722 printf("."); 1723 1724 /* 1725 * map page into kernel: valid, read/write,non-cacheable 1726 */ 1727 *pte = pa | PG_V | PG_RW | PG_NC_PWT | PG_NC_PCD; 1728 invltlb(); 1729 1730 tmp = *(int *)ptr; 1731 /* 1732 * Test for alternating 1's and 0's 1733 */ 1734 *(volatile int *)ptr = 0xaaaaaaaa; 1735 if (*(volatile int *)ptr != 0xaaaaaaaa) 1736 page_bad = TRUE; 1737 /* 1738 * Test for alternating 0's and 1's 1739 */ 1740 *(volatile int *)ptr = 0x55555555; 1741 if (*(volatile int *)ptr != 0x55555555) 1742 page_bad = TRUE; 1743 /* 1744 * Test for all 1's 1745 */ 1746 *(volatile int *)ptr = 0xffffffff; 1747 if (*(volatile int *)ptr != 0xffffffff) 1748 page_bad = TRUE; 1749 /* 1750 * Test for all 0's 1751 */ 1752 *(volatile int *)ptr = 0x0; 1753 if (*(volatile int *)ptr != 0x0) 1754 page_bad = TRUE; 1755 /* 1756 * Restore original value. 1757 */ 1758 *(int *)ptr = tmp; 1759 1760skip_memtest: 1761 /* 1762 * Adjust array of valid/good pages. 1763 */ 1764 if (page_bad == TRUE) 1765 continue; 1766 /* 1767 * If this good page is a continuation of the 1768 * previous set of good pages, then just increase 1769 * the end pointer. Otherwise start a new chunk. 1770 * Note that "end" points one higher than end, 1771 * making the range >= start and < end. 1772 * If we're also doing a speculative memory 1773 * test and we at or past the end, bump up Maxmem 1774 * so that we keep going. The first bad page 1775 * will terminate the loop. 1776 */ 1777 if (phys_avail[pa_indx] == pa) { 1778 phys_avail[pa_indx] += PAGE_SIZE; 1779 } else { 1780 pa_indx++; 1781 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1782 printf( 1783 "Too many holes in the physical address space, giving up\n"); 1784 pa_indx--; 1785 full = TRUE; 1786 goto do_dump_avail; 1787 } 1788 phys_avail[pa_indx++] = pa; /* start */ 1789 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1790 } 1791 physmem++; 1792do_dump_avail: 1793 if (dump_avail[da_indx] == pa) { 1794 dump_avail[da_indx] += PAGE_SIZE; 1795 } else { 1796 da_indx++; 1797 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1798 da_indx--; 1799 goto do_next; 1800 } 1801 dump_avail[da_indx++] = pa; /* start */ 1802 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1803 } 1804do_next: 1805 if (full) 1806 break; 1807 } 1808 } 1809 *pte = 0; 1810 invltlb(); 1811 if (memtest != 0) 1812 printf("\n"); 1813 1814 /* 1815 * XXX 1816 * The last chunk must contain at least one page plus the message 1817 * buffer to avoid complicating other code (message buffer address 1818 * calculation, etc.). 1819 */ 1820 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1821 round_page(msgbufsize) >= phys_avail[pa_indx]) { 1822 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1823 phys_avail[pa_indx--] = 0; 1824 phys_avail[pa_indx--] = 0; 1825 } 1826 1827 Maxmem = atop(phys_avail[pa_indx]); 1828 1829 /* Trim off space for the message buffer. */ 1830 phys_avail[pa_indx] -= round_page(msgbufsize); 1831 1832 /* Map the message buffer. */ 1833 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]); 1834} 1835 1836static caddr_t 1837native_parse_preload_data(u_int64_t modulep) 1838{ 1839 caddr_t kmdp; 1840#ifdef DDB 1841 vm_offset_t ksym_start; 1842 vm_offset_t ksym_end; 1843#endif 1844 1845 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1846 preload_bootstrap_relocate(KERNBASE); 1847 kmdp = preload_search_by_type("elf kernel"); 1848 if (kmdp == NULL) 1849 kmdp = preload_search_by_type("elf64 kernel"); 1850 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1851 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1852#ifdef DDB 1853 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1854 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1855 db_fetch_ksymtab(ksym_start, ksym_end); 1856#endif 1857 1858 return (kmdp); 1859} 1860 1861u_int64_t 1862hammer_time(u_int64_t modulep, u_int64_t physfree) 1863{ 1864 caddr_t kmdp; 1865 int gsel_tss, x; 1866 struct pcpu *pc; 1867 struct nmi_pcpu *np; 1868 struct xstate_hdr *xhdr; 1869 u_int64_t msr; 1870 char *env; 1871 size_t kstack0_sz; 1872 1873 thread0.td_kstack = physfree + KERNBASE; 1874 thread0.td_kstack_pages = KSTACK_PAGES; 1875 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE; 1876 bzero((void *)thread0.td_kstack, kstack0_sz); 1877 physfree += kstack0_sz; 1878 1879 /* 1880 * This may be done better later if it gets more high level 1881 * components in it. If so just link td->td_proc here. 1882 */ 1883 proc_linkup0(&proc0, &thread0); 1884 1885 kmdp = init_ops.parse_preload_data(modulep); 1886 1887 /* Init basic tunables, hz etc */ 1888 init_param1(); 1889 1890 /* 1891 * make gdt memory segments 1892 */ 1893 for (x = 0; x < NGDT; x++) { 1894 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) && 1895 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1) 1896 ssdtosd(&gdt_segs[x], &gdt[x]); 1897 } 1898 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1899 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1900 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1901 1902 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1903 r_gdt.rd_base = (long) gdt; 1904 lgdt(&r_gdt); 1905 pc = &__pcpu[0]; 1906 1907 wrmsr(MSR_FSBASE, 0); /* User value */ 1908 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1909 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1910 1911 pcpu_init(pc, 0, sizeof(struct pcpu)); 1912 dpcpu_init((void *)(physfree + KERNBASE), 0); 1913 physfree += DPCPU_SIZE; 1914 PCPU_SET(prvspace, pc); 1915 PCPU_SET(curthread, &thread0); 1916 PCPU_SET(tssp, &common_tss[0]); 1917 PCPU_SET(commontssp, &common_tss[0]); 1918 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1919 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]); 1920 PCPU_SET(fs32p, &gdt[GUFS32_SEL]); 1921 PCPU_SET(gs32p, &gdt[GUGS32_SEL]); 1922 1923 /* 1924 * Initialize mutexes. 1925 * 1926 * icu_lock: in order to allow an interrupt to occur in a critical 1927 * section, to set pcpu->ipending (etc...) properly, we 1928 * must be able to get the icu lock, so it can't be 1929 * under witness. 1930 */ 1931 mutex_init(); 1932 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1933 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF); 1934 1935 /* exceptions */ 1936 for (x = 0; x < NIDT; x++) 1937 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1938 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1939 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1940 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2); 1941 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1942 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1943 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1944 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1945 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1946 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1947 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1948 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1949 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1950 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1951 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1952 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1953 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1954 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1955 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1956 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1957#ifdef KDTRACE_HOOKS 1958 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0); 1959#endif 1960#ifdef XENHVM 1961 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_UPL, 0); 1962#endif 1963 1964 r_idt.rd_limit = sizeof(idt0) - 1; 1965 r_idt.rd_base = (long) idt; 1966 lidt(&r_idt); 1967 1968 /* 1969 * Initialize the clock before the console so that console 1970 * initialization can use DELAY(). 1971 */ 1972 clock_init(); 1973 1974 /* 1975 * Use vt(4) by default for UEFI boot (during the sc(4)/vt(4) 1976 * transition). 1977 */ 1978 if (kmdp != NULL && preload_search_info(kmdp, 1979 MODINFO_METADATA | MODINFOMD_EFI_MAP) != NULL) 1980 vty_set_preferred(VTY_VT); 1981 1982 /* 1983 * Initialize the console before we print anything out. 1984 */ 1985 cninit(); 1986 1987#ifdef DEV_ISA 1988#ifdef DEV_ATPIC 1989 elcr_probe(); 1990 atpic_startup(); 1991#else 1992 /* Reset and mask the atpics and leave them shut down. */ 1993 atpic_reset(); 1994 1995 /* 1996 * Point the ICU spurious interrupt vectors at the APIC spurious 1997 * interrupt handler. 1998 */ 1999 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 2000 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 2001#endif 2002#else 2003#error "have you forgotten the isa device?"; 2004#endif 2005 2006 kdb_init(); 2007 2008#ifdef KDB 2009 if (boothowto & RB_KDB) 2010 kdb_enter(KDB_WHY_BOOTFLAGS, 2011 "Boot flags requested debugger"); 2012#endif 2013 2014 identify_cpu(); /* Final stage of CPU initialization */ 2015 initializecpu(); /* Initialize CPU registers */ 2016 initializecpucache(); 2017 2018 /* doublefault stack space, runs on ist1 */ 2019 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 2020 2021 /* 2022 * NMI stack, runs on ist2. The pcpu pointer is stored just 2023 * above the start of the ist2 stack. 2024 */ 2025 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1; 2026 np->np_pcpu = (register_t) pc; 2027 common_tss[0].tss_ist2 = (long) np; 2028 2029 /* Set the IO permission bitmap (empty due to tss seg limit) */ 2030 common_tss[0].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE; 2031 2032 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2033 ltr(gsel_tss); 2034 2035 /* Set up the fast syscall stuff */ 2036 msr = rdmsr(MSR_EFER) | EFER_SCE; 2037 wrmsr(MSR_EFER, msr); 2038 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 2039 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 2040 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 2041 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 2042 wrmsr(MSR_STAR, msr); 2043 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 2044 2045 getmemsize(kmdp, physfree); 2046 init_param2(physmem); 2047 2048 /* now running on new page tables, configured,and u/iom is accessible */ 2049 2050 msgbufinit(msgbufp, msgbufsize); 2051 fpuinit(); 2052 2053 /* 2054 * Set up thread0 pcb after fpuinit calculated pcb + fpu save 2055 * area size. Zero out the extended state header in fpu save 2056 * area. 2057 */ 2058 thread0.td_pcb = get_pcb_td(&thread0); 2059 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size); 2060 if (use_xsave) { 2061 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) + 2062 1); 2063 xhdr->xstate_bv = xsave_mask; 2064 } 2065 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2066 common_tss[0].tss_rsp0 = (vm_offset_t)thread0.td_pcb; 2067 /* Ensure the stack is aligned to 16 bytes */ 2068 common_tss[0].tss_rsp0 &= ~0xFul; 2069 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 2070 PCPU_SET(curpcb, thread0.td_pcb); 2071 2072 /* transfer to user mode */ 2073 2074 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2075 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2076 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 2077 _ufssel = GSEL(GUFS32_SEL, SEL_UPL); 2078 _ugssel = GSEL(GUGS32_SEL, SEL_UPL); 2079 2080 load_ds(_udatasel); 2081 load_es(_udatasel); 2082 load_fs(_ufssel); 2083 2084 /* setup proc 0's pcb */ 2085 thread0.td_pcb->pcb_flags = 0; 2086 thread0.td_pcb->pcb_cr3 = KPML4phys; /* PCID 0 is reserved for kernel */ 2087 thread0.td_frame = &proc0_tf; 2088 2089 env = kern_getenv("kernelname"); 2090 if (env != NULL) 2091 strlcpy(kernelname, env, sizeof(kernelname)); 2092 2093 cpu_probe_amdc1e(); 2094 2095#ifdef FDT 2096 x86_init_fdt(); 2097#endif 2098 2099 /* Location of kernel stack for locore */ 2100 return ((u_int64_t)thread0.td_pcb); 2101} 2102 2103void 2104cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2105{ 2106 2107 pcpu->pc_acpi_id = 0xffffffff; 2108} 2109 2110static int 2111smap_sysctl_handler(SYSCTL_HANDLER_ARGS) 2112{ 2113 struct bios_smap *smapbase; 2114 struct bios_smap_xattr smap; 2115 caddr_t kmdp; 2116 uint32_t *smapattr; 2117 int count, error, i; 2118 2119 /* Retrieve the system memory map from the loader. */ 2120 kmdp = preload_search_by_type("elf kernel"); 2121 if (kmdp == NULL) 2122 kmdp = preload_search_by_type("elf64 kernel"); 2123 smapbase = (struct bios_smap *)preload_search_info(kmdp, 2124 MODINFO_METADATA | MODINFOMD_SMAP); 2125 if (smapbase == NULL) 2126 return (0); 2127 smapattr = (uint32_t *)preload_search_info(kmdp, 2128 MODINFO_METADATA | MODINFOMD_SMAP_XATTR); 2129 count = *((uint32_t *)smapbase - 1) / sizeof(*smapbase); 2130 error = 0; 2131 for (i = 0; i < count; i++) { 2132 smap.base = smapbase[i].base; 2133 smap.length = smapbase[i].length; 2134 smap.type = smapbase[i].type; 2135 if (smapattr != NULL) 2136 smap.xattr = smapattr[i]; 2137 else 2138 smap.xattr = 0; 2139 error = SYSCTL_OUT(req, &smap, sizeof(smap)); 2140 } 2141 return (error); 2142} 2143SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0, 2144 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data"); 2145 2146static int 2147efi_map_sysctl_handler(SYSCTL_HANDLER_ARGS) 2148{ 2149 struct efi_map_header *efihdr; 2150 caddr_t kmdp; 2151 uint32_t efisize; 2152 2153 kmdp = preload_search_by_type("elf kernel"); 2154 if (kmdp == NULL) 2155 kmdp = preload_search_by_type("elf64 kernel"); 2156 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 2157 MODINFO_METADATA | MODINFOMD_EFI_MAP); 2158 if (efihdr == NULL) 2159 return (0); 2160 efisize = *((uint32_t *)efihdr - 1); 2161 return (SYSCTL_OUT(req, efihdr, efisize)); 2162} 2163SYSCTL_PROC(_machdep, OID_AUTO, efi_map, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0, 2164 efi_map_sysctl_handler, "S,efi_map_header", "Raw EFI Memory Map"); 2165 2166void 2167spinlock_enter(void) 2168{ 2169 struct thread *td; 2170 register_t flags; 2171 2172 td = curthread; 2173 if (td->td_md.md_spinlock_count == 0) { 2174 flags = intr_disable(); 2175 td->td_md.md_spinlock_count = 1; 2176 td->td_md.md_saved_flags = flags; 2177 } else 2178 td->td_md.md_spinlock_count++; 2179 critical_enter(); 2180} 2181 2182void 2183spinlock_exit(void) 2184{ 2185 struct thread *td; 2186 register_t flags; 2187 2188 td = curthread; 2189 critical_exit(); 2190 flags = td->td_md.md_saved_flags; 2191 td->td_md.md_spinlock_count--; 2192 if (td->td_md.md_spinlock_count == 0) 2193 intr_restore(flags); 2194} 2195 2196/* 2197 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2198 * we want to start a backtrace from the function that caused us to enter 2199 * the debugger. We have the context in the trapframe, but base the trace 2200 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2201 * enough for a backtrace. 2202 */ 2203void 2204makectx(struct trapframe *tf, struct pcb *pcb) 2205{ 2206 2207 pcb->pcb_r12 = tf->tf_r12; 2208 pcb->pcb_r13 = tf->tf_r13; 2209 pcb->pcb_r14 = tf->tf_r14; 2210 pcb->pcb_r15 = tf->tf_r15; 2211 pcb->pcb_rbp = tf->tf_rbp; 2212 pcb->pcb_rbx = tf->tf_rbx; 2213 pcb->pcb_rip = tf->tf_rip; 2214 pcb->pcb_rsp = tf->tf_rsp; 2215} 2216 2217int 2218ptrace_set_pc(struct thread *td, unsigned long addr) 2219{ 2220 2221 td->td_frame->tf_rip = addr; 2222 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 2223 return (0); 2224} 2225 2226int 2227ptrace_single_step(struct thread *td) 2228{ 2229 td->td_frame->tf_rflags |= PSL_T; 2230 return (0); 2231} 2232 2233int 2234ptrace_clear_single_step(struct thread *td) 2235{ 2236 td->td_frame->tf_rflags &= ~PSL_T; 2237 return (0); 2238} 2239 2240int 2241fill_regs(struct thread *td, struct reg *regs) 2242{ 2243 struct trapframe *tp; 2244 2245 tp = td->td_frame; 2246 return (fill_frame_regs(tp, regs)); 2247} 2248 2249int 2250fill_frame_regs(struct trapframe *tp, struct reg *regs) 2251{ 2252 regs->r_r15 = tp->tf_r15; 2253 regs->r_r14 = tp->tf_r14; 2254 regs->r_r13 = tp->tf_r13; 2255 regs->r_r12 = tp->tf_r12; 2256 regs->r_r11 = tp->tf_r11; 2257 regs->r_r10 = tp->tf_r10; 2258 regs->r_r9 = tp->tf_r9; 2259 regs->r_r8 = tp->tf_r8; 2260 regs->r_rdi = tp->tf_rdi; 2261 regs->r_rsi = tp->tf_rsi; 2262 regs->r_rbp = tp->tf_rbp; 2263 regs->r_rbx = tp->tf_rbx; 2264 regs->r_rdx = tp->tf_rdx; 2265 regs->r_rcx = tp->tf_rcx; 2266 regs->r_rax = tp->tf_rax; 2267 regs->r_rip = tp->tf_rip; 2268 regs->r_cs = tp->tf_cs; 2269 regs->r_rflags = tp->tf_rflags; 2270 regs->r_rsp = tp->tf_rsp; 2271 regs->r_ss = tp->tf_ss; 2272 if (tp->tf_flags & TF_HASSEGS) { 2273 regs->r_ds = tp->tf_ds; 2274 regs->r_es = tp->tf_es; 2275 regs->r_fs = tp->tf_fs; 2276 regs->r_gs = tp->tf_gs; 2277 } else { 2278 regs->r_ds = 0; 2279 regs->r_es = 0; 2280 regs->r_fs = 0; 2281 regs->r_gs = 0; 2282 } 2283 return (0); 2284} 2285 2286int 2287set_regs(struct thread *td, struct reg *regs) 2288{ 2289 struct trapframe *tp; 2290 register_t rflags; 2291 2292 tp = td->td_frame; 2293 rflags = regs->r_rflags & 0xffffffff; 2294 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 2295 return (EINVAL); 2296 tp->tf_r15 = regs->r_r15; 2297 tp->tf_r14 = regs->r_r14; 2298 tp->tf_r13 = regs->r_r13; 2299 tp->tf_r12 = regs->r_r12; 2300 tp->tf_r11 = regs->r_r11; 2301 tp->tf_r10 = regs->r_r10; 2302 tp->tf_r9 = regs->r_r9; 2303 tp->tf_r8 = regs->r_r8; 2304 tp->tf_rdi = regs->r_rdi; 2305 tp->tf_rsi = regs->r_rsi; 2306 tp->tf_rbp = regs->r_rbp; 2307 tp->tf_rbx = regs->r_rbx; 2308 tp->tf_rdx = regs->r_rdx; 2309 tp->tf_rcx = regs->r_rcx; 2310 tp->tf_rax = regs->r_rax; 2311 tp->tf_rip = regs->r_rip; 2312 tp->tf_cs = regs->r_cs; 2313 tp->tf_rflags = rflags; 2314 tp->tf_rsp = regs->r_rsp; 2315 tp->tf_ss = regs->r_ss; 2316 if (0) { /* XXXKIB */ 2317 tp->tf_ds = regs->r_ds; 2318 tp->tf_es = regs->r_es; 2319 tp->tf_fs = regs->r_fs; 2320 tp->tf_gs = regs->r_gs; 2321 tp->tf_flags = TF_HASSEGS; 2322 } 2323 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 2324 return (0); 2325} 2326 2327/* XXX check all this stuff! */ 2328/* externalize from sv_xmm */ 2329static void 2330fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 2331{ 2332 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 2333 struct envxmm *penv_xmm = &sv_xmm->sv_env; 2334 int i; 2335 2336 /* pcb -> fpregs */ 2337 bzero(fpregs, sizeof(*fpregs)); 2338 2339 /* FPU control/status */ 2340 penv_fpreg->en_cw = penv_xmm->en_cw; 2341 penv_fpreg->en_sw = penv_xmm->en_sw; 2342 penv_fpreg->en_tw = penv_xmm->en_tw; 2343 penv_fpreg->en_opcode = penv_xmm->en_opcode; 2344 penv_fpreg->en_rip = penv_xmm->en_rip; 2345 penv_fpreg->en_rdp = penv_xmm->en_rdp; 2346 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 2347 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 2348 2349 /* FPU registers */ 2350 for (i = 0; i < 8; ++i) 2351 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 2352 2353 /* SSE registers */ 2354 for (i = 0; i < 16; ++i) 2355 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 2356} 2357 2358/* internalize from fpregs into sv_xmm */ 2359static void 2360set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 2361{ 2362 struct envxmm *penv_xmm = &sv_xmm->sv_env; 2363 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 2364 int i; 2365 2366 /* fpregs -> pcb */ 2367 /* FPU control/status */ 2368 penv_xmm->en_cw = penv_fpreg->en_cw; 2369 penv_xmm->en_sw = penv_fpreg->en_sw; 2370 penv_xmm->en_tw = penv_fpreg->en_tw; 2371 penv_xmm->en_opcode = penv_fpreg->en_opcode; 2372 penv_xmm->en_rip = penv_fpreg->en_rip; 2373 penv_xmm->en_rdp = penv_fpreg->en_rdp; 2374 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 2375 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 2376 2377 /* FPU registers */ 2378 for (i = 0; i < 8; ++i) 2379 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 2380 2381 /* SSE registers */ 2382 for (i = 0; i < 16; ++i) 2383 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 2384} 2385 2386/* externalize from td->pcb */ 2387int 2388fill_fpregs(struct thread *td, struct fpreg *fpregs) 2389{ 2390 2391 KASSERT(td == curthread || TD_IS_SUSPENDED(td) || 2392 P_SHOULDSTOP(td->td_proc), 2393 ("not suspended thread %p", td)); 2394 fpugetregs(td); 2395 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs); 2396 return (0); 2397} 2398 2399/* internalize to td->pcb */ 2400int 2401set_fpregs(struct thread *td, struct fpreg *fpregs) 2402{ 2403 2404 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td)); 2405 fpuuserinited(td); 2406 return (0); 2407} 2408 2409/* 2410 * Get machine context. 2411 */ 2412int 2413get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2414{ 2415 struct pcb *pcb; 2416 struct trapframe *tp; 2417 2418 pcb = td->td_pcb; 2419 tp = td->td_frame; 2420 PROC_LOCK(curthread->td_proc); 2421 mcp->mc_onstack = sigonstack(tp->tf_rsp); 2422 PROC_UNLOCK(curthread->td_proc); 2423 mcp->mc_r15 = tp->tf_r15; 2424 mcp->mc_r14 = tp->tf_r14; 2425 mcp->mc_r13 = tp->tf_r13; 2426 mcp->mc_r12 = tp->tf_r12; 2427 mcp->mc_r11 = tp->tf_r11; 2428 mcp->mc_r10 = tp->tf_r10; 2429 mcp->mc_r9 = tp->tf_r9; 2430 mcp->mc_r8 = tp->tf_r8; 2431 mcp->mc_rdi = tp->tf_rdi; 2432 mcp->mc_rsi = tp->tf_rsi; 2433 mcp->mc_rbp = tp->tf_rbp; 2434 mcp->mc_rbx = tp->tf_rbx; 2435 mcp->mc_rcx = tp->tf_rcx; 2436 mcp->mc_rflags = tp->tf_rflags; 2437 if (flags & GET_MC_CLEAR_RET) { 2438 mcp->mc_rax = 0; 2439 mcp->mc_rdx = 0; 2440 mcp->mc_rflags &= ~PSL_C; 2441 } else { 2442 mcp->mc_rax = tp->tf_rax; 2443 mcp->mc_rdx = tp->tf_rdx; 2444 } 2445 mcp->mc_rip = tp->tf_rip; 2446 mcp->mc_cs = tp->tf_cs; 2447 mcp->mc_rsp = tp->tf_rsp; 2448 mcp->mc_ss = tp->tf_ss; 2449 mcp->mc_ds = tp->tf_ds; 2450 mcp->mc_es = tp->tf_es; 2451 mcp->mc_fs = tp->tf_fs; 2452 mcp->mc_gs = tp->tf_gs; 2453 mcp->mc_flags = tp->tf_flags; 2454 mcp->mc_len = sizeof(*mcp); 2455 get_fpcontext(td, mcp, NULL, 0); 2456 mcp->mc_fsbase = pcb->pcb_fsbase; 2457 mcp->mc_gsbase = pcb->pcb_gsbase; 2458 mcp->mc_xfpustate = 0; 2459 mcp->mc_xfpustate_len = 0; 2460 bzero(mcp->mc_spare, sizeof(mcp->mc_spare)); 2461 return (0); 2462} 2463 2464/* 2465 * Set machine context. 2466 * 2467 * However, we don't set any but the user modifiable flags, and we won't 2468 * touch the cs selector. 2469 */ 2470int 2471set_mcontext(struct thread *td, const mcontext_t *mcp) 2472{ 2473 struct pcb *pcb; 2474 struct trapframe *tp; 2475 char *xfpustate; 2476 long rflags; 2477 int ret; 2478 2479 pcb = td->td_pcb; 2480 tp = td->td_frame; 2481 if (mcp->mc_len != sizeof(*mcp) || 2482 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0) 2483 return (EINVAL); 2484 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 2485 (tp->tf_rflags & ~PSL_USERCHANGE); 2486 if (mcp->mc_flags & _MC_HASFPXSTATE) { 2487 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size - 2488 sizeof(struct savefpu)) 2489 return (EINVAL); 2490 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len); 2491 ret = copyin((void *)mcp->mc_xfpustate, xfpustate, 2492 mcp->mc_xfpustate_len); 2493 if (ret != 0) 2494 return (ret); 2495 } else 2496 xfpustate = NULL; 2497 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len); 2498 if (ret != 0) 2499 return (ret); 2500 tp->tf_r15 = mcp->mc_r15; 2501 tp->tf_r14 = mcp->mc_r14; 2502 tp->tf_r13 = mcp->mc_r13; 2503 tp->tf_r12 = mcp->mc_r12; 2504 tp->tf_r11 = mcp->mc_r11; 2505 tp->tf_r10 = mcp->mc_r10; 2506 tp->tf_r9 = mcp->mc_r9; 2507 tp->tf_r8 = mcp->mc_r8; 2508 tp->tf_rdi = mcp->mc_rdi; 2509 tp->tf_rsi = mcp->mc_rsi; 2510 tp->tf_rbp = mcp->mc_rbp; 2511 tp->tf_rbx = mcp->mc_rbx; 2512 tp->tf_rdx = mcp->mc_rdx; 2513 tp->tf_rcx = mcp->mc_rcx; 2514 tp->tf_rax = mcp->mc_rax; 2515 tp->tf_rip = mcp->mc_rip; 2516 tp->tf_rflags = rflags; 2517 tp->tf_rsp = mcp->mc_rsp; 2518 tp->tf_ss = mcp->mc_ss; 2519 tp->tf_flags = mcp->mc_flags; 2520 if (tp->tf_flags & TF_HASSEGS) { 2521 tp->tf_ds = mcp->mc_ds; 2522 tp->tf_es = mcp->mc_es; 2523 tp->tf_fs = mcp->mc_fs; 2524 tp->tf_gs = mcp->mc_gs; 2525 } 2526 if (mcp->mc_flags & _MC_HASBASES) { 2527 pcb->pcb_fsbase = mcp->mc_fsbase; 2528 pcb->pcb_gsbase = mcp->mc_gsbase; 2529 } 2530 set_pcb_flags(pcb, PCB_FULL_IRET); 2531 return (0); 2532} 2533 2534static void 2535get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave, 2536 size_t xfpusave_len) 2537{ 2538 size_t max_len, len; 2539 2540 mcp->mc_ownedfp = fpugetregs(td); 2541 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0], 2542 sizeof(mcp->mc_fpstate)); 2543 mcp->mc_fpformat = fpuformat(); 2544 if (!use_xsave || xfpusave_len == 0) 2545 return; 2546 max_len = cpu_max_ext_state_size - sizeof(struct savefpu); 2547 len = xfpusave_len; 2548 if (len > max_len) { 2549 len = max_len; 2550 bzero(xfpusave + max_len, len - max_len); 2551 } 2552 mcp->mc_flags |= _MC_HASFPXSTATE; 2553 mcp->mc_xfpustate_len = len; 2554 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len); 2555} 2556 2557static int 2558set_fpcontext(struct thread *td, const mcontext_t *mcp, char *xfpustate, 2559 size_t xfpustate_len) 2560{ 2561 struct savefpu *fpstate; 2562 int error; 2563 2564 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2565 return (0); 2566 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 2567 return (EINVAL); 2568 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) { 2569 /* We don't care what state is left in the FPU or PCB. */ 2570 fpstate_drop(td); 2571 error = 0; 2572 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2573 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2574 fpstate = (struct savefpu *)&mcp->mc_fpstate; 2575 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask; 2576 error = fpusetregs(td, fpstate, xfpustate, xfpustate_len); 2577 } else 2578 return (EINVAL); 2579 return (error); 2580} 2581 2582void 2583fpstate_drop(struct thread *td) 2584{ 2585 2586 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu")); 2587 critical_enter(); 2588 if (PCPU_GET(fpcurthread) == td) 2589 fpudrop(); 2590 /* 2591 * XXX force a full drop of the fpu. The above only drops it if we 2592 * owned it. 2593 * 2594 * XXX I don't much like fpugetuserregs()'s semantics of doing a full 2595 * drop. Dropping only to the pcb matches fnsave's behaviour. 2596 * We only need to drop to !PCB_INITDONE in sendsig(). But 2597 * sendsig() is the only caller of fpugetuserregs()... perhaps we just 2598 * have too many layers. 2599 */ 2600 clear_pcb_flags(curthread->td_pcb, 2601 PCB_FPUINITDONE | PCB_USERFPUINITDONE); 2602 critical_exit(); 2603} 2604 2605int 2606fill_dbregs(struct thread *td, struct dbreg *dbregs) 2607{ 2608 struct pcb *pcb; 2609 2610 if (td == NULL) { 2611 dbregs->dr[0] = rdr0(); 2612 dbregs->dr[1] = rdr1(); 2613 dbregs->dr[2] = rdr2(); 2614 dbregs->dr[3] = rdr3(); 2615 dbregs->dr[6] = rdr6(); 2616 dbregs->dr[7] = rdr7(); 2617 } else { 2618 pcb = td->td_pcb; 2619 dbregs->dr[0] = pcb->pcb_dr0; 2620 dbregs->dr[1] = pcb->pcb_dr1; 2621 dbregs->dr[2] = pcb->pcb_dr2; 2622 dbregs->dr[3] = pcb->pcb_dr3; 2623 dbregs->dr[6] = pcb->pcb_dr6; 2624 dbregs->dr[7] = pcb->pcb_dr7; 2625 } 2626 dbregs->dr[4] = 0; 2627 dbregs->dr[5] = 0; 2628 dbregs->dr[8] = 0; 2629 dbregs->dr[9] = 0; 2630 dbregs->dr[10] = 0; 2631 dbregs->dr[11] = 0; 2632 dbregs->dr[12] = 0; 2633 dbregs->dr[13] = 0; 2634 dbregs->dr[14] = 0; 2635 dbregs->dr[15] = 0; 2636 return (0); 2637} 2638 2639int 2640set_dbregs(struct thread *td, struct dbreg *dbregs) 2641{ 2642 struct pcb *pcb; 2643 int i; 2644 2645 if (td == NULL) { 2646 load_dr0(dbregs->dr[0]); 2647 load_dr1(dbregs->dr[1]); 2648 load_dr2(dbregs->dr[2]); 2649 load_dr3(dbregs->dr[3]); 2650 load_dr6(dbregs->dr[6]); 2651 load_dr7(dbregs->dr[7]); 2652 } else { 2653 /* 2654 * Don't let an illegal value for dr7 get set. Specifically, 2655 * check for undefined settings. Setting these bit patterns 2656 * result in undefined behaviour and can lead to an unexpected 2657 * TRCTRAP or a general protection fault right here. 2658 * Upper bits of dr6 and dr7 must not be set 2659 */ 2660 for (i = 0; i < 4; i++) { 2661 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2662 return (EINVAL); 2663 if (td->td_frame->tf_cs == _ucode32sel && 2664 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 2665 return (EINVAL); 2666 } 2667 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 2668 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 2669 return (EINVAL); 2670 2671 pcb = td->td_pcb; 2672 2673 /* 2674 * Don't let a process set a breakpoint that is not within the 2675 * process's address space. If a process could do this, it 2676 * could halt the system by setting a breakpoint in the kernel 2677 * (if ddb was enabled). Thus, we need to check to make sure 2678 * that no breakpoints are being enabled for addresses outside 2679 * process's address space. 2680 * 2681 * XXX - what about when the watched area of the user's 2682 * address space is written into from within the kernel 2683 * ... wouldn't that still cause a breakpoint to be generated 2684 * from within kernel mode? 2685 */ 2686 2687 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2688 /* dr0 is enabled */ 2689 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2690 return (EINVAL); 2691 } 2692 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2693 /* dr1 is enabled */ 2694 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2695 return (EINVAL); 2696 } 2697 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2698 /* dr2 is enabled */ 2699 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2700 return (EINVAL); 2701 } 2702 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2703 /* dr3 is enabled */ 2704 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2705 return (EINVAL); 2706 } 2707 2708 pcb->pcb_dr0 = dbregs->dr[0]; 2709 pcb->pcb_dr1 = dbregs->dr[1]; 2710 pcb->pcb_dr2 = dbregs->dr[2]; 2711 pcb->pcb_dr3 = dbregs->dr[3]; 2712 pcb->pcb_dr6 = dbregs->dr[6]; 2713 pcb->pcb_dr7 = dbregs->dr[7]; 2714 2715 set_pcb_flags(pcb, PCB_DBREGS); 2716 } 2717 2718 return (0); 2719} 2720 2721void 2722reset_dbregs(void) 2723{ 2724 2725 load_dr7(0); /* Turn off the control bits first */ 2726 load_dr0(0); 2727 load_dr1(0); 2728 load_dr2(0); 2729 load_dr3(0); 2730 load_dr6(0); 2731} 2732 2733/* 2734 * Return > 0 if a hardware breakpoint has been hit, and the 2735 * breakpoint was in user space. Return 0, otherwise. 2736 */ 2737int 2738user_dbreg_trap(void) 2739{ 2740 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 2741 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 2742 int nbp; /* number of breakpoints that triggered */ 2743 caddr_t addr[4]; /* breakpoint addresses */ 2744 int i; 2745 2746 dr7 = rdr7(); 2747 if ((dr7 & 0x000000ff) == 0) { 2748 /* 2749 * all GE and LE bits in the dr7 register are zero, 2750 * thus the trap couldn't have been caused by the 2751 * hardware debug registers 2752 */ 2753 return 0; 2754 } 2755 2756 nbp = 0; 2757 dr6 = rdr6(); 2758 bp = dr6 & 0x0000000f; 2759 2760 if (!bp) { 2761 /* 2762 * None of the breakpoint bits are set meaning this 2763 * trap was not caused by any of the debug registers 2764 */ 2765 return 0; 2766 } 2767 2768 /* 2769 * at least one of the breakpoints were hit, check to see 2770 * which ones and if any of them are user space addresses 2771 */ 2772 2773 if (bp & 0x01) { 2774 addr[nbp++] = (caddr_t)rdr0(); 2775 } 2776 if (bp & 0x02) { 2777 addr[nbp++] = (caddr_t)rdr1(); 2778 } 2779 if (bp & 0x04) { 2780 addr[nbp++] = (caddr_t)rdr2(); 2781 } 2782 if (bp & 0x08) { 2783 addr[nbp++] = (caddr_t)rdr3(); 2784 } 2785 2786 for (i = 0; i < nbp; i++) { 2787 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2788 /* 2789 * addr[i] is in user space 2790 */ 2791 return nbp; 2792 } 2793 } 2794 2795 /* 2796 * None of the breakpoints are in user space. 2797 */ 2798 return 0; 2799} 2800 2801#ifdef KDB 2802 2803/* 2804 * Provide inb() and outb() as functions. They are normally only available as 2805 * inline functions, thus cannot be called from the debugger. 2806 */ 2807 2808/* silence compiler warnings */ 2809u_char inb_(u_short); 2810void outb_(u_short, u_char); 2811 2812u_char 2813inb_(u_short port) 2814{ 2815 return inb(port); 2816} 2817 2818void 2819outb_(u_short port, u_char data) 2820{ 2821 outb(port, data); 2822} 2823 2824#endif /* KDB */ 2825