machdep.c revision 250423
1/*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: head/sys/amd64/amd64/machdep.c 250423 2013-05-09 21:42:43Z dchagin $"); 43 44#include "opt_atalk.h" 45#include "opt_atpic.h" 46#include "opt_compat.h" 47#include "opt_cpu.h" 48#include "opt_ddb.h" 49#include "opt_inet.h" 50#include "opt_ipx.h" 51#include "opt_isa.h" 52#include "opt_kstack_pages.h" 53#include "opt_maxmem.h" 54#include "opt_mp_watchdog.h" 55#include "opt_perfmon.h" 56#include "opt_sched.h" 57#include "opt_kdtrace.h" 58 59#include <sys/param.h> 60#include <sys/proc.h> 61#include <sys/systm.h> 62#include <sys/bio.h> 63#include <sys/buf.h> 64#include <sys/bus.h> 65#include <sys/callout.h> 66#include <sys/cons.h> 67#include <sys/cpu.h> 68#include <sys/eventhandler.h> 69#include <sys/exec.h> 70#include <sys/imgact.h> 71#include <sys/kdb.h> 72#include <sys/kernel.h> 73#include <sys/ktr.h> 74#include <sys/linker.h> 75#include <sys/lock.h> 76#include <sys/malloc.h> 77#include <sys/memrange.h> 78#include <sys/msgbuf.h> 79#include <sys/mutex.h> 80#include <sys/pcpu.h> 81#include <sys/ptrace.h> 82#include <sys/reboot.h> 83#include <sys/rwlock.h> 84#include <sys/sched.h> 85#include <sys/signalvar.h> 86#ifdef SMP 87#include <sys/smp.h> 88#endif 89#include <sys/syscallsubr.h> 90#include <sys/sysctl.h> 91#include <sys/sysent.h> 92#include <sys/sysproto.h> 93#include <sys/ucontext.h> 94#include <sys/vmmeter.h> 95 96#include <vm/vm.h> 97#include <vm/vm_extern.h> 98#include <vm/vm_kern.h> 99#include <vm/vm_page.h> 100#include <vm/vm_map.h> 101#include <vm/vm_object.h> 102#include <vm/vm_pager.h> 103#include <vm/vm_param.h> 104 105#ifdef DDB 106#ifndef KDB 107#error KDB must be enabled in order for DDB to work! 108#endif 109#include <ddb/ddb.h> 110#include <ddb/db_sym.h> 111#endif 112 113#include <net/netisr.h> 114 115#include <machine/clock.h> 116#include <machine/cpu.h> 117#include <machine/cputypes.h> 118#include <machine/intr_machdep.h> 119#include <x86/mca.h> 120#include <machine/md_var.h> 121#include <machine/metadata.h> 122#include <machine/mp_watchdog.h> 123#include <machine/pc/bios.h> 124#include <machine/pcb.h> 125#include <machine/proc.h> 126#include <machine/reg.h> 127#include <machine/sigframe.h> 128#include <machine/specialreg.h> 129#ifdef PERFMON 130#include <machine/perfmon.h> 131#endif 132#include <machine/tss.h> 133#ifdef SMP 134#include <machine/smp.h> 135#endif 136 137#ifdef DEV_ATPIC 138#include <x86/isa/icu.h> 139#else 140#include <machine/apicvar.h> 141#endif 142 143#include <isa/isareg.h> 144#include <isa/rtc.h> 145 146/* Sanity check for __curthread() */ 147CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 148 149extern u_int64_t hammer_time(u_int64_t, u_int64_t); 150 151extern void printcpuinfo(void); /* XXX header file */ 152extern void identify_cpu(void); 153extern void panicifcpuunsupported(void); 154 155#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 156#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 157 158static void cpu_startup(void *); 159static void get_fpcontext(struct thread *td, mcontext_t *mcp, 160 char *xfpusave, size_t xfpusave_len); 161static int set_fpcontext(struct thread *td, const mcontext_t *mcp, 162 char *xfpustate, size_t xfpustate_len); 163SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 164 165/* 166 * The file "conf/ldscript.amd64" defines the symbol "kernphys". Its value is 167 * the physical address at which the kernel is loaded. 168 */ 169extern char kernphys[]; 170#ifdef DDB 171extern vm_offset_t ksym_start, ksym_end; 172#endif 173 174struct msgbuf *msgbufp; 175 176/* Intel ICH registers */ 177#define ICH_PMBASE 0x400 178#define ICH_SMI_EN ICH_PMBASE + 0x30 179 180int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel; 181 182int cold = 1; 183 184long Maxmem = 0; 185long realmem = 0; 186 187/* 188 * The number of PHYSMAP entries must be one less than the number of 189 * PHYSSEG entries because the PHYSMAP entry that spans the largest 190 * physical address that is accessible by ISA DMA is split into two 191 * PHYSSEG entries. 192 */ 193#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 194 195vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 196vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 197 198/* must be 2 less so 0 0 can signal end of chunks */ 199#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 200#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 201 202struct kva_md_info kmi; 203 204static struct trapframe proc0_tf; 205struct region_descriptor r_gdt, r_idt; 206 207struct pcpu __pcpu[MAXCPU]; 208 209struct mtx icu_lock; 210 211struct mem_range_softc mem_range_softc; 212 213struct mtx dt_lock; /* lock for GDT and LDT */ 214 215static void 216cpu_startup(dummy) 217 void *dummy; 218{ 219 uintmax_t memsize; 220 char *sysenv; 221 222 /* 223 * On MacBooks, we need to disallow the legacy USB circuit to 224 * generate an SMI# because this can cause several problems, 225 * namely: incorrect CPU frequency detection and failure to 226 * start the APs. 227 * We do this by disabling a bit in the SMI_EN (SMI Control and 228 * Enable register) of the Intel ICH LPC Interface Bridge. 229 */ 230 sysenv = getenv("smbios.system.product"); 231 if (sysenv != NULL) { 232 if (strncmp(sysenv, "MacBook1,1", 10) == 0 || 233 strncmp(sysenv, "MacBook3,1", 10) == 0 || 234 strncmp(sysenv, "MacBookPro1,1", 13) == 0 || 235 strncmp(sysenv, "MacBookPro1,2", 13) == 0 || 236 strncmp(sysenv, "MacBookPro3,1", 13) == 0 || 237 strncmp(sysenv, "Macmini1,1", 10) == 0) { 238 if (bootverbose) 239 printf("Disabling LEGACY_USB_EN bit on " 240 "Intel ICH.\n"); 241 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 242 } 243 freeenv(sysenv); 244 } 245 246 /* 247 * Good {morning,afternoon,evening,night}. 248 */ 249 startrtclock(); 250 printcpuinfo(); 251 panicifcpuunsupported(); 252#ifdef PERFMON 253 perfmon_init(); 254#endif 255 realmem = Maxmem; 256 257 /* 258 * Display physical memory if SMBIOS reports reasonable amount. 259 */ 260 memsize = 0; 261 sysenv = getenv("smbios.memory.enabled"); 262 if (sysenv != NULL) { 263 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10; 264 freeenv(sysenv); 265 } 266 if (memsize < ptoa((uintmax_t)cnt.v_free_count)) 267 memsize = ptoa((uintmax_t)Maxmem); 268 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20); 269 270 /* 271 * Display any holes after the first chunk of extended memory. 272 */ 273 if (bootverbose) { 274 int indx; 275 276 printf("Physical memory chunk(s):\n"); 277 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 278 vm_paddr_t size; 279 280 size = phys_avail[indx + 1] - phys_avail[indx]; 281 printf( 282 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 283 (uintmax_t)phys_avail[indx], 284 (uintmax_t)phys_avail[indx + 1] - 1, 285 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 286 } 287 } 288 289 vm_ksubmap_init(&kmi); 290 291 printf("avail memory = %ju (%ju MB)\n", 292 ptoa((uintmax_t)cnt.v_free_count), 293 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 294 295 /* 296 * Set up buffers, so they can be used to read disk labels. 297 */ 298 bufinit(); 299 vm_pager_bufferinit(); 300 301 cpu_setregs(); 302} 303 304/* 305 * Send an interrupt to process. 306 * 307 * Stack is set up to allow sigcode stored 308 * at top to call routine, followed by call 309 * to sigreturn routine below. After sigreturn 310 * resets the signal mask, the stack, and the 311 * frame pointer, it returns to the user 312 * specified pc, psl. 313 */ 314void 315sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 316{ 317 struct sigframe sf, *sfp; 318 struct pcb *pcb; 319 struct proc *p; 320 struct thread *td; 321 struct sigacts *psp; 322 char *sp; 323 struct trapframe *regs; 324 char *xfpusave; 325 size_t xfpusave_len; 326 int sig; 327 int oonstack; 328 329 td = curthread; 330 pcb = td->td_pcb; 331 p = td->td_proc; 332 PROC_LOCK_ASSERT(p, MA_OWNED); 333 sig = ksi->ksi_signo; 334 psp = p->p_sigacts; 335 mtx_assert(&psp->ps_mtx, MA_OWNED); 336 regs = td->td_frame; 337 oonstack = sigonstack(regs->tf_rsp); 338 339 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) { 340 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu); 341 xfpusave = __builtin_alloca(xfpusave_len); 342 } else { 343 xfpusave_len = 0; 344 xfpusave = NULL; 345 } 346 347 /* Save user context. */ 348 bzero(&sf, sizeof(sf)); 349 sf.sf_uc.uc_sigmask = *mask; 350 sf.sf_uc.uc_stack = td->td_sigstk; 351 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 352 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 353 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 354 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 355 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 356 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len); 357 fpstate_drop(td); 358 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase; 359 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase; 360 bzero(sf.sf_uc.uc_mcontext.mc_spare, 361 sizeof(sf.sf_uc.uc_mcontext.mc_spare)); 362 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__)); 363 364 /* Allocate space for the signal handler context. */ 365 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 366 SIGISMEMBER(psp->ps_sigonstack, sig)) { 367 sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size; 368#if defined(COMPAT_43) 369 td->td_sigstk.ss_flags |= SS_ONSTACK; 370#endif 371 } else 372 sp = (char *)regs->tf_rsp - 128; 373 if (xfpusave != NULL) { 374 sp -= xfpusave_len; 375 sp = (char *)((unsigned long)sp & ~0x3Ful); 376 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp; 377 } 378 sp -= sizeof(struct sigframe); 379 /* Align to 16 bytes. */ 380 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 381 382 /* Translate the signal if appropriate. */ 383 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 384 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 385 386 /* Build the argument list for the signal handler. */ 387 regs->tf_rdi = sig; /* arg 1 in %rdi */ 388 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 389 bzero(&sf.sf_si, sizeof(sf.sf_si)); 390 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 391 /* Signal handler installed with SA_SIGINFO. */ 392 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 393 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 394 395 /* Fill in POSIX parts */ 396 sf.sf_si = ksi->ksi_info; 397 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 398 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 399 } else { 400 /* Old FreeBSD-style arguments. */ 401 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 402 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 403 sf.sf_ahu.sf_handler = catcher; 404 } 405 mtx_unlock(&psp->ps_mtx); 406 PROC_UNLOCK(p); 407 408 /* 409 * Copy the sigframe out to the user's stack. 410 */ 411 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 || 412 (xfpusave != NULL && copyout(xfpusave, 413 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len) 414 != 0)) { 415#ifdef DEBUG 416 printf("process %ld has trashed its stack\n", (long)p->p_pid); 417#endif 418 PROC_LOCK(p); 419 sigexit(td, SIGILL); 420 } 421 422 regs->tf_rsp = (long)sfp; 423 regs->tf_rip = p->p_sysent->sv_sigcode_base; 424 regs->tf_rflags &= ~(PSL_T | PSL_D); 425 regs->tf_cs = _ucodesel; 426 regs->tf_ds = _udatasel; 427 regs->tf_es = _udatasel; 428 regs->tf_fs = _ufssel; 429 regs->tf_gs = _ugssel; 430 regs->tf_flags = TF_HASSEGS; 431 set_pcb_flags(pcb, PCB_FULL_IRET); 432 PROC_LOCK(p); 433 mtx_lock(&psp->ps_mtx); 434} 435 436/* 437 * System call to cleanup state after a signal 438 * has been taken. Reset signal mask and 439 * stack state from context left by sendsig (above). 440 * Return to previous pc and psl as specified by 441 * context left by sendsig. Check carefully to 442 * make sure that the user has not modified the 443 * state to gain improper privileges. 444 * 445 * MPSAFE 446 */ 447int 448sys_sigreturn(td, uap) 449 struct thread *td; 450 struct sigreturn_args /* { 451 const struct __ucontext *sigcntxp; 452 } */ *uap; 453{ 454 ucontext_t uc; 455 struct pcb *pcb; 456 struct proc *p; 457 struct trapframe *regs; 458 ucontext_t *ucp; 459 char *xfpustate; 460 size_t xfpustate_len; 461 long rflags; 462 int cs, error, ret; 463 ksiginfo_t ksi; 464 465 pcb = td->td_pcb; 466 p = td->td_proc; 467 468 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 469 if (error != 0) { 470 uprintf("pid %d (%s): sigreturn copyin failed\n", 471 p->p_pid, td->td_name); 472 return (error); 473 } 474 ucp = &uc; 475 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) { 476 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid, 477 td->td_name, ucp->uc_mcontext.mc_flags); 478 return (EINVAL); 479 } 480 regs = td->td_frame; 481 rflags = ucp->uc_mcontext.mc_rflags; 482 /* 483 * Don't allow users to change privileged or reserved flags. 484 */ 485 /* 486 * XXX do allow users to change the privileged flag PSL_RF. 487 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 488 * should sometimes set it there too. tf_rflags is kept in 489 * the signal context during signal handling and there is no 490 * other place to remember it, so the PSL_RF bit may be 491 * corrupted by the signal handler without us knowing. 492 * Corruption of the PSL_RF bit at worst causes one more or 493 * one less debugger trap, so allowing it is fairly harmless. 494 */ 495 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 496 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid, 497 td->td_name, rflags); 498 return (EINVAL); 499 } 500 501 /* 502 * Don't allow users to load a valid privileged %cs. Let the 503 * hardware check for invalid selectors, excess privilege in 504 * other selectors, invalid %eip's and invalid %esp's. 505 */ 506 cs = ucp->uc_mcontext.mc_cs; 507 if (!CS_SECURE(cs)) { 508 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid, 509 td->td_name, cs); 510 ksiginfo_init_trap(&ksi); 511 ksi.ksi_signo = SIGBUS; 512 ksi.ksi_code = BUS_OBJERR; 513 ksi.ksi_trapno = T_PROTFLT; 514 ksi.ksi_addr = (void *)regs->tf_rip; 515 trapsignal(td, &ksi); 516 return (EINVAL); 517 } 518 519 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) { 520 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len; 521 if (xfpustate_len > cpu_max_ext_state_size - 522 sizeof(struct savefpu)) { 523 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n", 524 p->p_pid, td->td_name, xfpustate_len); 525 return (EINVAL); 526 } 527 xfpustate = __builtin_alloca(xfpustate_len); 528 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate, 529 xfpustate, xfpustate_len); 530 if (error != 0) { 531 uprintf( 532 "pid %d (%s): sigreturn copying xfpustate failed\n", 533 p->p_pid, td->td_name); 534 return (error); 535 } 536 } else { 537 xfpustate = NULL; 538 xfpustate_len = 0; 539 } 540 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len); 541 if (ret != 0) { 542 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n", 543 p->p_pid, td->td_name, ret); 544 return (ret); 545 } 546 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 547 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase; 548 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase; 549 550#if defined(COMPAT_43) 551 if (ucp->uc_mcontext.mc_onstack & 1) 552 td->td_sigstk.ss_flags |= SS_ONSTACK; 553 else 554 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 555#endif 556 557 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0); 558 set_pcb_flags(pcb, PCB_FULL_IRET); 559 return (EJUSTRETURN); 560} 561 562#ifdef COMPAT_FREEBSD4 563int 564freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 565{ 566 567 return sys_sigreturn(td, (struct sigreturn_args *)uap); 568} 569#endif 570 571 572/* 573 * Machine dependent boot() routine 574 * 575 * I haven't seen anything to put here yet 576 * Possibly some stuff might be grafted back here from boot() 577 */ 578void 579cpu_boot(int howto) 580{ 581} 582 583/* 584 * Flush the D-cache for non-DMA I/O so that the I-cache can 585 * be made coherent later. 586 */ 587void 588cpu_flush_dcache(void *ptr, size_t len) 589{ 590 /* Not applicable */ 591} 592 593/* Get current clock frequency for the given cpu id. */ 594int 595cpu_est_clockrate(int cpu_id, uint64_t *rate) 596{ 597 uint64_t tsc1, tsc2; 598 uint64_t acnt, mcnt, perf; 599 register_t reg; 600 601 if (pcpu_find(cpu_id) == NULL || rate == NULL) 602 return (EINVAL); 603 604 /* 605 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist, 606 * DELAY(9) based logic fails. 607 */ 608 if (tsc_is_invariant && !tsc_perf_stat) 609 return (EOPNOTSUPP); 610 611#ifdef SMP 612 if (smp_cpus > 1) { 613 /* Schedule ourselves on the indicated cpu. */ 614 thread_lock(curthread); 615 sched_bind(curthread, cpu_id); 616 thread_unlock(curthread); 617 } 618#endif 619 620 /* Calibrate by measuring a short delay. */ 621 reg = intr_disable(); 622 if (tsc_is_invariant) { 623 wrmsr(MSR_MPERF, 0); 624 wrmsr(MSR_APERF, 0); 625 tsc1 = rdtsc(); 626 DELAY(1000); 627 mcnt = rdmsr(MSR_MPERF); 628 acnt = rdmsr(MSR_APERF); 629 tsc2 = rdtsc(); 630 intr_restore(reg); 631 perf = 1000 * acnt / mcnt; 632 *rate = (tsc2 - tsc1) * perf; 633 } else { 634 tsc1 = rdtsc(); 635 DELAY(1000); 636 tsc2 = rdtsc(); 637 intr_restore(reg); 638 *rate = (tsc2 - tsc1) * 1000; 639 } 640 641#ifdef SMP 642 if (smp_cpus > 1) { 643 thread_lock(curthread); 644 sched_unbind(curthread); 645 thread_unlock(curthread); 646 } 647#endif 648 649 return (0); 650} 651 652/* 653 * Shutdown the CPU as much as possible 654 */ 655void 656cpu_halt(void) 657{ 658 for (;;) 659 halt(); 660} 661 662void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */ 663static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */ 664static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */ 665TUNABLE_INT("machdep.idle_mwait", &idle_mwait); 666SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait, 667 0, "Use MONITOR/MWAIT for short idle"); 668 669#define STATE_RUNNING 0x0 670#define STATE_MWAIT 0x1 671#define STATE_SLEEPING 0x2 672 673static void 674cpu_idle_acpi(sbintime_t sbt) 675{ 676 int *state; 677 678 state = (int *)PCPU_PTR(monitorbuf); 679 *state = STATE_SLEEPING; 680 681 /* See comments in cpu_idle_hlt(). */ 682 disable_intr(); 683 if (sched_runnable()) 684 enable_intr(); 685 else if (cpu_idle_hook) 686 cpu_idle_hook(sbt); 687 else 688 __asm __volatile("sti; hlt"); 689 *state = STATE_RUNNING; 690} 691 692static void 693cpu_idle_hlt(sbintime_t sbt) 694{ 695 int *state; 696 697 state = (int *)PCPU_PTR(monitorbuf); 698 *state = STATE_SLEEPING; 699 700 /* 701 * Since we may be in a critical section from cpu_idle(), if 702 * an interrupt fires during that critical section we may have 703 * a pending preemption. If the CPU halts, then that thread 704 * may not execute until a later interrupt awakens the CPU. 705 * To handle this race, check for a runnable thread after 706 * disabling interrupts and immediately return if one is 707 * found. Also, we must absolutely guarentee that hlt is 708 * the next instruction after sti. This ensures that any 709 * interrupt that fires after the call to disable_intr() will 710 * immediately awaken the CPU from hlt. Finally, please note 711 * that on x86 this works fine because of interrupts enabled only 712 * after the instruction following sti takes place, while IF is set 713 * to 1 immediately, allowing hlt instruction to acknowledge the 714 * interrupt. 715 */ 716 disable_intr(); 717 if (sched_runnable()) 718 enable_intr(); 719 else 720 __asm __volatile("sti; hlt"); 721 *state = STATE_RUNNING; 722} 723 724/* 725 * MWAIT cpu power states. Lower 4 bits are sub-states. 726 */ 727#define MWAIT_C0 0xf0 728#define MWAIT_C1 0x00 729#define MWAIT_C2 0x10 730#define MWAIT_C3 0x20 731#define MWAIT_C4 0x30 732 733static void 734cpu_idle_mwait(sbintime_t sbt) 735{ 736 int *state; 737 738 state = (int *)PCPU_PTR(monitorbuf); 739 *state = STATE_MWAIT; 740 741 /* See comments in cpu_idle_hlt(). */ 742 disable_intr(); 743 if (sched_runnable()) { 744 enable_intr(); 745 *state = STATE_RUNNING; 746 return; 747 } 748 cpu_monitor(state, 0, 0); 749 if (*state == STATE_MWAIT) 750 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0)); 751 else 752 enable_intr(); 753 *state = STATE_RUNNING; 754} 755 756static void 757cpu_idle_spin(sbintime_t sbt) 758{ 759 int *state; 760 int i; 761 762 state = (int *)PCPU_PTR(monitorbuf); 763 *state = STATE_RUNNING; 764 765 /* 766 * The sched_runnable() call is racy but as long as there is 767 * a loop missing it one time will have just a little impact if any 768 * (and it is much better than missing the check at all). 769 */ 770 for (i = 0; i < 1000; i++) { 771 if (sched_runnable()) 772 return; 773 cpu_spinwait(); 774 } 775} 776 777/* 778 * C1E renders the local APIC timer dead, so we disable it by 779 * reading the Interrupt Pending Message register and clearing 780 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27). 781 * 782 * Reference: 783 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors" 784 * #32559 revision 3.00+ 785 */ 786#define MSR_AMDK8_IPM 0xc0010055 787#define AMDK8_SMIONCMPHALT (1ULL << 27) 788#define AMDK8_C1EONCMPHALT (1ULL << 28) 789#define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT) 790 791static void 792cpu_probe_amdc1e(void) 793{ 794 795 /* 796 * Detect the presence of C1E capability mostly on latest 797 * dual-cores (or future) k8 family. 798 */ 799 if (cpu_vendor_id == CPU_VENDOR_AMD && 800 (cpu_id & 0x00000f00) == 0x00000f00 && 801 (cpu_id & 0x0fff0000) >= 0x00040000) { 802 cpu_ident_amdc1e = 1; 803 } 804} 805 806void (*cpu_idle_fn)(sbintime_t) = cpu_idle_acpi; 807 808void 809cpu_idle(int busy) 810{ 811 uint64_t msr; 812 sbintime_t sbt = -1; 813 814 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", 815 busy, curcpu); 816#ifdef MP_WATCHDOG 817 ap_watchdog(PCPU_GET(cpuid)); 818#endif 819 /* If we are busy - try to use fast methods. */ 820 if (busy) { 821 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) { 822 cpu_idle_mwait(busy); 823 goto out; 824 } 825 } 826 827 /* If we have time - switch timers into idle mode. */ 828 if (!busy) { 829 critical_enter(); 830 sbt = cpu_idleclock(); 831 } 832 833 /* Apply AMD APIC timer C1E workaround. */ 834 if (cpu_ident_amdc1e && cpu_disable_deep_sleep) { 835 msr = rdmsr(MSR_AMDK8_IPM); 836 if (msr & AMDK8_CMPHALT) 837 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT); 838 } 839 840 /* Call main idle method. */ 841 cpu_idle_fn(sbt); 842 843 /* Switch timers mack into active mode. */ 844 if (!busy) { 845 cpu_activeclock(); 846 critical_exit(); 847 } 848out: 849 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", 850 busy, curcpu); 851} 852 853int 854cpu_idle_wakeup(int cpu) 855{ 856 struct pcpu *pcpu; 857 int *state; 858 859 pcpu = pcpu_find(cpu); 860 state = (int *)pcpu->pc_monitorbuf; 861 /* 862 * This doesn't need to be atomic since missing the race will 863 * simply result in unnecessary IPIs. 864 */ 865 if (*state == STATE_SLEEPING) 866 return (0); 867 if (*state == STATE_MWAIT) 868 *state = STATE_RUNNING; 869 return (1); 870} 871 872/* 873 * Ordered by speed/power consumption. 874 */ 875struct { 876 void *id_fn; 877 char *id_name; 878} idle_tbl[] = { 879 { cpu_idle_spin, "spin" }, 880 { cpu_idle_mwait, "mwait" }, 881 { cpu_idle_hlt, "hlt" }, 882 { cpu_idle_acpi, "acpi" }, 883 { NULL, NULL } 884}; 885 886static int 887idle_sysctl_available(SYSCTL_HANDLER_ARGS) 888{ 889 char *avail, *p; 890 int error; 891 int i; 892 893 avail = malloc(256, M_TEMP, M_WAITOK); 894 p = avail; 895 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 896 if (strstr(idle_tbl[i].id_name, "mwait") && 897 (cpu_feature2 & CPUID2_MON) == 0) 898 continue; 899 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 && 900 cpu_idle_hook == NULL) 901 continue; 902 p += sprintf(p, "%s%s", p != avail ? ", " : "", 903 idle_tbl[i].id_name); 904 } 905 error = sysctl_handle_string(oidp, avail, 0, req); 906 free(avail, M_TEMP); 907 return (error); 908} 909 910SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD, 911 0, 0, idle_sysctl_available, "A", "list of available idle functions"); 912 913static int 914idle_sysctl(SYSCTL_HANDLER_ARGS) 915{ 916 char buf[16]; 917 int error; 918 char *p; 919 int i; 920 921 p = "unknown"; 922 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 923 if (idle_tbl[i].id_fn == cpu_idle_fn) { 924 p = idle_tbl[i].id_name; 925 break; 926 } 927 } 928 strncpy(buf, p, sizeof(buf)); 929 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 930 if (error != 0 || req->newptr == NULL) 931 return (error); 932 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 933 if (strstr(idle_tbl[i].id_name, "mwait") && 934 (cpu_feature2 & CPUID2_MON) == 0) 935 continue; 936 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 && 937 cpu_idle_hook == NULL) 938 continue; 939 if (strcmp(idle_tbl[i].id_name, buf)) 940 continue; 941 cpu_idle_fn = idle_tbl[i].id_fn; 942 return (0); 943 } 944 return (EINVAL); 945} 946 947SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0, 948 idle_sysctl, "A", "currently selected idle function"); 949 950/* 951 * Reset registers to default values on exec. 952 */ 953void 954exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 955{ 956 struct trapframe *regs = td->td_frame; 957 struct pcb *pcb = td->td_pcb; 958 959 mtx_lock(&dt_lock); 960 if (td->td_proc->p_md.md_ldt != NULL) 961 user_ldt_free(td); 962 else 963 mtx_unlock(&dt_lock); 964 965 pcb->pcb_fsbase = 0; 966 pcb->pcb_gsbase = 0; 967 clear_pcb_flags(pcb, PCB_32BIT); 968 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__; 969 set_pcb_flags(pcb, PCB_FULL_IRET); 970 971 bzero((char *)regs, sizeof(struct trapframe)); 972 regs->tf_rip = imgp->entry_addr; 973 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 974 regs->tf_rdi = stack; /* argv */ 975 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 976 regs->tf_ss = _udatasel; 977 regs->tf_cs = _ucodesel; 978 regs->tf_ds = _udatasel; 979 regs->tf_es = _udatasel; 980 regs->tf_fs = _ufssel; 981 regs->tf_gs = _ugssel; 982 regs->tf_flags = TF_HASSEGS; 983 td->td_retval[1] = 0; 984 985 /* 986 * Reset the hardware debug registers if they were in use. 987 * They won't have any meaning for the newly exec'd process. 988 */ 989 if (pcb->pcb_flags & PCB_DBREGS) { 990 pcb->pcb_dr0 = 0; 991 pcb->pcb_dr1 = 0; 992 pcb->pcb_dr2 = 0; 993 pcb->pcb_dr3 = 0; 994 pcb->pcb_dr6 = 0; 995 pcb->pcb_dr7 = 0; 996 if (pcb == curpcb) { 997 /* 998 * Clear the debug registers on the running 999 * CPU, otherwise they will end up affecting 1000 * the next process we switch to. 1001 */ 1002 reset_dbregs(); 1003 } 1004 clear_pcb_flags(pcb, PCB_DBREGS); 1005 } 1006 1007 /* 1008 * Drop the FP state if we hold it, so that the process gets a 1009 * clean FP state if it uses the FPU again. 1010 */ 1011 fpstate_drop(td); 1012} 1013 1014void 1015cpu_setregs(void) 1016{ 1017 register_t cr0; 1018 1019 cr0 = rcr0(); 1020 /* 1021 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 1022 * BSP. See the comments there about why we set them. 1023 */ 1024 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1025 load_cr0(cr0); 1026} 1027 1028/* 1029 * Initialize amd64 and configure to run kernel 1030 */ 1031 1032/* 1033 * Initialize segments & interrupt table 1034 */ 1035 1036struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */ 1037static struct gate_descriptor idt0[NIDT]; 1038struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1039 1040static char dblfault_stack[PAGE_SIZE] __aligned(16); 1041 1042static char nmi0_stack[PAGE_SIZE] __aligned(16); 1043CTASSERT(sizeof(struct nmi_pcpu) == 16); 1044 1045struct amd64tss common_tss[MAXCPU]; 1046 1047/* 1048 * Software prototypes -- in more palatable form. 1049 * 1050 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same 1051 * slots as corresponding segments for i386 kernel. 1052 */ 1053struct soft_segment_descriptor gdt_segs[] = { 1054/* GNULL_SEL 0 Null Descriptor */ 1055{ .ssd_base = 0x0, 1056 .ssd_limit = 0x0, 1057 .ssd_type = 0, 1058 .ssd_dpl = 0, 1059 .ssd_p = 0, 1060 .ssd_long = 0, 1061 .ssd_def32 = 0, 1062 .ssd_gran = 0 }, 1063/* GNULL2_SEL 1 Null Descriptor */ 1064{ .ssd_base = 0x0, 1065 .ssd_limit = 0x0, 1066 .ssd_type = 0, 1067 .ssd_dpl = 0, 1068 .ssd_p = 0, 1069 .ssd_long = 0, 1070 .ssd_def32 = 0, 1071 .ssd_gran = 0 }, 1072/* GUFS32_SEL 2 32 bit %gs Descriptor for user */ 1073{ .ssd_base = 0x0, 1074 .ssd_limit = 0xfffff, 1075 .ssd_type = SDT_MEMRWA, 1076 .ssd_dpl = SEL_UPL, 1077 .ssd_p = 1, 1078 .ssd_long = 0, 1079 .ssd_def32 = 1, 1080 .ssd_gran = 1 }, 1081/* GUGS32_SEL 3 32 bit %fs Descriptor for user */ 1082{ .ssd_base = 0x0, 1083 .ssd_limit = 0xfffff, 1084 .ssd_type = SDT_MEMRWA, 1085 .ssd_dpl = SEL_UPL, 1086 .ssd_p = 1, 1087 .ssd_long = 0, 1088 .ssd_def32 = 1, 1089 .ssd_gran = 1 }, 1090/* GCODE_SEL 4 Code Descriptor for kernel */ 1091{ .ssd_base = 0x0, 1092 .ssd_limit = 0xfffff, 1093 .ssd_type = SDT_MEMERA, 1094 .ssd_dpl = SEL_KPL, 1095 .ssd_p = 1, 1096 .ssd_long = 1, 1097 .ssd_def32 = 0, 1098 .ssd_gran = 1 }, 1099/* GDATA_SEL 5 Data Descriptor for kernel */ 1100{ .ssd_base = 0x0, 1101 .ssd_limit = 0xfffff, 1102 .ssd_type = SDT_MEMRWA, 1103 .ssd_dpl = SEL_KPL, 1104 .ssd_p = 1, 1105 .ssd_long = 1, 1106 .ssd_def32 = 0, 1107 .ssd_gran = 1 }, 1108/* GUCODE32_SEL 6 32 bit Code Descriptor for user */ 1109{ .ssd_base = 0x0, 1110 .ssd_limit = 0xfffff, 1111 .ssd_type = SDT_MEMERA, 1112 .ssd_dpl = SEL_UPL, 1113 .ssd_p = 1, 1114 .ssd_long = 0, 1115 .ssd_def32 = 1, 1116 .ssd_gran = 1 }, 1117/* GUDATA_SEL 7 32/64 bit Data Descriptor for user */ 1118{ .ssd_base = 0x0, 1119 .ssd_limit = 0xfffff, 1120 .ssd_type = SDT_MEMRWA, 1121 .ssd_dpl = SEL_UPL, 1122 .ssd_p = 1, 1123 .ssd_long = 0, 1124 .ssd_def32 = 1, 1125 .ssd_gran = 1 }, 1126/* GUCODE_SEL 8 64 bit Code Descriptor for user */ 1127{ .ssd_base = 0x0, 1128 .ssd_limit = 0xfffff, 1129 .ssd_type = SDT_MEMERA, 1130 .ssd_dpl = SEL_UPL, 1131 .ssd_p = 1, 1132 .ssd_long = 1, 1133 .ssd_def32 = 0, 1134 .ssd_gran = 1 }, 1135/* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1136{ .ssd_base = 0x0, 1137 .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1, 1138 .ssd_type = SDT_SYSTSS, 1139 .ssd_dpl = SEL_KPL, 1140 .ssd_p = 1, 1141 .ssd_long = 0, 1142 .ssd_def32 = 0, 1143 .ssd_gran = 0 }, 1144/* Actually, the TSS is a system descriptor which is double size */ 1145{ .ssd_base = 0x0, 1146 .ssd_limit = 0x0, 1147 .ssd_type = 0, 1148 .ssd_dpl = 0, 1149 .ssd_p = 0, 1150 .ssd_long = 0, 1151 .ssd_def32 = 0, 1152 .ssd_gran = 0 }, 1153/* GUSERLDT_SEL 11 LDT Descriptor */ 1154{ .ssd_base = 0x0, 1155 .ssd_limit = 0x0, 1156 .ssd_type = 0, 1157 .ssd_dpl = 0, 1158 .ssd_p = 0, 1159 .ssd_long = 0, 1160 .ssd_def32 = 0, 1161 .ssd_gran = 0 }, 1162/* GUSERLDT_SEL 12 LDT Descriptor, double size */ 1163{ .ssd_base = 0x0, 1164 .ssd_limit = 0x0, 1165 .ssd_type = 0, 1166 .ssd_dpl = 0, 1167 .ssd_p = 0, 1168 .ssd_long = 0, 1169 .ssd_def32 = 0, 1170 .ssd_gran = 0 }, 1171}; 1172 1173void 1174setidt(idx, func, typ, dpl, ist) 1175 int idx; 1176 inthand_t *func; 1177 int typ; 1178 int dpl; 1179 int ist; 1180{ 1181 struct gate_descriptor *ip; 1182 1183 ip = idt + idx; 1184 ip->gd_looffset = (uintptr_t)func; 1185 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 1186 ip->gd_ist = ist; 1187 ip->gd_xx = 0; 1188 ip->gd_type = typ; 1189 ip->gd_dpl = dpl; 1190 ip->gd_p = 1; 1191 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 1192} 1193 1194extern inthand_t 1195 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1196 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1197 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1198 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1199 IDTVEC(xmm), IDTVEC(dblfault), 1200#ifdef KDTRACE_HOOKS 1201 IDTVEC(dtrace_ret), 1202#endif 1203 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 1204 1205#ifdef DDB 1206/* 1207 * Display the index and function name of any IDT entries that don't use 1208 * the default 'rsvd' entry point. 1209 */ 1210DB_SHOW_COMMAND(idt, db_show_idt) 1211{ 1212 struct gate_descriptor *ip; 1213 int idx; 1214 uintptr_t func; 1215 1216 ip = idt; 1217 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1218 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset); 1219 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1220 db_printf("%3d\t", idx); 1221 db_printsym(func, DB_STGY_PROC); 1222 db_printf("\n"); 1223 } 1224 ip++; 1225 } 1226} 1227#endif 1228 1229void 1230sdtossd(sd, ssd) 1231 struct user_segment_descriptor *sd; 1232 struct soft_segment_descriptor *ssd; 1233{ 1234 1235 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1236 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1237 ssd->ssd_type = sd->sd_type; 1238 ssd->ssd_dpl = sd->sd_dpl; 1239 ssd->ssd_p = sd->sd_p; 1240 ssd->ssd_long = sd->sd_long; 1241 ssd->ssd_def32 = sd->sd_def32; 1242 ssd->ssd_gran = sd->sd_gran; 1243} 1244 1245void 1246ssdtosd(ssd, sd) 1247 struct soft_segment_descriptor *ssd; 1248 struct user_segment_descriptor *sd; 1249{ 1250 1251 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1252 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 1253 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1254 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1255 sd->sd_type = ssd->ssd_type; 1256 sd->sd_dpl = ssd->ssd_dpl; 1257 sd->sd_p = ssd->ssd_p; 1258 sd->sd_long = ssd->ssd_long; 1259 sd->sd_def32 = ssd->ssd_def32; 1260 sd->sd_gran = ssd->ssd_gran; 1261} 1262 1263void 1264ssdtosyssd(ssd, sd) 1265 struct soft_segment_descriptor *ssd; 1266 struct system_segment_descriptor *sd; 1267{ 1268 1269 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1270 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 1271 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1272 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1273 sd->sd_type = ssd->ssd_type; 1274 sd->sd_dpl = ssd->ssd_dpl; 1275 sd->sd_p = ssd->ssd_p; 1276 sd->sd_gran = ssd->ssd_gran; 1277} 1278 1279#if !defined(DEV_ATPIC) && defined(DEV_ISA) 1280#include <isa/isavar.h> 1281#include <isa/isareg.h> 1282/* 1283 * Return a bitmap of the current interrupt requests. This is 8259-specific 1284 * and is only suitable for use at probe time. 1285 * This is only here to pacify sio. It is NOT FATAL if this doesn't work. 1286 * It shouldn't be here. There should probably be an APIC centric 1287 * implementation in the apic driver code, if at all. 1288 */ 1289intrmask_t 1290isa_irq_pending(void) 1291{ 1292 u_char irr1; 1293 u_char irr2; 1294 1295 irr1 = inb(IO_ICU1); 1296 irr2 = inb(IO_ICU2); 1297 return ((irr2 << 8) | irr1); 1298} 1299#endif 1300 1301u_int basemem; 1302 1303static int 1304add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp) 1305{ 1306 int i, insert_idx, physmap_idx; 1307 1308 physmap_idx = *physmap_idxp; 1309 1310 if (boothowto & RB_VERBOSE) 1311 printf("SMAP type=%02x base=%016lx len=%016lx\n", 1312 smap->type, smap->base, smap->length); 1313 1314 if (smap->type != SMAP_TYPE_MEMORY) 1315 return (1); 1316 1317 if (smap->length == 0) 1318 return (0); 1319 1320 /* 1321 * Find insertion point while checking for overlap. Start off by 1322 * assuming the new entry will be added to the end. 1323 */ 1324 insert_idx = physmap_idx + 2; 1325 for (i = 0; i <= physmap_idx; i += 2) { 1326 if (smap->base < physmap[i + 1]) { 1327 if (smap->base + smap->length <= physmap[i]) { 1328 insert_idx = i; 1329 break; 1330 } 1331 if (boothowto & RB_VERBOSE) 1332 printf( 1333 "Overlapping memory regions, ignoring second region\n"); 1334 return (1); 1335 } 1336 } 1337 1338 /* See if we can prepend to the next entry. */ 1339 if (insert_idx <= physmap_idx && 1340 smap->base + smap->length == physmap[insert_idx]) { 1341 physmap[insert_idx] = smap->base; 1342 return (1); 1343 } 1344 1345 /* See if we can append to the previous entry. */ 1346 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) { 1347 physmap[insert_idx - 1] += smap->length; 1348 return (1); 1349 } 1350 1351 physmap_idx += 2; 1352 *physmap_idxp = physmap_idx; 1353 if (physmap_idx == PHYSMAP_SIZE) { 1354 printf( 1355 "Too many segments in the physical address map, giving up\n"); 1356 return (0); 1357 } 1358 1359 /* 1360 * Move the last 'N' entries down to make room for the new 1361 * entry if needed. 1362 */ 1363 for (i = physmap_idx; i > insert_idx; i -= 2) { 1364 physmap[i] = physmap[i - 2]; 1365 physmap[i + 1] = physmap[i - 1]; 1366 } 1367 1368 /* Insert the new entry. */ 1369 physmap[insert_idx] = smap->base; 1370 physmap[insert_idx + 1] = smap->base + smap->length; 1371 return (1); 1372} 1373 1374/* 1375 * Populate the (physmap) array with base/bound pairs describing the 1376 * available physical memory in the system, then test this memory and 1377 * build the phys_avail array describing the actually-available memory. 1378 * 1379 * Total memory size may be set by the kernel environment variable 1380 * hw.physmem or the compile-time define MAXMEM. 1381 * 1382 * XXX first should be vm_paddr_t. 1383 */ 1384static void 1385getmemsize(caddr_t kmdp, u_int64_t first) 1386{ 1387 int i, physmap_idx, pa_indx, da_indx; 1388 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1389 u_long physmem_start, physmem_tunable, memtest; 1390 pt_entry_t *pte; 1391 struct bios_smap *smapbase, *smap, *smapend; 1392 u_int32_t smapsize; 1393 quad_t dcons_addr, dcons_size; 1394 1395 bzero(physmap, sizeof(physmap)); 1396 basemem = 0; 1397 physmap_idx = 0; 1398 1399 /* 1400 * get memory map from INT 15:E820, kindly supplied by the loader. 1401 * 1402 * subr_module.c says: 1403 * "Consumer may safely assume that size value precedes data." 1404 * ie: an int32_t immediately precedes smap. 1405 */ 1406 smapbase = (struct bios_smap *)preload_search_info(kmdp, 1407 MODINFO_METADATA | MODINFOMD_SMAP); 1408 if (smapbase == NULL) 1409 panic("No BIOS smap info from loader!"); 1410 1411 smapsize = *((u_int32_t *)smapbase - 1); 1412 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 1413 1414 for (smap = smapbase; smap < smapend; smap++) 1415 if (!add_smap_entry(smap, physmap, &physmap_idx)) 1416 break; 1417 1418 /* 1419 * Find the 'base memory' segment for SMP 1420 */ 1421 basemem = 0; 1422 for (i = 0; i <= physmap_idx; i += 2) { 1423 if (physmap[i] == 0x00000000) { 1424 basemem = physmap[i + 1] / 1024; 1425 break; 1426 } 1427 } 1428 if (basemem == 0) 1429 panic("BIOS smap did not include a basemem segment!"); 1430 1431#ifdef SMP 1432 /* make hole for AP bootstrap code */ 1433 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1434#endif 1435 1436 /* 1437 * Maxmem isn't the "maximum memory", it's one larger than the 1438 * highest page of the physical address space. It should be 1439 * called something like "Maxphyspage". We may adjust this 1440 * based on ``hw.physmem'' and the results of the memory test. 1441 */ 1442 Maxmem = atop(physmap[physmap_idx + 1]); 1443 1444#ifdef MAXMEM 1445 Maxmem = MAXMEM / 4; 1446#endif 1447 1448 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1449 Maxmem = atop(physmem_tunable); 1450 1451 /* 1452 * By default enable the memory test on real hardware, and disable 1453 * it if we appear to be running in a VM. This avoids touching all 1454 * pages unnecessarily, which doesn't matter on real hardware but is 1455 * bad for shared VM hosts. Use a general name so that 1456 * one could eventually do more with the code than just disable it. 1457 */ 1458 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1; 1459 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest); 1460 1461 /* 1462 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 1463 * in the system. 1464 */ 1465 if (Maxmem > atop(physmap[physmap_idx + 1])) 1466 Maxmem = atop(physmap[physmap_idx + 1]); 1467 1468 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1469 (boothowto & RB_VERBOSE)) 1470 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1471 1472 /* call pmap initialization to make new kernel address space */ 1473 pmap_bootstrap(&first); 1474 1475 /* 1476 * Size up each available chunk of physical memory. 1477 * 1478 * XXX Some BIOSes corrupt low 64KB between suspend and resume. 1479 * By default, mask off the first 16 pages unless we appear to be 1480 * running in a VM. 1481 */ 1482 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT; 1483 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start); 1484 if (physmem_start < PAGE_SIZE) 1485 physmap[0] = PAGE_SIZE; 1486 else if (physmem_start >= physmap[1]) 1487 physmap[0] = round_page(physmap[1] - PAGE_SIZE); 1488 else 1489 physmap[0] = round_page(physmem_start); 1490 pa_indx = 0; 1491 da_indx = 1; 1492 phys_avail[pa_indx++] = physmap[0]; 1493 phys_avail[pa_indx] = physmap[0]; 1494 dump_avail[da_indx] = physmap[0]; 1495 pte = CMAP1; 1496 1497 /* 1498 * Get dcons buffer address 1499 */ 1500 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1501 getenv_quad("dcons.size", &dcons_size) == 0) 1502 dcons_addr = 0; 1503 1504 /* 1505 * physmap is in bytes, so when converting to page boundaries, 1506 * round up the start address and round down the end address. 1507 */ 1508 for (i = 0; i <= physmap_idx; i += 2) { 1509 vm_paddr_t end; 1510 1511 end = ptoa((vm_paddr_t)Maxmem); 1512 if (physmap[i + 1] < end) 1513 end = trunc_page(physmap[i + 1]); 1514 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1515 int tmp, page_bad, full; 1516 int *ptr = (int *)CADDR1; 1517 1518 full = FALSE; 1519 /* 1520 * block out kernel memory as not available. 1521 */ 1522 if (pa >= (vm_paddr_t)kernphys && pa < first) 1523 goto do_dump_avail; 1524 1525 /* 1526 * block out dcons buffer 1527 */ 1528 if (dcons_addr > 0 1529 && pa >= trunc_page(dcons_addr) 1530 && pa < dcons_addr + dcons_size) 1531 goto do_dump_avail; 1532 1533 page_bad = FALSE; 1534 if (memtest == 0) 1535 goto skip_memtest; 1536 1537 /* 1538 * map page into kernel: valid, read/write,non-cacheable 1539 */ 1540 *pte = pa | PG_V | PG_RW | PG_N; 1541 invltlb(); 1542 1543 tmp = *(int *)ptr; 1544 /* 1545 * Test for alternating 1's and 0's 1546 */ 1547 *(volatile int *)ptr = 0xaaaaaaaa; 1548 if (*(volatile int *)ptr != 0xaaaaaaaa) 1549 page_bad = TRUE; 1550 /* 1551 * Test for alternating 0's and 1's 1552 */ 1553 *(volatile int *)ptr = 0x55555555; 1554 if (*(volatile int *)ptr != 0x55555555) 1555 page_bad = TRUE; 1556 /* 1557 * Test for all 1's 1558 */ 1559 *(volatile int *)ptr = 0xffffffff; 1560 if (*(volatile int *)ptr != 0xffffffff) 1561 page_bad = TRUE; 1562 /* 1563 * Test for all 0's 1564 */ 1565 *(volatile int *)ptr = 0x0; 1566 if (*(volatile int *)ptr != 0x0) 1567 page_bad = TRUE; 1568 /* 1569 * Restore original value. 1570 */ 1571 *(int *)ptr = tmp; 1572 1573skip_memtest: 1574 /* 1575 * Adjust array of valid/good pages. 1576 */ 1577 if (page_bad == TRUE) 1578 continue; 1579 /* 1580 * If this good page is a continuation of the 1581 * previous set of good pages, then just increase 1582 * the end pointer. Otherwise start a new chunk. 1583 * Note that "end" points one higher than end, 1584 * making the range >= start and < end. 1585 * If we're also doing a speculative memory 1586 * test and we at or past the end, bump up Maxmem 1587 * so that we keep going. The first bad page 1588 * will terminate the loop. 1589 */ 1590 if (phys_avail[pa_indx] == pa) { 1591 phys_avail[pa_indx] += PAGE_SIZE; 1592 } else { 1593 pa_indx++; 1594 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1595 printf( 1596 "Too many holes in the physical address space, giving up\n"); 1597 pa_indx--; 1598 full = TRUE; 1599 goto do_dump_avail; 1600 } 1601 phys_avail[pa_indx++] = pa; /* start */ 1602 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1603 } 1604 physmem++; 1605do_dump_avail: 1606 if (dump_avail[da_indx] == pa) { 1607 dump_avail[da_indx] += PAGE_SIZE; 1608 } else { 1609 da_indx++; 1610 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1611 da_indx--; 1612 goto do_next; 1613 } 1614 dump_avail[da_indx++] = pa; /* start */ 1615 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1616 } 1617do_next: 1618 if (full) 1619 break; 1620 } 1621 } 1622 *pte = 0; 1623 invltlb(); 1624 1625 /* 1626 * XXX 1627 * The last chunk must contain at least one page plus the message 1628 * buffer to avoid complicating other code (message buffer address 1629 * calculation, etc.). 1630 */ 1631 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1632 round_page(msgbufsize) >= phys_avail[pa_indx]) { 1633 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1634 phys_avail[pa_indx--] = 0; 1635 phys_avail[pa_indx--] = 0; 1636 } 1637 1638 Maxmem = atop(phys_avail[pa_indx]); 1639 1640 /* Trim off space for the message buffer. */ 1641 phys_avail[pa_indx] -= round_page(msgbufsize); 1642 1643 /* Map the message buffer. */ 1644 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]); 1645} 1646 1647u_int64_t 1648hammer_time(u_int64_t modulep, u_int64_t physfree) 1649{ 1650 caddr_t kmdp; 1651 int gsel_tss, x; 1652 struct pcpu *pc; 1653 struct nmi_pcpu *np; 1654 struct xstate_hdr *xhdr; 1655 u_int64_t msr; 1656 char *env; 1657 size_t kstack0_sz; 1658 1659 thread0.td_kstack = physfree + KERNBASE; 1660 thread0.td_kstack_pages = KSTACK_PAGES; 1661 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE; 1662 bzero((void *)thread0.td_kstack, kstack0_sz); 1663 physfree += kstack0_sz; 1664 1665 /* 1666 * This may be done better later if it gets more high level 1667 * components in it. If so just link td->td_proc here. 1668 */ 1669 proc_linkup0(&proc0, &thread0); 1670 1671 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1672 preload_bootstrap_relocate(KERNBASE); 1673 kmdp = preload_search_by_type("elf kernel"); 1674 if (kmdp == NULL) 1675 kmdp = preload_search_by_type("elf64 kernel"); 1676 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1677 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1678#ifdef DDB 1679 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1680 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1681#endif 1682 1683 /* Init basic tunables, hz etc */ 1684 init_param1(); 1685 1686 /* 1687 * make gdt memory segments 1688 */ 1689 for (x = 0; x < NGDT; x++) { 1690 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) && 1691 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1) 1692 ssdtosd(&gdt_segs[x], &gdt[x]); 1693 } 1694 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1695 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1696 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1697 1698 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1699 r_gdt.rd_base = (long) gdt; 1700 lgdt(&r_gdt); 1701 pc = &__pcpu[0]; 1702 1703 wrmsr(MSR_FSBASE, 0); /* User value */ 1704 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1705 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1706 1707 pcpu_init(pc, 0, sizeof(struct pcpu)); 1708 dpcpu_init((void *)(physfree + KERNBASE), 0); 1709 physfree += DPCPU_SIZE; 1710 PCPU_SET(prvspace, pc); 1711 PCPU_SET(curthread, &thread0); 1712 PCPU_SET(tssp, &common_tss[0]); 1713 PCPU_SET(commontssp, &common_tss[0]); 1714 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1715 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]); 1716 PCPU_SET(fs32p, &gdt[GUFS32_SEL]); 1717 PCPU_SET(gs32p, &gdt[GUGS32_SEL]); 1718 1719 /* 1720 * Initialize mutexes. 1721 * 1722 * icu_lock: in order to allow an interrupt to occur in a critical 1723 * section, to set pcpu->ipending (etc...) properly, we 1724 * must be able to get the icu lock, so it can't be 1725 * under witness. 1726 */ 1727 mutex_init(); 1728 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1729 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF); 1730 1731 /* exceptions */ 1732 for (x = 0; x < NIDT; x++) 1733 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1734 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1735 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1736 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2); 1737 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1738 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1739 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1740 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1741 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1742 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1743 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1744 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1745 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1746 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1747 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1748 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1749 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1750 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1751 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1752 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1753#ifdef KDTRACE_HOOKS 1754 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0); 1755#endif 1756 1757 r_idt.rd_limit = sizeof(idt0) - 1; 1758 r_idt.rd_base = (long) idt; 1759 lidt(&r_idt); 1760 1761 /* 1762 * Initialize the i8254 before the console so that console 1763 * initialization can use DELAY(). 1764 */ 1765 i8254_init(); 1766 1767 /* 1768 * Initialize the console before we print anything out. 1769 */ 1770 cninit(); 1771 1772#ifdef DEV_ISA 1773#ifdef DEV_ATPIC 1774 elcr_probe(); 1775 atpic_startup(); 1776#else 1777 /* Reset and mask the atpics and leave them shut down. */ 1778 atpic_reset(); 1779 1780 /* 1781 * Point the ICU spurious interrupt vectors at the APIC spurious 1782 * interrupt handler. 1783 */ 1784 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1785 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1786#endif 1787#else 1788#error "have you forgotten the isa device?"; 1789#endif 1790 1791 kdb_init(); 1792 1793#ifdef KDB 1794 if (boothowto & RB_KDB) 1795 kdb_enter(KDB_WHY_BOOTFLAGS, 1796 "Boot flags requested debugger"); 1797#endif 1798 1799 identify_cpu(); /* Final stage of CPU initialization */ 1800 initializecpu(); /* Initialize CPU registers */ 1801 initializecpucache(); 1802 1803 /* doublefault stack space, runs on ist1 */ 1804 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1805 1806 /* 1807 * NMI stack, runs on ist2. The pcpu pointer is stored just 1808 * above the start of the ist2 stack. 1809 */ 1810 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1; 1811 np->np_pcpu = (register_t) pc; 1812 common_tss[0].tss_ist2 = (long) np; 1813 1814 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1815 common_tss[0].tss_iobase = sizeof(struct amd64tss) + 1816 IOPAGES * PAGE_SIZE; 1817 1818 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1819 ltr(gsel_tss); 1820 1821 /* Set up the fast syscall stuff */ 1822 msr = rdmsr(MSR_EFER) | EFER_SCE; 1823 wrmsr(MSR_EFER, msr); 1824 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1825 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1826 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1827 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1828 wrmsr(MSR_STAR, msr); 1829 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1830 1831 getmemsize(kmdp, physfree); 1832 init_param2(physmem); 1833 1834 /* now running on new page tables, configured,and u/iom is accessible */ 1835 1836 msgbufinit(msgbufp, msgbufsize); 1837 fpuinit(); 1838 1839 /* 1840 * Set up thread0 pcb after fpuinit calculated pcb + fpu save 1841 * area size. Zero out the extended state header in fpu save 1842 * area. 1843 */ 1844 thread0.td_pcb = get_pcb_td(&thread0); 1845 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size); 1846 if (use_xsave) { 1847 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) + 1848 1); 1849 xhdr->xstate_bv = xsave_mask; 1850 } 1851 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1852 common_tss[0].tss_rsp0 = (vm_offset_t)thread0.td_pcb; 1853 /* Ensure the stack is aligned to 16 bytes */ 1854 common_tss[0].tss_rsp0 &= ~0xFul; 1855 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 1856 PCPU_SET(curpcb, thread0.td_pcb); 1857 1858 /* transfer to user mode */ 1859 1860 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1861 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1862 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1863 _ufssel = GSEL(GUFS32_SEL, SEL_UPL); 1864 _ugssel = GSEL(GUGS32_SEL, SEL_UPL); 1865 1866 load_ds(_udatasel); 1867 load_es(_udatasel); 1868 load_fs(_ufssel); 1869 1870 /* setup proc 0's pcb */ 1871 thread0.td_pcb->pcb_flags = 0; 1872 thread0.td_pcb->pcb_cr3 = KPML4phys; 1873 thread0.td_frame = &proc0_tf; 1874 1875 env = getenv("kernelname"); 1876 if (env != NULL) 1877 strlcpy(kernelname, env, sizeof(kernelname)); 1878 1879#ifdef XENHVM 1880 if (inw(0x10) == 0x49d2) { 1881 if (bootverbose) 1882 printf("Xen detected: disabling emulated block and network devices\n"); 1883 outw(0x10, 3); 1884 } 1885#endif 1886 1887 cpu_probe_amdc1e(); 1888 1889 /* Location of kernel stack for locore */ 1890 return ((u_int64_t)thread0.td_pcb); 1891} 1892 1893void 1894cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1895{ 1896 1897 pcpu->pc_acpi_id = 0xffffffff; 1898} 1899 1900void 1901spinlock_enter(void) 1902{ 1903 struct thread *td; 1904 register_t flags; 1905 1906 td = curthread; 1907 if (td->td_md.md_spinlock_count == 0) { 1908 flags = intr_disable(); 1909 td->td_md.md_spinlock_count = 1; 1910 td->td_md.md_saved_flags = flags; 1911 } else 1912 td->td_md.md_spinlock_count++; 1913 critical_enter(); 1914} 1915 1916void 1917spinlock_exit(void) 1918{ 1919 struct thread *td; 1920 register_t flags; 1921 1922 td = curthread; 1923 critical_exit(); 1924 flags = td->td_md.md_saved_flags; 1925 td->td_md.md_spinlock_count--; 1926 if (td->td_md.md_spinlock_count == 0) 1927 intr_restore(flags); 1928} 1929 1930/* 1931 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1932 * we want to start a backtrace from the function that caused us to enter 1933 * the debugger. We have the context in the trapframe, but base the trace 1934 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1935 * enough for a backtrace. 1936 */ 1937void 1938makectx(struct trapframe *tf, struct pcb *pcb) 1939{ 1940 1941 pcb->pcb_r12 = tf->tf_r12; 1942 pcb->pcb_r13 = tf->tf_r13; 1943 pcb->pcb_r14 = tf->tf_r14; 1944 pcb->pcb_r15 = tf->tf_r15; 1945 pcb->pcb_rbp = tf->tf_rbp; 1946 pcb->pcb_rbx = tf->tf_rbx; 1947 pcb->pcb_rip = tf->tf_rip; 1948 pcb->pcb_rsp = tf->tf_rsp; 1949} 1950 1951int 1952ptrace_set_pc(struct thread *td, unsigned long addr) 1953{ 1954 td->td_frame->tf_rip = addr; 1955 return (0); 1956} 1957 1958int 1959ptrace_single_step(struct thread *td) 1960{ 1961 td->td_frame->tf_rflags |= PSL_T; 1962 return (0); 1963} 1964 1965int 1966ptrace_clear_single_step(struct thread *td) 1967{ 1968 td->td_frame->tf_rflags &= ~PSL_T; 1969 return (0); 1970} 1971 1972int 1973fill_regs(struct thread *td, struct reg *regs) 1974{ 1975 struct trapframe *tp; 1976 1977 tp = td->td_frame; 1978 return (fill_frame_regs(tp, regs)); 1979} 1980 1981int 1982fill_frame_regs(struct trapframe *tp, struct reg *regs) 1983{ 1984 regs->r_r15 = tp->tf_r15; 1985 regs->r_r14 = tp->tf_r14; 1986 regs->r_r13 = tp->tf_r13; 1987 regs->r_r12 = tp->tf_r12; 1988 regs->r_r11 = tp->tf_r11; 1989 regs->r_r10 = tp->tf_r10; 1990 regs->r_r9 = tp->tf_r9; 1991 regs->r_r8 = tp->tf_r8; 1992 regs->r_rdi = tp->tf_rdi; 1993 regs->r_rsi = tp->tf_rsi; 1994 regs->r_rbp = tp->tf_rbp; 1995 regs->r_rbx = tp->tf_rbx; 1996 regs->r_rdx = tp->tf_rdx; 1997 regs->r_rcx = tp->tf_rcx; 1998 regs->r_rax = tp->tf_rax; 1999 regs->r_rip = tp->tf_rip; 2000 regs->r_cs = tp->tf_cs; 2001 regs->r_rflags = tp->tf_rflags; 2002 regs->r_rsp = tp->tf_rsp; 2003 regs->r_ss = tp->tf_ss; 2004 if (tp->tf_flags & TF_HASSEGS) { 2005 regs->r_ds = tp->tf_ds; 2006 regs->r_es = tp->tf_es; 2007 regs->r_fs = tp->tf_fs; 2008 regs->r_gs = tp->tf_gs; 2009 } else { 2010 regs->r_ds = 0; 2011 regs->r_es = 0; 2012 regs->r_fs = 0; 2013 regs->r_gs = 0; 2014 } 2015 return (0); 2016} 2017 2018int 2019set_regs(struct thread *td, struct reg *regs) 2020{ 2021 struct trapframe *tp; 2022 register_t rflags; 2023 2024 tp = td->td_frame; 2025 rflags = regs->r_rflags & 0xffffffff; 2026 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 2027 return (EINVAL); 2028 tp->tf_r15 = regs->r_r15; 2029 tp->tf_r14 = regs->r_r14; 2030 tp->tf_r13 = regs->r_r13; 2031 tp->tf_r12 = regs->r_r12; 2032 tp->tf_r11 = regs->r_r11; 2033 tp->tf_r10 = regs->r_r10; 2034 tp->tf_r9 = regs->r_r9; 2035 tp->tf_r8 = regs->r_r8; 2036 tp->tf_rdi = regs->r_rdi; 2037 tp->tf_rsi = regs->r_rsi; 2038 tp->tf_rbp = regs->r_rbp; 2039 tp->tf_rbx = regs->r_rbx; 2040 tp->tf_rdx = regs->r_rdx; 2041 tp->tf_rcx = regs->r_rcx; 2042 tp->tf_rax = regs->r_rax; 2043 tp->tf_rip = regs->r_rip; 2044 tp->tf_cs = regs->r_cs; 2045 tp->tf_rflags = rflags; 2046 tp->tf_rsp = regs->r_rsp; 2047 tp->tf_ss = regs->r_ss; 2048 if (0) { /* XXXKIB */ 2049 tp->tf_ds = regs->r_ds; 2050 tp->tf_es = regs->r_es; 2051 tp->tf_fs = regs->r_fs; 2052 tp->tf_gs = regs->r_gs; 2053 tp->tf_flags = TF_HASSEGS; 2054 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 2055 } 2056 return (0); 2057} 2058 2059/* XXX check all this stuff! */ 2060/* externalize from sv_xmm */ 2061static void 2062fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 2063{ 2064 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 2065 struct envxmm *penv_xmm = &sv_xmm->sv_env; 2066 int i; 2067 2068 /* pcb -> fpregs */ 2069 bzero(fpregs, sizeof(*fpregs)); 2070 2071 /* FPU control/status */ 2072 penv_fpreg->en_cw = penv_xmm->en_cw; 2073 penv_fpreg->en_sw = penv_xmm->en_sw; 2074 penv_fpreg->en_tw = penv_xmm->en_tw; 2075 penv_fpreg->en_opcode = penv_xmm->en_opcode; 2076 penv_fpreg->en_rip = penv_xmm->en_rip; 2077 penv_fpreg->en_rdp = penv_xmm->en_rdp; 2078 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 2079 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 2080 2081 /* FPU registers */ 2082 for (i = 0; i < 8; ++i) 2083 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 2084 2085 /* SSE registers */ 2086 for (i = 0; i < 16; ++i) 2087 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 2088} 2089 2090/* internalize from fpregs into sv_xmm */ 2091static void 2092set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 2093{ 2094 struct envxmm *penv_xmm = &sv_xmm->sv_env; 2095 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 2096 int i; 2097 2098 /* fpregs -> pcb */ 2099 /* FPU control/status */ 2100 penv_xmm->en_cw = penv_fpreg->en_cw; 2101 penv_xmm->en_sw = penv_fpreg->en_sw; 2102 penv_xmm->en_tw = penv_fpreg->en_tw; 2103 penv_xmm->en_opcode = penv_fpreg->en_opcode; 2104 penv_xmm->en_rip = penv_fpreg->en_rip; 2105 penv_xmm->en_rdp = penv_fpreg->en_rdp; 2106 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 2107 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 2108 2109 /* FPU registers */ 2110 for (i = 0; i < 8; ++i) 2111 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 2112 2113 /* SSE registers */ 2114 for (i = 0; i < 16; ++i) 2115 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 2116} 2117 2118/* externalize from td->pcb */ 2119int 2120fill_fpregs(struct thread *td, struct fpreg *fpregs) 2121{ 2122 2123 KASSERT(td == curthread || TD_IS_SUSPENDED(td) || 2124 P_SHOULDSTOP(td->td_proc), 2125 ("not suspended thread %p", td)); 2126 fpugetregs(td); 2127 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs); 2128 return (0); 2129} 2130 2131/* internalize to td->pcb */ 2132int 2133set_fpregs(struct thread *td, struct fpreg *fpregs) 2134{ 2135 2136 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td)); 2137 fpuuserinited(td); 2138 return (0); 2139} 2140 2141/* 2142 * Get machine context. 2143 */ 2144int 2145get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2146{ 2147 struct pcb *pcb; 2148 struct trapframe *tp; 2149 2150 pcb = td->td_pcb; 2151 tp = td->td_frame; 2152 PROC_LOCK(curthread->td_proc); 2153 mcp->mc_onstack = sigonstack(tp->tf_rsp); 2154 PROC_UNLOCK(curthread->td_proc); 2155 mcp->mc_r15 = tp->tf_r15; 2156 mcp->mc_r14 = tp->tf_r14; 2157 mcp->mc_r13 = tp->tf_r13; 2158 mcp->mc_r12 = tp->tf_r12; 2159 mcp->mc_r11 = tp->tf_r11; 2160 mcp->mc_r10 = tp->tf_r10; 2161 mcp->mc_r9 = tp->tf_r9; 2162 mcp->mc_r8 = tp->tf_r8; 2163 mcp->mc_rdi = tp->tf_rdi; 2164 mcp->mc_rsi = tp->tf_rsi; 2165 mcp->mc_rbp = tp->tf_rbp; 2166 mcp->mc_rbx = tp->tf_rbx; 2167 mcp->mc_rcx = tp->tf_rcx; 2168 mcp->mc_rflags = tp->tf_rflags; 2169 if (flags & GET_MC_CLEAR_RET) { 2170 mcp->mc_rax = 0; 2171 mcp->mc_rdx = 0; 2172 mcp->mc_rflags &= ~PSL_C; 2173 } else { 2174 mcp->mc_rax = tp->tf_rax; 2175 mcp->mc_rdx = tp->tf_rdx; 2176 } 2177 mcp->mc_rip = tp->tf_rip; 2178 mcp->mc_cs = tp->tf_cs; 2179 mcp->mc_rsp = tp->tf_rsp; 2180 mcp->mc_ss = tp->tf_ss; 2181 mcp->mc_ds = tp->tf_ds; 2182 mcp->mc_es = tp->tf_es; 2183 mcp->mc_fs = tp->tf_fs; 2184 mcp->mc_gs = tp->tf_gs; 2185 mcp->mc_flags = tp->tf_flags; 2186 mcp->mc_len = sizeof(*mcp); 2187 get_fpcontext(td, mcp, NULL, 0); 2188 mcp->mc_fsbase = pcb->pcb_fsbase; 2189 mcp->mc_gsbase = pcb->pcb_gsbase; 2190 mcp->mc_xfpustate = 0; 2191 mcp->mc_xfpustate_len = 0; 2192 bzero(mcp->mc_spare, sizeof(mcp->mc_spare)); 2193 return (0); 2194} 2195 2196/* 2197 * Set machine context. 2198 * 2199 * However, we don't set any but the user modifiable flags, and we won't 2200 * touch the cs selector. 2201 */ 2202int 2203set_mcontext(struct thread *td, const mcontext_t *mcp) 2204{ 2205 struct pcb *pcb; 2206 struct trapframe *tp; 2207 char *xfpustate; 2208 long rflags; 2209 int ret; 2210 2211 pcb = td->td_pcb; 2212 tp = td->td_frame; 2213 if (mcp->mc_len != sizeof(*mcp) || 2214 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0) 2215 return (EINVAL); 2216 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 2217 (tp->tf_rflags & ~PSL_USERCHANGE); 2218 if (mcp->mc_flags & _MC_HASFPXSTATE) { 2219 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size - 2220 sizeof(struct savefpu)) 2221 return (EINVAL); 2222 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len); 2223 ret = copyin((void *)mcp->mc_xfpustate, xfpustate, 2224 mcp->mc_xfpustate_len); 2225 if (ret != 0) 2226 return (ret); 2227 } else 2228 xfpustate = NULL; 2229 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len); 2230 if (ret != 0) 2231 return (ret); 2232 tp->tf_r15 = mcp->mc_r15; 2233 tp->tf_r14 = mcp->mc_r14; 2234 tp->tf_r13 = mcp->mc_r13; 2235 tp->tf_r12 = mcp->mc_r12; 2236 tp->tf_r11 = mcp->mc_r11; 2237 tp->tf_r10 = mcp->mc_r10; 2238 tp->tf_r9 = mcp->mc_r9; 2239 tp->tf_r8 = mcp->mc_r8; 2240 tp->tf_rdi = mcp->mc_rdi; 2241 tp->tf_rsi = mcp->mc_rsi; 2242 tp->tf_rbp = mcp->mc_rbp; 2243 tp->tf_rbx = mcp->mc_rbx; 2244 tp->tf_rdx = mcp->mc_rdx; 2245 tp->tf_rcx = mcp->mc_rcx; 2246 tp->tf_rax = mcp->mc_rax; 2247 tp->tf_rip = mcp->mc_rip; 2248 tp->tf_rflags = rflags; 2249 tp->tf_rsp = mcp->mc_rsp; 2250 tp->tf_ss = mcp->mc_ss; 2251 tp->tf_flags = mcp->mc_flags; 2252 if (tp->tf_flags & TF_HASSEGS) { 2253 tp->tf_ds = mcp->mc_ds; 2254 tp->tf_es = mcp->mc_es; 2255 tp->tf_fs = mcp->mc_fs; 2256 tp->tf_gs = mcp->mc_gs; 2257 } 2258 if (mcp->mc_flags & _MC_HASBASES) { 2259 pcb->pcb_fsbase = mcp->mc_fsbase; 2260 pcb->pcb_gsbase = mcp->mc_gsbase; 2261 } 2262 set_pcb_flags(pcb, PCB_FULL_IRET); 2263 return (0); 2264} 2265 2266static void 2267get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave, 2268 size_t xfpusave_len) 2269{ 2270 size_t max_len, len; 2271 2272 mcp->mc_ownedfp = fpugetregs(td); 2273 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate, 2274 sizeof(mcp->mc_fpstate)); 2275 mcp->mc_fpformat = fpuformat(); 2276 if (!use_xsave || xfpusave_len == 0) 2277 return; 2278 max_len = cpu_max_ext_state_size - sizeof(struct savefpu); 2279 len = xfpusave_len; 2280 if (len > max_len) { 2281 len = max_len; 2282 bzero(xfpusave + max_len, len - max_len); 2283 } 2284 mcp->mc_flags |= _MC_HASFPXSTATE; 2285 mcp->mc_xfpustate_len = len; 2286 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len); 2287} 2288 2289static int 2290set_fpcontext(struct thread *td, const mcontext_t *mcp, char *xfpustate, 2291 size_t xfpustate_len) 2292{ 2293 struct savefpu *fpstate; 2294 int error; 2295 2296 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2297 return (0); 2298 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 2299 return (EINVAL); 2300 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) { 2301 /* We don't care what state is left in the FPU or PCB. */ 2302 fpstate_drop(td); 2303 error = 0; 2304 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2305 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2306 fpstate = (struct savefpu *)&mcp->mc_fpstate; 2307 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask; 2308 error = fpusetregs(td, fpstate, xfpustate, xfpustate_len); 2309 } else 2310 return (EINVAL); 2311 return (error); 2312} 2313 2314void 2315fpstate_drop(struct thread *td) 2316{ 2317 2318 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu")); 2319 critical_enter(); 2320 if (PCPU_GET(fpcurthread) == td) 2321 fpudrop(); 2322 /* 2323 * XXX force a full drop of the fpu. The above only drops it if we 2324 * owned it. 2325 * 2326 * XXX I don't much like fpugetuserregs()'s semantics of doing a full 2327 * drop. Dropping only to the pcb matches fnsave's behaviour. 2328 * We only need to drop to !PCB_INITDONE in sendsig(). But 2329 * sendsig() is the only caller of fpugetuserregs()... perhaps we just 2330 * have too many layers. 2331 */ 2332 clear_pcb_flags(curthread->td_pcb, 2333 PCB_FPUINITDONE | PCB_USERFPUINITDONE); 2334 critical_exit(); 2335} 2336 2337int 2338fill_dbregs(struct thread *td, struct dbreg *dbregs) 2339{ 2340 struct pcb *pcb; 2341 2342 if (td == NULL) { 2343 dbregs->dr[0] = rdr0(); 2344 dbregs->dr[1] = rdr1(); 2345 dbregs->dr[2] = rdr2(); 2346 dbregs->dr[3] = rdr3(); 2347 dbregs->dr[6] = rdr6(); 2348 dbregs->dr[7] = rdr7(); 2349 } else { 2350 pcb = td->td_pcb; 2351 dbregs->dr[0] = pcb->pcb_dr0; 2352 dbregs->dr[1] = pcb->pcb_dr1; 2353 dbregs->dr[2] = pcb->pcb_dr2; 2354 dbregs->dr[3] = pcb->pcb_dr3; 2355 dbregs->dr[6] = pcb->pcb_dr6; 2356 dbregs->dr[7] = pcb->pcb_dr7; 2357 } 2358 dbregs->dr[4] = 0; 2359 dbregs->dr[5] = 0; 2360 dbregs->dr[8] = 0; 2361 dbregs->dr[9] = 0; 2362 dbregs->dr[10] = 0; 2363 dbregs->dr[11] = 0; 2364 dbregs->dr[12] = 0; 2365 dbregs->dr[13] = 0; 2366 dbregs->dr[14] = 0; 2367 dbregs->dr[15] = 0; 2368 return (0); 2369} 2370 2371int 2372set_dbregs(struct thread *td, struct dbreg *dbregs) 2373{ 2374 struct pcb *pcb; 2375 int i; 2376 2377 if (td == NULL) { 2378 load_dr0(dbregs->dr[0]); 2379 load_dr1(dbregs->dr[1]); 2380 load_dr2(dbregs->dr[2]); 2381 load_dr3(dbregs->dr[3]); 2382 load_dr6(dbregs->dr[6]); 2383 load_dr7(dbregs->dr[7]); 2384 } else { 2385 /* 2386 * Don't let an illegal value for dr7 get set. Specifically, 2387 * check for undefined settings. Setting these bit patterns 2388 * result in undefined behaviour and can lead to an unexpected 2389 * TRCTRAP or a general protection fault right here. 2390 * Upper bits of dr6 and dr7 must not be set 2391 */ 2392 for (i = 0; i < 4; i++) { 2393 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2394 return (EINVAL); 2395 if (td->td_frame->tf_cs == _ucode32sel && 2396 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 2397 return (EINVAL); 2398 } 2399 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 2400 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 2401 return (EINVAL); 2402 2403 pcb = td->td_pcb; 2404 2405 /* 2406 * Don't let a process set a breakpoint that is not within the 2407 * process's address space. If a process could do this, it 2408 * could halt the system by setting a breakpoint in the kernel 2409 * (if ddb was enabled). Thus, we need to check to make sure 2410 * that no breakpoints are being enabled for addresses outside 2411 * process's address space. 2412 * 2413 * XXX - what about when the watched area of the user's 2414 * address space is written into from within the kernel 2415 * ... wouldn't that still cause a breakpoint to be generated 2416 * from within kernel mode? 2417 */ 2418 2419 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2420 /* dr0 is enabled */ 2421 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2422 return (EINVAL); 2423 } 2424 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2425 /* dr1 is enabled */ 2426 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2427 return (EINVAL); 2428 } 2429 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2430 /* dr2 is enabled */ 2431 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2432 return (EINVAL); 2433 } 2434 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2435 /* dr3 is enabled */ 2436 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2437 return (EINVAL); 2438 } 2439 2440 pcb->pcb_dr0 = dbregs->dr[0]; 2441 pcb->pcb_dr1 = dbregs->dr[1]; 2442 pcb->pcb_dr2 = dbregs->dr[2]; 2443 pcb->pcb_dr3 = dbregs->dr[3]; 2444 pcb->pcb_dr6 = dbregs->dr[6]; 2445 pcb->pcb_dr7 = dbregs->dr[7]; 2446 2447 set_pcb_flags(pcb, PCB_DBREGS); 2448 } 2449 2450 return (0); 2451} 2452 2453void 2454reset_dbregs(void) 2455{ 2456 2457 load_dr7(0); /* Turn off the control bits first */ 2458 load_dr0(0); 2459 load_dr1(0); 2460 load_dr2(0); 2461 load_dr3(0); 2462 load_dr6(0); 2463} 2464 2465/* 2466 * Return > 0 if a hardware breakpoint has been hit, and the 2467 * breakpoint was in user space. Return 0, otherwise. 2468 */ 2469int 2470user_dbreg_trap(void) 2471{ 2472 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 2473 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 2474 int nbp; /* number of breakpoints that triggered */ 2475 caddr_t addr[4]; /* breakpoint addresses */ 2476 int i; 2477 2478 dr7 = rdr7(); 2479 if ((dr7 & 0x000000ff) == 0) { 2480 /* 2481 * all GE and LE bits in the dr7 register are zero, 2482 * thus the trap couldn't have been caused by the 2483 * hardware debug registers 2484 */ 2485 return 0; 2486 } 2487 2488 nbp = 0; 2489 dr6 = rdr6(); 2490 bp = dr6 & 0x0000000f; 2491 2492 if (!bp) { 2493 /* 2494 * None of the breakpoint bits are set meaning this 2495 * trap was not caused by any of the debug registers 2496 */ 2497 return 0; 2498 } 2499 2500 /* 2501 * at least one of the breakpoints were hit, check to see 2502 * which ones and if any of them are user space addresses 2503 */ 2504 2505 if (bp & 0x01) { 2506 addr[nbp++] = (caddr_t)rdr0(); 2507 } 2508 if (bp & 0x02) { 2509 addr[nbp++] = (caddr_t)rdr1(); 2510 } 2511 if (bp & 0x04) { 2512 addr[nbp++] = (caddr_t)rdr2(); 2513 } 2514 if (bp & 0x08) { 2515 addr[nbp++] = (caddr_t)rdr3(); 2516 } 2517 2518 for (i = 0; i < nbp; i++) { 2519 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2520 /* 2521 * addr[i] is in user space 2522 */ 2523 return nbp; 2524 } 2525 } 2526 2527 /* 2528 * None of the breakpoints are in user space. 2529 */ 2530 return 0; 2531} 2532 2533#ifdef KDB 2534 2535/* 2536 * Provide inb() and outb() as functions. They are normally only available as 2537 * inline functions, thus cannot be called from the debugger. 2538 */ 2539 2540/* silence compiler warnings */ 2541u_char inb_(u_short); 2542void outb_(u_short, u_char); 2543 2544u_char 2545inb_(u_short port) 2546{ 2547 return inb(port); 2548} 2549 2550void 2551outb_(u_short port, u_char data) 2552{ 2553 outb(port, data); 2554} 2555 2556#endif /* KDB */ 2557