machdep.c revision 21737
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $FreeBSD: head/sys/amd64/amd64/machdep.c 21737 1997-01-15 20:46:02Z dg $ 39 */ 40 41#include "npx.h" 42#include "opt_sysvipc.h" 43#include "opt_ddb.h" 44#include "opt_bounce.h" 45#include "opt_machdep.h" 46#include "opt_perfmon.h" 47#include "opt_userconfig.h" 48 49#include <sys/param.h> 50#include <sys/systm.h> 51#include <sys/sysproto.h> 52#include <sys/signalvar.h> 53#include <sys/kernel.h> 54#include <sys/proc.h> 55#include <sys/buf.h> 56#include <sys/reboot.h> 57#include <sys/conf.h> 58#include <sys/file.h> 59#include <sys/callout.h> 60#include <sys/malloc.h> 61#include <sys/mbuf.h> 62#include <sys/mount.h> 63#include <sys/msgbuf.h> 64#include <sys/ioctl.h> 65#include <sys/sysent.h> 66#include <sys/tty.h> 67#include <sys/sysctl.h> 68#include <sys/vmmeter.h> 69 70#ifdef SYSVSHM 71#include <sys/shm.h> 72#endif 73 74#ifdef SYSVMSG 75#include <sys/msg.h> 76#endif 77 78#ifdef SYSVSEM 79#include <sys/sem.h> 80#endif 81 82#include <vm/vm.h> 83#include <vm/vm_param.h> 84#include <vm/vm_prot.h> 85#include <vm/lock.h> 86#include <vm/vm_kern.h> 87#include <vm/vm_object.h> 88#include <vm/vm_page.h> 89#include <vm/vm_map.h> 90#include <vm/vm_pager.h> 91#include <vm/vm_extern.h> 92 93#include <sys/user.h> 94#include <sys/exec.h> 95#include <sys/vnode.h> 96 97#include <ddb/ddb.h> 98 99#include <net/netisr.h> 100 101#include <machine/cpu.h> 102#include <machine/npx.h> 103#include <machine/reg.h> 104#include <machine/psl.h> 105#include <machine/clock.h> 106#include <machine/specialreg.h> 107#include <machine/sysarch.h> 108#include <machine/cons.h> 109#include <machine/bootinfo.h> 110#include <machine/md_var.h> 111#ifdef PERFMON 112#include <machine/perfmon.h> 113#endif 114 115#include <i386/isa/isa_device.h> 116#include <i386/isa/rtc.h> 117#include <machine/random.h> 118 119extern void init386 __P((int first)); 120extern int ptrace_set_pc __P((struct proc *p, unsigned int addr)); 121extern int ptrace_single_step __P((struct proc *p)); 122extern int ptrace_write_u __P((struct proc *p, vm_offset_t off, int data)); 123extern void dblfault_handler __P((void)); 124 125extern void identifycpu(void); /* XXX header file */ 126extern void earlysetcpuclass(void); /* same header file */ 127 128static void cpu_startup __P((void *)); 129SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 130 131 132#ifdef BOUNCE_BUFFERS 133extern char *bouncememory; 134extern int maxbkva; 135#ifdef BOUNCEPAGES 136int bouncepages = BOUNCEPAGES; 137#else 138int bouncepages = 0; 139#endif 140#endif /* BOUNCE_BUFFERS */ 141 142extern int freebufspace; 143int msgbufmapped = 0; /* set when safe to use msgbuf */ 144int _udatasel, _ucodesel; 145u_int atdevbase; 146 147 148int physmem = 0; 149int cold = 1; 150 151static int 152sysctl_hw_physmem SYSCTL_HANDLER_ARGS 153{ 154 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 155 return (error); 156} 157 158SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 159 0, 0, sysctl_hw_physmem, "I", ""); 160 161static int 162sysctl_hw_usermem SYSCTL_HANDLER_ARGS 163{ 164 int error = sysctl_handle_int(oidp, 0, 165 ctob(physmem - cnt.v_wire_count), req); 166 return (error); 167} 168 169SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 170 0, 0, sysctl_hw_usermem, "I", ""); 171 172int boothowto = 0, bootverbose = 0, Maxmem = 0; 173static int badpages = 0; 174long dumplo; 175extern int bootdev; 176 177vm_offset_t phys_avail[10]; 178 179/* must be 2 less so 0 0 can signal end of chunks */ 180#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 181 182static void setup_netisrs __P((struct linker_set *)); /* XXX declare elsewhere */ 183 184static vm_offset_t buffer_sva, buffer_eva; 185vm_offset_t clean_sva, clean_eva; 186static vm_offset_t pager_sva, pager_eva; 187extern struct linker_set netisr_set; 188 189#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 190 191static void 192cpu_startup(dummy) 193 void *dummy; 194{ 195 register unsigned i; 196 register caddr_t v; 197 vm_offset_t maxaddr; 198 vm_size_t size = 0; 199 int firstaddr; 200 vm_offset_t minaddr; 201 202 if (boothowto & RB_VERBOSE) 203 bootverbose++; 204 205 /* 206 * Good {morning,afternoon,evening,night}. 207 */ 208 printf(version); 209 earlysetcpuclass(); 210 startrtclock(); 211 identifycpu(); 212#ifdef PERFMON 213 perfmon_init(); 214#endif 215 printf("real memory = %d (%dK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 216 /* 217 * Display any holes after the first chunk of extended memory. 218 */ 219 if (badpages != 0) { 220 int indx = 1; 221 222 /* 223 * XXX skip reporting ISA hole & unmanaged kernel memory 224 */ 225 if (phys_avail[0] == PAGE_SIZE) 226 indx += 2; 227 228 printf("Physical memory hole(s):\n"); 229 for (; phys_avail[indx + 1] != 0; indx += 2) { 230 int size = phys_avail[indx + 1] - phys_avail[indx]; 231 232 printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx], 233 phys_avail[indx + 1] - 1, size, size / PAGE_SIZE); 234 } 235 } 236 237 /* 238 * Quickly wire in netisrs. 239 */ 240 setup_netisrs(&netisr_set); 241 242 /* 243 * Allocate space for system data structures. 244 * The first available kernel virtual address is in "v". 245 * As pages of kernel virtual memory are allocated, "v" is incremented. 246 * As pages of memory are allocated and cleared, 247 * "firstaddr" is incremented. 248 * An index into the kernel page table corresponding to the 249 * virtual memory address maintained in "v" is kept in "mapaddr". 250 */ 251 252 /* 253 * Make two passes. The first pass calculates how much memory is 254 * needed and allocates it. The second pass assigns virtual 255 * addresses to the various data structures. 256 */ 257 firstaddr = 0; 258again: 259 v = (caddr_t)firstaddr; 260 261#define valloc(name, type, num) \ 262 (name) = (type *)v; v = (caddr_t)((name)+(num)) 263#define valloclim(name, type, num, lim) \ 264 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 265 valloc(callout, struct callout, ncallout); 266#ifdef SYSVSHM 267 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 268#endif 269#ifdef SYSVSEM 270 valloc(sema, struct semid_ds, seminfo.semmni); 271 valloc(sem, struct sem, seminfo.semmns); 272 /* This is pretty disgusting! */ 273 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 274#endif 275#ifdef SYSVMSG 276 valloc(msgpool, char, msginfo.msgmax); 277 valloc(msgmaps, struct msgmap, msginfo.msgseg); 278 valloc(msghdrs, struct msg, msginfo.msgtql); 279 valloc(msqids, struct msqid_ds, msginfo.msgmni); 280#endif 281 282 if (nbuf == 0) { 283 nbuf = 30; 284 if( physmem > 1024) 285 nbuf += min((physmem - 1024) / 8, 2048); 286 } 287 nswbuf = max(min(nbuf/4, 128), 16); 288 289 valloc(swbuf, struct buf, nswbuf); 290 valloc(buf, struct buf, nbuf); 291 292#ifdef BOUNCE_BUFFERS 293 /* 294 * If there is more than 16MB of memory, allocate some bounce buffers 295 */ 296 if (Maxmem > 4096) { 297 if (bouncepages == 0) { 298 bouncepages = 64; 299 bouncepages += ((Maxmem - 4096) / 2048) * 32; 300 } 301 v = (caddr_t)((vm_offset_t)round_page(v)); 302 valloc(bouncememory, char, bouncepages * PAGE_SIZE); 303 } 304#endif 305 306 /* 307 * End of first pass, size has been calculated so allocate memory 308 */ 309 if (firstaddr == 0) { 310 size = (vm_size_t)(v - firstaddr); 311 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 312 if (firstaddr == 0) 313 panic("startup: no room for tables"); 314 goto again; 315 } 316 317 /* 318 * End of second pass, addresses have been assigned 319 */ 320 if ((vm_size_t)(v - firstaddr) != size) 321 panic("startup: table size inconsistency"); 322 323#ifdef BOUNCE_BUFFERS 324 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 325 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + 326 maxbkva + pager_map_size, TRUE); 327 io_map = kmem_suballoc(clean_map, &minaddr, &maxaddr, maxbkva, FALSE); 328#else 329 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 330 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size, TRUE); 331#endif 332 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 333 (nbuf*BKVASIZE), TRUE); 334 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 335 (nswbuf*MAXPHYS) + pager_map_size, TRUE); 336 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 337 (16*ARG_MAX), TRUE); 338 exech_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 339 (16*PAGE_SIZE), TRUE); 340 u_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 341 (maxproc*UPAGES*PAGE_SIZE), FALSE); 342 343 /* 344 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 345 * we use the more space efficient malloc in place of kmem_alloc. 346 */ 347 { 348 vm_offset_t mb_map_size; 349 350 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 351 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 352 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 353 bzero(mclrefcnt, mb_map_size / MCLBYTES); 354 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 355 mb_map_size, FALSE); 356 } 357 358 /* 359 * Initialize callouts 360 */ 361 callfree = callout; 362 for (i = 1; i < ncallout; i++) 363 callout[i-1].c_next = &callout[i]; 364 365#if defined(USERCONFIG) 366#if defined(USERCONFIG_BOOT) 367 if (1) { 368#else 369 if (boothowto & RB_CONFIG) { 370#endif 371 userconfig(); 372 cninit(); /* the preferred console may have changed */ 373 } 374#endif 375 376#ifdef BOUNCE_BUFFERS 377 /* 378 * init bounce buffers 379 */ 380 vm_bounce_init(); 381#endif 382 383 printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count), 384 ptoa(cnt.v_free_count) / 1024); 385 386 /* 387 * Set up buffers, so they can be used to read disk labels. 388 */ 389 bufinit(); 390 vm_pager_bufferinit(); 391} 392 393int 394register_netisr(num, handler) 395 int num; 396 netisr_t *handler; 397{ 398 399 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 400 printf("register_netisr: bad isr number: %d\n", num); 401 return (EINVAL); 402 } 403 netisrs[num] = handler; 404 return (0); 405} 406 407static void 408setup_netisrs(ls) 409 struct linker_set *ls; 410{ 411 int i; 412 const struct netisrtab *nit; 413 414 for(i = 0; ls->ls_items[i]; i++) { 415 nit = (const struct netisrtab *)ls->ls_items[i]; 416 register_netisr(nit->nit_num, nit->nit_isr); 417 } 418} 419 420/* 421 * Send an interrupt to process. 422 * 423 * Stack is set up to allow sigcode stored 424 * at top to call routine, followed by kcall 425 * to sigreturn routine below. After sigreturn 426 * resets the signal mask, the stack, and the 427 * frame pointer, it returns to the user 428 * specified pc, psl. 429 */ 430void 431sendsig(catcher, sig, mask, code) 432 sig_t catcher; 433 int sig, mask; 434 u_long code; 435{ 436 register struct proc *p = curproc; 437 register int *regs; 438 register struct sigframe *fp; 439 struct sigframe sf; 440 struct sigacts *psp = p->p_sigacts; 441 int oonstack; 442 443 regs = p->p_md.md_regs; 444 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 445 /* 446 * Allocate and validate space for the signal handler context. 447 */ 448 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 449 (psp->ps_sigonstack & sigmask(sig))) { 450 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 451 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 452 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 453 } else { 454 fp = (struct sigframe *)regs[tESP] - 1; 455 } 456 457 /* 458 * grow() will return FALSE if the fp will not fit inside the stack 459 * and the stack can not be grown. useracc will return FALSE 460 * if access is denied. 461 */ 462 if ((grow(p, (int)fp) == FALSE) || 463 (useracc((caddr_t)fp, sizeof (struct sigframe), B_WRITE) == FALSE)) { 464 /* 465 * Process has trashed its stack; give it an illegal 466 * instruction to halt it in its tracks. 467 */ 468 SIGACTION(p, SIGILL) = SIG_DFL; 469 sig = sigmask(SIGILL); 470 p->p_sigignore &= ~sig; 471 p->p_sigcatch &= ~sig; 472 p->p_sigmask &= ~sig; 473 psignal(p, SIGILL); 474 return; 475 } 476 477 /* 478 * Build the argument list for the signal handler. 479 */ 480 if (p->p_sysent->sv_sigtbl) { 481 if (sig < p->p_sysent->sv_sigsize) 482 sig = p->p_sysent->sv_sigtbl[sig]; 483 else 484 sig = p->p_sysent->sv_sigsize + 1; 485 } 486 sf.sf_signum = sig; 487 sf.sf_code = code; 488 sf.sf_scp = &fp->sf_sc; 489 sf.sf_addr = (char *) regs[tERR]; 490 sf.sf_handler = catcher; 491 492 /* save scratch registers */ 493 sf.sf_sc.sc_eax = regs[tEAX]; 494 sf.sf_sc.sc_ebx = regs[tEBX]; 495 sf.sf_sc.sc_ecx = regs[tECX]; 496 sf.sf_sc.sc_edx = regs[tEDX]; 497 sf.sf_sc.sc_esi = regs[tESI]; 498 sf.sf_sc.sc_edi = regs[tEDI]; 499 sf.sf_sc.sc_cs = regs[tCS]; 500 sf.sf_sc.sc_ds = regs[tDS]; 501 sf.sf_sc.sc_ss = regs[tSS]; 502 sf.sf_sc.sc_es = regs[tES]; 503 sf.sf_sc.sc_isp = regs[tISP]; 504 505 /* 506 * Build the signal context to be used by sigreturn. 507 */ 508 sf.sf_sc.sc_onstack = oonstack; 509 sf.sf_sc.sc_mask = mask; 510 sf.sf_sc.sc_sp = regs[tESP]; 511 sf.sf_sc.sc_fp = regs[tEBP]; 512 sf.sf_sc.sc_pc = regs[tEIP]; 513 sf.sf_sc.sc_ps = regs[tEFLAGS]; 514 515 /* 516 * Copy the sigframe out to the user's stack. 517 */ 518 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 519 /* 520 * Something is wrong with the stack pointer. 521 * ...Kill the process. 522 */ 523 sigexit(p, SIGILL); 524 }; 525 526 regs[tESP] = (int)fp; 527 regs[tEIP] = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode)); 528 regs[tEFLAGS] &= ~PSL_VM; 529 regs[tCS] = _ucodesel; 530 regs[tDS] = _udatasel; 531 regs[tES] = _udatasel; 532 regs[tSS] = _udatasel; 533} 534 535/* 536 * System call to cleanup state after a signal 537 * has been taken. Reset signal mask and 538 * stack state from context left by sendsig (above). 539 * Return to previous pc and psl as specified by 540 * context left by sendsig. Check carefully to 541 * make sure that the user has not modified the 542 * state to gain improper privileges. 543 */ 544int 545sigreturn(p, uap, retval) 546 struct proc *p; 547 struct sigreturn_args /* { 548 struct sigcontext *sigcntxp; 549 } */ *uap; 550 int *retval; 551{ 552 register struct sigcontext *scp; 553 register struct sigframe *fp; 554 register int *regs = p->p_md.md_regs; 555 int eflags; 556 557 /* 558 * (XXX old comment) regs[tESP] points to the return address. 559 * The user scp pointer is above that. 560 * The return address is faked in the signal trampoline code 561 * for consistency. 562 */ 563 scp = uap->sigcntxp; 564 fp = (struct sigframe *) 565 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 566 567 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 568 return(EINVAL); 569 570 /* 571 * Don't allow users to change privileged or reserved flags. 572 */ 573#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 574 eflags = scp->sc_ps; 575 /* 576 * XXX do allow users to change the privileged flag PSL_RF. The 577 * cpu sets PSL_RF in tf_eflags for faults. Debuggers should 578 * sometimes set it there too. tf_eflags is kept in the signal 579 * context during signal handling and there is no other place 580 * to remember it, so the PSL_RF bit may be corrupted by the 581 * signal handler without us knowing. Corruption of the PSL_RF 582 * bit at worst causes one more or one less debugger trap, so 583 * allowing it is fairly harmless. 584 */ 585 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs[tEFLAGS] & ~PSL_RF)) { 586#ifdef DEBUG 587 printf("sigreturn: eflags = 0x%x\n", eflags); 588#endif 589 return(EINVAL); 590 } 591 592 /* 593 * Don't allow users to load a valid privileged %cs. Let the 594 * hardware check for invalid selectors, excess privilege in 595 * other selectors, invalid %eip's and invalid %esp's. 596 */ 597#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 598 if (!CS_SECURE(scp->sc_cs)) { 599#ifdef DEBUG 600 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 601#endif 602 trapsignal(p, SIGBUS, T_PROTFLT); 603 return(EINVAL); 604 } 605 606 /* restore scratch registers */ 607 regs[tEAX] = scp->sc_eax; 608 regs[tEBX] = scp->sc_ebx; 609 regs[tECX] = scp->sc_ecx; 610 regs[tEDX] = scp->sc_edx; 611 regs[tESI] = scp->sc_esi; 612 regs[tEDI] = scp->sc_edi; 613 regs[tCS] = scp->sc_cs; 614 regs[tDS] = scp->sc_ds; 615 regs[tES] = scp->sc_es; 616 regs[tSS] = scp->sc_ss; 617 regs[tISP] = scp->sc_isp; 618 619 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 620 return(EINVAL); 621 622 if (scp->sc_onstack & 01) 623 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 624 else 625 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 626 p->p_sigmask = scp->sc_mask & ~sigcantmask; 627 regs[tEBP] = scp->sc_fp; 628 regs[tESP] = scp->sc_sp; 629 regs[tEIP] = scp->sc_pc; 630 regs[tEFLAGS] = eflags; 631 return(EJUSTRETURN); 632} 633 634/* 635 * Machine depdnetnt boot() routine 636 * 637 * I haven't seen anything too put here yet 638 * Possibly some stuff might be grafted back here from boot() 639 */ 640void 641cpu_boot(int howto) 642{ 643} 644 645/* 646 * Shutdown the CPU as much as possible 647 */ 648void 649cpu_halt(void) 650{ 651 for (;;) 652 __asm__ ("hlt"); 653} 654 655/* 656 * Clear registers on exec 657 */ 658void 659setregs(p, entry, stack) 660 struct proc *p; 661 u_long entry; 662 u_long stack; 663{ 664 int *regs = p->p_md.md_regs; 665 666#ifdef USER_LDT 667 struct pcb *pcb = &p->p_addr->u_pcb; 668 669 /* was i386_user_cleanup() in NetBSD */ 670 if (pcb->pcb_ldt) { 671 if (pcb == curpcb) 672 lldt(GSEL(GUSERLDT_SEL, SEL_KPL)); 673 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 674 pcb->pcb_ldt_len * sizeof(union descriptor)); 675 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 676 } 677#endif 678 679 bzero(regs, sizeof(struct trapframe)); 680 regs[tEIP] = entry; 681 regs[tESP] = stack; 682 regs[tEFLAGS] = PSL_USER | (regs[tEFLAGS] & PSL_T); 683 regs[tSS] = _udatasel; 684 regs[tDS] = _udatasel; 685 regs[tES] = _udatasel; 686 regs[tCS] = _ucodesel; 687 688 p->p_addr->u_pcb.pcb_flags = 0; /* no fp at all */ 689 load_cr0(rcr0() | CR0_TS); /* start emulating */ 690#if NNPX > 0 691 npxinit(__INITIAL_NPXCW__); 692#endif /* NNPX > 0 */ 693} 694 695static int 696sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 697{ 698 int error; 699 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 700 req); 701 if (!error && req->newptr) 702 resettodr(); 703 return (error); 704} 705 706SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 707 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 708 709SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 710 CTLFLAG_RW, &disable_rtc_set, 0, ""); 711 712SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 713 CTLFLAG_RD, &bootinfo, bootinfo, ""); 714 715SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 716 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 717 718/* 719 * Initialize 386 and configure to run kernel 720 */ 721 722/* 723 * Initialize segments & interrupt table 724 */ 725 726int currentldt; 727int _default_ldt; 728union descriptor gdt[NGDT]; /* global descriptor table */ 729struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 730union descriptor ldt[NLDT]; /* local descriptor table */ 731 732static struct i386tss dblfault_tss; 733static char dblfault_stack[PAGE_SIZE]; 734 735extern struct user *proc0paddr; 736 737/* software prototypes -- in more palatable form */ 738struct soft_segment_descriptor gdt_segs[] = { 739/* GNULL_SEL 0 Null Descriptor */ 740{ 0x0, /* segment base address */ 741 0x0, /* length */ 742 0, /* segment type */ 743 0, /* segment descriptor priority level */ 744 0, /* segment descriptor present */ 745 0, 0, 746 0, /* default 32 vs 16 bit size */ 747 0 /* limit granularity (byte/page units)*/ }, 748/* GCODE_SEL 1 Code Descriptor for kernel */ 749{ 0x0, /* segment base address */ 750 0xfffff, /* length - all address space */ 751 SDT_MEMERA, /* segment type */ 752 0, /* segment descriptor priority level */ 753 1, /* segment descriptor present */ 754 0, 0, 755 1, /* default 32 vs 16 bit size */ 756 1 /* limit granularity (byte/page units)*/ }, 757/* GDATA_SEL 2 Data Descriptor for kernel */ 758{ 0x0, /* segment base address */ 759 0xfffff, /* length - all address space */ 760 SDT_MEMRWA, /* segment type */ 761 0, /* segment descriptor priority level */ 762 1, /* segment descriptor present */ 763 0, 0, 764 1, /* default 32 vs 16 bit size */ 765 1 /* limit granularity (byte/page units)*/ }, 766/* GLDT_SEL 3 LDT Descriptor */ 767{ (int) ldt, /* segment base address */ 768 sizeof(ldt)-1, /* length - all address space */ 769 SDT_SYSLDT, /* segment type */ 770 0, /* segment descriptor priority level */ 771 1, /* segment descriptor present */ 772 0, 0, 773 0, /* unused - default 32 vs 16 bit size */ 774 0 /* limit granularity (byte/page units)*/ }, 775/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 776{ 0x0, /* segment base address */ 777 0x0, /* length - all address space */ 778 0, /* segment type */ 779 0, /* segment descriptor priority level */ 780 0, /* segment descriptor present */ 781 0, 0, 782 0, /* default 32 vs 16 bit size */ 783 0 /* limit granularity (byte/page units)*/ }, 784/* GPANIC_SEL 5 Panic Tss Descriptor */ 785{ (int) &dblfault_tss, /* segment base address */ 786 sizeof(struct i386tss)-1,/* length - all address space */ 787 SDT_SYS386TSS, /* segment type */ 788 0, /* segment descriptor priority level */ 789 1, /* segment descriptor present */ 790 0, 0, 791 0, /* unused - default 32 vs 16 bit size */ 792 0 /* limit granularity (byte/page units)*/ }, 793/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 794{ (int) kstack, /* segment base address */ 795 sizeof(struct i386tss)-1,/* length - all address space */ 796 SDT_SYS386TSS, /* segment type */ 797 0, /* segment descriptor priority level */ 798 1, /* segment descriptor present */ 799 0, 0, 800 0, /* unused - default 32 vs 16 bit size */ 801 0 /* limit granularity (byte/page units)*/ }, 802/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 803{ (int) ldt, /* segment base address */ 804 (512 * sizeof(union descriptor)-1), /* length */ 805 SDT_SYSLDT, /* segment type */ 806 0, /* segment descriptor priority level */ 807 1, /* segment descriptor present */ 808 0, 0, 809 0, /* unused - default 32 vs 16 bit size */ 810 0 /* limit granularity (byte/page units)*/ }, 811/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 812{ 0, /* segment base address (overwritten by APM) */ 813 0xfffff, /* length */ 814 SDT_MEMERA, /* segment type */ 815 0, /* segment descriptor priority level */ 816 1, /* segment descriptor present */ 817 0, 0, 818 1, /* default 32 vs 16 bit size */ 819 1 /* limit granularity (byte/page units)*/ }, 820/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 821{ 0, /* segment base address (overwritten by APM) */ 822 0xfffff, /* length */ 823 SDT_MEMERA, /* segment type */ 824 0, /* segment descriptor priority level */ 825 1, /* segment descriptor present */ 826 0, 0, 827 0, /* default 32 vs 16 bit size */ 828 1 /* limit granularity (byte/page units)*/ }, 829/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 830{ 0, /* segment base address (overwritten by APM) */ 831 0xfffff, /* length */ 832 SDT_MEMRWA, /* segment type */ 833 0, /* segment descriptor priority level */ 834 1, /* segment descriptor present */ 835 0, 0, 836 1, /* default 32 vs 16 bit size */ 837 1 /* limit granularity (byte/page units)*/ }, 838}; 839 840static struct soft_segment_descriptor ldt_segs[] = { 841 /* Null Descriptor - overwritten by call gate */ 842{ 0x0, /* segment base address */ 843 0x0, /* length - all address space */ 844 0, /* segment type */ 845 0, /* segment descriptor priority level */ 846 0, /* segment descriptor present */ 847 0, 0, 848 0, /* default 32 vs 16 bit size */ 849 0 /* limit granularity (byte/page units)*/ }, 850 /* Null Descriptor - overwritten by call gate */ 851{ 0x0, /* segment base address */ 852 0x0, /* length - all address space */ 853 0, /* segment type */ 854 0, /* segment descriptor priority level */ 855 0, /* segment descriptor present */ 856 0, 0, 857 0, /* default 32 vs 16 bit size */ 858 0 /* limit granularity (byte/page units)*/ }, 859 /* Null Descriptor - overwritten by call gate */ 860{ 0x0, /* segment base address */ 861 0x0, /* length - all address space */ 862 0, /* segment type */ 863 0, /* segment descriptor priority level */ 864 0, /* segment descriptor present */ 865 0, 0, 866 0, /* default 32 vs 16 bit size */ 867 0 /* limit granularity (byte/page units)*/ }, 868 /* Code Descriptor for user */ 869{ 0x0, /* segment base address */ 870 0xfffff, /* length - all address space */ 871 SDT_MEMERA, /* segment type */ 872 SEL_UPL, /* segment descriptor priority level */ 873 1, /* segment descriptor present */ 874 0, 0, 875 1, /* default 32 vs 16 bit size */ 876 1 /* limit granularity (byte/page units)*/ }, 877 /* Data Descriptor for user */ 878{ 0x0, /* segment base address */ 879 0xfffff, /* length - all address space */ 880 SDT_MEMRWA, /* segment type */ 881 SEL_UPL, /* segment descriptor priority level */ 882 1, /* segment descriptor present */ 883 0, 0, 884 1, /* default 32 vs 16 bit size */ 885 1 /* limit granularity (byte/page units)*/ }, 886}; 887 888void 889setidt(idx, func, typ, dpl, selec) 890 int idx; 891 inthand_t *func; 892 int typ; 893 int dpl; 894 int selec; 895{ 896 struct gate_descriptor *ip = idt + idx; 897 898 ip->gd_looffset = (int)func; 899 ip->gd_selector = selec; 900 ip->gd_stkcpy = 0; 901 ip->gd_xx = 0; 902 ip->gd_type = typ; 903 ip->gd_dpl = dpl; 904 ip->gd_p = 1; 905 ip->gd_hioffset = ((int)func)>>16 ; 906} 907 908#define IDTVEC(name) __CONCAT(X,name) 909 910extern inthand_t 911 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 912 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 913 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 914 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 915 IDTVEC(syscall), IDTVEC(int0x80_syscall); 916 917void 918sdtossd(sd, ssd) 919 struct segment_descriptor *sd; 920 struct soft_segment_descriptor *ssd; 921{ 922 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 923 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 924 ssd->ssd_type = sd->sd_type; 925 ssd->ssd_dpl = sd->sd_dpl; 926 ssd->ssd_p = sd->sd_p; 927 ssd->ssd_def32 = sd->sd_def32; 928 ssd->ssd_gran = sd->sd_gran; 929} 930 931void 932init386(first) 933 int first; 934{ 935 int x; 936 unsigned biosbasemem, biosextmem; 937 struct gate_descriptor *gdp; 938 int gsel_tss; 939 struct isa_device *idp; 940 /* table descriptors - used to load tables by microp */ 941 struct region_descriptor r_gdt, r_idt; 942 int pagesinbase, pagesinext; 943 int target_page, pa_indx; 944 int off; 945 946 proc0.p_addr = proc0paddr; 947 948 atdevbase = ISA_HOLE_START + KERNBASE; 949 950 /* 951 * Initialize the console before we print anything out. 952 */ 953 cninit(); 954 955 /* 956 * make gdt memory segments, the code segment goes up to end of the 957 * page with etext in it, the data segment goes to the end of 958 * the address space 959 */ 960 /* 961 * XXX text protection is temporarily (?) disabled. The limit was 962 * i386_btop(round_page(etext)) - 1. 963 */ 964 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 965 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 966 for (x = 0; x < NGDT; x++) 967 ssdtosd(&gdt_segs[x], &gdt[x].sd); 968 969 /* make ldt memory segments */ 970 /* 971 * The data segment limit must not cover the user area because we 972 * don't want the user area to be writable in copyout() etc. (page 973 * level protection is lost in kernel mode on 386's). Also, we 974 * don't want the user area to be writable directly (page level 975 * protection of the user area is not available on 486's with 976 * CR0_WP set, because there is no user-read/kernel-write mode). 977 * 978 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 979 * should be spelled ...MAX_USER... 980 */ 981#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 982 /* 983 * The code segment limit has to cover the user area until we move 984 * the signal trampoline out of the user area. This is safe because 985 * the code segment cannot be written to directly. 986 */ 987#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 988 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 989 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 990 /* Note. eventually want private ldts per process */ 991 for (x = 0; x < NLDT; x++) 992 ssdtosd(&ldt_segs[x], &ldt[x].sd); 993 994 /* exceptions */ 995 for (x = 0; x < NIDT; x++) 996 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 997 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 998 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 999 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1000 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1001 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1002 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1003 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1004 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1005 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1006 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1007 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1008 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1009 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1010 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1011 setidt(14, &IDTVEC(page), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1012 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1013 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1014 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1015 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1016 setidt(0x80, &IDTVEC(int0x80_syscall), 1017 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1018 1019#include "isa.h" 1020#if NISA >0 1021 isa_defaultirq(); 1022#endif 1023 rand_initialize(); 1024 1025 r_gdt.rd_limit = sizeof(gdt) - 1; 1026 r_gdt.rd_base = (int) gdt; 1027 lgdt(&r_gdt); 1028 1029 r_idt.rd_limit = sizeof(idt) - 1; 1030 r_idt.rd_base = (int) idt; 1031 lidt(&r_idt); 1032 1033 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1034 lldt(_default_ldt); 1035 currentldt = _default_ldt; 1036 1037#ifdef DDB 1038 kdb_init(); 1039 if (boothowto & RB_KDB) 1040 Debugger("Boot flags requested debugger"); 1041#endif 1042 1043 /* Use BIOS values stored in RTC CMOS RAM, since probing 1044 * breaks certain 386 AT relics. 1045 */ 1046 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1047 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1048 1049 /* 1050 * If BIOS tells us that it has more than 640k in the basemem, 1051 * don't believe it - set it to 640k. 1052 */ 1053 if (biosbasemem > 640) { 1054 printf("Preposterous RTC basemem of %dK, truncating to 640K\n", 1055 biosbasemem); 1056 biosbasemem = 640; 1057 } 1058 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1059 printf("Preposterous BIOS basemem of %dK, truncating to 640K\n", 1060 bootinfo.bi_basemem); 1061 bootinfo.bi_basemem = 640; 1062 } 1063 1064 /* 1065 * Warn if the official BIOS interface disagrees with the RTC 1066 * interface used above about the amount of base memory or the 1067 * amount of extended memory. Prefer the BIOS value for the base 1068 * memory. This is necessary for machines that `steal' base 1069 * memory for use as BIOS memory, at least if we are going to use 1070 * the BIOS for apm. Prefer the RTC value for extended memory. 1071 * Eventually the hackish interface shouldn't even be looked at. 1072 */ 1073 if (bootinfo.bi_memsizes_valid) { 1074 if (bootinfo.bi_basemem != biosbasemem) { 1075 vm_offset_t pa; 1076 1077 printf( 1078 "BIOS basemem (%ldK) != RTC basemem (%dK), setting to BIOS value\n", 1079 bootinfo.bi_basemem, biosbasemem); 1080 biosbasemem = bootinfo.bi_basemem; 1081 1082 /* 1083 * XXX if biosbasemem is now < 640, there is `hole' 1084 * between the end of base memory and the start of 1085 * ISA memory. The hole may be empty or it may 1086 * contain BIOS code or data. Map it read/write so 1087 * that the BIOS can write to it. (Memory from 0 to 1088 * the physical end of the kernel is mapped read-only 1089 * to begin with and then parts of it are remapped. 1090 * The parts that aren't remapped form holes that 1091 * remain read-only and are unused by the kernel. 1092 * The base memory area is below the physical end of 1093 * the kernel and right now forms a read-only hole. 1094 * The part of it from 0 to 1095 * (trunc_page(biosbasemem * 1024) - 1) will be 1096 * remapped and used by the kernel later.) 1097 * 1098 * This code is similar to the code used in 1099 * pmap_mapdev, but since no memory needs to be 1100 * allocated we simply change the mapping. 1101 */ 1102 for (pa = trunc_page(biosbasemem * 1024); 1103 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1104 unsigned *pte; 1105 1106 pte = (unsigned *)vtopte(pa + KERNBASE); 1107 *pte = pa | PG_RW | PG_V; 1108 } 1109 } 1110 if (bootinfo.bi_extmem != biosextmem) 1111 printf("BIOS extmem (%ldK) != RTC extmem (%dK)\n", 1112 bootinfo.bi_extmem, biosextmem); 1113 } 1114 1115 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1116 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1117 1118 /* 1119 * Special hack for chipsets that still remap the 384k hole when 1120 * there's 16MB of memory - this really confuses people that 1121 * are trying to use bus mastering ISA controllers with the 1122 * "16MB limit"; they only have 16MB, but the remapping puts 1123 * them beyond the limit. 1124 */ 1125 /* 1126 * If extended memory is between 15-16MB (16-17MB phys address range), 1127 * chop it to 15MB. 1128 */ 1129 if ((pagesinext > 3840) && (pagesinext < 4096)) 1130 pagesinext = 3840; 1131 1132 /* 1133 * Maxmem isn't the "maximum memory", it's one larger than the 1134 * highest page of the physical address space. It should be 1135 * called something like "Maxphyspage". 1136 */ 1137 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1138 1139#ifdef MAXMEM 1140 Maxmem = MAXMEM/4; 1141#endif 1142 1143 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1144 if (idp != NULL && idp->id_msize != 0) 1145 Maxmem = idp->id_msize / 4; 1146 1147 /* call pmap initialization to make new kernel address space */ 1148 pmap_bootstrap (first, 0); 1149 1150 /* 1151 * Size up each available chunk of physical memory. 1152 */ 1153 1154 /* 1155 * We currently don't bother testing base memory. 1156 * XXX ...but we probably should. 1157 */ 1158 pa_indx = 0; 1159 badpages = 0; 1160 if (pagesinbase > 1) { 1161 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1162 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1163 physmem = pagesinbase - 1; 1164 } else { 1165 /* point at first chunk end */ 1166 pa_indx++; 1167 } 1168 1169 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1170 int tmp, page_bad = FALSE; 1171 1172 /* 1173 * map page into kernel: valid, read/write, non-cacheable 1174 */ 1175 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1176 invltlb(); 1177 1178 tmp = *(int *)CADDR1; 1179 /* 1180 * Test for alternating 1's and 0's 1181 */ 1182 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1183 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1184 page_bad = TRUE; 1185 } 1186 /* 1187 * Test for alternating 0's and 1's 1188 */ 1189 *(volatile int *)CADDR1 = 0x55555555; 1190 if (*(volatile int *)CADDR1 != 0x55555555) { 1191 page_bad = TRUE; 1192 } 1193 /* 1194 * Test for all 1's 1195 */ 1196 *(volatile int *)CADDR1 = 0xffffffff; 1197 if (*(volatile int *)CADDR1 != 0xffffffff) { 1198 page_bad = TRUE; 1199 } 1200 /* 1201 * Test for all 0's 1202 */ 1203 *(volatile int *)CADDR1 = 0x0; 1204 if (*(volatile int *)CADDR1 != 0x0) { 1205 /* 1206 * test of page failed 1207 */ 1208 page_bad = TRUE; 1209 } 1210 /* 1211 * Restore original value. 1212 */ 1213 *(int *)CADDR1 = tmp; 1214 1215 /* 1216 * Adjust array of valid/good pages. 1217 */ 1218 if (page_bad == FALSE) { 1219 /* 1220 * If this good page is a continuation of the 1221 * previous set of good pages, then just increase 1222 * the end pointer. Otherwise start a new chunk. 1223 * Note that "end" points one higher than end, 1224 * making the range >= start and < end. 1225 */ 1226 if (phys_avail[pa_indx] == target_page) { 1227 phys_avail[pa_indx] += PAGE_SIZE; 1228 } else { 1229 pa_indx++; 1230 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1231 printf("Too many holes in the physical address space, giving up\n"); 1232 pa_indx--; 1233 break; 1234 } 1235 phys_avail[pa_indx++] = target_page; /* start */ 1236 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1237 } 1238 physmem++; 1239 } else { 1240 badpages++; 1241 page_bad = FALSE; 1242 } 1243 } 1244 1245 *(int *)CMAP1 = 0; 1246 invltlb(); 1247 1248 /* 1249 * XXX 1250 * The last chunk must contain at least one page plus the message 1251 * buffer to avoid complicating other code (message buffer address 1252 * calculation, etc.). 1253 */ 1254 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1255 round_page(sizeof(struct msgbuf)) >= phys_avail[pa_indx]) { 1256 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1257 phys_avail[pa_indx--] = 0; 1258 phys_avail[pa_indx--] = 0; 1259 } 1260 1261 Maxmem = atop(phys_avail[pa_indx]); 1262 1263 /* Trim off space for the message buffer. */ 1264 phys_avail[pa_indx] -= round_page(sizeof(struct msgbuf)); 1265 1266 avail_end = phys_avail[pa_indx]; 1267 1268 /* now running on new page tables, configured,and u/iom is accessible */ 1269 1270 /* Map the message buffer. */ 1271 for (off = 0; off < round_page(sizeof(struct msgbuf)); off += PAGE_SIZE) 1272 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1273 avail_end + off, VM_PROT_ALL, TRUE); 1274 msgbufmapped = 1; 1275 1276 /* make a initial tss so microp can get interrupt stack on syscall! */ 1277 proc0.p_addr->u_pcb.pcb_tss.tss_esp0 = (int) kstack + UPAGES*PAGE_SIZE; 1278 proc0.p_addr->u_pcb.pcb_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1279 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1280 1281 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1282 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1283 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1284 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1285 dblfault_tss.tss_cr3 = IdlePTD; 1286 dblfault_tss.tss_eip = (int) dblfault_handler; 1287 dblfault_tss.tss_eflags = PSL_KERNEL; 1288 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = dblfault_tss.tss_gs = 1289 GSEL(GDATA_SEL, SEL_KPL); 1290 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1291 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1292 1293 ((struct i386tss *)gdt_segs[GPROC0_SEL].ssd_base)->tss_ioopt = 1294 (sizeof(struct i386tss))<<16; 1295 1296 ltr(gsel_tss); 1297 1298 /* make a call gate to reenter kernel with */ 1299 gdp = &ldt[LSYS5CALLS_SEL].gd; 1300 1301 x = (int) &IDTVEC(syscall); 1302 gdp->gd_looffset = x++; 1303 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1304 gdp->gd_stkcpy = 1; 1305 gdp->gd_type = SDT_SYS386CGT; 1306 gdp->gd_dpl = SEL_UPL; 1307 gdp->gd_p = 1; 1308 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1309 1310 /* XXX does this work? */ 1311 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1312 1313 /* transfer to user mode */ 1314 1315 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1316 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1317 1318 /* setup proc 0's pcb */ 1319 proc0.p_addr->u_pcb.pcb_flags = 0; 1320 proc0.p_addr->u_pcb.pcb_cr3 = IdlePTD; 1321} 1322 1323/* 1324 * The registers are in the frame; the frame is in the user area of 1325 * the process in question; when the process is active, the registers 1326 * are in "the kernel stack"; when it's not, they're still there, but 1327 * things get flipped around. So, since p->p_md.md_regs is the whole address 1328 * of the register set, take its offset from the kernel stack, and 1329 * index into the user block. Don't you just *love* virtual memory? 1330 * (I'm starting to think seymour is right...) 1331 */ 1332#define TF_REGP(p) ((struct trapframe *) \ 1333 ((char *)(p)->p_addr \ 1334 + ((char *)(p)->p_md.md_regs - kstack))) 1335 1336int 1337ptrace_set_pc(p, addr) 1338 struct proc *p; 1339 unsigned int addr; 1340{ 1341 TF_REGP(p)->tf_eip = addr; 1342 return (0); 1343} 1344 1345int 1346ptrace_single_step(p) 1347 struct proc *p; 1348{ 1349 TF_REGP(p)->tf_eflags |= PSL_T; 1350 return (0); 1351} 1352 1353int ptrace_write_u(p, off, data) 1354 struct proc *p; 1355 vm_offset_t off; 1356 int data; 1357{ 1358 struct trapframe frame_copy; 1359 vm_offset_t min; 1360 struct trapframe *tp; 1361 1362 /* 1363 * Privileged kernel state is scattered all over the user area. 1364 * Only allow write access to parts of regs and to fpregs. 1365 */ 1366 min = (char *)p->p_md.md_regs - kstack; 1367 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1368 tp = TF_REGP(p); 1369 frame_copy = *tp; 1370 *(int *)((char *)&frame_copy + (off - min)) = data; 1371 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1372 !CS_SECURE(frame_copy.tf_cs)) 1373 return (EINVAL); 1374 *(int*)((char *)p->p_addr + off) = data; 1375 return (0); 1376 } 1377 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1378 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1379 *(int*)((char *)p->p_addr + off) = data; 1380 return (0); 1381 } 1382 return (EFAULT); 1383} 1384 1385int 1386fill_regs(p, regs) 1387 struct proc *p; 1388 struct reg *regs; 1389{ 1390 struct trapframe *tp; 1391 1392 tp = TF_REGP(p); 1393 regs->r_es = tp->tf_es; 1394 regs->r_ds = tp->tf_ds; 1395 regs->r_edi = tp->tf_edi; 1396 regs->r_esi = tp->tf_esi; 1397 regs->r_ebp = tp->tf_ebp; 1398 regs->r_ebx = tp->tf_ebx; 1399 regs->r_edx = tp->tf_edx; 1400 regs->r_ecx = tp->tf_ecx; 1401 regs->r_eax = tp->tf_eax; 1402 regs->r_eip = tp->tf_eip; 1403 regs->r_cs = tp->tf_cs; 1404 regs->r_eflags = tp->tf_eflags; 1405 regs->r_esp = tp->tf_esp; 1406 regs->r_ss = tp->tf_ss; 1407 return (0); 1408} 1409 1410int 1411set_regs(p, regs) 1412 struct proc *p; 1413 struct reg *regs; 1414{ 1415 struct trapframe *tp; 1416 1417 tp = TF_REGP(p); 1418 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1419 !CS_SECURE(regs->r_cs)) 1420 return (EINVAL); 1421 tp->tf_es = regs->r_es; 1422 tp->tf_ds = regs->r_ds; 1423 tp->tf_edi = regs->r_edi; 1424 tp->tf_esi = regs->r_esi; 1425 tp->tf_ebp = regs->r_ebp; 1426 tp->tf_ebx = regs->r_ebx; 1427 tp->tf_edx = regs->r_edx; 1428 tp->tf_ecx = regs->r_ecx; 1429 tp->tf_eax = regs->r_eax; 1430 tp->tf_eip = regs->r_eip; 1431 tp->tf_cs = regs->r_cs; 1432 tp->tf_eflags = regs->r_eflags; 1433 tp->tf_esp = regs->r_esp; 1434 tp->tf_ss = regs->r_ss; 1435 return (0); 1436} 1437 1438#ifndef DDB 1439void 1440Debugger(const char *msg) 1441{ 1442 printf("Debugger(\"%s\") called.\n", msg); 1443} 1444#endif /* no DDB */ 1445 1446#include <sys/disklabel.h> 1447 1448/* 1449 * Determine the size of the transfer, and make sure it is 1450 * within the boundaries of the partition. Adjust transfer 1451 * if needed, and signal errors or early completion. 1452 */ 1453int 1454bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1455{ 1456 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1457 int labelsect = lp->d_partitions[0].p_offset; 1458 int maxsz = p->p_size, 1459 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1460 1461 /* overwriting disk label ? */ 1462 /* XXX should also protect bootstrap in first 8K */ 1463 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1464#if LABELSECTOR != 0 1465 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1466#endif 1467 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1468 bp->b_error = EROFS; 1469 goto bad; 1470 } 1471 1472#if defined(DOSBBSECTOR) && defined(notyet) 1473 /* overwriting master boot record? */ 1474 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1475 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1476 bp->b_error = EROFS; 1477 goto bad; 1478 } 1479#endif 1480 1481 /* beyond partition? */ 1482 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1483 /* if exactly at end of disk, return an EOF */ 1484 if (bp->b_blkno == maxsz) { 1485 bp->b_resid = bp->b_bcount; 1486 return(0); 1487 } 1488 /* or truncate if part of it fits */ 1489 sz = maxsz - bp->b_blkno; 1490 if (sz <= 0) { 1491 bp->b_error = EINVAL; 1492 goto bad; 1493 } 1494 bp->b_bcount = sz << DEV_BSHIFT; 1495 } 1496 1497 bp->b_pblkno = bp->b_blkno + p->p_offset; 1498 return(1); 1499 1500bad: 1501 bp->b_flags |= B_ERROR; 1502 return(-1); 1503} 1504