machdep.c revision 20998
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.222 1996/12/18 15:03:10 bde Exp $ 39 */ 40 41#include "npx.h" 42#include "opt_sysvipc.h" 43#include "opt_ddb.h" 44#include "opt_bounce.h" 45#include "opt_machdep.h" 46#include "opt_perfmon.h" 47#include "opt_userconfig.h" 48 49#include <sys/param.h> 50#include <sys/systm.h> 51#include <sys/sysproto.h> 52#include <sys/signalvar.h> 53#include <sys/kernel.h> 54#include <sys/proc.h> 55#include <sys/buf.h> 56#include <sys/reboot.h> 57#include <sys/conf.h> 58#include <sys/file.h> 59#include <sys/callout.h> 60#include <sys/malloc.h> 61#include <sys/mbuf.h> 62#include <sys/mount.h> 63#include <sys/msgbuf.h> 64#include <sys/ioctl.h> 65#include <sys/sysent.h> 66#include <sys/tty.h> 67#include <sys/sysctl.h> 68#include <sys/vmmeter.h> 69 70#ifdef SYSVSHM 71#include <sys/shm.h> 72#endif 73 74#ifdef SYSVMSG 75#include <sys/msg.h> 76#endif 77 78#ifdef SYSVSEM 79#include <sys/sem.h> 80#endif 81 82#include <vm/vm.h> 83#include <vm/vm_param.h> 84#include <vm/vm_prot.h> 85#include <vm/lock.h> 86#include <vm/vm_kern.h> 87#include <vm/vm_object.h> 88#include <vm/vm_page.h> 89#include <vm/vm_map.h> 90#include <vm/vm_pager.h> 91#include <vm/vm_extern.h> 92 93#include <sys/user.h> 94#include <sys/exec.h> 95#include <sys/vnode.h> 96 97#include <ddb/ddb.h> 98 99#include <net/netisr.h> 100 101#include <machine/cpu.h> 102#include <machine/npx.h> 103#include <machine/reg.h> 104#include <machine/psl.h> 105#include <machine/clock.h> 106#include <machine/specialreg.h> 107#include <machine/sysarch.h> 108#include <machine/cons.h> 109#include <machine/bootinfo.h> 110#include <machine/md_var.h> 111#ifdef PERFMON 112#include <machine/perfmon.h> 113#endif 114 115#include <i386/isa/isa_device.h> 116#include <i386/isa/rtc.h> 117#include <machine/random.h> 118 119extern void init386 __P((int first)); 120extern int ptrace_set_pc __P((struct proc *p, unsigned int addr)); 121extern int ptrace_single_step __P((struct proc *p)); 122extern int ptrace_write_u __P((struct proc *p, vm_offset_t off, int data)); 123extern void dblfault_handler __P((void)); 124 125extern void identifycpu(void); /* XXX header file */ 126extern void earlysetcpuclass(void); /* same header file */ 127 128static void cpu_startup __P((void *)); 129SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 130 131 132#ifdef BOUNCE_BUFFERS 133extern char *bouncememory; 134extern int maxbkva; 135#ifdef BOUNCEPAGES 136int bouncepages = BOUNCEPAGES; 137#else 138int bouncepages = 0; 139#endif 140#endif /* BOUNCE_BUFFERS */ 141 142extern int freebufspace; 143int msgbufmapped = 0; /* set when safe to use msgbuf */ 144int _udatasel, _ucodesel; 145u_int atdevbase; 146 147 148int physmem = 0; 149int cold = 1; 150 151static int 152sysctl_hw_physmem SYSCTL_HANDLER_ARGS 153{ 154 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 155 return (error); 156} 157 158SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 159 0, 0, sysctl_hw_physmem, "I", ""); 160 161static int 162sysctl_hw_usermem SYSCTL_HANDLER_ARGS 163{ 164 int error = sysctl_handle_int(oidp, 0, 165 ctob(physmem - cnt.v_wire_count), req); 166 return (error); 167} 168 169SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 170 0, 0, sysctl_hw_usermem, "I", ""); 171 172int boothowto = 0, bootverbose = 0, Maxmem = 0; 173static int badpages = 0; 174long dumplo; 175extern int bootdev; 176 177vm_offset_t phys_avail[10]; 178 179/* must be 2 less so 0 0 can signal end of chunks */ 180#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 181 182static void setup_netisrs __P((struct linker_set *)); /* XXX declare elsewhere */ 183 184static vm_offset_t buffer_sva, buffer_eva; 185vm_offset_t clean_sva, clean_eva; 186static vm_offset_t pager_sva, pager_eva; 187extern struct linker_set netisr_set; 188 189#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 190 191static void 192cpu_startup(dummy) 193 void *dummy; 194{ 195 register unsigned i; 196 register caddr_t v; 197 vm_offset_t maxaddr; 198 vm_size_t size = 0; 199 int firstaddr; 200 vm_offset_t minaddr; 201 202 if (boothowto & RB_VERBOSE) 203 bootverbose++; 204 205 /* 206 * Good {morning,afternoon,evening,night}. 207 */ 208 printf(version); 209 earlysetcpuclass(); 210 startrtclock(); 211 identifycpu(); 212#ifdef PERFMON 213 perfmon_init(); 214#endif 215 printf("real memory = %d (%dK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 216 /* 217 * Display any holes after the first chunk of extended memory. 218 */ 219 if (badpages != 0) { 220 int indx = 1; 221 222 /* 223 * XXX skip reporting ISA hole & unmanaged kernel memory 224 */ 225 if (phys_avail[0] == PAGE_SIZE) 226 indx += 2; 227 228 printf("Physical memory hole(s):\n"); 229 for (; phys_avail[indx + 1] != 0; indx += 2) { 230 int size = phys_avail[indx + 1] - phys_avail[indx]; 231 232 printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx], 233 phys_avail[indx + 1] - 1, size, size / PAGE_SIZE); 234 } 235 } 236 237 /* 238 * Quickly wire in netisrs. 239 */ 240 setup_netisrs(&netisr_set); 241 242 /* 243 * Allocate space for system data structures. 244 * The first available kernel virtual address is in "v". 245 * As pages of kernel virtual memory are allocated, "v" is incremented. 246 * As pages of memory are allocated and cleared, 247 * "firstaddr" is incremented. 248 * An index into the kernel page table corresponding to the 249 * virtual memory address maintained in "v" is kept in "mapaddr". 250 */ 251 252 /* 253 * Make two passes. The first pass calculates how much memory is 254 * needed and allocates it. The second pass assigns virtual 255 * addresses to the various data structures. 256 */ 257 firstaddr = 0; 258again: 259 v = (caddr_t)firstaddr; 260 261#define valloc(name, type, num) \ 262 (name) = (type *)v; v = (caddr_t)((name)+(num)) 263#define valloclim(name, type, num, lim) \ 264 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 265 valloc(callout, struct callout, ncallout); 266#ifdef SYSVSHM 267 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 268#endif 269#ifdef SYSVSEM 270 valloc(sema, struct semid_ds, seminfo.semmni); 271 valloc(sem, struct sem, seminfo.semmns); 272 /* This is pretty disgusting! */ 273 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 274#endif 275#ifdef SYSVMSG 276 valloc(msgpool, char, msginfo.msgmax); 277 valloc(msgmaps, struct msgmap, msginfo.msgseg); 278 valloc(msghdrs, struct msg, msginfo.msgtql); 279 valloc(msqids, struct msqid_ds, msginfo.msgmni); 280#endif 281 282 if (nbuf == 0) { 283 nbuf = 30; 284 if( physmem > 1024) 285 nbuf += min((physmem - 1024) / 8, 2048); 286 } 287 nswbuf = max(min(nbuf/4, 128), 16); 288 289 valloc(swbuf, struct buf, nswbuf); 290 valloc(buf, struct buf, nbuf); 291 292#ifdef BOUNCE_BUFFERS 293 /* 294 * If there is more than 16MB of memory, allocate some bounce buffers 295 */ 296 if (Maxmem > 4096) { 297 if (bouncepages == 0) { 298 bouncepages = 64; 299 bouncepages += ((Maxmem - 4096) / 2048) * 32; 300 } 301 v = (caddr_t)((vm_offset_t)round_page(v)); 302 valloc(bouncememory, char, bouncepages * PAGE_SIZE); 303 } 304#endif 305 306 /* 307 * End of first pass, size has been calculated so allocate memory 308 */ 309 if (firstaddr == 0) { 310 size = (vm_size_t)(v - firstaddr); 311 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 312 if (firstaddr == 0) 313 panic("startup: no room for tables"); 314 goto again; 315 } 316 317 /* 318 * End of second pass, addresses have been assigned 319 */ 320 if ((vm_size_t)(v - firstaddr) != size) 321 panic("startup: table size inconsistency"); 322 323#ifdef BOUNCE_BUFFERS 324 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 325 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + 326 maxbkva + pager_map_size, TRUE); 327 io_map = kmem_suballoc(clean_map, &minaddr, &maxaddr, maxbkva, FALSE); 328#else 329 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 330 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size, TRUE); 331#endif 332 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 333 (nbuf*BKVASIZE), TRUE); 334 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 335 (nswbuf*MAXPHYS) + pager_map_size, TRUE); 336 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 337 (16*ARG_MAX), TRUE); 338 exech_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 339 (16*PAGE_SIZE), TRUE); 340 u_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 341 (maxproc*UPAGES*PAGE_SIZE), FALSE); 342 343 /* 344 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 345 * we use the more space efficient malloc in place of kmem_alloc. 346 */ 347 mclrefcnt = (char *)malloc(nmbclusters+PAGE_SIZE/MCLBYTES, 348 M_MBUF, M_NOWAIT); 349 bzero(mclrefcnt, nmbclusters+PAGE_SIZE/MCLBYTES); 350 mcl_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 351 nmbclusters * MCLBYTES, FALSE); 352 { 353 vm_size_t mb_map_size; 354 mb_map_size = nmbufs * MSIZE; 355 mb_map = kmem_suballoc(kmem_map, &minaddr, &maxaddr, 356 round_page(mb_map_size), FALSE); 357 } 358 359 /* 360 * Initialize callouts 361 */ 362 callfree = callout; 363 for (i = 1; i < ncallout; i++) 364 callout[i-1].c_next = &callout[i]; 365 366#if defined(USERCONFIG) 367#if defined(USERCONFIG_BOOT) 368 if (1) { 369#else 370 if (boothowto & RB_CONFIG) { 371#endif 372 userconfig(); 373 cninit(); /* the preferred console may have changed */ 374 } 375#endif 376 377#ifdef BOUNCE_BUFFERS 378 /* 379 * init bounce buffers 380 */ 381 vm_bounce_init(); 382#endif 383 384 printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count), 385 ptoa(cnt.v_free_count) / 1024); 386 387 /* 388 * Set up buffers, so they can be used to read disk labels. 389 */ 390 bufinit(); 391 vm_pager_bufferinit(); 392} 393 394int 395register_netisr(num, handler) 396 int num; 397 netisr_t *handler; 398{ 399 400 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 401 printf("register_netisr: bad isr number: %d\n", num); 402 return (EINVAL); 403 } 404 netisrs[num] = handler; 405 return (0); 406} 407 408static void 409setup_netisrs(ls) 410 struct linker_set *ls; 411{ 412 int i; 413 const struct netisrtab *nit; 414 415 for(i = 0; ls->ls_items[i]; i++) { 416 nit = (const struct netisrtab *)ls->ls_items[i]; 417 register_netisr(nit->nit_num, nit->nit_isr); 418 } 419} 420 421/* 422 * Send an interrupt to process. 423 * 424 * Stack is set up to allow sigcode stored 425 * at top to call routine, followed by kcall 426 * to sigreturn routine below. After sigreturn 427 * resets the signal mask, the stack, and the 428 * frame pointer, it returns to the user 429 * specified pc, psl. 430 */ 431void 432sendsig(catcher, sig, mask, code) 433 sig_t catcher; 434 int sig, mask; 435 u_long code; 436{ 437 register struct proc *p = curproc; 438 register int *regs; 439 register struct sigframe *fp; 440 struct sigframe sf; 441 struct sigacts *psp = p->p_sigacts; 442 int oonstack; 443 444 regs = p->p_md.md_regs; 445 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 446 /* 447 * Allocate and validate space for the signal handler context. 448 */ 449 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 450 (psp->ps_sigonstack & sigmask(sig))) { 451 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 452 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 453 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 454 } else { 455 fp = (struct sigframe *)regs[tESP] - 1; 456 } 457 458 /* 459 * grow() will return FALSE if the fp will not fit inside the stack 460 * and the stack can not be grown. useracc will return FALSE 461 * if access is denied. 462 */ 463 if ((grow(p, (int)fp) == FALSE) || 464 (useracc((caddr_t)fp, sizeof (struct sigframe), B_WRITE) == FALSE)) { 465 /* 466 * Process has trashed its stack; give it an illegal 467 * instruction to halt it in its tracks. 468 */ 469 SIGACTION(p, SIGILL) = SIG_DFL; 470 sig = sigmask(SIGILL); 471 p->p_sigignore &= ~sig; 472 p->p_sigcatch &= ~sig; 473 p->p_sigmask &= ~sig; 474 psignal(p, SIGILL); 475 return; 476 } 477 478 /* 479 * Build the argument list for the signal handler. 480 */ 481 if (p->p_sysent->sv_sigtbl) { 482 if (sig < p->p_sysent->sv_sigsize) 483 sig = p->p_sysent->sv_sigtbl[sig]; 484 else 485 sig = p->p_sysent->sv_sigsize + 1; 486 } 487 sf.sf_signum = sig; 488 sf.sf_code = code; 489 sf.sf_scp = &fp->sf_sc; 490 sf.sf_addr = (char *) regs[tERR]; 491 sf.sf_handler = catcher; 492 493 /* save scratch registers */ 494 sf.sf_sc.sc_eax = regs[tEAX]; 495 sf.sf_sc.sc_ebx = regs[tEBX]; 496 sf.sf_sc.sc_ecx = regs[tECX]; 497 sf.sf_sc.sc_edx = regs[tEDX]; 498 sf.sf_sc.sc_esi = regs[tESI]; 499 sf.sf_sc.sc_edi = regs[tEDI]; 500 sf.sf_sc.sc_cs = regs[tCS]; 501 sf.sf_sc.sc_ds = regs[tDS]; 502 sf.sf_sc.sc_ss = regs[tSS]; 503 sf.sf_sc.sc_es = regs[tES]; 504 sf.sf_sc.sc_isp = regs[tISP]; 505 506 /* 507 * Build the signal context to be used by sigreturn. 508 */ 509 sf.sf_sc.sc_onstack = oonstack; 510 sf.sf_sc.sc_mask = mask; 511 sf.sf_sc.sc_sp = regs[tESP]; 512 sf.sf_sc.sc_fp = regs[tEBP]; 513 sf.sf_sc.sc_pc = regs[tEIP]; 514 sf.sf_sc.sc_ps = regs[tEFLAGS]; 515 516 /* 517 * Copy the sigframe out to the user's stack. 518 */ 519 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 520 /* 521 * Something is wrong with the stack pointer. 522 * ...Kill the process. 523 */ 524 sigexit(p, SIGILL); 525 }; 526 527 regs[tESP] = (int)fp; 528 regs[tEIP] = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode)); 529 regs[tEFLAGS] &= ~PSL_VM; 530 regs[tCS] = _ucodesel; 531 regs[tDS] = _udatasel; 532 regs[tES] = _udatasel; 533 regs[tSS] = _udatasel; 534} 535 536/* 537 * System call to cleanup state after a signal 538 * has been taken. Reset signal mask and 539 * stack state from context left by sendsig (above). 540 * Return to previous pc and psl as specified by 541 * context left by sendsig. Check carefully to 542 * make sure that the user has not modified the 543 * state to gain improper privileges. 544 */ 545int 546sigreturn(p, uap, retval) 547 struct proc *p; 548 struct sigreturn_args /* { 549 struct sigcontext *sigcntxp; 550 } */ *uap; 551 int *retval; 552{ 553 register struct sigcontext *scp; 554 register struct sigframe *fp; 555 register int *regs = p->p_md.md_regs; 556 int eflags; 557 558 /* 559 * (XXX old comment) regs[tESP] points to the return address. 560 * The user scp pointer is above that. 561 * The return address is faked in the signal trampoline code 562 * for consistency. 563 */ 564 scp = uap->sigcntxp; 565 fp = (struct sigframe *) 566 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 567 568 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 569 return(EINVAL); 570 571 /* 572 * Don't allow users to change privileged or reserved flags. 573 */ 574#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 575 eflags = scp->sc_ps; 576 /* 577 * XXX do allow users to change the privileged flag PSL_RF. The 578 * cpu sets PSL_RF in tf_eflags for faults. Debuggers should 579 * sometimes set it there too. tf_eflags is kept in the signal 580 * context during signal handling and there is no other place 581 * to remember it, so the PSL_RF bit may be corrupted by the 582 * signal handler without us knowing. Corruption of the PSL_RF 583 * bit at worst causes one more or one less debugger trap, so 584 * allowing it is fairly harmless. 585 */ 586 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs[tEFLAGS] & ~PSL_RF)) { 587#ifdef DEBUG 588 printf("sigreturn: eflags = 0x%x\n", eflags); 589#endif 590 return(EINVAL); 591 } 592 593 /* 594 * Don't allow users to load a valid privileged %cs. Let the 595 * hardware check for invalid selectors, excess privilege in 596 * other selectors, invalid %eip's and invalid %esp's. 597 */ 598#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 599 if (!CS_SECURE(scp->sc_cs)) { 600#ifdef DEBUG 601 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 602#endif 603 trapsignal(p, SIGBUS, T_PROTFLT); 604 return(EINVAL); 605 } 606 607 /* restore scratch registers */ 608 regs[tEAX] = scp->sc_eax; 609 regs[tEBX] = scp->sc_ebx; 610 regs[tECX] = scp->sc_ecx; 611 regs[tEDX] = scp->sc_edx; 612 regs[tESI] = scp->sc_esi; 613 regs[tEDI] = scp->sc_edi; 614 regs[tCS] = scp->sc_cs; 615 regs[tDS] = scp->sc_ds; 616 regs[tES] = scp->sc_es; 617 regs[tSS] = scp->sc_ss; 618 regs[tISP] = scp->sc_isp; 619 620 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 621 return(EINVAL); 622 623 if (scp->sc_onstack & 01) 624 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 625 else 626 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 627 p->p_sigmask = scp->sc_mask & ~sigcantmask; 628 regs[tEBP] = scp->sc_fp; 629 regs[tESP] = scp->sc_sp; 630 regs[tEIP] = scp->sc_pc; 631 regs[tEFLAGS] = eflags; 632 return(EJUSTRETURN); 633} 634 635/* 636 * Machine depdnetnt boot() routine 637 * 638 * I haven't seen anything too put here yet 639 * Possibly some stuff might be grafted back here from boot() 640 */ 641void 642cpu_boot(int howto) 643{ 644} 645 646/* 647 * Shutdown the CPU as much as possible 648 */ 649void 650cpu_halt(void) 651{ 652 for (;;) 653 __asm__ ("hlt"); 654} 655 656/* 657 * Clear registers on exec 658 */ 659void 660setregs(p, entry, stack) 661 struct proc *p; 662 u_long entry; 663 u_long stack; 664{ 665 int *regs = p->p_md.md_regs; 666 667#ifdef USER_LDT 668 struct pcb *pcb = &p->p_addr->u_pcb; 669 670 /* was i386_user_cleanup() in NetBSD */ 671 if (pcb->pcb_ldt) { 672 if (pcb == curpcb) 673 lldt(GSEL(GUSERLDT_SEL, SEL_KPL)); 674 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 675 pcb->pcb_ldt_len * sizeof(union descriptor)); 676 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 677 } 678#endif 679 680 bzero(regs, sizeof(struct trapframe)); 681 regs[tEIP] = entry; 682 regs[tESP] = stack; 683 regs[tEFLAGS] = PSL_USER | (regs[tEFLAGS] & PSL_T); 684 regs[tSS] = _udatasel; 685 regs[tDS] = _udatasel; 686 regs[tES] = _udatasel; 687 regs[tCS] = _ucodesel; 688 689 p->p_addr->u_pcb.pcb_flags = 0; /* no fp at all */ 690 load_cr0(rcr0() | CR0_TS); /* start emulating */ 691#if NNPX > 0 692 npxinit(__INITIAL_NPXCW__); 693#endif /* NNPX > 0 */ 694} 695 696static int 697sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 698{ 699 int error; 700 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 701 req); 702 if (!error && req->newptr) 703 resettodr(); 704 return (error); 705} 706 707SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 708 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 709 710SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 711 CTLFLAG_RW, &disable_rtc_set, 0, ""); 712 713SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 714 CTLFLAG_RD, &bootinfo, bootinfo, ""); 715 716SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 717 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 718 719/* 720 * Initialize 386 and configure to run kernel 721 */ 722 723/* 724 * Initialize segments & interrupt table 725 */ 726 727int currentldt; 728int _default_ldt; 729union descriptor gdt[NGDT]; /* global descriptor table */ 730struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 731union descriptor ldt[NLDT]; /* local descriptor table */ 732 733static struct i386tss dblfault_tss; 734static char dblfault_stack[PAGE_SIZE]; 735 736extern struct user *proc0paddr; 737 738/* software prototypes -- in more palatable form */ 739struct soft_segment_descriptor gdt_segs[] = { 740/* GNULL_SEL 0 Null Descriptor */ 741{ 0x0, /* segment base address */ 742 0x0, /* length */ 743 0, /* segment type */ 744 0, /* segment descriptor priority level */ 745 0, /* segment descriptor present */ 746 0, 0, 747 0, /* default 32 vs 16 bit size */ 748 0 /* limit granularity (byte/page units)*/ }, 749/* GCODE_SEL 1 Code Descriptor for kernel */ 750{ 0x0, /* segment base address */ 751 0xfffff, /* length - all address space */ 752 SDT_MEMERA, /* segment type */ 753 0, /* segment descriptor priority level */ 754 1, /* segment descriptor present */ 755 0, 0, 756 1, /* default 32 vs 16 bit size */ 757 1 /* limit granularity (byte/page units)*/ }, 758/* GDATA_SEL 2 Data Descriptor for kernel */ 759{ 0x0, /* segment base address */ 760 0xfffff, /* length - all address space */ 761 SDT_MEMRWA, /* segment type */ 762 0, /* segment descriptor priority level */ 763 1, /* segment descriptor present */ 764 0, 0, 765 1, /* default 32 vs 16 bit size */ 766 1 /* limit granularity (byte/page units)*/ }, 767/* GLDT_SEL 3 LDT Descriptor */ 768{ (int) ldt, /* segment base address */ 769 sizeof(ldt)-1, /* length - all address space */ 770 SDT_SYSLDT, /* segment type */ 771 0, /* segment descriptor priority level */ 772 1, /* segment descriptor present */ 773 0, 0, 774 0, /* unused - default 32 vs 16 bit size */ 775 0 /* limit granularity (byte/page units)*/ }, 776/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 777{ 0x0, /* segment base address */ 778 0x0, /* length - all address space */ 779 0, /* segment type */ 780 0, /* segment descriptor priority level */ 781 0, /* segment descriptor present */ 782 0, 0, 783 0, /* default 32 vs 16 bit size */ 784 0 /* limit granularity (byte/page units)*/ }, 785/* GPANIC_SEL 5 Panic Tss Descriptor */ 786{ (int) &dblfault_tss, /* segment base address */ 787 sizeof(struct i386tss)-1,/* length - all address space */ 788 SDT_SYS386TSS, /* segment type */ 789 0, /* segment descriptor priority level */ 790 1, /* segment descriptor present */ 791 0, 0, 792 0, /* unused - default 32 vs 16 bit size */ 793 0 /* limit granularity (byte/page units)*/ }, 794/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 795{ (int) kstack, /* segment base address */ 796 sizeof(struct i386tss)-1,/* length - all address space */ 797 SDT_SYS386TSS, /* segment type */ 798 0, /* segment descriptor priority level */ 799 1, /* segment descriptor present */ 800 0, 0, 801 0, /* unused - default 32 vs 16 bit size */ 802 0 /* limit granularity (byte/page units)*/ }, 803/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 804{ (int) ldt, /* segment base address */ 805 (512 * sizeof(union descriptor)-1), /* length */ 806 SDT_SYSLDT, /* segment type */ 807 0, /* segment descriptor priority level */ 808 1, /* segment descriptor present */ 809 0, 0, 810 0, /* unused - default 32 vs 16 bit size */ 811 0 /* limit granularity (byte/page units)*/ }, 812/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 813{ 0, /* segment base address (overwritten by APM) */ 814 0xfffff, /* length */ 815 SDT_MEMERA, /* segment type */ 816 0, /* segment descriptor priority level */ 817 1, /* segment descriptor present */ 818 0, 0, 819 1, /* default 32 vs 16 bit size */ 820 1 /* limit granularity (byte/page units)*/ }, 821/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 822{ 0, /* segment base address (overwritten by APM) */ 823 0xfffff, /* length */ 824 SDT_MEMERA, /* segment type */ 825 0, /* segment descriptor priority level */ 826 1, /* segment descriptor present */ 827 0, 0, 828 0, /* default 32 vs 16 bit size */ 829 1 /* limit granularity (byte/page units)*/ }, 830/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 831{ 0, /* segment base address (overwritten by APM) */ 832 0xfffff, /* length */ 833 SDT_MEMRWA, /* segment type */ 834 0, /* segment descriptor priority level */ 835 1, /* segment descriptor present */ 836 0, 0, 837 1, /* default 32 vs 16 bit size */ 838 1 /* limit granularity (byte/page units)*/ }, 839}; 840 841static struct soft_segment_descriptor ldt_segs[] = { 842 /* Null Descriptor - overwritten by call gate */ 843{ 0x0, /* segment base address */ 844 0x0, /* length - all address space */ 845 0, /* segment type */ 846 0, /* segment descriptor priority level */ 847 0, /* segment descriptor present */ 848 0, 0, 849 0, /* default 32 vs 16 bit size */ 850 0 /* limit granularity (byte/page units)*/ }, 851 /* Null Descriptor - overwritten by call gate */ 852{ 0x0, /* segment base address */ 853 0x0, /* length - all address space */ 854 0, /* segment type */ 855 0, /* segment descriptor priority level */ 856 0, /* segment descriptor present */ 857 0, 0, 858 0, /* default 32 vs 16 bit size */ 859 0 /* limit granularity (byte/page units)*/ }, 860 /* Null Descriptor - overwritten by call gate */ 861{ 0x0, /* segment base address */ 862 0x0, /* length - all address space */ 863 0, /* segment type */ 864 0, /* segment descriptor priority level */ 865 0, /* segment descriptor present */ 866 0, 0, 867 0, /* default 32 vs 16 bit size */ 868 0 /* limit granularity (byte/page units)*/ }, 869 /* Code Descriptor for user */ 870{ 0x0, /* segment base address */ 871 0xfffff, /* length - all address space */ 872 SDT_MEMERA, /* segment type */ 873 SEL_UPL, /* segment descriptor priority level */ 874 1, /* segment descriptor present */ 875 0, 0, 876 1, /* default 32 vs 16 bit size */ 877 1 /* limit granularity (byte/page units)*/ }, 878 /* Data Descriptor for user */ 879{ 0x0, /* segment base address */ 880 0xfffff, /* length - all address space */ 881 SDT_MEMRWA, /* segment type */ 882 SEL_UPL, /* segment descriptor priority level */ 883 1, /* segment descriptor present */ 884 0, 0, 885 1, /* default 32 vs 16 bit size */ 886 1 /* limit granularity (byte/page units)*/ }, 887}; 888 889void 890setidt(idx, func, typ, dpl, selec) 891 int idx; 892 inthand_t *func; 893 int typ; 894 int dpl; 895 int selec; 896{ 897 struct gate_descriptor *ip = idt + idx; 898 899 ip->gd_looffset = (int)func; 900 ip->gd_selector = selec; 901 ip->gd_stkcpy = 0; 902 ip->gd_xx = 0; 903 ip->gd_type = typ; 904 ip->gd_dpl = dpl; 905 ip->gd_p = 1; 906 ip->gd_hioffset = ((int)func)>>16 ; 907} 908 909#define IDTVEC(name) __CONCAT(X,name) 910 911extern inthand_t 912 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 913 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 914 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 915 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 916 IDTVEC(syscall), IDTVEC(int0x80_syscall); 917 918void 919sdtossd(sd, ssd) 920 struct segment_descriptor *sd; 921 struct soft_segment_descriptor *ssd; 922{ 923 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 924 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 925 ssd->ssd_type = sd->sd_type; 926 ssd->ssd_dpl = sd->sd_dpl; 927 ssd->ssd_p = sd->sd_p; 928 ssd->ssd_def32 = sd->sd_def32; 929 ssd->ssd_gran = sd->sd_gran; 930} 931 932void 933init386(first) 934 int first; 935{ 936 int x; 937 unsigned biosbasemem, biosextmem; 938 struct gate_descriptor *gdp; 939 int gsel_tss; 940 struct isa_device *idp; 941 /* table descriptors - used to load tables by microp */ 942 struct region_descriptor r_gdt, r_idt; 943 int pagesinbase, pagesinext; 944 int target_page, pa_indx; 945 int off; 946 947 proc0.p_addr = proc0paddr; 948 949 atdevbase = ISA_HOLE_START + KERNBASE; 950 951 /* 952 * Initialize the console before we print anything out. 953 */ 954 cninit(); 955 956 /* 957 * make gdt memory segments, the code segment goes up to end of the 958 * page with etext in it, the data segment goes to the end of 959 * the address space 960 */ 961 /* 962 * XXX text protection is temporarily (?) disabled. The limit was 963 * i386_btop(round_page(etext)) - 1. 964 */ 965 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 966 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 967 for (x = 0; x < NGDT; x++) 968 ssdtosd(&gdt_segs[x], &gdt[x].sd); 969 970 /* make ldt memory segments */ 971 /* 972 * The data segment limit must not cover the user area because we 973 * don't want the user area to be writable in copyout() etc. (page 974 * level protection is lost in kernel mode on 386's). Also, we 975 * don't want the user area to be writable directly (page level 976 * protection of the user area is not available on 486's with 977 * CR0_WP set, because there is no user-read/kernel-write mode). 978 * 979 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 980 * should be spelled ...MAX_USER... 981 */ 982#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 983 /* 984 * The code segment limit has to cover the user area until we move 985 * the signal trampoline out of the user area. This is safe because 986 * the code segment cannot be written to directly. 987 */ 988#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 989 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 990 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 991 /* Note. eventually want private ldts per process */ 992 for (x = 0; x < NLDT; x++) 993 ssdtosd(&ldt_segs[x], &ldt[x].sd); 994 995 /* exceptions */ 996 for (x = 0; x < NIDT; x++) 997 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 998 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 999 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1000 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1001 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1002 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1003 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1004 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1005 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1006 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1007 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1008 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1009 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1010 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1011 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1012 setidt(14, &IDTVEC(page), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1013 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1014 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1015 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1016 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1017 setidt(0x80, &IDTVEC(int0x80_syscall), 1018 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1019 1020#include "isa.h" 1021#if NISA >0 1022 isa_defaultirq(); 1023#endif 1024 rand_initialize(); 1025 1026 r_gdt.rd_limit = sizeof(gdt) - 1; 1027 r_gdt.rd_base = (int) gdt; 1028 lgdt(&r_gdt); 1029 1030 r_idt.rd_limit = sizeof(idt) - 1; 1031 r_idt.rd_base = (int) idt; 1032 lidt(&r_idt); 1033 1034 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1035 lldt(_default_ldt); 1036 currentldt = _default_ldt; 1037 1038#ifdef DDB 1039 kdb_init(); 1040 if (boothowto & RB_KDB) 1041 Debugger("Boot flags requested debugger"); 1042#endif 1043 1044 /* Use BIOS values stored in RTC CMOS RAM, since probing 1045 * breaks certain 386 AT relics. 1046 */ 1047 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1048 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1049 1050 /* 1051 * If BIOS tells us that it has more than 640k in the basemem, 1052 * don't believe it - set it to 640k. 1053 */ 1054 if (biosbasemem > 640) { 1055 printf("Preposterous RTC basemem of %dK, truncating to 640K\n", 1056 biosbasemem); 1057 biosbasemem = 640; 1058 } 1059 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1060 printf("Preposterous BIOS basemem of %dK, truncating to 640K\n", 1061 bootinfo.bi_basemem); 1062 bootinfo.bi_basemem = 640; 1063 } 1064 1065 /* 1066 * Warn if the official BIOS interface disagrees with the RTC 1067 * interface used above about the amount of base memory or the 1068 * amount of extended memory. Prefer the BIOS value for the base 1069 * memory. This is necessary for machines that `steal' base 1070 * memory for use as BIOS memory, at least if we are going to use 1071 * the BIOS for apm. Prefer the RTC value for extended memory. 1072 * Eventually the hackish interface shouldn't even be looked at. 1073 */ 1074 if (bootinfo.bi_memsizes_valid) { 1075 if (bootinfo.bi_basemem != biosbasemem) { 1076 vm_offset_t pa; 1077 1078 printf( 1079 "BIOS basemem (%ldK) != RTC basemem (%dK), setting to BIOS value\n", 1080 bootinfo.bi_basemem, biosbasemem); 1081 biosbasemem = bootinfo.bi_basemem; 1082 1083 /* 1084 * XXX if biosbasemem is now < 640, there is `hole' 1085 * between the end of base memory and the start of 1086 * ISA memory. The hole may be empty or it may 1087 * contain BIOS code or data. Map it read/write so 1088 * that the BIOS can write to it. (Memory from 0 to 1089 * the physical end of the kernel is mapped read-only 1090 * to begin with and then parts of it are remapped. 1091 * The parts that aren't remapped form holes that 1092 * remain read-only and are unused by the kernel. 1093 * The base memory area is below the physical end of 1094 * the kernel and right now forms a read-only hole. 1095 * The part of it from 0 to 1096 * (trunc_page(biosbasemem * 1024) - 1) will be 1097 * remapped and used by the kernel later.) 1098 * 1099 * This code is similar to the code used in 1100 * pmap_mapdev, but since no memory needs to be 1101 * allocated we simply change the mapping. 1102 */ 1103 for (pa = trunc_page(biosbasemem * 1024); 1104 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1105 unsigned *pte; 1106 1107 pte = (unsigned *)vtopte(pa + KERNBASE); 1108 *pte = pa | PG_RW | PG_V; 1109 } 1110 } 1111 if (bootinfo.bi_extmem != biosextmem) 1112 printf("BIOS extmem (%ldK) != RTC extmem (%dK)\n", 1113 bootinfo.bi_extmem, biosextmem); 1114 } 1115 1116 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1117 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1118 1119 /* 1120 * Special hack for chipsets that still remap the 384k hole when 1121 * there's 16MB of memory - this really confuses people that 1122 * are trying to use bus mastering ISA controllers with the 1123 * "16MB limit"; they only have 16MB, but the remapping puts 1124 * them beyond the limit. 1125 */ 1126 /* 1127 * If extended memory is between 15-16MB (16-17MB phys address range), 1128 * chop it to 15MB. 1129 */ 1130 if ((pagesinext > 3840) && (pagesinext < 4096)) 1131 pagesinext = 3840; 1132 1133 /* 1134 * Maxmem isn't the "maximum memory", it's one larger than the 1135 * highest page of the physical address space. It should be 1136 * called something like "Maxphyspage". 1137 */ 1138 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1139 1140#ifdef MAXMEM 1141 Maxmem = MAXMEM/4; 1142#endif 1143 1144 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1145 if (idp != NULL && idp->id_msize != 0) 1146 Maxmem = idp->id_msize / 4; 1147 1148 /* call pmap initialization to make new kernel address space */ 1149 pmap_bootstrap (first, 0); 1150 1151 /* 1152 * Size up each available chunk of physical memory. 1153 */ 1154 1155 /* 1156 * We currently don't bother testing base memory. 1157 * XXX ...but we probably should. 1158 */ 1159 pa_indx = 0; 1160 badpages = 0; 1161 if (pagesinbase > 1) { 1162 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1163 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1164 physmem = pagesinbase - 1; 1165 } else { 1166 /* point at first chunk end */ 1167 pa_indx++; 1168 } 1169 1170 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1171 int tmp, page_bad = FALSE; 1172 1173 /* 1174 * map page into kernel: valid, read/write, non-cacheable 1175 */ 1176 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1177 invltlb(); 1178 1179 tmp = *(int *)CADDR1; 1180 /* 1181 * Test for alternating 1's and 0's 1182 */ 1183 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1184 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1185 page_bad = TRUE; 1186 } 1187 /* 1188 * Test for alternating 0's and 1's 1189 */ 1190 *(volatile int *)CADDR1 = 0x55555555; 1191 if (*(volatile int *)CADDR1 != 0x55555555) { 1192 page_bad = TRUE; 1193 } 1194 /* 1195 * Test for all 1's 1196 */ 1197 *(volatile int *)CADDR1 = 0xffffffff; 1198 if (*(volatile int *)CADDR1 != 0xffffffff) { 1199 page_bad = TRUE; 1200 } 1201 /* 1202 * Test for all 0's 1203 */ 1204 *(volatile int *)CADDR1 = 0x0; 1205 if (*(volatile int *)CADDR1 != 0x0) { 1206 /* 1207 * test of page failed 1208 */ 1209 page_bad = TRUE; 1210 } 1211 /* 1212 * Restore original value. 1213 */ 1214 *(int *)CADDR1 = tmp; 1215 1216 /* 1217 * Adjust array of valid/good pages. 1218 */ 1219 if (page_bad == FALSE) { 1220 /* 1221 * If this good page is a continuation of the 1222 * previous set of good pages, then just increase 1223 * the end pointer. Otherwise start a new chunk. 1224 * Note that "end" points one higher than end, 1225 * making the range >= start and < end. 1226 */ 1227 if (phys_avail[pa_indx] == target_page) { 1228 phys_avail[pa_indx] += PAGE_SIZE; 1229 } else { 1230 pa_indx++; 1231 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1232 printf("Too many holes in the physical address space, giving up\n"); 1233 pa_indx--; 1234 break; 1235 } 1236 phys_avail[pa_indx++] = target_page; /* start */ 1237 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1238 } 1239 physmem++; 1240 } else { 1241 badpages++; 1242 page_bad = FALSE; 1243 } 1244 } 1245 1246 *(int *)CMAP1 = 0; 1247 invltlb(); 1248 1249 /* 1250 * XXX 1251 * The last chunk must contain at least one page plus the message 1252 * buffer to avoid complicating other code (message buffer address 1253 * calculation, etc.). 1254 */ 1255 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1256 round_page(sizeof(struct msgbuf)) >= phys_avail[pa_indx]) { 1257 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1258 phys_avail[pa_indx--] = 0; 1259 phys_avail[pa_indx--] = 0; 1260 } 1261 1262 Maxmem = atop(phys_avail[pa_indx]); 1263 1264 /* Trim off space for the message buffer. */ 1265 phys_avail[pa_indx] -= round_page(sizeof(struct msgbuf)); 1266 1267 avail_end = phys_avail[pa_indx]; 1268 1269 /* now running on new page tables, configured,and u/iom is accessible */ 1270 1271 /* Map the message buffer. */ 1272 for (off = 0; off < round_page(sizeof(struct msgbuf)); off += PAGE_SIZE) 1273 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1274 avail_end + off, VM_PROT_ALL, TRUE); 1275 msgbufmapped = 1; 1276 1277 /* make a initial tss so microp can get interrupt stack on syscall! */ 1278 proc0.p_addr->u_pcb.pcb_tss.tss_esp0 = (int) kstack + UPAGES*PAGE_SIZE; 1279 proc0.p_addr->u_pcb.pcb_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1280 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1281 1282 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1283 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1284 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1285 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1286 dblfault_tss.tss_cr3 = IdlePTD; 1287 dblfault_tss.tss_eip = (int) dblfault_handler; 1288 dblfault_tss.tss_eflags = PSL_KERNEL; 1289 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = dblfault_tss.tss_gs = 1290 GSEL(GDATA_SEL, SEL_KPL); 1291 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1292 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1293 1294 ((struct i386tss *)gdt_segs[GPROC0_SEL].ssd_base)->tss_ioopt = 1295 (sizeof(struct i386tss))<<16; 1296 1297 ltr(gsel_tss); 1298 1299 /* make a call gate to reenter kernel with */ 1300 gdp = &ldt[LSYS5CALLS_SEL].gd; 1301 1302 x = (int) &IDTVEC(syscall); 1303 gdp->gd_looffset = x++; 1304 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1305 gdp->gd_stkcpy = 1; 1306 gdp->gd_type = SDT_SYS386CGT; 1307 gdp->gd_dpl = SEL_UPL; 1308 gdp->gd_p = 1; 1309 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1310 1311 /* XXX does this work? */ 1312 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1313 1314 /* transfer to user mode */ 1315 1316 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1317 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1318 1319 /* setup proc 0's pcb */ 1320 proc0.p_addr->u_pcb.pcb_flags = 0; 1321 proc0.p_addr->u_pcb.pcb_cr3 = IdlePTD; 1322} 1323 1324/* 1325 * The registers are in the frame; the frame is in the user area of 1326 * the process in question; when the process is active, the registers 1327 * are in "the kernel stack"; when it's not, they're still there, but 1328 * things get flipped around. So, since p->p_md.md_regs is the whole address 1329 * of the register set, take its offset from the kernel stack, and 1330 * index into the user block. Don't you just *love* virtual memory? 1331 * (I'm starting to think seymour is right...) 1332 */ 1333#define TF_REGP(p) ((struct trapframe *) \ 1334 ((char *)(p)->p_addr \ 1335 + ((char *)(p)->p_md.md_regs - kstack))) 1336 1337int 1338ptrace_set_pc(p, addr) 1339 struct proc *p; 1340 unsigned int addr; 1341{ 1342 TF_REGP(p)->tf_eip = addr; 1343 return (0); 1344} 1345 1346int 1347ptrace_single_step(p) 1348 struct proc *p; 1349{ 1350 TF_REGP(p)->tf_eflags |= PSL_T; 1351 return (0); 1352} 1353 1354int ptrace_write_u(p, off, data) 1355 struct proc *p; 1356 vm_offset_t off; 1357 int data; 1358{ 1359 struct trapframe frame_copy; 1360 vm_offset_t min; 1361 struct trapframe *tp; 1362 1363 /* 1364 * Privileged kernel state is scattered all over the user area. 1365 * Only allow write access to parts of regs and to fpregs. 1366 */ 1367 min = (char *)p->p_md.md_regs - kstack; 1368 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1369 tp = TF_REGP(p); 1370 frame_copy = *tp; 1371 *(int *)((char *)&frame_copy + (off - min)) = data; 1372 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1373 !CS_SECURE(frame_copy.tf_cs)) 1374 return (EINVAL); 1375 *(int*)((char *)p->p_addr + off) = data; 1376 return (0); 1377 } 1378 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1379 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1380 *(int*)((char *)p->p_addr + off) = data; 1381 return (0); 1382 } 1383 return (EFAULT); 1384} 1385 1386int 1387fill_regs(p, regs) 1388 struct proc *p; 1389 struct reg *regs; 1390{ 1391 struct trapframe *tp; 1392 1393 tp = TF_REGP(p); 1394 regs->r_es = tp->tf_es; 1395 regs->r_ds = tp->tf_ds; 1396 regs->r_edi = tp->tf_edi; 1397 regs->r_esi = tp->tf_esi; 1398 regs->r_ebp = tp->tf_ebp; 1399 regs->r_ebx = tp->tf_ebx; 1400 regs->r_edx = tp->tf_edx; 1401 regs->r_ecx = tp->tf_ecx; 1402 regs->r_eax = tp->tf_eax; 1403 regs->r_eip = tp->tf_eip; 1404 regs->r_cs = tp->tf_cs; 1405 regs->r_eflags = tp->tf_eflags; 1406 regs->r_esp = tp->tf_esp; 1407 regs->r_ss = tp->tf_ss; 1408 return (0); 1409} 1410 1411int 1412set_regs(p, regs) 1413 struct proc *p; 1414 struct reg *regs; 1415{ 1416 struct trapframe *tp; 1417 1418 tp = TF_REGP(p); 1419 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1420 !CS_SECURE(regs->r_cs)) 1421 return (EINVAL); 1422 tp->tf_es = regs->r_es; 1423 tp->tf_ds = regs->r_ds; 1424 tp->tf_edi = regs->r_edi; 1425 tp->tf_esi = regs->r_esi; 1426 tp->tf_ebp = regs->r_ebp; 1427 tp->tf_ebx = regs->r_ebx; 1428 tp->tf_edx = regs->r_edx; 1429 tp->tf_ecx = regs->r_ecx; 1430 tp->tf_eax = regs->r_eax; 1431 tp->tf_eip = regs->r_eip; 1432 tp->tf_cs = regs->r_cs; 1433 tp->tf_eflags = regs->r_eflags; 1434 tp->tf_esp = regs->r_esp; 1435 tp->tf_ss = regs->r_ss; 1436 return (0); 1437} 1438 1439#ifndef DDB 1440void 1441Debugger(const char *msg) 1442{ 1443 printf("Debugger(\"%s\") called.\n", msg); 1444} 1445#endif /* no DDB */ 1446 1447#include <sys/disklabel.h> 1448 1449/* 1450 * Determine the size of the transfer, and make sure it is 1451 * within the boundaries of the partition. Adjust transfer 1452 * if needed, and signal errors or early completion. 1453 */ 1454int 1455bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1456{ 1457 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1458 int labelsect = lp->d_partitions[0].p_offset; 1459 int maxsz = p->p_size, 1460 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1461 1462 /* overwriting disk label ? */ 1463 /* XXX should also protect bootstrap in first 8K */ 1464 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1465#if LABELSECTOR != 0 1466 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1467#endif 1468 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1469 bp->b_error = EROFS; 1470 goto bad; 1471 } 1472 1473#if defined(DOSBBSECTOR) && defined(notyet) 1474 /* overwriting master boot record? */ 1475 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1476 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1477 bp->b_error = EROFS; 1478 goto bad; 1479 } 1480#endif 1481 1482 /* beyond partition? */ 1483 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1484 /* if exactly at end of disk, return an EOF */ 1485 if (bp->b_blkno == maxsz) { 1486 bp->b_resid = bp->b_bcount; 1487 return(0); 1488 } 1489 /* or truncate if part of it fits */ 1490 sz = maxsz - bp->b_blkno; 1491 if (sz <= 0) { 1492 bp->b_error = EINVAL; 1493 goto bad; 1494 } 1495 bp->b_bcount = sz << DEV_BSHIFT; 1496 } 1497 1498 bp->b_pblkno = bp->b_blkno + p->p_offset; 1499 return(1); 1500 1501bad: 1502 bp->b_flags |= B_ERROR; 1503 return(-1); 1504} 1505